CN107872219B - Interface circuit between digital interphone frequency discriminator and ADC - Google Patents
Interface circuit between digital interphone frequency discriminator and ADC Download PDFInfo
- Publication number
- CN107872219B CN107872219B CN201711330013.5A CN201711330013A CN107872219B CN 107872219 B CN107872219 B CN 107872219B CN 201711330013 A CN201711330013 A CN 201711330013A CN 107872219 B CN107872219 B CN 107872219B
- Authority
- CN
- China
- Prior art keywords
- resistor
- adc
- capacitor
- frequency discriminator
- amplifier chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 30
- 238000006243 chemical reaction Methods 0.000 description 8
- 238000004891 communication Methods 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Amplifiers (AREA)
- Transceivers (AREA)
Abstract
The invention discloses an interface circuit between a digital interphone frequency discriminator and an ADC, which comprises a first capacitor, a second capacitor, a third capacitor, a first resistor, a fourth resistor and an amplifier chip.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to an interface circuit between a digital interphone frequency discriminator and an ADC.
Background
The center level and signal amplitude of the output of the conventional discriminator cannot be directly matched with those required by the conventional ADC conversion chip. Therefore, in the current communication circuit, a blocking capacitor needs to be arranged between the output end of the frequency discriminator and the input end of the amplifier to isolate the center level of the frequency discriminator; the signal amplified by the amplifier is transmitted to the input end of the ADC conversion chip after passing through a DC blocking capacitor to isolate the DC voltage generated by the amplifier; meanwhile, a voltage dividing circuit with higher impedance is connected to the input end of the ADC conversion chip to obtain the bias voltage required by the ADC conversion chip. As shown in fig. 1, this conventional approach has the following problems:
1. at the moment of power-on operation, the frequency discriminator outputs the central level, the voltage charges C1 through the electric leakage of the operational amplifier, so that the signal obtained by the output end of the operational amplifier is overlapped on a curve which rises along with the voltage of the input end of the operational amplifier, and the signal before the output voltage of the frequency discriminator is equal to the voltage of the input end of the operational amplifier cannot be correctly subjected to symbol judgment under the communication of an FSK system, for example;
2. at the moment of power-on operation, because of the voltage difference between the output end of the operational amplifier and the voltage dividing circuit formed by R3 and R4, the capacitor charges or discharges C2 through the operational amplifier, so that the signal sent into the ADC conversion chip is overlapped on a curve which is charged or discharged along with the capacitor, and the signal before the voltage difference between the output voltage of the operational amplifier and the input end of the ADC conversion chip is constant cannot be correctly subjected to symbol judgment under the communication of an FSK system, for example; in summary, the signal between the prior art frequency discriminator and the ADC will be distorted at the moment of power up, so there is room for improvement.
Disclosure of Invention
The present invention is directed to an interface circuit between a digital interphone discriminator and an ADC for solving the above-mentioned problems.
The invention realizes the above purpose through the following technical scheme:
the invention comprises a first capacitor, a second capacitor, a third capacitor, a first resistor, a fourth resistor and an amplifier chip, wherein the first end of the first resistor is connected with the first end of the first capacitor, the first end of the first resistor is used as a receiving end for outputting direct current bias and signal output of the discriminator, the second end of the first capacitor is simultaneously connected with the second end of the first resistor, the first end of the second resistor and the first pin of the amplifier chip, the second end of the second resistor is simultaneously connected with a negative electrode of a power supply, the first end of the fourth resistor, the first end of the second capacitor, the first end of the third capacitor and the fourth pin of the amplifier chip, the second end of the fourth resistor is simultaneously connected with the first end of the third resistor and the second pin of the amplifier chip, the third pin of the third resistor is an ADC signal output end, the ADC signal output end is connected with the ADC input direct current bias and signal input end, and the fifth pin of the amplifier chip is simultaneously connected with the second end of the second capacitor, the third end of the third capacitor and the positive electrode of the power supply.
The invention has the beneficial effects that:
compared with the prior art, the interface circuit between the digital interphone frequency discriminator and the ADC is applied to signal transmission between the digital interphone frequency discriminator and the ADC, can solve the problem of instant distortion of the input signals of the frequency discriminator and the ADC when the power is on, improves the communication quality, and has popularization and application values.
Drawings
FIG. 1 is an interface circuit between a prior art discriminator and an ADC;
fig. 2 is a schematic diagram of the circuit configuration of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings:
as shown in fig. 2: the invention comprises a first capacitor, a second capacitor, a third capacitor, a first resistor, a fourth resistor and an amplifier chip, wherein the first end of the first resistor is connected with the first end of the first capacitor, the first end of the first resistor is used as a receiving end for outputting direct current bias and signal output of the discriminator, the second end of the first capacitor is simultaneously connected with the second end of the first resistor, the first end of the second resistor and the first pin of the amplifier chip, the second end of the second resistor is simultaneously connected with a negative electrode of a power supply, the first end of the fourth resistor, the first end of the second capacitor, the first end of the third capacitor and the fourth pin of the amplifier chip, the second end of the fourth resistor is simultaneously connected with the first end of the third resistor and the second pin of the amplifier chip, the third pin of the third resistor is an ADC signal output end, the ADC signal output end is connected with the ADC input direct current bias and signal input end, and the fifth pin of the amplifier chip is simultaneously connected with the second end of the second capacitor, the third end of the third capacitor and the positive electrode of the power supply.
The circuit does not need to add a special direct current bias circuit at the input end of the ADC interface circuit.
In communication, whether in an acquainted word system or an analog system, the transmission is basically an alternating current signal. After the radio frequency circuit receives the signal and demodulates the signal into the baseband signal, the baseband signal is often required to be sent into a digital circuit such as a DSP to perform various processes, and finally the original signal of the transmitting end is obtained.
Since it is necessary to convert a signal from analog to digital, an AD conversion chip is often used to accomplish this part of the work.
Taking a frequency discriminator as an example, the frequency discriminator has a direct current voltage output V0 under the condition of the input of the center frequency in order to output an alternating current signal; when the frequency change Deltaf of the frequency discriminator is input, the frequency discriminator outputs a corresponding voltage V0+K.
In the invention, the direct-current bias voltage V0 output by the frequency discriminator is divided by the first resistor R1 and the second resistor R2 and then is sent into the in-phase amplifier formed by the operational amplifier, and the gain of the amplifier chip IC1 is 1+R3/R4. So that the DC voltage finally obtained at the output end is U DCOUT ＝{V0*[R1/(R1+R2)](1+r3/R4); since R1, R2, R3 and R4 can be regulated, almost any DC output voltage can be obtained as the DC bias voltage of the ADC conversion chip.
Regarding component parameter model: the first capacitance is 10uF, the second capacitance is 1000pF, the third capacitance is 47pF, the first resistance is 3.3kΩ, the second resistance is 15kΩ, the third resistance is 3.6kΩ, the fourth resistance is 2kΩ, and the amplifier chip IC2 is LM324.
The foregoing has shown and described the basic principles and main features of the present invention and the advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (1)
1. An interface circuit between a digital interphone frequency discriminator and an ADC, which is characterized in that: the first end of the first resistor is connected with the first end of the first capacitor, the first end of the first resistor is used as a receiving end for outputting direct current bias and signal output of the discriminator, the second end of the first resistor is simultaneously connected with the second end of the first resistor, the first end of the second resistor and the first pin of the amplifier chip, the second end of the second resistor is simultaneously connected with a negative electrode of a power supply, the first end of the fourth resistor, the first end of the second capacitor, the first end of the third capacitor and the fourth pin of the amplifier chip, the second end of the fourth resistor is simultaneously connected with the first end of the third resistor and the second pin of the amplifier chip, the third pin of the amplifier chip is an ADC signal output end, the ADC signal output end is connected with the ADC input direct current bias and signal input end, and the fifth end of the amplifier chip is simultaneously connected with the second end of the second capacitor, the second end of the third capacitor and the positive electrode of the power supply;
the first capacitance is 10uF, the second capacitance is 1000pF, the third capacitance is 47pF, the first resistance is 3.3kΩ, the second resistance is 15kΩ, the third resistance is 3.6kΩ, the fourth resistance is 2kΩ, and the amplifier chip IC2 is LM324.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711330013.5A CN107872219B (en) | 2017-12-13 | 2017-12-13 | Interface circuit between digital interphone frequency discriminator and ADC |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711330013.5A CN107872219B (en) | 2017-12-13 | 2017-12-13 | Interface circuit between digital interphone frequency discriminator and ADC |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107872219A CN107872219A (en) | 2018-04-03 |
| CN107872219B true CN107872219B (en) | 2023-11-24 |
Family
ID=61755776
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711330013.5A Active CN107872219B (en) | 2017-12-13 | 2017-12-13 | Interface circuit between digital interphone frequency discriminator and ADC |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107872219B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001019005A1 (en) * | 1999-09-03 | 2001-03-15 | Broadcom Corporation | System and method for the synchronization and distribution of telephony timing information in a cable modem network |
| US6339342B1 (en) * | 1999-03-19 | 2002-01-15 | Seiko Epson Corporation | Semiconductor device and electronic equipment using the same |
| KR20030067762A (en) * | 2002-01-15 | 2003-08-19 | 하이테콤시스템(주) | System and method for simultaneously transmitting voice signal and control data using one voice communication line |
| CN201674486U (en) * | 2010-05-05 | 2010-12-15 | 浙江海洋学院 | Circuit structure for portable radios |
| US9473120B1 (en) * | 2015-05-18 | 2016-10-18 | Qualcomm Incorporated | High-speed AC-coupled inverter-based buffer with replica biasing |
| CN106685536A (en) * | 2017-02-28 | 2017-05-17 | 湖南迈克森伟电子科技有限公司 | High-speed data transfer receiver and data processing method thereof |
| CN207475529U (en) * | 2017-12-13 | 2018-06-08 | 福建科立讯通信有限公司 | A kind of interface circuit between digital walkie-talkie frequency discriminator and ADC |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8553827B2 (en) * | 2009-10-20 | 2013-10-08 | Qualcomm Incorporated | ADC-based mixed-mode digital phase-locked loop |
| WO2015114836A1 (en) * | 2014-02-03 | 2015-08-06 | 富士通株式会社 | Transmitter, transmission/reception circuit, and radio transmission/reception system |
| US10114381B2 (en) * | 2016-02-29 | 2018-10-30 | Garmin International, Inc. | Emergency autoload system |
-
2017
- 2017-12-13 CN CN201711330013.5A patent/CN107872219B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6339342B1 (en) * | 1999-03-19 | 2002-01-15 | Seiko Epson Corporation | Semiconductor device and electronic equipment using the same |
| WO2001019005A1 (en) * | 1999-09-03 | 2001-03-15 | Broadcom Corporation | System and method for the synchronization and distribution of telephony timing information in a cable modem network |
| KR20030067762A (en) * | 2002-01-15 | 2003-08-19 | 하이테콤시스템(주) | System and method for simultaneously transmitting voice signal and control data using one voice communication line |
| CN201674486U (en) * | 2010-05-05 | 2010-12-15 | 浙江海洋学院 | Circuit structure for portable radios |
| US9473120B1 (en) * | 2015-05-18 | 2016-10-18 | Qualcomm Incorporated | High-speed AC-coupled inverter-based buffer with replica biasing |
| CN106685536A (en) * | 2017-02-28 | 2017-05-17 | 湖南迈克森伟电子科技有限公司 | High-speed data transfer receiver and data processing method thereof |
| CN207475529U (en) * | 2017-12-13 | 2018-06-08 | 福建科立讯通信有限公司 | A kind of interface circuit between digital walkie-talkie frequency discriminator and ADC |
Non-Patent Citations (1)
| Title |
|---|
| 中频数字化接收机系统设计与实现;胡延平 , 李纲 , 皇甫堪, 孙增军;电子技术应用(第07期);424-44 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107872219A (en) | 2018-04-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100463363C (en) | High frequency power amplifier and transmitter | |
| TW201445944A (en) | Low-power, noise insensitive communication channel using logarithmic detector amplifier (LDA) demodulator | |
| CN111669170B (en) | Digital isolator and signal transmission method thereof | |
| CN110350676B (en) | Wireless charging communication method and device | |
| CN101175101A (en) | Sound processing method and device for mobile phone microphone | |
| CN102545949A (en) | Radio frequency amplitude keying demodulation circuit with large input dynamic range | |
| CN101237286A (en) | Level detector, communication apparatus, and tuner | |
| US20240047999A1 (en) | Coil Current Demodulation Method and Circuit Based on Wireless Charging Power Transmitter | |
| CN105101001A (en) | Earphone identification device and terminal equipment | |
| CN107872219B (en) | Interface circuit between digital interphone frequency discriminator and ADC | |
| CN103728496A (en) | Antenna tuner impedance detection method based on phase detection | |
| US8693554B2 (en) | Capacitive communication circuit and method therefor | |
| CN108768328B (en) | Low-frequency electronic communication system | |
| CN207475529U (en) | A kind of interface circuit between digital walkie-talkie frequency discriminator and ADC | |
| CN111901009B (en) | Radio signal transmitting/receiving device, electronic device, and apparatus | |
| CN205510055U (en) | White light audio frequency communication device | |
| CN112532229A (en) | Pulse frequency detection and demodulation circuit and digital isolator | |
| CN218103158U (en) | Demodulation circuit and wireless charging device | |
| EP1481488B1 (en) | TRANSMITTER/RECEIVER FOR BIDIRECTIONAL COMMUNICATIONS | |
| US20200044486A1 (en) | Recovery of modulation amplitude in wireless charger tx demodulation | |
| WO2006118644A2 (en) | Logic threshold acquisition circuits and methods using reversed peak detectors | |
| CN207638651U (en) | Digital duplex communication transmission module | |
| CN113433463B (en) | Battery sensor relay unit supporting single-wire isolation communication | |
| CN218570221U (en) | Analog signal forwarding circuit and electronic equipment | |
| CN216670719U (en) | Remote communication receiving circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |