CN107851068A - The replacement method and alternative of data storage in a kind of cache memory - Google Patents
The replacement method and alternative of data storage in a kind of cache memory Download PDFInfo
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- CN107851068A CN107851068A CN201580081799.4A CN201580081799A CN107851068A CN 107851068 A CN107851068 A CN 107851068A CN 201580081799 A CN201580081799 A CN 201580081799A CN 107851068 A CN107851068 A CN 107851068A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
Abstract
The replacement method and alternative of data storage in a kind of cache, the cache is used for the data for storing multiple main memories, and the cache accesses the access time delay difference of each main memory, and methods described includes：Determine main memory block (S201) to be stored in main storage；Determine cache groups corresponding to the main memory block, the cache groups include at least two cache blocks, each cache blocks are correspondingly provided with weights, and the weights determine (S202) according to the rate of people logging in and access time delay of the affiliated main storage of data storage of the cache blocks；Determined to replace cache blocks (S203) according to the weights of each cache blocks in the cache groups；The data storage of the replacement cache blocks of determination is substituted for the data storage (S204) of the main memory block.The data storage that this method and device can reduce high MISS time delays is replaced out cache number, and then, improve the performance of storage system.
Description
The present embodiments relate to the replacement methods and alternative of storing data in field of computer technology more particularly to a kind of cache memory.
Cache memory (cache) is to be proposed by Wilkes in nineteen fifty-one in order to make up the speed difference between processor CPU and main memory earliest, is most important part in storage system.Since its bigger price of cache capacity is higher, realizes that difficulty is higher, therefore, the capacity of cache is generally more much smaller than main memory, some so inevitable data are not stored in cache, when accessing this partial data, miss (cache miss) can occur, otherwise be known as hit (cache hit).The performance and cache hit probability of Cache is closely coupled, and cache hit probability is higher, and the time that storage access needs is fewer, and the performance of cache is higher；Conversely, cache performance is lower.
Replace selection being affected to the hit rate of cache of algorithm.Usually used replacement algorithm is LRU (Least recently used, least recently used) algorithm and LFU (Lease Frequently Used) algorithm at present.Wherein, the case where LRU is according to each piece of use, always selects least recently used block to be replaced；LFU algorithm is that the least content of access times is replaced out cache.
The performance of Cache directly affects the performance of storage system, and the system of storage system determines the efficiency of communication.Using replacement algorithm in the prior art, the performance of storage system can not effectively improve.
Summary of the invention
The embodiment of the present invention provides the replacement method and alternative of storing data in a kind of cache memory, and the performance of storage system can be improved.
First aspect present invention provides a kind of replacement method of storing data in cache, comprising:
Determine main memory block to be stored in main memory；
Determine that the corresponding cache group of the main memory block, the cache group include at least two cache blocks, each cache block is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block；
Replacement cache block is determined according to the weight of the cache block each in the cache group；
The storing data of the determining replacement cache block is substituted for the storing data of the main memory block.
In the first possible implementation of the first aspect, described to determine that replacement cache block includes: according to the weight of the cache block each in the cache group
Block pointer information is obtained, the block pointer information is used to indicate prepared replacement cache block；
The replacement cache block of preparation according to the block pointer information searching, and judge the weight for replacing cache block of the preparation whether less than the first preset weights；
If so, using the replacement cache block of the preparation as the replacement cache block.
The possible implementation of with reference to first aspect the first, in the second possible implementation, if the weight of the replacement cache block of the preparation reaches first preset weights, the method also includes:
The block pointer information is overturn, and the weight of the replacement cache block of the preparation is subtracted one；
It returns and executes described the step of replacement cache block is determined according to the weight of the cache block each in the cache group.
In a third possible implementation of the first aspect, described to determine that replacement cache block includes: according to the weight of the cache block each in the cache group
Determine that weight is less than the cache block of the second preset weights in the cache group；
The replacement cache block is determined in cache block of the weight less than the second preset weights according to default replacement algorithm, wherein the default replacement algorithm includes lru algorithm, any algorithm in LFU algorithm and fifo algorithm.
The third possible implementation with reference to first aspect, in the fourth possible implementation, after the determining replacement cache block according to the weight of the cache block each in the cache group, the method also includes:
Determine that weight in the cache group reaches the cache block of second preset weights；
The weight is reached storing data in the cache block of second preset weights, and there is no the weights of the cache block of access to subtract one in preset duration.
With reference to first aspect or first aspect the first into any possible implementation in the 4th kind, in a fifth possible implementation, after the corresponding cache group of the determination main memory block, the method also includes:
Judge whether the memory space of the cache group free time is less than the data volume of the main memory block；
If so, executing described the step of determining replacement cache block according to the weight of the cache block each in the cache group；
Otherwise, the storing data of the main memory block is stored in the cache block of the cache group free time.
With reference to first aspect or first aspect the first into any possible implementation in the 5th kind, in a sixth possible implementation, main memory block to be stored includes: in the determining main memory
It receives processor and is directed to the access request that storage system issues, if during the cache loses one's life, and main memory is hit, then using the main memory block hit in main memory main memory block to be stored as described in.
Second aspect of the present invention additionally provides a kind of alternative of storing data in cache, comprising:
Main memory block determining module, for determining main memory block to be stored in main memory；
Group determining module, for determining the corresponding cache group of the main memory block, the cache group includes at least two cache blocks, and each cache block is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block；
Replacement block determining module, for determining replacement cache block according to the weight of the cache block each in the cache group；
Data replacement module, for the storing data of the replacement cache block determined to be substituted for the storing data of the main memory block.
In the first possible implementation of the second aspect, the replacement block determining module includes:
Pointer information acquiring unit, for obtaining block pointer information, the block pointer information is used to indicate prepared replacement cache block；
Searching unit, the replacement cache block for the preparation according to the block pointer information searching；
Judging unit, for judge the preparation that the searching unit is found replacement cache block weight whether less than the first preset weights；
First replacement block determination unit, if the weight of the replacement cache block for the preparation is less than first preset weights, using the replacement cache block of the preparation as the replacement cache block.
In conjunction with the first possible implementation of second aspect, in the second possible implementation, described device further include:
The weight of the replacement cache block of the preparation is subtracted one if the weight of the replacement cache block for the preparation reaches first preset weights by control of right module；
Pointer information control module, if the weight of the replacement cache block for the preparation reaches described first
Preset weights overturn the block pointer information, and trigger the replacement block determining module and determine replacement cache block according to the weight of the cache block each in the cache group.
In the third possible implementation of the second aspect, the replacement block determining module includes:
Screening unit, for determining that weight is less than the cache block of the second preset weights in the cache group；
Second replacement block determination unit, for determining the replacement cache block in cache block of the weight less than the second preset weights according to default replacement algorithm, wherein, the default replacement algorithm includes lru algorithm, any algorithm in LFU algorithm and fifo algorithm.
In conjunction with the third possible implementation of second aspect, in the fourth possible implementation,
The screening unit is also used to:
Determine that weight in the cache group reaches the cache block of second preset weights；
Described device further include:
Control of right module, there is no the weights of the cache block of access to subtract one in preset duration for storing data in the cache block for the weight to be reached to second preset weights.
In conjunction with the first of second aspect or second aspect into any possible implementation in the 4th kind, in a fifth possible implementation, described device further include:
Capacity check module, for judging whether the memory space of the cache group free time is less than the data volume of the main memory block, if the memory space of the cache group free time is less than the data volume of the main memory block, the replacement block determining module is triggered according to the weight of the cache block each in the cache group and determines replacement cache block；
The data replacement module is also used to:
If the memory space of the cache group free time reaches the data volume of the main memory block, the storing data of the main memory block is stored in the cache block of the cache group free time.
In conjunction with the first of second aspect or second aspect into any possible implementation in the 5th kind, in a sixth possible implementation, the main memory block determining module is specifically used for:
It receives processor and is directed to the access request that storage system issues, if during the cache loses one's life, and main memory is hit, then using the main memory block hit in main memory main memory block to be stored as described in.
Third aspect present invention additionally provides a kind of terminal device, the terminal device includes processor and memory, wherein, batch processing is also stored in the memory, and processor is used to call the program stored in the memory, so that the terminal device executes described in any item methods such as first aspect.
Fourth aspect present invention additionally provides a kind of computer storage medium, and the computer storage medium is stored with program, and described program includes described in any item methods such as first aspect when executing.
Implement the embodiment of the present invention, has the advantages that
Each cache group includes at least two cache blocks, each cache block is correspondingly provided with weight, since the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block, therefore, replacement cache block is determined according to the weight of each cache block in determining cache group, the storing data that high MISS time delay can be reduced is replaced out the number of cache, in turn, improves the performance of storage system.
In order to illustrate the embodiments of the present invention more clearly, the drawings to be used in the embodiments are briefly described below, apparently, drawings in the following description are only some embodiments of the invention, for those of ordinary skill in the art, without creative efforts, it is also possible to obtain other drawings based on these drawings.
Fig. 1 shows group and is connected the schematic diagram of image；
Fig. 2 is the replacement method flow chart of storing data in a kind of cache provided in an embodiment of the present invention；
Fig. 3 shows the rate of people logging in of multi-stage data and the schematic diagram of access time delay；
Fig. 4 is the replacement method flow chart of storing data in another kind cache provided in an embodiment of the present invention；
Fig. 5 is the schematic diagram of the alternative of storing data in a kind of cache provided in an embodiment of the present invention；
Fig. 6 is a kind of structural schematic diagram of replacement block determining module provided in an embodiment of the present invention；
Fig. 7 is a kind of structural schematic diagram of terminal device provided in an embodiment of the present invention.
Following will be combined with the drawings in the embodiments of the present invention, and technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, every other embodiment obtained by those of ordinary skill in the art without making creative efforts, shall fall within the protection scope of the present invention.
In this section, the basic concepts all referred to first to embodiment each in the present invention are illustrated.
Address mapping refers to a certain data in the address in main memory and pair between the address in cache
It should be related to.More commonly used address mapping is that group is connected image at present, wherein group is connected image mode can be as shown in Figure 1, cache is first divided into the identical several areas of size, piecemeal is carried out in the way of direct image to each area, and number, therefore, there is the identical cache block of multiple numbers in cache.Paging is carried out according to the size in area to main memory, every page of size according still further to cache block carries out piecemeal, and each main memory block can correspond to the cache block of the identical block number in not same district.As shown in Figure 1, the 0th piece of main memory page 0, the 0th piece of the 0th area of cache can be corresponded to, the 0th piece of the area J can also be corresponded to, in order to facilitate description, the corresponding cache block of main memory block is divided into group, such as page 0~the m pages of the 0th piece of the 0th piece of corresponding 0 area~jth area of main memory block, then by 0 area~jth area the 0th piece be divided into a cache group, i.e. the 0th piece of page 0~the m pages of main memory block can store in any cache block in the cache group, for the ease of inquiry, the number of cache group can be determined according to the number of main memory block, the cache group for such as determining the 0th piece of composition in 0 area~jth area is the 0th group；
The performance of storage system passes through (HIT times several * HIT time delay+MISS times number * MISS time delays) usually to be assessed, for only existing the storage system of a main memory, if cache hit probability improves, the performance of storage system also can be accordingly improved；But for there are the storage systems of multiple main memories, since the access time delay that CPU accesses each main memory is different, storage system is to include PL2 (Private L2), SL2 (Shared L2), SL3 (Shared L3), DDR (Double Data Rate, Double Data Rate synchronous DRAM) for, the access time delay longest of DDR, the access time delay of PL2 is most short, if miss, the MISS time delay that CPU accesses DDR is more much larger than the MISS time delay for accessing PL2, therefore, for there are the storage systems of multiple main memories, not only need to consider the performance of cache, also need to consider that MISS is delayed.The number that the embodiment of the present invention is replaced out cache by reducing the storing data of high MISS time delay passes through following embodiment introduction to improve the performance of storage system respectively.
Referring to Fig. 2, Fig. 2 is the replacement method flow chart of storing data in a kind of cache provided in an embodiment of the present invention.As shown in Fig. 2, the method may include:
Step S201 determines main memory block to be stored in main memory.
Preferably, it receives CPU and is directed to the access request that storage system issues, the access request carries access address, it inquires in the cache of the storage system and whether stores the corresponding storing data of the access address, if not storing the corresponding storing data of the access address in cache, i.e. cache lose one's life in, CPU then inquires main memory, if main memory is hit, using the main memory block hit in main memory as described to be stored
Main memory block；
Further, if main memory is hit, whether the hit-count of the main memory block in preset duration that can also detect hit reaches preset times threshold value, if so, just using the main memory block as the main memory block to be stored.It should be pointed out that the preset times threshold value can adjust according to actual needs.
Step S202, determine the corresponding cache group of the main memory block, the cache group includes at least two cache blocks, and each cache block is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block.
When main memory block to be stored has been determined, it can then determine the corresponding cache group of the main memory block, preferably, corresponding cache group can be determined according to the number of the main memory block, as shown in Figure 1, if it is determined that main memory block to be stored be the 0th piece of page 1, then can determine that corresponding cache group is the 0th group, the 0th group of cache block for including is the 0th piece of 0 area~jth area.
Wherein, each cache block in cache group is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block.Specifically, each main memory is correspondingly provided with weight, it is preferred that the weight can be an empirical value, and the empirical value is that the access time delay for referring to main memory and rate of people logging in determine that access time delay is longer and rate of people logging in is lower, and weight is higher.Storage system is for including tetra- main memories of PL2, SL2, SL3 and DDR, as shown in figure 3, the rate of people logging in of DDR is minimum and access time delay longest, its weight highest, the rate of people logging in highest and access time delay of PL2 is most short, and weight is minimum, and SL2 and SL3 fall between；
It is assumed that the main memory block that the weight that the weight that the weight that the weight of DDR is 3, SL3 is 2, SL2 is 1, PL2 is 0, DDR is stored in cache as main memory block to be stored, the weight for corresponding to cache block is then 3；The main memory block of SL3 is stored in cache as main memory block to be stored, and the weight for corresponding to cache block is then 2；The main memory block of SL2 is stored in cache as main memory block to be stored, and the weight for corresponding to cache block is then 1；The main memory block of PL2 is stored in cache as main memory block to be stored, and the weight for corresponding to cache block is then 0.
Step S203 determines replacement cache block according to the weight of the cache block each in the cache group.
In a kind of optional embodiment, available block pointer information, the block pointer information is used to indicate prepared replacement cache block；The replacement cache block of preparation according to the block pointer information searching, and judge the weight for replacing cache block of the preparation whether less than the first preset weights；If so, will be described
Prepared replacement cache block is as the replacement cache block.
Cache block in each group can be encoded by binary system, as shown in Figure 1, assuming that, j is equal to 3, i.e. each cache group includes 4 cache blocks, by taking 0 group of cache as an example, the 0th piece of its 0th area, the 0th piece of 1st area, the 0th piece of 2nd area, the 0th piece of corresponding binary coding in the 3rd area is 00, 01, 10, 11, the block pointer information can also use binary representation, when the main memory block wait store has been determined, the available block pointer information, assuming that the block pointer information is 00, then according to the 0th piece that the replacement cache block of the block pointer information searching to preparation is the 0th area, judge the 0th piece of the weight in the 0th area whether less than the first preset weights, assuming that, first preset weights are 2, the 0th piece of storage in the 0th area Data are the storing data in SL2, i.e., weight is 1, it is possible to determine that the 0th piece of the weight in the 0th area is then used as the replacement cache block for the 0th piece of the 0th area less than the first preset weights.
If the weight of the replacement cache block of the preparation reaches first preset weights, assuming that, first preset weights are still 2, the data of the 0th piece of storage in the 0th area are the storing data in DDR, i.e. weight is 3, it can be determined that the 0th piece of the weight in the 0th area reaches first preset weights, then overturn the block pointer information；Wherein, overturning the block pointer information can be to binary add one, and if the block pointer information before overturning is 00, then the block pointer information after overturning is 01；
If the weight of the replacement cache block of the preparation reaches first preset weights, illustrate, the access time delay of the storing data of the replacement cache block of the preparation is larger, if the storing data is directly replaced out cache, then when CPU accesses the storing data, MISS time delay is larger, reduces the performance of storage system, therefore, direct return step S203, again replacement cache is determined according to the block pointer information after overturning, also, subtracts one to the weight of the replacement cache block of the preparation.
In another optional embodiment, it can determine that weight is less than the cache block of the second preset weights in the cache group, the replacement cache block is determined in cache block of the weight less than the second preset weights according to default replacement algorithm, wherein, the default replacement algorithm includes lru algorithm, any algorithm in LFU algorithm and fifo algorithm.
It should be noted that how according to default replacement algorithm determined in cache block of the weight less than the second preset weights the replacement cache block be the skilled addressee will appreciate that, details are not described herein.
Further, the each or multiple default replacement algorithm of basis is determined in cache block of the weight less than the second preset weights after the replacement cache block, it can also determine that weight in the cache group reaches the cache block of second preset weights, the weight is reached to the cache of second preset weights
There is no the weights of the cache block of access to subtract one in preset duration for storing data in block.As shown in Figure 1, assuming that, j is equal to 3, i.e. each cache group includes 4 cache blocks, determining cache group is the 0th group, and the 0th area the 0th piece of weight be 3, 0th piece of the weight in the 1st area is 2, 0th piece of the weight in the 2nd area is 2, 0th piece of the weight in the 3rd area is 1, second preset weights are 2, after determining the 0th piece of the 3rd area for the replacement cache block in cache block of the weight less than the second preset weights according to default replacement algorithm, the 0th piece of the weight in the 0th area is then kept to 2, 0th piece of the weight in the 1st area is kept to 1, 0th piece of the weight in the 2nd area is kept to 1.
Further, after determining the corresponding cache group of the main memory block, it can also first judge whether the memory space of the cache group free time is less than the data volume of the main memory block, if, illustrate that the memory space inadequate of cache free time to store the storing data of the main memory block, thens follow the steps S203；Otherwise, illustrate that the memory space of cache free time is enough to store the storing data of the main memory block, then directly the storing data of main memory block is stored in the cache block of the cache group free time.
The storing data of the determining replacement cache block is substituted for the storing data of the main memory block by step S204.
In the embodiment shown in Figure 2, after determining the corresponding cache group of main memory block, replacement cache block is determined according to the weight of cache block each in the cache group, the weight of each cache block is determined according to the rate of people logging in and access time delay of the affiliated main memory of cache block, rate of people logging in is lower and access time delay is longer, its weight is bigger, weight is bigger, and its storing data residence time in cache is longer, the storing data for then reducing high MISS time delay is replaced out the number of cache, in turn, the performance of storage system is improved.
Referring to Fig. 4, Fig. 4 is the replacement method flow chart of storing data in another kind cache provided in an embodiment of the present invention.As shown in Figure 4 the method may include:
Step S401 determines main memory block to be stored in main memory.
Preferably, it receives CPU and is directed to the access request that storage system issues, the access request carries access address, it inquires in the cache of the storage system and whether stores the corresponding storing data of the access address, if not storing the corresponding storing data of the access address in cache, i.e. cache lose one's life in, CPU then inquires main memory, if main memory is hit, using the main memory block hit in main memory as the main memory block to be stored；
Further, if main memory is hit, the main memory block of hit can also be detected in preset duration
Whether hit-count reaches preset times threshold value, if so, just using the main memory block as the main memory block to be stored.It should be pointed out that the preset times threshold value can adjust according to actual needs.
Step S402, determine the corresponding cache group of the main memory block, the cache group includes at least two cache blocks, and each cache block is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block.
When main memory block to be stored has been determined, it can then determine the corresponding cache group of the main memory block, preferably, corresponding cache group can be determined according to the number of the main memory block, as shown in Figure 1, if it is determined that main memory block to be stored be the 0th piece of page 1, then can determine that corresponding cache group is the 0th group, the 0th group of cache block for including is the 0th piece of 0 area~jth area.
Wherein, each cache block in cache group is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block.Specifically, each main memory is correspondingly provided with weight, it is preferred that the weight can be an empirical value, and the empirical value is that the access time delay for referring to main memory and rate of people logging in determine that access time delay is longer and rate of people logging in is lower, and weight is higher.Storage system is for including tetra- main memories of PL2, SL2, SL3 and DDR, and the access time delay longest and rate of people logging in of DDR is minimum, weight highest, and the access time delay of PL2 is most short and rate of people logging in highest, and weight is minimum, and SL2 and SL3 fall between；
It is assumed that the main memory block that the weight that the weight that the weight that the weight of DDR is 3, SL3 is 2, SL2 is 1, PL2 is 0, DDR is stored in cache as main memory block to be stored, the weight for corresponding to cache block is then 3；The main memory block of SL3 is stored in cache as main memory block to be stored, and the weight for corresponding to cache block is then 2；The main memory block of SL2 is stored in cache as main memory block to be stored, and the weight for corresponding to cache block is then 1；The main memory block of PL2 is stored in cache as main memory block to be stored, and the weight for corresponding to cache block is then 0.
Step S403, obtains block pointer information, and the block pointer information is used to indicate prepared replacement cache block.
Cache block in each group can be encoded by binary system, as shown in Figure 1, assuming that, j is equal to 3, i.e., each cache group includes 4 cache blocks, by taking 0 group of cache as an example, the 0th piece of its 0th area, the 0th piece of the 1st area, the 0th piece of the 2nd area, the 0th piece of corresponding binary coding in the 3rd area be 00,01,10,11, the block pointer information can also use binary representation, when the main memory block wait store has been determined, the available block pointer information.
Step S404, the replacement cache block of preparation according to the block pointer information searching.
Whether step S405 judges the weight of replacement cache block of the preparation less than the first preset weights；If judging result be it is no, then follow the steps S406；Otherwise, step S407 is executed.
Step S406 overturns the block pointer information, and subtracts one for the weight of the replacement cache block of the preparation, returns to step S403.Wherein, the block pointer information obtained when returning to step S403 is the block pointer information after overturning.
Step S407, using the replacement cache block of the preparation as replacement cache block.
The storing data of the determining replacement cache block is substituted for the storing data of the main memory block by step S408.
In the embodiment shown in fig. 4, each cache group includes at least two cache blocks, each cache block is correspondingly provided with weight, the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block, after determining the corresponding cache group of main memory block, the replacement cache block of preparation is searched in the determining cache group according to block pointer information, if the weight of the replacement cache block of the preparation reaches the first preset weights, illustrate that the access time delay of the storing data of the replacement cache block of the preparation is larger, then the storing data of the replacement cache block of the preparation cache is not replaced into out, by increasing the biggish storing data of MISS time delay residence time in cache, reduce high M The storing data of ISS time delay is replaced out the number of cache, in turn, improves the performance of storage system.
Referring to Fig. 5, Fig. 5 is the schematic diagram of the alternative of storing data in a kind of cache provided in an embodiment of the present invention；The alternative of storing data provided in an embodiment of the present invention can be applied to base station baseband system or embedded computer system.The alternative 5 of the storing data as shown in Figure 5 at least may include main memory block determining module 51, group determining module 52, replacement block determining module 53 and data replacement module 54, in which:
Main memory block determining module 51, for determining main memory block to be stored in main memory；
Optionally, the main memory block determining module 51 specifically can be used for:
It receives processor and is directed to the access request that storage system issues, if during the cache loses one's life, and main memory is hit, then using the main memory block hit in main memory main memory block to be stored as described in.
Group determining module 52, for determining that the corresponding cache group of the main memory block, the cache group include at least two cache blocks, each cache block is correspondingly provided with weight, and the weight is according to the cache
The rate of people logging in and access time delay of the affiliated main memory of the storing data of block determine.
Replacement block determining module 53, for determining replacement cache block according to the weight of the cache block each in the cache group.
Data replacement module 54, for the storing data of the replacement cache block determined to be substituted for the storing data of the main memory block.
In a kind of optional embodiment, the replacement block determining module 53 at least may include: as shown in Figure 6 pointer information acquiring unit 531, searching unit 532, judging unit 533 and the first replacement block determination unit 534, in which:
Pointer information acquiring unit 531, for obtaining block pointer information, the block pointer information is used to indicate prepared replacement cache block；
Searching unit 532, the replacement cache block for the preparation according to the block pointer information searching；
Judging unit 533, for judge the preparation that the searching unit 532 is found replacement cache block weight whether less than the first preset weights；
First replacement block determination unit 534, if the weight of the replacement cache block for the preparation is less than first preset weights, using the replacement cache block of the preparation as the replacement cache block.
Further, the alternative 5 of the storing data can also include control of right module 55 and pointer information control module 56, in which:
The weight of the replacement cache block of the preparation is subtracted one if the weight of the replacement cache block for the preparation reaches first preset weights by control of right module 55；
Pointer information control module 56, if the weight of the replacement cache block for the preparation reaches first preset weights, the block pointer information is overturn, and triggers the replacement block determining module 53 and replacement cache block is determined according to the weight of the cache block each in the cache group.
In another optional embodiment, the replacement block determining module 53 at least may include: as shown in Figure 6 screening unit 535 and the second replacement block determination unit 536, in which:
Screening unit 535, for determining that weight is less than the cache block of the second preset weights in the cache group；
Second replacement block determination unit 536, for determining the replacement cache block in cache block of the weight less than the second preset weights according to default replacement algorithm, wherein, the default replacement algorithm includes lru algorithm, any algorithm in LFU algorithm and fifo algorithm.
It should be pointed out that the first replacement block determination unit 534 and the second replacement block determination unit 536 can merge, it is also possible to independently of each other, the present invention is without limitation.
Further, the screening unit 535 can be also used for:
Determine that weight in the cache group reaches the cache block of second preset weights；
The control of right module 55 is also used to:
The weight is reached storing data in the cache block of second preset weights, and there is no the weights of the cache block of access to subtract one in preset duration.
Further, the alternative 5 of the storing data can also include capacity check module 57, for judging whether the memory space of the cache group free time is less than the data volume of the main memory block, if the memory space of the cache group free time is less than the data volume of the main memory block, the replacement block determining module 53 is triggered according to the weight of the cache block each in the cache group and determines replacement cache block；
The data replacement module 54 is also used to:
If the memory space of the cache group free time reaches the data volume of the main memory block, the storing data of the main memory block is stored in the cache block of the cache group free time.
It will be appreciated that the function of each functional module of the alternative 5 of the storing data of the present embodiment can be implemented according to the method in above method embodiment, the associated description with reference to Fig. 1 or Fig. 4 embodiment of the method can be specifically corresponded to, details are not described herein again.
Referring to Fig. 7, Fig. 7 is a kind of structural schematic diagram of terminal device provided in an embodiment of the present invention.The storage system of the terminal device is equipped with cache and at least two main memories.As shown in fig. 7, the terminal device 7 may include: at least one processor 71, such as CPU, at least one communication bus 72 and memory 73.Wherein, communication bus 72 is for realizing the connection communication between these components.Memory 73 can be high speed RAM memory, be also possible to non-volatile memory (non-volatile memory), for example, at least a magnetic disk storage.Optionally, memory 73 can also be that at least one is located remotely from the storage device of aforementioned processor 71.Batch processing code is stored in memory 73, and processor 71 is used to call the program code stored in memory 73, for performing the following operations:
Determine main memory block to be stored in main memory；
Determine that the corresponding cache group of the main memory block, the cache group include at least two cache blocks, each cache block is correspondingly provided with weight, and the weight is according to belonging to the storing data of the cache block
The rate of people logging in and access time delay of main memory determine；
Replacement cache block is determined according to the weight of the cache block each in the cache group；
The storing data of the determining replacement cache block is substituted for the storing data of the main memory block.
In a kind of optional embodiment, the processor 71 determines that replacement cache block is specifically as follows according to the weight of the cache block each in the cache group:
Block pointer information is obtained, the block pointer information is used to indicate prepared replacement cache block；
The replacement cache block of preparation according to the block pointer information searching, and judge the weight for replacing cache block of the preparation whether less than the first preset weights；
If so, using the replacement cache block of the preparation as the replacement cache block.
Further, if the weight of the replacement cache block of the preparation reaches first preset weights, following operation is can also be performed in the processor 71:
The block pointer information is overturn, and the weight of the replacement cache block of the preparation is subtracted one；
It returns and executes described the step of replacement cache block is determined according to the weight of the cache block each in the cache group.
In another optional embodiment, the processor 71 determines that replacement cache block is specifically as follows according to the weight of the cache block each in the cache group:
Determine that weight is less than the cache block of the second preset weights in the cache group；
The replacement cache block is determined in cache block of the weight less than the second preset weights according to default replacement algorithm, wherein the default replacement algorithm includes lru algorithm, any algorithm in LFU algorithm and fifo algorithm.
Further, after the processor determines replacement cache block according to the weight of the cache block each in the cache group, following operation can also be performed:
Determine that weight in the cache group reaches the cache block of second preset weights；
The weight is reached storing data in the cache block of second preset weights, and there is no the weights of the cache block of access to subtract one in preset duration.
Further, after the processor 71 determines the corresponding cache group of the main memory block, following operation can also be performed:
Judge whether the memory space of the cache group free time is less than the data volume of the main memory block；
It is replaced if so, executing described determine according to the weight of the cache block each in the cache group
The step of cache block；
Otherwise, the storing data of the main memory block is stored in the cache block of the cache group free time.
Wherein, the processor 71 determines that main memory block to be stored in main memory is specifically as follows:
It receives processor and is directed to the access request that storage system issues, if during the cache loses one's life, and main memory is hit, then using the main memory block hit in main memory main memory block to be stored as described in.
It will be appreciated that the function of each functional module of the terminal device 7 of the present embodiment can be implemented according to the method in above method embodiment, the associated description with reference to Fig. 1 or Fig. 4 embodiment of the method can be specifically corresponded to, details are not described herein again.
Some or all of the embodiment of the present invention also proposed a kind of computer storage medium, and the computer storage medium is stored with program, and described program is included the steps that when executing in method described in combination of the embodiment of the present invention Fig. 1 or Fig. 4.
Those of ordinary skill in the art will appreciate that realizing all or part of the process in above-described embodiment method, it is that relevant hardware can be instructed to complete by computer program, the program can be stored in a computer-readable storage medium, the program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein, the storage medium can be magnetic disk, CD, read-only memory (Read-Only Memory, ROM) or random access memory (Random Access Memory, RAM) etc..
The above disclosure is only the preferred embodiments of the present invention, and of course, the scope of rights of the present invention cannot be limited by this, therefore equivalent changes made in accordance with the claims of the present invention, is still within the scope of the present invention.
Claims (16)
- The replacement method of storing data in a kind of cache memory cache, which is characterized in that the described method includes:Determine main memory block to be stored in main memory；Determine that the corresponding cache group of the main memory block, the cache group include at least two cache blocks, each cache block is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block；Replacement cache block is determined according to the weight of the cache block each in the cache group；The storing data of the determining replacement cache block is substituted for the storing data of the main memory block.
- The method as described in claim 1, which is characterized in that described to determine that replacement cache block includes: according to the weight of the cache block each in the cache groupBlock pointer information is obtained, the block pointer information is used to indicate prepared replacement cache block；The replacement cache block of preparation according to the block pointer information searching, and judge the weight for replacing cache block of the preparation whether less than the first preset weights；If so, using the replacement cache block of the preparation as the replacement cache block.
- Method according to claim 2, which is characterized in that if the weight of the replacement cache block of the preparation reaches first preset weights, the method also includes:The block pointer information is overturn, and the weight of the replacement cache block of the preparation is subtracted one；It returns and executes described the step of replacement cache block is determined according to the weight of the cache block each in the cache group.
- The method as described in claim 1, which is characterized in that described to determine that replacement cache block includes: according to the weight of the cache block each in the cache groupDetermine that weight is less than the cache block of the second preset weights in the cache group；The replacement cache block is determined in cache block of the weight less than the second preset weights according to default replacement algorithm, wherein the default replacement algorithm includes lru algorithm, LFU algorithm and advanced elder generation Any algorithm in algorithm out.
- Method as claimed in claim 4, which is characterized in that after the determining replacement cache block according to the weight of the cache block each in the cache group, the method also includes:Determine that weight in the cache group reaches the cache block of second preset weights；The weight is reached storing data in the cache block of second preset weights, and there is no the weights of the cache block of access to subtract one in preset duration.
- The method according to claim 1 to 5, which is characterized in that after the corresponding cache group of the determination main memory block, the method also includes:Judge whether the memory space of the cache group free time is less than the data volume of the main memory block；If so, executing described the step of determining replacement cache block according to the weight of the cache block each in the cache group；Otherwise, the storing data of the main memory block is stored in the cache block of the cache group free time.
- As the method according to claim 1 to 6, which is characterized in that main memory block to be stored includes: in the determining main memoryIt receives processor and is directed to the access request that storage system issues, if during the cache loses one's life, and main memory is hit, then using the main memory block hit in main memory main memory block to be stored as described in.
- The alternative of storing data in a kind of cache, which is characterized in that described device includes:Main memory block determining module, for determining main memory block to be stored in main memory；Group determining module, for determining the corresponding cache group of the main memory block, the cache group includes at least two cache blocks, and each cache block is correspondingly provided with weight, and the weight is determined according to the rate of people logging in and access time delay of the affiliated main memory of storing data of the cache block；Replacement block determining module, for determining replacement cache block according to the weight of the cache block each in the cache group；Data replacement module, for the storing data of the replacement cache block determined to be substituted for the storing data of the main memory block.
- Device as claimed in claim 8, which is characterized in that the replacement block determining module includes:Pointer information acquiring unit, for obtaining block pointer information, the block pointer information is used to indicate prepared replacement cache block；Searching unit, the replacement cache block for the preparation according to the block pointer information searching；Judging unit, for judge the preparation that the searching unit is found replacement cache block weight whether less than the first preset weights；First replacement block determination unit, if the weight of the replacement cache block for the preparation is less than first preset weights, using the replacement cache block of the preparation as the replacement cache block.
- Device as claimed in claim 9, which is characterized in that described device further include:The weight of the replacement cache block of the preparation is subtracted one if the weight of the replacement cache block for the preparation reaches first preset weights by control of right module；Pointer information control module, if the weight of the replacement cache block for the preparation reaches first preset weights, the block pointer information is overturn, and triggers the replacement block determining module and replacement cache block is determined according to the weight of the cache block each in the cache group.
- Device as claimed in claim 8, which is characterized in that the replacement block determining module includes:Screening unit, for determining that weight is less than the cache block of the second preset weights in the cache group；Second replacement block determination unit, for determining the replacement cache block in cache block of the weight less than the second preset weights according to default replacement algorithm, wherein, the default replacement algorithm includes lru algorithm, any algorithm in LFU algorithm and fifo algorithm.
- Device as claimed in claim 11, which is characterized in thatThe screening unit is also used to:Determine that weight in the cache group reaches the cache block of second preset weights；Described device further include:Control of right module, there is no the weights of the cache block of access to subtract one in preset duration for storing data in the cache block for the weight to be reached to second preset weights.
- Such as the described in any item devices of claim 8-12, which is characterized in that described device further include:Capacity check module, for judging whether the memory space of the cache group free time is less than the data volume of the main memory block, if the memory space of the cache group free time is less than the data volume of the main memory block, the replacement block determining module is triggered according to the weight of the cache block each in the cache group and determines replacement cache block；The data replacement module is also used to:If the memory space of the cache group free time reaches the data volume of the main memory block, the storing data of the main memory block is stored in the cache block of the cache group free time.
- Such as the described in any item devices of claim 8-13, which is characterized in thatThe main memory block determining module is specifically used for:It receives processor and is directed to the access request that storage system issues, if during the cache loses one's life, and main memory is hit, then using the main memory block hit in main memory main memory block to be stored as described in.
- A kind of terminal device, which is characterized in that the terminal device includes processor and memory, wherein, batch processing is also stored in the memory, and processor is used to call the program stored in the memory, so that the terminal device executes the method according to claim 1 to 7.
- A kind of computer storage medium, which is characterized in that the computer storage medium is stored with program, and described program includes method of any of claims 1-7 when executing.
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| CN112395221A (en) * | 2020-11-20 | 2021-02-23 | 华中科技大学 | Cache replacement method and device based on energy consumption characteristics of MLC STT-RAM |
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| CN1255986A (en) * | 1997-03-14 | 2000-06-07 | 艾利森电话股份有限公司 | Penalty-based cache storage and replacement techniques |
| US20080016297A1 (en) * | 2006-07-13 | 2008-01-17 | Bartley Gerald K | Multi-Level Memory Architecture With Data Prioritization |
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