CN107851027A8 - 数据处理系统 - Google Patents

数据处理系统 Download PDF

Info

Publication number
CN107851027A8
CN107851027A8 CN201680044798.7A CN201680044798A CN107851027A8 CN 107851027 A8 CN107851027 A8 CN 107851027A8 CN 201680044798 A CN201680044798 A CN 201680044798A CN 107851027 A8 CN107851027 A8 CN 107851027A8
Authority
CN
China
Prior art keywords
instruction
register
functional unit
execution
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201680044798.7A
Other languages
English (en)
Other versions
CN107851027A (zh
CN107851027B (zh
Inventor
J·尼斯塔德
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd filed Critical ARM Ltd
Publication of CN107851027A publication Critical patent/CN107851027A/zh
Publication of CN107851027A8 publication Critical patent/CN107851027A8/zh
Application granted granted Critical
Publication of CN107851027B publication Critical patent/CN107851027B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G06F9/38585—Result writeback, i.e. updating the architectural state or memory with result invalidation, e.g. nullification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/50—Lighting effects
    • G06T15/80—Shading
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2200/00—Indexing scheme for image data processing or generation, in general
    • G06T2200/28—Indexing scheme for image data processing or generation, in general involving image processing hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Programmable Controllers (AREA)

Abstract

图形处理器的可编程执行单元(42)包括可操作为执行指令(51)的功能单元(50)。功能单元(50)的输出可以被写到寄存器文件(46)以及借助于反馈电路(52)直接返馈作为对该功能单元的输入这两者。对应地，要由功能单元(50)执行的指令可以选择来自之前指令的执行的所反馈的输出(52)或来自寄存器(46)的输入。一组指令(53)中的各指令之间的寄存器访问描述符(54)指定值将在功能单元将在执行指令时读取的寄存器端口上可用的寄存器、以及指令执行的结果将被写到的寄存器地址。可编程执行单元(42)执行要原子地执行的指令组(53)。
CN201680044798.7A 2015-07-31 2016-07-22 图形处理单元的可编程执行单元、数据处理系统、操作方法 Active CN107851027B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1513609.6A GB2540970B (en) 2015-07-31 2015-07-31 Executing Groups of Instructions Atomically
GB1513609.6 2015-07-31
PCT/GB2016/052226 WO2017021689A1 (en) 2015-07-31 2016-07-22 Data processing systems

Publications (3)

Publication Number Publication Date
CN107851027A CN107851027A (zh) 2018-03-27
CN107851027A8 true CN107851027A8 (zh) 2018-05-22
CN107851027B CN107851027B (zh) 2022-02-11

Family

ID=54063033

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680044798.7A Active CN107851027B (zh) 2015-07-31 2016-07-22 图形处理单元的可编程执行单元、数据处理系统、操作方法

Country Status (5)

Country Link
US (1) US10593093B2 (zh)
CN (1) CN107851027B (zh)
GB (1) GB2540970B (zh)
TW (1) TWI706372B (zh)
WO (1) WO2017021689A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10768935B2 (en) * 2015-10-29 2020-09-08 Intel Corporation Boosting local memory performance in processor graphics
GB2574817B (en) * 2018-06-18 2021-01-06 Advanced Risc Mach Ltd Data processing systems
CN108845829B (zh) * 2018-07-03 2021-06-25 中国人民解放军国防科技大学 一种系统寄存器访问指令的执行方法
US11830101B2 (en) * 2020-07-17 2023-11-28 Arm Limited Graphics processors

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6615338B1 (en) 1998-12-03 2003-09-02 Sun Microsystems, Inc. Clustered architecture in a VLIW processor
US20030093509A1 (en) * 2001-10-05 2003-05-15 Li Raymond M. Storage area network methods and apparatus with coordinated updating of topology representation
US7439979B1 (en) * 2004-11-10 2008-10-21 Nvidia Corporation Shader with cache memory
US7496735B2 (en) * 2004-11-22 2009-02-24 Strandera Corporation Method and apparatus for incremental commitment to architectural state in a microprocessor
US7623132B1 (en) * 2004-12-20 2009-11-24 Nvidia Corporation Programmable shader having register forwarding for reduced register-file bandwidth consumption
US7809927B2 (en) * 2007-09-11 2010-10-05 Texas Instruments Incorporated Computation parallelization in software reconfigurable all digital phase lock loop
US20090125706A1 (en) * 2007-11-08 2009-05-14 Hoover Russell D Software Pipelining on a Network on Chip
US8200914B2 (en) * 2008-01-03 2012-06-12 International Business Machines Corporation Apparatus, system, and method for a read-before-write storage controller instruction
US8108610B1 (en) * 2008-10-21 2012-01-31 Nvidia Corporation Cache-based control of atomic operations in conjunction with an external ALU block
CN101706779B (zh) * 2009-10-12 2013-05-08 南京联创科技集团股份有限公司 基于oracle的伞状数据导入导出方法
US9798548B2 (en) * 2011-12-21 2017-10-24 Nvidia Corporation Methods and apparatus for scheduling instructions using pre-decode data
US20130166882A1 (en) * 2011-12-22 2013-06-27 Jack Hilaire Choquette Methods and apparatus for scheduling instructions without instruction decode
US20130198760A1 (en) * 2012-01-27 2013-08-01 Philip Alexander Cuadra Automatic dependent task launch
US9183609B2 (en) * 2012-12-20 2015-11-10 Nvidia Corporation Programmable blending in multi-threaded processing units
US9256466B2 (en) * 2013-06-07 2016-02-09 Arm Limited Data processing systems
CN110097492A (zh) * 2013-09-26 2019-08-06 想象技术有限公司 原子存储器更新单元和方法
US9471323B2 (en) * 2013-10-03 2016-10-18 Intel Corporation System and method of using an atomic data buffer to bypass a memory location

Also Published As

Publication number Publication date
GB201513609D0 (en) 2015-09-16
US10593093B2 (en) 2020-03-17
CN107851027A (zh) 2018-03-27
GB2540970B (en) 2018-08-15
TWI706372B (zh) 2020-10-01
GB2540970A (en) 2017-02-08
TW201712631A (zh) 2017-04-01
CN107851027B (zh) 2022-02-11
WO2017021689A1 (en) 2017-02-09
US20180211436A1 (en) 2018-07-26

Similar Documents

Publication Publication Date Title
GB2533256A (en) Data processing systems
CN107851027A8 (zh) 数据处理系统
EP2362309A3 (en) Printing system, cloud computing system, printing system control method, and program
WO2016094840A3 (en) System, method & computer readable medium for software protection via composable process-level virtual machines
WO2014004050A3 (en) Systems, apparatuses, and methods for performing a shuffle and operation (shuffle-op)
EP3226121A3 (en) Accessing data in multi-dimensional tensors
WO2016100142A3 (en) Advanced processor architecture
WO2016003820A3 (en) System and methods for expandably wide operand instructions
WO2014206356A3 (en) System and method for extended peripheral component interconnect express fabrics
WO2016167919A3 (en) Pairing fonts for presentation
GB2508533A (en) Instruction and logic to provide vector scatter-op and gather-op functionality
WO2014062265A4 (en) Neural processing engine and architecture using the same
WO2018093439A3 (en) Processors, methods, systems, and instructions to load multiple data elements to destination storage locations other than packed data registers
RU2016135016A (ru) Процессоры, способы, системы и команды для сложения трех операндов-источников с плавающей запятой
GB2456775B (en) Apparatus and method for performing permutation operations on data
WO2012048162A3 (en) System and method for extending a visualization platform
EP2660715A3 (en) Optimizing register initialization operations
EP2889760A3 (en) SMS4 acceleration processors, methods, systems, and instructions
IN2014DN05705A (zh)
WO2008079776A3 (en) System and method for performing input/output operations on a data processing platform that supports multiple memory page sizes
GB2520860A (en) Systems, apparatuses, and methods for performing conflict detection and broadcasting contents of a register to data element positions of another register
GB2580854A (en) Bulk store and load operations of configuration state registers
EP3128415A3 (en) Computing device, process control method, and process control program
WO2016102055A3 (de) Verfahren zum betrieb einer steuerungskomponente für ein luftfahrzeug sowie steuerungskomponente
GB2499532A (en) Method and apparatus for universal logical operations

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
CI02 Correction of invention patent application

Correction item: Applicant

False: Advanced Risc Machines Ltd.

Number: 13-01

Volume: 34

Correction item: Applicant

Correct: Arm Co., Ltd.

False: Advanced Risc Machines Ltd.

Number: 13-01

Page: The title page

Volume: 34

CI02 Correction of invention patent application
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant