CN107831823A - A kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric - Google Patents
A kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric Download PDFInfo
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- CN107831823A CN107831823A CN201711345248.1A CN201711345248A CN107831823A CN 107831823 A CN107831823 A CN 107831823A CN 201711345248 A CN201711345248 A CN 201711345248A CN 107831823 A CN107831823 A CN 107831823A
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Abstract
The invention discloses a kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric, this method is to improve the analysis efficiency of power network topology with optimizing electric network composition as starting point, utilize the resources advantage of restructural optical processor, construct the generalized addition device and broad sense multiplier of big digit, by data splicing and editing technology, by multirow inside Gaussian elimination method an iteration, full parellel processing is made in the computing of multiple row, it will be decomposed in traditional algorithm, former generation, the three of back substitution, which recirculate, to be improved to one and recirculates completion, to reduce the delay of Gaussian elimination method analysis network topology, improve the analysis to complex network data and disposal ability.This invention address that the ability of lifting Gaussian elimination method dynamic realtime processing complex electric network topological structure, the present invention can successfully manage the mass data problem that power network topology analysis faces, improve the efficiency of topological structure of electric analysis.
Description
Technical field
The present invention relates to a kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric.
Background technology
Electric power topological network is made up of airfield equipment and transmission line of electricity etc. in reality, can use non-directed graph G, incidence matrix A
Deng the logical relation represented between node, mathematical modeling is taken out, based on the related operation rule of Boolean algebra, analysis is opened up
Flutter the connected state between any two node in structure.2007, the Han Xue mountains team of Shandong University was by power network topology analysis
It is converted into the transitive closure battle array A for seeking Ac, and derive as drawn a conclusion：Ac=An-1, Ac=AAc+ I, it is seen that AcCalculating be converted into
The solution of similar system of linear equations, is completed by Gaussian elimination method.The topological structure of traditional Gaussian elimination method analysis n nodes
When, multiplication operations amount is n2(n-2) (2n-1), algorithm complex are O (2n4), algorithm complex is improved to O by Han Xue mountains team
(n3).Although scholars are directed to the linguistic term of topological analysis algorithm, the limitation of existing algorithm is larger, in addition power network
Topological structure is complicated and changeable, and the real-time of topological analysis, efficiency, calculating, which take, is faced with stern challenge, and design is a kind of higher
Effect, the smaller Gaussian elimination method implementation of computation delay are extremely urgent to need to solve the problems, such as.
2000, the Jin Yi professors of Shanghai University and its Research Team proposed three concepts and structure for being worth optical computers,
Using two polarised light state H, V expressing informations that unglazed state W and polarization direction are mutually orthogonal, with three-valued logic, MSD digital display circuits
Based on complete computing, its Core Superiority is that optical processor is restructural, you can with according to calculate demand, construct at any time
Go out the two-value or three-valued logic arithmetic unit of user or conventional Engineering Algorithm needs, and it is numerous by optics arithmetic logic unit data position
The characteristics of, classifying rationally goes out multiple computing subregions, completes calculating task parallel, reaches the mesh for improving efficiency of algorithm, reducing delay
's.
The content of the invention
It is an object of the invention to propose a kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric, the party
Method is based on three value optical computer core calculations technologies, to improve the efficiency of topological structure of electric analysis and optimization as mesh
's.
The present invention to achieve these goals, adopts the following technical scheme that：
A kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric, in terms of the core of three value optical computers
Based on calculation technology, specifically comprise the following steps：
S1. incidence matrix A, matrix dimension n and algorithm, point are inputted in the user interface of three value optical computers
Hit " it is determined that " button, computing request is sent to inside three value optical computers；
S2. three value optical computers generate SZG files, and incidence matrix A matrix element a is included in the SZG filesij, square
The algorithm of battle array dimension n, broad sense multiplication and generalized addition；
S3. task scheduling modules parsing SZG file acquisition n, for applying for and distributing the data of restructural optical processor
Digit；
S4. data bit management module calculates the data bits total amount V neededT=2n (n-1), inquire about current restructural optics
Idle data bit section h~h+V on processorT- 1, and by data bit section h~h+VT- 1 distribution uses, task scheduling modules
Arrange incidence matrix A matrix element aij, generate corresponding operation number encoder, row format standardization of going forward side by side；
S5. task scheduling modules are by data bit section h~h+V of distributionT- 1, incidence matrix A matrix element aijAnd
Reorganization order code is sent to the bottom control software of three value optical computers；
S6. reconstructed module generates reorganization order code according to the light path design of broad sense multiplication and generalized addition, and performs these
Reorganization order code, construct a VMThe broad sense multiplier M and a V of=n (n-1) positionNThe generalized addition device N of=n (n-1) position；
S7. the iterative calculation step of the decomposition of bottom control software implementation Gaussian elimination method, former generation and back substitution；
In each computing, the operational data inside an iteration is spliced and is disposably sent into restructural optical processor
Enter line translation, at the end of by editing technology generate each conversion result；
The result of back substitution computing output, charges to matrix Ac, be exactly power network topology transitive closure battle array；
S8. task scheduling modules are by computing output matrix AcWrite in SZG destination files, converted by document analysis step
For decimal representation form and return to the result；
Wherein, task scheduling modules, data bit management module and reconstructed module are the software module of three value optical computers.
Preferably, in the step s7, the iterative calculation step of the decomposition of Gaussian elimination method, former generation and back substitution is specific
For：
The implementation steps of s71 Gaussian elimination method decomposition operations are：
S711. incidence matrix A matrix element a is obtainedijAnd matrix dimension n, complete iteration variable i, C11、O11、C12、
O12、S1、R1Definition and assignment operation, make i initial value be 1；
S712. the input data of the broad sense multiplying of decomposition step is prepared
By the matrix element a of the row of matrix A i-thi,i+1...ainFirst splice, replicate n-i parts, then be spliced into one (n-i)2's
Data, last position zero padding are sent to the control light path coding information of encoder generation broad sense multiplier, remembered into the data of n (n-1) position
Enter variable C11；As i=1, after splicing replicates zero padding, data a is obtained12...a1na12...a1n...a12...a1n0...0, by it
It is sent into encoder；
The matrix element a that matrix A i-th is arrangedi+1,i...aniFirst bitwise copy n-i parts, then it is spliced into one (n-i)2Number
According to last position zero padding is sent to the main optical path coding information of encoder generation broad sense multiplier, charges to change into the data of n (n-1) position
Measure O11；As i=1, by data a21...a21a31...a31...an1...an10...0 it is sent into encoder；
S713. the broad sense multiplying of decomposition step is implemented
By C11And O11It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to change
Measure S1；
S714. the input data of the generalized addition computing of decomposition step is prepared
By matrix A element aI+1, i+1~annSpliced with behavior unit, obtained one (n-i)2The data of position, last position are mended
Zero into n (n-1) position data, be sent to encoder generation generalized addition device control light path coding information, charge to variable C12；When
During i=1, it is a to splice the data obtained after zero padding22...a2na32...a3n...an2...ann；
By S1The main optical path coding information of generalized addition device is generated, charges to variable O12；
S715. the generalized addition computing of decomposition step is implemented
By C12And O12It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable
R1；
S716. decoder is to result R1Carry out step-by-step editing, preceding (n-i)2Position is used as matrix new element ai+1,i+1~annRenewal
Matrix A；
S717.i increases by 1, the matrix that decoder obtains last round of iteration carries out feedback processing, repetitive assignment step s712
~s716, until i=n-1, final result, which is still preserved to matrix A, A=LU, decomposition operation, to be terminated；
The implementation steps of s72 Gaussian elimination method former generation computings are：
S721. matrix of consequence A, L of decomposition operation are obtained, completes iteration variable j, C21、O21、C22、O22、S2、R2Definition
And assignment operation, it is unit matrix that matrix B, which assigns initial value, and the initial value for making j is 1；
S722. the input data of the broad sense multiplying of forward substitution step is prepared
By the element b below matrix B diagonalj1...bjjbj1...bj,j+1...bj1...bj,n-1It is spliced into oneData, into the data of n (n-1) position, the control light path for being sent to encoder generation broad sense multiplier is compiled for last position zero padding
Code information, charges to variable C21；As j=1, after splicing replicates zero padding, data are obtained
b11b11b12b11b12b13...b11b12...b1,n-10...0, it is sent to encoder；
Accordingly, the jth column element of matrix L is replicated, is spliced intoData lj+1,j...lj+1,jlj+2, j...lj+2,j...lnj...lnj, last position zero padding is sent to the main optical path of encoder generation broad sense multiplier into the data of n (n-1) position
Coding information, charge to variable O21；As j=1, by data l21l31l31l41l41l41...ln1...ln10...0 it is sent into encoder；
S723. the broad sense multiplying of forward substitution step is implemented
By C21And O21It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to change
Measure S2；
S724. the input data of the generalized addition computing of forward substitution step is prepared
Element below matrix B diagonal is spliced intoPosition data bj+1,1...bj+1,jbj+2,1...bj+2,j+ 1...bn1...bn,n-1, into n (n-1) position data, the control light path for being sent to encoder generation generalized addition device encodes for last position zero padding
Information, charge to variable C22；As j=1, the data spliced after zero padding are b21b31b32b41b42b43...bn1bn2...bn,n- 10...0；
By S2The main optical path coding information of generalized addition device is generated, charges to variable O22；
S725. the generalized addition computing of forward substitution step is implemented
By C22And O22It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable
R2；
S726. decoder is to result R2Step-by-step editing is carried out, it is precedingPosition is as new element renewal matrix B；
S727.j increases by 1, decoder carries out feedback processing to matrix B element, repeats forward substitution step s722~s726, until
J=n-1, the result after conversion, which is still preserved to matrix B, former generation computing, to be terminated；
The implementation steps of s73 Gaussian elimination method back substitution computings are：
S731. decomposition, the matrix of consequence U and B of former generation computing are obtained, completes iteration variable k, C31、O31、C32、O32、S3、R3
Definition and assignment operation, matrix AcIt is 0 to assign initial value, and the initial value for making k is 1；
S732. the input data of the broad sense multiplying of back substitution step is prepared
The n-th-k+1 of matrix B row elements are performed into concatenation, replicate (n-k) part, then be spliced into n (n-k) digit
According to last position zero padding is sent to the control light path coding information of encoder generation broad sense multiplier, charges to change into n (n-1) position data
Measure C31；As k=1, after splicing zero padding, data b is obtainedn1...bnnbn1...bnn...bn1...bnn0...0, it is sent to coding
Device；
Accordingly, n-k element replicates n parts and is spliced into n (n-k) position data before the n-th-k+1 of matrix U is arranged, and last position is mended
Zero into n (n-1) position data, be sent to encoder generation broad sense multiplier main optical path coding information, charge to variable O31；Work as k
When=1, by data u1n...u1nu2n...u2n...un-1,n...un-1,n0...0 it is sent into encoder；
S733. the broad sense multiplying of back substitution step is implemented
By C31And O31It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to change
Measure S3；
S734. the input data of the generalized addition computing of back substitution step is prepared
By n-k row elements sequential concatenation before matrix B into n (n-k) position data b11...b1nb21...b2n...bn-k, 1...bn-k,n, last position zero padding is sent to the control light path coding information of encoder generation generalized addition device into n (n-1) position data,
Charge to variable C32, as k=1, the data spliced after zero padding are b11...b1nb21...b2n...bn-1,1...bn-1,n0...0；
By S3The main optical path coding information of generalized addition device is generated, charges to variable O32；
S735. the generalized addition computing of back substitution step is implemented
By C32And O32It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable
R3；
S736. decoder is to result R3Step-by-step editing is carried out, preceding n (n-k) positions update matrix B as new element；
S737.k increases by 1, decoder carries out feedback processing to matrix B element, repeats back substitution step s732~s736, until
K=n-1, the result after matrix B conversion are preserved to Ac, back substitution computing terminates；
Wherein,Incidence matrix is represented, after decomposition step, A matrix elements have occurred and that
Change, the element after change are still stored in matrix A, the input condition as former generation computing；
Represent with dimension matrix, initial value is unit matrix I, and matrix B is by former generation with after
After step process, matrix element changes, the result deposit matrix A after conversionc, i.e. the transitive closure of power network topology analysis
Battle array.
The invention has the advantages that：
The inventive method is to improve the analysis efficiency of power network topology with structure optimization as starting point, at restructural optics
The resources advantage of device is managed, constructs the generalized addition device and broad sense multiplier of big digit, will by data splicing and editing technology
Full parellel processing is made in the computing of multirow, multiple row inside an iteration inside Gaussian elimination method, and three are recirculated and is improved to a weight
Circulation is realized, to reduce Network topology delay, improve to the data analysis and process ability of complex network.
Brief description of the drawings
Fig. 1 is the light path design structure chart of broad sense multiplier in the present invention；
Fig. 2 is the light path design structure chart of generalized addition device in the present invention；
Fig. 3 is the parallel implementation scheme flow chart of Gaussian elimination method decomposition operation in the present invention.
Embodiment
The present invention basic thought be：To improve the analysis efficiency of power network topology with structure optimization as starting point, based on can
The Optical Parallel computing techniques such as optical processor, data splicing and editing are reconstructed, design the efficient implementation of Gaussian elimination method.
Below in conjunction with the accompanying drawings and embodiment is described in further detail to the present invention：
If incidence matrixWith dimension matrixA=LU,aij、bij∈ { 0,1 }, the initial value of matrix A can be according to power network topology mould
Annexation between type node obtains, and the initial value of matrix B is unit matrix.
Solve transitive closure battle array AcProcess be divided into three decomposition, former generation and back substitution calculation procedures.
In order to realize the purpose of the present invention, optimisation technique scheme in accordance with the following steps：
1st, the operand of iterative step and the arithmetic unit quantity and scale of needs are analyzed
The internal step of Gaussian elimination method is loop calculation.
The arithmetic unit quantity that iteration needs first is most, with the increase of iteration control variable, the data processing in matrix
Scale is reduced, and the arithmetic unit quantity used is reduced, therefore the quantity that the analysis of arithmetic unit is used in iteration first is defined.
(1) decomposition operation
First time iteration, it is necessary to complete computing during i=1(n-1) altogether2
The broad sense multiplying of secondary 1, (n-1)2The generalized addition computing of secondary 1.
(2) former generation computing
First time iteration, it is necessary to complete computing when i=1, j=2When, it is necessary to complete
Into computingWhen, it is necessary to complete computingAltogetherThe broad sense multiplying of secondary 1,The generalized addition computing of secondary 1.
(3) back substitution computing
First time iteration, i=1 is, it is necessary to complete computingN (n-1) altogether
The broad sense multiplying of secondary 1, secondary 1 of n (n-1) generalized addition computing.
2nd, the structural scheme of restructural optical processor is designed for Gaussian elimination method
Arithmetic unit quantity required for three steps and scale are enumerated in table 1, visible by analysis, an iteration process
In the arithmetic unit quantity that at most needs it is individual for n (n-1), each calculation process object is all 1, is two-valued function conversion, and
And there is no the problem of data bits expansion in conversion process.Then, for improve restructural optical processor computing resource efficiency and
Modified algorithm takes, and during each computing, the data of multiple 1 is spliced into a big data as far as possible, being disposably sent to can
Reconstruct optical processor converts, and generates the result of each conversion after terminating further according to editing technology.
The processor type and scale that each step of the Gaussian elimination method of table 1 needs
The Constructing Policy of the restructural optical processor designed for Gaussian elimination method is as follows：
Parameter using matrix size n as application restructural optics processor data digit, distribute one section of continuous, length
For VT=2n (n-1) idle data digit.
Construct a VMThe broad sense multiplier M and a V of=n (n-1) positionNThe generalized addition device N of=n (n-1) position.
3rd, the light channel structure of arithmetic unit is designed, generates the reorganization order code of restructural optical processor
According to the algorithm of generalized addition and broad sense multiplication, corresponding truth table is write out, such as table 2 and table 3：
Inside three value optical computers, the connected state of topological structure interior joint is represented with orthogonal polarized light V, use is unglazed
State W represents the off-state of node, and truth table is converted into the physical state migration table with V and W expression.
It is determined that construct the optics basic processing unit of generalized addition device and broad sense multiplier and complete light path design, such as Fig. 1
Shown in Fig. 2, the restructuring directive coding of corresponding arithmetic unit is generated, constructs corresponding arithmetic unit.
In fig. 1 and 2, b1、b2、b3For control light path input, a1、a2、a3Inputted for main optical path, v1、v2、v3、v4、v5、
v6、v7For vertical polarizer, orthogonal polarized light can only be allowed to pass through, h1For horizontal polarizer, can only tolerable injury level polarised light wear
Cross, d1、d2、d3For the control signal end of liquid crystal, Lc1For normal chiral liquid crystals, Lc2、Lc3For normal optically inactive liquid crystal, c1、c2For output
Optical signal.
The operation principle of broad sense multiplier is as follows：Main optical path input signal a1Through vertical polarizer v2Reach Chang Xuanguang liquid
Brilliant Lc1, while control light path to input b1Through vertical polarizer v1, work as b1When having signal, the signal passes through control signal end d1Make
Use Lc1On, make Lc1Main optical path signal is not rotated, works as b1During no signal, d1Do not act, Lc1By the direction of main optical path signal
It is rotated by 90 °, Lc1The optical signal of output passes through vertical polarizer v3Afterwards, transformation results, output optical signal c are produced1。
The operation principle of generalized addition device is as follows：Main optical path inputs a2Through vertical polarizer v4Reach normal optically inactive liquid crystal
Lc2, while control light path to input b2Through horizontal polarizer h1Control signal is generated, the control signal passes through d2Act on often not
Chiral liquid crystals Lc2, and then to through Lc2Signal produce turning effort, afterwards the optical signal pass through vertical polarizer v5, produce
The transformation results of first light path；Main optical path inputs a3Through vertical polarizer v6Reach normal optically inactive liquid crystal Lc3, control simultaneously
Light path inputs b3Generate normal optically inactive liquid crystal Lc3Control signal, the control signal passes through d3To through Lc3Input signal production
Turning effort is given birth to, the optical signal passes through vertical polarizer v afterwards7Produce the transformation results of Article 2 light path；
The transformation results of first light path and Article 2 light path are superimposed together, output optical signal c2。
Gaussian elimination method for analysis node connected state in topological structure of electric is transplanted to three values by the present invention first
On optical computing platform, a kind of efficient scheme of Gaussian elimination method is designed, the technical method is particularly advantageous in that：
(1) the characteristics of being analyzed first according to power network topology node state, the calculating demand of Gaussian elimination method is analyzed, is designed
The generalized addition device and broad sense multiplier of a kind of big digit, generalized addition and broad sense multiplying are realized by light channel structure.
(2) decomposition to the traditional Gauss elimination, former generation and back substitution calculation procedure make improvement, devise a kind of can
The innovative approach realized on reconstruct optical processor.This method recirculates the three of decomposition, former generation and back substitution step and is improved to one
Recirculate realization, the boolean calculation of matrix multiple row, multiple row is sent into restructural optical processor in the lump in an iteration, held
Logical conversion of row is completed, and a clock cycle is foreshortened to by time-consuming.
(3) broad sense multiplication, the characteristics of generalized addition number of calculations is more, digit is small, computing is scattered are combined, data is introduced and splices
With editing technology, it is obviously improved operation efficiency.
(4) will decompose, former generation and back substitution computing total amount be from 2n2(n-1) 3n (n-1) is reduced to, algorithm complex is reduced to O
(n2)。
(5) Gaussian elimination method in the present invention applies for the data of restructural optical processor with incidence matrix A dimension n
Digit, when power network topology node increases, incidence matrix scale increases, more data bits can be distributed, construction scale is more
Big generalized addition device and broad sense multiplier, processing energy of the Gaussian elimination method to complex electric network topological structure can be effectively improved
Power.
In order to which the present invention is described in detail, the inside software and hardware composition of three value optical computers is situated between first
Continue：
Three value optical computers are a kind of novel computers, and compared with traditional computer, most significant hardware superiority is can
Optical processor is reconstructed, it possesses large number of data bits, data bit section can be drawn according to the demand of computing
Point, construct variety classes, multiple arithmetic units of different scales, parallel processing computing request.In addition, in three value optical computers
A series of software resources such as user interface, task scheduling modules, reconstructed module and bottom control software are also included, it is different soft
Part module performs different flows, and user's request is completed in the cooperation of soft and hardware resource coordinating.Wherein, user interface is responsible for receiving fortune
Calculate request, data and return to operation result, SZG files are responsible for transmission order and data, task scheduling modules are responsible for coordinating and located
Computing is managed, the data bits of restructural optical processor is responsible for and distributed to data bit management module, and reconstructed module is responsible for tool
The construction of body arithmetic unit, bottom control software are responsible for completing interative computation, and encoder generates the input of restructural optical processor
Data encoding, restructural optical processor complete specific data conversion, and it is defeated that decoder is responsible for processing restructural optical processor
The result gone out.
Multiple computing modules are divided into when Gaussian elimination method is internally implemented, it is mutually coordinated by multiple soft and hardware modules
Coordinate and complete.A kind of Gaussian elimination method for being used to analyze and optimize topological structure of electric comprises the following steps：
S1. incidence matrix A, matrix dimension n and algorithm, point are inputted in the user interface of three value optical computers
Hit " it is determined that " button, computing request is sent to inside three value optical computers；
S2. three value optical computers generate SZG files, and incidence matrix A matrix element a is included in the SZG filesij, square
The algorithm of battle array dimension n, broad sense multiplication and generalized addition；
S3. task scheduling modules parsing SZG file acquisition n, for applying for and distributing the data of restructural optical processor
Digit；
S4. data bit management module calculates the data bits total amount V neededT=2n (n-1), inquire about current restructural optics
Idle data bit section h~h+V on processorT- 1, and by data bit section h~h+VT- 1 distribution uses, task scheduling modules
Arrange incidence matrix A matrix element aij, generate corresponding operation number encoder, row format standardization of going forward side by side；
S5. task scheduling modules are by data bit section h~h+V of distributionT- 1, incidence matrix A matrix element aijAnd
Reorganization order code is sent to the bottom control software of three value optical computers；
S6. reconstructed module generates reorganization order code according to the light path design of broad sense multiplication and generalized addition, and performs these
Reorganization order code, construct a VMThe broad sense multiplier M and a V of=n (n-1) positionNThe generalized addition device N of=n (n-1) position；
S7. the iterative calculation step of the decomposition of bottom control software implementation Gaussian elimination method, former generation and back substitution；
In each computing, the operational data inside an iteration is spliced and is disposably sent into restructural optical processor
Enter line translation, at the end of by editing technology generate each conversion result；
The result of back substitution computing output, charges to matrix Ac, be exactly power network topology transitive closure battle array.
The decomposition to Gaussian elimination method, former generation and back substitution step are carried out as described below respectively below：
S71 is as shown in figure 3, the implementation steps of Gaussian elimination method decomposition operation are：
S711. incidence matrix A matrix element a is obtainedijAnd matrix dimension n, complete iteration variable i, C11、O11、C12、
O12、S1、R1Definition and assignment operation, make i initial value be 1.
S712. the input data of the broad sense multiplying of decomposition step is prepared
By the matrix element a of the row of matrix A i-thi,i+1...ainFirst splice, replicate n-i parts, then be spliced into one (n-i)2's
Data, last position zero padding are sent to the control light path coding information of encoder generation broad sense multiplier, remembered into the data of n (n-1) position
Enter variable C11；As i=1, after splicing replicates zero padding, data a is obtained12...a1na12...a1n...a12...a1n0...0, by it
It is sent into encoder.
The matrix element a that matrix A i-th is arrangedi+1,i...aniFirst bitwise copy n-i parts, then it is spliced into one (n-i)2Number
According to last position zero padding is sent to the main optical path coding information of encoder generation broad sense multiplier, charges to change into the data of n (n-1) position
Measure O11；As i=1, by data a21...a21a31...a31...an1...an10...0 it is sent into encoder.
S713. the broad sense multiplying of decomposition step is implemented
By C11And O11It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to change
Measure S1：
S714. the input data of the generalized addition computing of decomposition step is prepared
By matrix A element aI+1, i+ 1~annSpliced with behavior unit, obtained one (n-i)2The data of position, last position are mended
Zero into n (n-1) position data, be sent to encoder generation generalized addition device control light path coding information, charge to variable C12；When
During i=1, it is a to splice the data obtained after zero padding22...a2na32...a3n...an2...ann。
By S1The main optical path coding information of generalized addition device is generated, charges to variable O12。
S715. the generalized addition computing of decomposition step is implemented
By C12And O12It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable
R1：
S716. decoder is to result R1Carry out step-by-step editing, preceding (n-i)2Position is used as matrix new element ai+1,i+1~annRenewal
Matrix A：
S717.i increases by 1, the matrix that decoder obtains last round of iteration carries out feedback processing, repetitive assignment step s712
~s716, until i=n-1, final result, which is still preserved to matrix A, A=LU, decomposition operation, to be terminated.
Wherein,Incidence matrix is represented, after decomposition step, A matrix elements have occurred and that
Change, the element after change are still stored in matrix A, the input condition as former generation computing.
The implementation steps of s72 Gaussian elimination method former generation computings are：
S721. matrix of consequence A, L of decomposition operation are obtained, completes iteration variable j, C21、O21、C22、O22、S2、R2Definition
And assignment operation, it is unit matrix that matrix B, which assigns initial value, and the initial value for making j is 1.
S722. the input data of the broad sense multiplying of forward substitution step is prepared
By the element b below matrix B diagonalj1...bjjbj1...bj,j+1...bj1...bj,n-1It is spliced into oneData, last position zero padding is sent to the control light path coding of encoder generation broad sense multiplier into the data of n (n-1) position
Information, charge to variable C21；As j=1, after splicing replicates zero padding, data b is obtained11b11b12b11b12b13...b11b12...b1,n- 10...0, it is sent to encoder.
Accordingly, the jth column element of matrix L is replicated, is spliced intoData lj+1,j...lj+1,jlj+2, j...lj+2,j...lnj...lnj, last position zero padding is sent to the key light of encoder generation broad sense multiplier into the data of n (n-1) position
Road coding information, charge to variable O21；As j=1, by data l21l31l31l41l41l41...ln1...ln10...0 it is sent into coding
Device.
S723. the broad sense multiplying of forward substitution step is implemented
By C21And O21It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to change
Measure S2：
S724. the input data of the generalized addition computing of forward substitution step is prepared
Element below matrix B diagonal is spliced intoPosition data bj+1,1...bj+1,jbj+2,
1...bj+2,j+1...bn1...bn,n-1, last position zero padding is sent to the control of encoder generation generalized addition device into n (n-1) position data
Light path coding information processed, charges to variable C22；As j=1, splicing the data after zero padding is
b21b31b32b41b42b43...bn1bn2...bn,n-10...0。
By S2The main optical path coding information of generalized addition device is generated, charges to variable O22。
S725. the generalized addition computing of forward substitution step is implemented
By C22And O22It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable
R2：
S726. decoder is to result R2Step-by-step editing is carried out, it is precedingPosition is as new element renewal matrix B：
S727.j increases by 1, decoder carries out feedback processing to matrix B element, repeats forward substitution step s722~s726, until
J=n-1, the result after conversion, which is still preserved to matrix B, former generation computing, to be terminated.
Represent with dimension matrix, initial value is unit matrix I, and matrix B is by former generation with after
After step process, matrix element changes, the result deposit matrix A after conversionc, i.e. the transitive closure of power network topology analysis
Battle array.
The implementation steps of s73 Gaussian elimination method back substitution computings are：
S731. decomposition, the matrix of consequence U and B of former generation computing are obtained, completes iteration variable k, C31、O31、C32、O32、S3、R3
Definition and assignment operation, matrix AcIt is 0 to assign initial value, and the initial value for making k is 1.
S732. the input data of the broad sense multiplying of back substitution step is prepared
The n-th-k+1 of matrix B row elements are performed into concatenation, replicate (n-k) part, then be spliced into n (n-k) digit
According to last position zero padding is sent to the control light path coding information of encoder generation broad sense multiplier, charges to change into n (n-1) position data
Measure C31；As k=1, after splicing zero padding, data b is obtainedn1...bnnbn1...bnn...bn1...bnn0...0, it is sent to coding
Device.
Accordingly, n-k element replicates n parts and is spliced into n (n-k) position data before the n-th-k+1 of matrix U is arranged, and last position is mended
Zero into n (n-1) position data, be sent to encoder generation broad sense multiplier main optical path coding information, charge to variable O31；Work as k
When=1, by data u1n...u1nu2n...u2n...un-1,n...un-1,n0...0 it is sent into encoder.
S733. the broad sense multiplying of back substitution step is implemented
By C31And O31It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to change
Measure S3：
S734. the input data of the generalized addition computing of back substitution step is prepared
By n-k row elements sequential concatenation before matrix B into n (n-k) position data b11...b1nb21...b2n...bn-k, 1...bn-k,n, last position zero padding is sent to the control light path coding information of encoder generation generalized addition device into n (n-1) position data,
Charge to variable C32, as k=1, the data spliced after zero padding are b11...b1nb21...b2n...bn-1,1...bn-1,n0...0。
By S3The main optical path coding information of generalized addition device is generated, charges to variable O32。
S735. the generalized addition computing of back substitution step is implemented
By C32And O32It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable
R3：
S736. decoder is to result R3Step-by-step editing is carried out, preceding n (n-k) positions update matrix B as new element：
S737.k increases by 1, decoder carries out feedback processing to matrix B element, repeats back substitution step s732~s736, until
K=n-1, the result after matrix B conversion are preserved to Ac, back substitution computing terminates.
S8. task scheduling modules are by computing output matrix AcWrite in SZG destination files, converted by document analysis step
For decimal representation form and return to the result.
The present invention can successfully manage the mass data problem that power network topology analysis faces, and improve topological structure of electric analysis
Efficiency.
Certainly, described above is only presently preferred embodiments of the present invention, and the present invention is not limited to enumerate above-described embodiment, should
When explanation, any those skilled in the art are all equivalent substitutes for being made, bright under the teaching of this specification
Aobvious variant, all falls within the essential scope of this specification, ought to be protected by the present invention.
Claims (2)
1. a kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric, it is characterised in that this method is with three value optics
Based on the core calculations technology of computer, specifically comprise the following steps：
S1. incidence matrix A, matrix dimension n and algorithm are inputted in the user interface of three value optical computers, clicked on
" it is determined that " button, computing request is sent to inside three value optical computers；
S2. three value optical computers generate SZG files, and incidence matrix A matrix element a is included in the SZG filesij, matrix dimension
Number n, broad sense multiplication and generalized addition algorithm；
S3. task scheduling modules parsing SZG file acquisition n, for applying for and distributing the data bits of restructural optical processor；
S4. data bit management module calculates the data bits total amount V neededT=2n (n-1), inquire about current restructural optical treatment
Idle data bit section h~h+V on deviceT- 1, and by data bit section h~h+VT- 1 distribution uses, and task scheduling modules arrange
Incidence matrix A matrix element aij, generate corresponding operation number encoder, row format standardization of going forward side by side；
S5. task scheduling modules are by data bit section h~h+V of distributionT- 1, incidence matrix A matrix element aijAnd reconstruct
Command code is sent to the bottom control software of three value optical computers；
S6. reconstructed module generates reorganization order code according to the light path design of broad sense multiplication and generalized addition, and performs these reconstruct
Command code, construct a VMThe broad sense multiplier M and a V of=n (n-1) positionNThe generalized addition device N of=n (n-1) position；
S7. the iterative calculation step of the decomposition of bottom control software implementation Gaussian elimination method, former generation and back substitution；
In each computing, the operational data inside an iteration is spliced and is disposably sent into the progress of restructural optical processor
Conversion, at the end of by editing technology generate each conversion result；
The result of back substitution computing output, charges to matrix Ac, be exactly power network topology transitive closure battle array；
S8. task scheduling modules are by computing output matrix AcWrite in SZG destination files, ten are converted into by document analysis step
System representation simultaneously returns to the result；
Wherein, task scheduling modules, data bit management module and reconstructed module are the software module of three value optical computers.
2. a kind of Gaussian elimination method for being used to analyzing and optimizing topological structure of electric according to claim 1, its feature exist
In in the step s7, the iterative calculation step of the decomposition of Gaussian elimination method, former generation and back substitution is specially：
The implementation steps of s71 Gaussian elimination method decomposition operations are：
S711. incidence matrix A matrix element a is obtainedijAnd matrix dimension n, complete iteration variable i, C11、O11、C12、O12、S1、
R1Definition and assignment operation, make i initial value be 1；
S712. the input data of the broad sense multiplying of decomposition step is prepared
By the matrix element a of the row of matrix A i-thi,i+1...ainFirst splice, replicate n-i parts, then be spliced into one (n-i)2Data,
Last position zero padding is sent to the control light path coding information of encoder generation broad sense multiplier, charges to change into the data of n (n-1) position
Measure C11；As i=1, after splicing replicates zero padding, data a is obtained12...a1na12...a1n...a12...a1n0...0, it is sent to
Encoder；
The matrix element a that matrix A i-th is arrangedi+1,i...aniFirst bitwise copy n-i parts, then it is spliced into one (n-i)2Data,
Last position zero padding is sent to the main optical path coding information of encoder generation broad sense multiplier, charges to variable into the data of n (n-1) position
O11；As i=1, by data a21...a21a31...a31...an1...an10...0 it is sent into encoder；
S713. the broad sense multiplying of decomposition step is implemented
By C11And O11It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to variable S1；
S714. the input data of the generalized addition computing of decomposition step is prepared
By matrix A element aI+1, i+1~annSpliced with behavior unit, obtained one (n-i)2The data of position, last position zero padding is into n
(n-1) data of position, the control light path coding information of encoder generation generalized addition device is sent to, charges to variable C12；Work as i=1
When, it is a to splice the data obtained after zero padding22...a2na32...a3n...an2...ann；
By S1The main optical path coding information of generalized addition device is generated, charges to variable O12；
S715. the generalized addition computing of decomposition step is implemented
By C12And O12It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable R1；
S716. decoder is to result R1Carry out step-by-step editing, preceding (n-i)2Position is used as matrix new element ai+1,i+1~annUpdate matrix
A；
S717.i increases by 1, the matrix progress feedback processing that decoder obtains last round of iteration, repetitive assignment step s712~
S716, until i=n-1, final result, which is still preserved to matrix A, A=LU, decomposition operation, to be terminated；
The implementation steps of s72 Gaussian elimination method former generation computings are：
S721. matrix of consequence A, L of decomposition operation are obtained, completes iteration variable j, C21、O21、C22、O22、S2、R2Definition and tax
It is worth computing, it is unit matrix that matrix B, which assigns initial value, and the initial value for making j is 1；
S722. the input data of the broad sense multiplying of forward substitution step is prepared
By the element b below matrix B diagonalj1...bjjbj1...bj,j+1...bj1...bj,n-1It is spliced into one
Data, last position zero padding is sent to the control light path coding information of encoder generation broad sense multiplier into the data of n (n-1) position,
Charge to variable C21；As j=1, after splicing replicates zero padding, data b is obtained11b11b12b11b12b13...b11b12...b1,n- 10...0, it is sent to encoder；
Accordingly, the jth column element of matrix L is replicated, is spliced intoData lj+1,j...lj+1,jlj+2, j...lj+2,j...lnj...lnj, last position zero padding is sent to the key light of encoder generation broad sense multiplier into the data of n (n-1) position
Road coding information, charge to variable O21；As j=1, by data l21l31l31l41l41l41...ln1...ln10...0 it is sent into coding
Device；
S723. the broad sense multiplying of forward substitution step is implemented
By C21And O21It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to variable S2；
S724. the input data of the generalized addition computing of forward substitution step is prepared
Element below matrix B diagonal is spliced intoPosition data bj+1,1...bj+1,jbj+2,1...bj+2,j+ 1...bn1...bn,n-1, into n (n-1) position data, the control light path for being sent to encoder generation generalized addition device encodes for last position zero padding
Information, charge to variable C22；As j=1, the data spliced after zero padding are b21b31b32b41b42b43...bn1bn2...bn,n- 10...0；
By S2The main optical path coding information of generalized addition device is generated, charges to variable O22；
S725. the generalized addition computing of forward substitution step is implemented
By C22And O22It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable R2；
S726. decoder is to result R2Step-by-step editing is carried out, it is precedingPosition is as new element renewal matrix B；
S727.j increases by 1, decoder carries out feedback processing to matrix B element, forward substitution step s722~s726 is repeated, until j=
N-1, the result after conversion, which is still preserved to matrix B, former generation computing, to be terminated；
The implementation steps of s73 Gaussian elimination method back substitution computings are：
S731. decomposition, the matrix of consequence U and B of former generation computing are obtained, completes iteration variable k, C31、O31、C32、O32、S3、R3Determine
Justice and assignment operation, matrix AcIt is 0 to assign initial value, and the initial value for making k is 1；
S732. the input data of the broad sense multiplying of back substitution step is prepared
The n-th-k+1 of matrix B row elements are performed into concatenation, replicate n-k parts, then be spliced into n (n-k) position data, last position
Zero padding is sent to the control light path coding information of encoder generation broad sense multiplier, charges to variable C into n (n-1) position data31；When
During k=1, after splicing zero padding, data b is obtainedn1...bnnbn1...bnn...bn1...bnn0...0, it is sent to encoder；
Accordingly, n-k element duplication n parts are spliced into n (n-k) position data before the n-th-k+1 of matrix U is arranged, and last position zero padding is into n
(n-1) data of position, the main optical path coding information of encoder generation broad sense multiplier is sent to, charges to variable O31；As k=1,
By data u1n...u1nu2n...u2n...un-1,n...un-1,n0...0 it is sent into encoder；
S733. the broad sense multiplying of back substitution step is implemented
By C31And O31It is sent into the broad sense multiplier of n (n-1) position and completes conversion, decoder obtains and preserves result, charges to variable S3；
S734. the input data of the generalized addition computing of back substitution step is prepared
By n-k row elements sequential concatenation before matrix B into n (n-k) position data b11...b1nb21...b2n...bn-k,1...bn-k,n, end
Position zero padding is sent to the control light path coding information of encoder generation generalized addition device, charges to variable C into n (n-1) position data32,
As k=1, the data spliced after zero padding are b11...b1nb21...b2n...bn-1,1...bn-1,n0...0；
By S3The main optical path coding information of generalized addition device is generated, charges to variable O32；
S735. the generalized addition computing of back substitution step is implemented
By C32And O32It is sent into the generalized addition device of n (n-1) position and enters line translation, decoder obtains transformation results, charges to variable R3；
S736. decoder is to result R3Step-by-step editing is carried out, preceding n (n-k) positions update matrix B as new element；
S737.k increases by 1, decoder carries out feedback processing to matrix B element, back substitution step s732~s736 is repeated, until k=
N-1, the result after matrix B conversion are preserved to Ac, back substitution computing terminates；
Wherein,Incidence matrix is represented, after decomposition step, A matrix elements have occurred and that change,
Element after change is still stored in matrix A, the input condition as former generation computing；
Represent with dimension matrix, initial value is unit matrix I, and matrix B is ridden instead of walk by former generation with after
After rapid processing, matrix element changes, the result deposit matrix A after conversionc, i.e. the transitive closure battle array of power network topology analysis.
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| CN109063291A (en) * | 2018-07-20 | 2018-12-21 | 西安交通大学 | Dynamoelectric equipment cooling channel structure intelligence method of topological optimization design |
| CN109063291B (en) * | 2018-07-20 | 2021-07-13 | 西安交通大学 | Intelligent topological optimization design method for cooling channel structure of electromechanical equipment |
| CN110244817A (en) * | 2019-05-18 | 2019-09-17 | 南京惟心光电系统有限公司 | A kind of Solving Partial Differential Equations device and its method based on photoelectricity computing array |
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