CN107819454A - A kind of digit order number increases system - Google Patents
A kind of digit order number increases system Download PDFInfo
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- CN107819454A CN107819454A CN201711227585.0A CN201711227585A CN107819454A CN 107819454 A CN107819454 A CN 107819454A CN 201711227585 A CN201711227585 A CN 201711227585A CN 107819454 A CN107819454 A CN 107819454A
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- 230000008569 process Effects 0.000 claims abstract description 6
- 230000010354 integration Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/06—Non-recursive filters
- H03H17/0621—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
- H03H17/0635—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies
- H03H17/0671—Cascaded integrator-comb [CIC] filters
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- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Manipulation Of Pulses (AREA)
Abstract
The invention discloses a kind of digit order number to increase system, including digit order number increase module and clock control module, wherein, digit order number increase module includes cascade integral comb filter and moving average filter；Clock control module, for providing clock signal to cascade integral comb filter and moving average filter；Cascade integral comb filter, the clock signal sent for receiving clock control module, and the digital code of sensor output is received when receiving triggering and starting clock signal, then integrated and frequency reducing, and being incremented by for digit is realized in integral process；Moving average filter, the clock signal sent for receiving clock control module, and clock jitter and the intrinsic noise of cascade integral comb filter output signal are removed when receiving triggering and starting clock signal, to realize smooth output.The present invention is few using component, is easy to implement, and can lift the output resolution ratio of product sensor, and then is advantageous to the popularization and application of product sensor.
Description
Technical field
The present invention relates to numeral to expand position technology, specifically a kind of digit order number increase system.
Background technology
With the continuous development of semiconductor technology and the variation of Internet of Things application demand, miscellaneous sensor assembly
Arise at the historic moment.To adapt to more application scenarios, the requirement more and more higher to sensor performance.Because of product sensor set noise
It is difficult to be suppressed, and is easily disturbed by outer signals, causes its output resolution ratio not high, this have impact on sensing to a certain extent
The popularization and application of device product.
The content of the invention
It is an object of the invention to solve the problems, such as that it is not high that existing product sensor output is differentiated, there is provided a kind of digit order number
Increase system, it can lift the output resolution ratio of product sensor when applying, and then be advantageous to the popularization and application of product sensor.
The present invention, which solves the above problems, to be achieved through the following technical solutions：A kind of digit order number increases system, including number
Word bit increases module and clock control module, and the digit order number increase module includes cascade integral comb filter and accumulated with cascade
Divide the moving average filter of comb filter connection；
Clock control module, for providing clock signal to cascade integral comb filter and moving average filter；
Cascade integral comb filter, the clock signal sent for receiving clock control module, and receiving triggering
The digital code of sensor output is received when starting clock signal, is then integrated and frequency reducing, and position is realized in integral process
Several is incremented by；
Moving average filter, the clock signal sent for receiving clock control module, and start receiving triggering
Clock jitter and the intrinsic noise of cascade integral comb filter output signal are removed during clock signal, to realize smooth output.
During present invention application, module and clock control module are increased by digit order number to complete high-precision output.Specific
During implementation, digital code is subjected to the increase that cumulative process realizes digit by cascade integral comb filter, without very
More memory elements.
Further, the cascade integral comb filter is made up of the cascade of multiple single-stage cic filters.
Further, the cic filter includes integrator, withdrawal device and differentiator, the integrator, withdrawal device and micro-
Device is divided to be sequentially connected with.
In summary, the invention has the advantages that：(1) overall structure of the present invention is simple, few using component, just
In realization, cost is low, and the present invention can lift the resolution ratio of sensor output when applying, and not by electricity while resolution ratio is lifted
The influence of source voltage change, finally realizes the output of high-resolution, high linearity, and then is advantageous to the popularization and application of the present invention.
(2) bit wide of a variety of different inputs is can be suitably used for during present invention application so that be more convenient for promoting during present invention application
Using.
(3) present invention is not limited to apply on sensing system, will need to be simulated in digital display circuit, analog to digital conversion circuit etc.
Signal is converted to applicable in the system of data signal.
Brief description of the drawings
Accompanying drawing described herein is used for providing further understanding the embodiment of the present invention, forms one of the application
Point, do not form the restriction to the embodiment of the present invention.In the accompanying drawings：
Fig. 1 is the system block diagram of a specific embodiment of the invention；
Fig. 2 is the structural representation that digit order number increases module in Fig. 1；
Fig. 3 is the block diagram of single-stage cic filter；
Fig. 4 is the schematic diagram that the present invention is applied on capacitance sensor；
Fig. 5 is clock timing diagram when Fig. 4 is applied.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, with reference to embodiment and accompanying drawing, to this
Invention is described in further detail, and exemplary embodiment of the invention and its explanation are only used for explaining the present invention, do not make
For limitation of the invention.
Embodiment：
As shown in Figure 1 and Figure 2, a kind of digit order number increase system, including digit order number increase module and clock control module, its
In, digit order number increase module includes cascade integral comb filter and the rolling average being connected with cascade integral comb filter filter
Ripple device.The cascade integral comb filter of the present embodiment connects clock control module with the clock of both moving average filters
Clock signal terminal clk, clock control module are used to provide clock letter to cascade integral comb filter and moving average filter
Number.The cascade integral comb filter of the present embodiment is used to receive the clock signal that clock control module is sent, and is receiving
Triggering receives the digital code of sensor output when starting clock signal, then integrated and frequency reducing, and real in integral process
Existing digit is incremented by.The moving average filter of the present embodiment is used to receive the clock signal that clock control module is sent, and
Receive when triggering starts clock signal and remove clock jitter and the intrinsic noise of cascade integral comb filter output signal, with
Realize smooth output.
The cascade integral comb filter of the present embodiment is made up of the cascade of multiple single-stage cic filters, wherein, single-stage CIC
Filter graph architecture is as shown in Figure 3.Cic filter includes integrator, withdrawal device and differentiator, integrator, withdrawal device and differential
Device is sequentially connected with.
The extracting multiple of single-stage cic filter is D in the present embodiment, and the time-domain expression of integrator is y1(n)=y1(n-
1)+x1(n), the time-domain expression of differentiator is y2(n)=x2(n)-x2(n-D), wherein, x1(n) it is the numeral of integrator input
Code, y1(n) it is the digital code of integrator output, x2(n) it is the digital code of the differentiator introduction, y2(n) it is the numeral of differentiator output
Code.Cascade integral comb filter is exactly that single-stage CIC multi-stage cascades are completed into integration and frequency reducing, is had in every one-level integral process
Corresponding digit is incremented by, and incremental digit isN levels cic filter is connected in series, obtains total output number
The expression formula of word amount digit is Bout=Nlog2D+Bin, wherein N is the series of cascade, and Bin is the bit wide of input signal.Come with this
The extension of digit is realized, output frequency reduces D times.The moving average filter of the present embodiment is mainly used in the output of raising system
Reliability and precision, it is rational to remove error caused by circuit intrinsic noise and clock jitter, it is ensured that not reduce data precision
Improve resolution ratio, smooth output.The time-domain expression of moving average filter isWherein, n is shifting
The size of dynamic average window, y3(n) it is the digital code of moving average filter output, x (n) and y (n) are represented in discrete time-domain
Signal x and y, k be summation operation number (running number), k=0->K=n-1.
When the present embodiment is applied, the input of cascade integral comb filter is b0、……、bm, outputMoving average filter output end isThe numeral finally realized
Position increase is (1/2+Nlog2D) position.
As shown in figure 4, the present embodiment is applied to cascade integral comb filter input and electric capacity when on capacitance sensor
Sensor output connects, and the clocked sequential of clock control module is as shown in figure 5, the output of capacitance sensor is 9, using three
Level cic filter, extracting multiple 32, output resolution ratio is 26.5 after the present embodiment is handled, the resolution ratio digit of raising
For 17.5.
Above-described embodiment, the purpose of the present invention, technical scheme and beneficial effect are carried out further
Describe in detail, should be understood that the embodiment that the foregoing is only the present invention, be not intended to limit the present invention
Protection domain, within the spirit and principles of the invention, any modification, equivalent substitution and improvements done etc., all should include
Within protection scope of the present invention.
Claims (3)
1. a kind of digit order number increases system, it is characterised in that increases module and clock control module, the numeral including digit order number
Position increase module includes cascade integral comb filter and the moving average filter being connected with cascade integral comb filter；
Clock control module, for providing clock signal to cascade integral comb filter and moving average filter；
Cascade integral comb filter, the clock signal sent for receiving clock control module, and start receiving triggering
The digital code of sensor output is received during clock signal, is then integrated and frequency reducing, and digit is realized in integral process
It is incremented by；
Moving average filter, the clock signal sent for receiving clock control module, and start clock receiving triggering
Clock jitter and the intrinsic noise of cascade integral comb filter output signal are removed during signal, to realize smooth output.
A kind of 2. digit order number increase system according to claim 1, it is characterised in that the cascade integral comb filter
It is made up of the cascade of multiple single-stage cic filters.
3. a kind of digit order number increase system according to claim 2, it is characterised in that the cic filter includes integration
Device, withdrawal device and differentiator, the integrator, withdrawal device and differentiator are sequentially connected with.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711227585.0A CN107819454A (en) | 2017-11-29 | 2017-11-29 | A kind of digit order number increases system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711227585.0A CN107819454A (en) | 2017-11-29 | 2017-11-29 | A kind of digit order number increases system |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102780469A (en) * | 2012-08-16 | 2012-11-14 | 钜泉光电科技(上海)股份有限公司 | Cascade integrator comb filter and implementation method thereof |
| CN103166598A (en) * | 2013-03-01 | 2013-06-19 | 华为技术有限公司 | Digital filter, collocation method of digital filter, electronic device and wireless communication system |
| CN103457574A (en) * | 2013-05-20 | 2013-12-18 | 湘潭芯力特电子科技有限公司 | Low-consumption digital decimation filter bank with variable decimation multiples and digital decimation and filtering method |
| CN104393854A (en) * | 2014-12-04 | 2015-03-04 | 华侨大学 | FPGA-based time division multiplexing cascaded integrator-comb decimation filter and realization method thereof |
| CN207283515U (en) * | 2017-11-29 | 2018-04-27 | 四川知微传感技术有限公司 | A kind of digit order number increases device |
-
2017
- 2017-11-29 CN CN201711227585.0A patent/CN107819454A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102780469A (en) * | 2012-08-16 | 2012-11-14 | 钜泉光电科技(上海)股份有限公司 | Cascade integrator comb filter and implementation method thereof |
| CN103166598A (en) * | 2013-03-01 | 2013-06-19 | 华为技术有限公司 | Digital filter, collocation method of digital filter, electronic device and wireless communication system |
| CN103457574A (en) * | 2013-05-20 | 2013-12-18 | 湘潭芯力特电子科技有限公司 | Low-consumption digital decimation filter bank with variable decimation multiples and digital decimation and filtering method |
| CN104393854A (en) * | 2014-12-04 | 2015-03-04 | 华侨大学 | FPGA-based time division multiplexing cascaded integrator-comb decimation filter and realization method thereof |
| CN207283515U (en) * | 2017-11-29 | 2018-04-27 | 四川知微传感技术有限公司 | A kind of digit order number increases device |
Non-Patent Citations (3)
| Title |
|---|
| 刘国稳等: "高性能CIC滤波器的优化设计", 《计算机仿真》, vol. 33, no. 2, pages 234 - 238 * |
| 奥沙那: "《嵌入式实时系统的DSP软件开发技术》", 31 January 2011, 北京航空航天大学出版社, pages: 68 - 69 * |
| 柳林刚等: "MEMS压力传感器电容读出电路", 《微电子学与计算机》, vol. 33, no. 12, 5 December 2016 (2016-12-05), pages 121 - 125 * |
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