CN107818059A - The circuit without plug-in EEPROM based on optical drive UX3320 - Google Patents
The circuit without plug-in EEPROM based on optical drive UX3320 Download PDFInfo
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- CN107818059A CN107818059A CN201711029533.2A CN201711029533A CN107818059A CN 107818059 A CN107818059 A CN 107818059A CN 201711029533 A CN201711029533 A CN 201711029533A CN 107818059 A CN107818059 A CN 107818059A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention discloses a kind of based on circuits of the optical drive UX3320 without plug-in EEPROM, including the MAC module circuit based on UX3320 components, PMD modular circuits and GPON BOSA modular circuits, the MAC module circuit connects PMD modular circuits, the PMD modular circuits connect GPON BOSA modular circuits, it is characterised in that：The data as needed for FLASH on BOB stores UX3320, the external pull-up resistors of the main IIC of UX3320 to VCC；This circuit is overcome under traditional MAC mode of operations, it is necessary to which the problem of plug-in EEPROM deposits data, data needed for UX3320 is stored in the FLASH on BOB, so as to save EEPROM cost；In addition plug-in EEPROM is eliminated in the present invention, avoids UX3320 and outside EEPROM read-write operations are judged by accident.
Description
Technical field
The present invention relates to MAC Address process field, and in particular to it is a kind of based on optical drive UX3320 without plug-in EEPROM's
Circuit.
Background technology
MAC（Media Access Control or Medium Access Control）Address, free translation are media interviews
Control, or be physical address, hardware address, for defining the position of the network equipment.In osi model, third layer Internet
It is responsible for IP address, second layer data link layer is then responsible for MAC Address.Therefore a main frame has a MAC Address, and each
Network site has an IP address for being specific to it.
For now, under traditional MAC mode of operations, the importing of data needs the plug-in EEPROM of UX3320 to be stored up
Deposit, then write data into from plug-in EEPROM in UX3320 RAM.
The shortcomings that prior art, is：Data repeatedly write export so that computing thickens, and additionally increases plug-in
EEPROM causes cost to increase, while UX3320 has the problem of being judged by accident to outside EEPROM read-write operations.
The content of the invention
It is an object of the invention to overcome the deficiencies of the prior art and provide one kind based on optical drive UX3320 without plug-in
EEPROM circuit, optical drive UX3320 plug-in EEPROM can be saved, simplify structure, it is cost-effective.
The purpose of the present invention is achieved through the following technical solutions：
The circuit without plug-in EEPROM based on optical drive UX3320, including the MAC module circuit based on UX3320 components, PMD moulds
Block circuit and GPON BOSA modular circuits, the MAC module circuit connect PMD modular circuits, and the PMD modular circuits connect
GPON BOSA modular circuits are connect, the data as needed for FLASH on BOB stores UX3320, the external pull-up electricity of the main IIC of UX3320
Hinder to VCC.
Data in reading FLASH are performed as the further improvement of this programme, on the UX3320 by MAC after electricity to imported into
In UX3320 RAM.
As the further improvement of this programme, the UX3320 RAM datas are divided into several regions, specifically include A0
Lower、 A0 Upper、 A2 Lower、 Table0、 LUT4、 LUT5、 LUT6、 Table3。
As the further improvement of this programme, the pull-up resistor includes pull-up resistor one and pull-up resistor two, it is described on
Pull-up resistor one is connected on bidirectional data line SDA, and pull-up resistor two is connected on clock cable SCL.
The beneficial effects of the invention are as follows：This circuit is overcome under traditional MAC mode of operations, it is necessary to which plug-in EEPROM is deposited
The problem of data, data needed for UX3320 are stored in the FLASH on BOB, so as to save EEPROM cost；In addition originally
Plug-in EEPROM is eliminated in invention, UX3320 is avoided and outside EEPROM read-write operations is judged by accident.
Brief description of the drawings
Fig. 1 is the circuit block diagram of the present invention.
Embodiment
Technical scheme is described in further detail below in conjunction with the accompanying drawings, but protection scope of the present invention is not limited to
It is as described below.
As shown in figure 1,
The circuit without plug-in EEPROM based on optical drive UX3320, including the MAC module circuit based on UX3320 components, PMD moulds
Block circuit and GPON BOSA modular circuits, the MAC module circuit connect PMD modular circuits, and the PMD modular circuits connect
GPON BOSA modular circuits are connect, the data as needed for FLASH on BOB stores UX3320, the external pull-up electricity of the main IIC of UX3320
Hinder to VCC.
Data in reading FLASH are performed on the UX3320 by MAC after electricity to imported into UX3320 RAM；The UX3320
RAM data is divided into several regions, specifically include A0 Lower, A0 Upper, A2 Lower, Table0, LUT4,
LUT5、 LUT6、 Table3；The pull-up resistor includes the R1 of the pull-up resistor one and R2 of pull-up resistor two, the pull-up resistor one
R1 is connected on bidirectional data line SDA, and the R2 of pull-up resistor two is connected on clock cable SCL.
The data as needed for FLASH on BOB stores UX3320, reading is performed on UX3320 after electricity by MAC
Data in FLASH are taken to imported into UX3320 RAM（It is A0 Lower → A0 Upper → A2Lower to lead data order
→A2 Table0 →LUT4→LUT5→LUT6→Table3）, MAC needs to perform preservation after scheduling and planning terminates
UX3320 RAM data operate to FLASH.
Based on optical drive UX3320 without plug-in EEPROM processing methods, applied to MAC production work patterns, its step is such as
Under：
The data as needed for FLASH on BOB stores UX3320, to system electrification；
The orders that send over of MAC response Telnet, it is sent to UX3320 RAM data by original and was directly stored in FLASH,
Or, one control instruction of increase operates partial data storage in UX3320 RAM to FLASH；
MAC reads data from FLASH and is written to UX3320 RAM；
Encryption mode is reverted to, toward register write-in PWE=0xFFFFFFFF；
MAC enters normal mode of operation.
As the further improvement of this programme, the FLASH operations use page mode operation.
Data write-in comprises the following steps that：
1）The bytes of A0Lower 128,0-127 positions； 2）The bytes of A0Upper 128,128-255 positions； 3） A2 Lower
123 bytes, 0-122 positions； 4） A2.table0； i. A2.127 = 0；Ii. the importing 128 since A2.128 addresses
Byte data, 128-255 positions； 5） A2.table4； i. A2.127 = 4；
Ii. 105 byte datas, 128-232 positions are imported since A2.128 addresses； 6）A2.table5； i. A2.127
= 5；Ii. 105 byte datas, 128-232 positions are imported since A2.128 addresses； 7） A2.table6； i.
A2.127= 6；Ii. 105 byte datas, 128-232 positions are imported since A2.128 addresses； 8）A2.table3； i.
A2.127= 3；Ii. 93 byte datas, 128-220 positions are imported since A2.128 addresses；Wherein 211-218 positions are close
Code set location, can not read original value, return value is all 0xFF； 9）Soft TX Disable are restarted；A2.110
In the 6th be first arranged to 1, then be arranged to 0, other bit values are motionless； i. A2.110[6] = 1； ii. A2.110
[6] = 0；Wherein A0, A2 are hexadecimal number, and its remainder values is decimal number.
As the further improvement of this programme, the PWE=0xFFFFFFFF is written to A2.123-126 registers.
As the further improvement of this programme, the MAC needs to perform after scheduling and planning terminates preserves UX3320
RAM data operates to FLASH.
Under MAC production work patterns, MAC can respond the order that Telnet is sended over, can directly will be original
Being sent to UX3320 RAM data is directly stored in FLASH in advance（It is effective in light debugging ED download Tool Position Comparisions, without elder generation
Derivative is directed back to FLASH from RAM again according to UX3320 RAM）, or the order of increase by one can be in UX3320 RAM
Partial data storage operates to FLASH, can use page mode operation, UX3320 RAM data such as are divided into several areas
Domain（A0 Lower、 A0 Upper、 A2 Lower、 Table0、 LUT4、 LUT5、 LUT6、 Table3）, because that can not read back
PW1 and PW2 positions in Table3（Table3.211-218）Data value, MAC is for setting PW1, PW2 for preserving（I.e.
A2.Table3.211-218）Need specially treated.
Described above is only the preferred embodiment of the present invention, it should be understood that the present invention is not limited to described herein
Form, the exclusion to other embodiment is not to be taken as, and can be used for various other combinations, modification and environment, and can be at this
In the text contemplated scope, it is modified by the technology or knowledge of above-mentioned teaching or association area.And those skilled in the art are entered
Capable change and change does not depart from the spirit and scope of the present invention, then all should be in the protection domain of appended claims of the present invention
It is interior.
Claims (4)
1. the circuit without plug-in EEPROM based on optical drive UX3320, including MAC module circuit, PMD based on UX3320 components
Modular circuit and GPON BOSA modular circuits, the MAC module circuit connect PMD modular circuits, the PMD modular circuits
Connect GPON BOSA modular circuits, it is characterised in that：The data as needed for FLASH on BOB stores UX3320, the UX3320 master
The external pull-up resistors of IIC are to VCC.
It is 2. according to claim 1 based on circuits of the optical drive UX3320 without plug-in EEPROM, it is characterised in that：It is described
Data in reading FLASH are performed after the upper electricity of UX3320 by MAC to imported into UX3320 RAM.
It is 3. according to claim 1 based on circuits of the optical drive UX3320 without plug-in EEPROM, it is characterised in that：It is described
UX3320 RAM datas are divided into several regions, specifically include A0 Lower, A0 Upper, A2 Lower, Table0,
LUT4、 LUT5、 LUT6、 Table3。
It is 4. according to claim 1 based on circuits of the optical drive UX3320 without plug-in EEPROM, it is characterised in that：On described
Pull-up resistor includes pull-up resistor one（R1）With pull-up resistor two（R2）, the pull-up resistor one（R1）It is connected on bidirectional data line SDA
On, pull-up resistor two（R2）It is connected on clock cable SCL.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711029533.2A CN107818059B (en) | 2017-10-27 | 2017-10-27 | Circuit based on optical drive UX3320 does not have plug-in EEPROM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711029533.2A CN107818059B (en) | 2017-10-27 | 2017-10-27 | Circuit based on optical drive UX3320 does not have plug-in EEPROM |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107818059A true CN107818059A (en) | 2018-03-20 |
| CN107818059B CN107818059B (en) | 2023-08-25 |
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|---|---|---|---|
| CN201711029533.2A Active CN107818059B (en) | 2017-10-27 | 2017-10-27 | Circuit based on optical drive UX3320 does not have plug-in EEPROM |
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101394678A (en) * | 2008-11-07 | 2009-03-25 | 烽火通信科技股份有限公司 | Serialization/de-serialization interface module generally used in GEPON/GPON |
| CN101908941A (en) * | 2010-08-11 | 2010-12-08 | 烽火通信科技股份有限公司 | Method for analyzing, debugging and simulating OMCI (Management and Control Interface) information and PLOAM (Physical Layer Operation Administration and Maintenance) information of GPON (Gigabit-Capable Passive Optical Network) |
| CN102063939A (en) * | 2009-11-18 | 2011-05-18 | 中兴通讯股份有限公司 | Method and device for implementing electrically erasable programmable read-only memory |
| CN103236883A (en) * | 2013-04-11 | 2013-08-07 | 烽火通信科技股份有限公司 | GPON (gigabit passive optical network) remote system and digital diagnosis method |
| US20140355986A1 (en) * | 2011-10-25 | 2014-12-04 | Telefonaktiebolaget L M Ericsson (Publ) | Interface and method for enabling interconnection of a host device and a small-formfactor pluggable module |
| CN104270201A (en) * | 2014-10-21 | 2015-01-07 | 索尔思光电（成都）有限公司 | Two-channel compact type high-speed SFP optical module, system and signal processing method of system |
| CN104901738A (en) * | 2015-05-22 | 2015-09-09 | 深圳市磊科实业有限公司 | BOB (BOB on Board) testing system and method for automatically calibrating BOB receiving power |
| CN206389493U (en) * | 2016-12-16 | 2017-08-08 | 无锡市电子仪表工业有限公司 | A kind of EPON optical network units applied to CATV soft exchanges |
| CN207541612U (en) * | 2017-10-27 | 2018-06-26 | 四川天邑康和通信股份有限公司 | The circuit without plug-in EEPROM based on optical drive UX3320 |
-
2017
- 2017-10-27 CN CN201711029533.2A patent/CN107818059B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101394678A (en) * | 2008-11-07 | 2009-03-25 | 烽火通信科技股份有限公司 | Serialization/de-serialization interface module generally used in GEPON/GPON |
| CN102063939A (en) * | 2009-11-18 | 2011-05-18 | 中兴通讯股份有限公司 | Method and device for implementing electrically erasable programmable read-only memory |
| CN101908941A (en) * | 2010-08-11 | 2010-12-08 | 烽火通信科技股份有限公司 | Method for analyzing, debugging and simulating OMCI (Management and Control Interface) information and PLOAM (Physical Layer Operation Administration and Maintenance) information of GPON (Gigabit-Capable Passive Optical Network) |
| US20140355986A1 (en) * | 2011-10-25 | 2014-12-04 | Telefonaktiebolaget L M Ericsson (Publ) | Interface and method for enabling interconnection of a host device and a small-formfactor pluggable module |
| CN103236883A (en) * | 2013-04-11 | 2013-08-07 | 烽火通信科技股份有限公司 | GPON (gigabit passive optical network) remote system and digital diagnosis method |
| CN104270201A (en) * | 2014-10-21 | 2015-01-07 | 索尔思光电（成都）有限公司 | Two-channel compact type high-speed SFP optical module, system and signal processing method of system |
| CN104901738A (en) * | 2015-05-22 | 2015-09-09 | 深圳市磊科实业有限公司 | BOB (BOB on Board) testing system and method for automatically calibrating BOB receiving power |
| CN206389493U (en) * | 2016-12-16 | 2017-08-08 | 无锡市电子仪表工业有限公司 | A kind of EPON optical network units applied to CATV soft exchanges |
| CN207541612U (en) * | 2017-10-27 | 2018-06-26 | 四川天邑康和通信股份有限公司 | The circuit without plug-in EEPROM based on optical drive UX3320 |
Non-Patent Citations (1)
| Title |
|---|
| 徐皓: ""基于MIPS的GPON系统用户终端的设计与实现"", 《中国优秀硕士学位论文全文数据库》 * |
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| CN107818059B (en) | 2023-08-25 |
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