CN107817631B - Liquid crystal display panel - Google Patents
Liquid crystal display panel Download PDFInfo
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- CN107817631B CN107817631B CN201711018944.1A CN201711018944A CN107817631B CN 107817631 B CN107817631 B CN 107817631B CN 201711018944 A CN201711018944 A CN 201711018944A CN 107817631 B CN107817631 B CN 107817631B
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- liquid crystal
- common electrode
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- crystal panel
- thin film
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 79
- 239000010409 thin film Substances 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 230000003287 optical effect Effects 0.000 claims abstract description 13
- 239000003990 capacitor Substances 0.000 claims description 10
- 239000010408 film Substances 0.000 claims description 5
- 238000000034 method Methods 0.000 abstract description 12
- 238000010586 diagram Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 230000005684 electric field Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
- G02F1/13378—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by treatment of the surface, e.g. embossing, rubbing or light irradiation
- G02F1/133788—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by treatment of the surface, e.g. embossing, rubbing or light irradiation by light irradiation, e.g. linearly polarised light photo-polymerisation
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
Abstract
The invention discloses a liquid crystal panel. The liquid crystal panel includes an array substrate including: the pixel structure comprises a plurality of scanning lines, a plurality of data lines arranged to intersect with the plurality of scanning lines, a plurality of common electrode lines arranged at the same layer as the plurality of data lines, and a plurality of pixel units defined by the plurality of scanning lines and the plurality of data lines, wherein each pixel unit comprises a main pixel area and a slave pixel area; when the liquid crystal panel is subjected to optical phase matching, the voltage input by the common electrode line is controlled to be equal to the voltage input by the data line, and the voltage input by the scanning line is controlled to be greater than the turn-on voltage of each thin film transistor in the pixel unit, so that the main pixel area and the auxiliary pixel area have the same voltage. Through the mode, the liquid crystal display panel phase matching method can reduce the condition of phase matching disorder caused by different pressure differences in the liquid crystal display panel phase matching process, and improve the stability and the phase matching capability of the liquid crystal display panel phase matching.
Description
Technical Field
The invention relates to the field of liquid crystal display, in particular to a liquid crystal panel.
Background
Liquid Crystal Display (LCD) has many advantages such as thin body, power saving, no radiation, and is widely used, for example: liquid crystal televisions, mobile phones, Personal Digital Assistants (PDAs), digital cameras, computer screens, notebook computer screens, or the like, are dominant in the field of flat panel displays.
With the development of the liquid crystal panel technology, the liquid crystal panel adopts a multi-Domain (multiple Domain) display technology to improve the display capability of the product, and at present, the display technologies of 4Domain and 8Domain are common. And the multi-domain display technology requires the use of a plurality of Thin Film Transistors (TFTs) to control the voltages of a main pixel region and a sub pixel region in a pixel unit, respectively, wherein the main pixel region and the sub pixel region correspond to liquid crystal molecules of a plurality of domains, respectively.
In the process of optical phase matching of the multi-domain liquid crystal panel, the voltages of the main pixel area and the auxiliary pixel area are different, so that the initial liquid crystal angle formed by liquid crystal rotation phase matching is different, the condition of phase matching disorder is easy to occur, and the display of the liquid crystal panel is influenced.
Disclosure of Invention
The invention mainly solves the technical problem of providing a liquid crystal panel, which can reduce the situation of phase disorder in the optical phase matching process of the liquid crystal panel.
In order to solve the technical problems, the invention adopts a technical scheme that: provided is a liquid crystal panel including an array substrate including: the pixel structure comprises a plurality of scanning lines, a plurality of data lines arranged to intersect with the plurality of scanning lines, a plurality of common electrode lines arranged at the same layer as the plurality of data lines, and a plurality of pixel units defined by the plurality of scanning lines and the plurality of data lines, wherein each pixel unit comprises a main pixel area and a slave pixel area; when the liquid crystal panel is subjected to optical phase matching, the voltage input by the common electrode line is controlled to be equal to the voltage input by the data line, and the voltage input by the scanning line is controlled to be greater than the turn-on voltage of each thin film transistor in the pixel unit, so that the main pixel area and the auxiliary pixel area have the same voltage.
The invention has the beneficial effects that: in the liquid crystal panel, in the optical phase matching process, the voltage input by the common electrode wire is controlled to be equal to the voltage input by the data wire, and the voltage input by the scanning wire is controlled to be greater than the starting voltage of each thin film transistor in the pixel unit, so that the main pixel area and the auxiliary pixel area have the same voltage. Through the mode, the liquid crystal display panel phase matching method can reduce the condition of phase matching disorder caused by different pressure differences in the liquid crystal display panel phase matching process, and improve the stability and the phase matching capability of the liquid crystal display panel phase matching.
Drawings
FIG. 1 is a schematic structural diagram of a liquid crystal panel according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a pixel unit in the array substrate of the liquid crystal panel shown in FIG. 1;
FIG. 3 is a schematic structural diagram of a pixel unit in an array substrate of the liquid crystal panel shown in FIG. 1;
fig. 4 is a schematic diagram of voltages applied in the liquid crystal panel shown in fig. 1.
Detailed Description
Where certain terms are used throughout the description and claims to refer to particular components, those skilled in the art will appreciate that manufacturers may refer to the same components by different names. In the present specification and claims, the difference in name is not used as a means for distinguishing between components, but a difference in function of a component is used as a reference for distinguishing between components. The present invention will be described in detail below with reference to the accompanying drawings and examples.
Fig. 1 is a schematic structural diagram of a liquid crystal panel according to an embodiment of the present invention. As shown in fig. 1, the liquid crystal panel includes an array substrate 1, a color filter substrate 2 disposed opposite to the array substrate 1, and a liquid crystal layer 3 sandwiched between the array substrate 1 and the color filter substrate 2.
The color filter substrate 2 includes a glass substrate 21 and a common electrode layer 22 disposed on the glass substrate 21, wherein the common electrode layer 22 is made of Indium Tin Oxide (ITO) on the whole surface.
Referring to fig. 2 and fig. 3 together, fig. 2 is a circuit schematic diagram of a pixel unit in an array substrate of the liquid crystal panel shown in fig. 1, and fig. 3 is a structural schematic diagram of the pixel unit in the array substrate of the liquid crystal panel shown in fig. 1. As shown in fig. 2 and 3, the array substrate 1 includes a plurality of scan lines Gate and a plurality of data lines Date that perpendicularly intersect each other, a plurality of common electrode lines Acom disposed at the same level as the plurality of data lines Date, and a plurality of pixel units 11 defined by the plurality of scan lines Gate and the plurality of data lines Date, each pixel unit 11 including a master pixel region 111 and a slave pixel region 112.
The main pixel region 111 includes a main thin film transistor T1 and a main pixel electrode a 1. The Gate of the main thin film transistor T1 is connected to the scan line Gate, the source of the main thin film transistor T1 is connected to the data line Date, and the drain of the main thin film transistor T1 is connected to the main pixel electrode a 1.
A first liquid crystal capacitor C is formed between the main pixel electrode a1 and the common electrode layer 22 in the color filter substrate 2LC1. That is, the drain of the main TFT T1 and the first LC capacitor CLC1Is connected to the first liquid crystal capacitor CLC1And the other end thereof is connected to the common electrode line CFcom in the common electrode layer 22.
The slave pixel region 112 includes a slave thin film transistor T2, a shared thin film transistor T3, and a slave pixel electrode a 2. The Gate of the slave thin film transistor T2 is connected to the scan line Gate, the source of the slave thin film transistor T2 is connected to the data line Date, the drain of the slave thin film transistor T2 is connected to the pixel electrode a2 and the source of the shared thin film transistor T3, the Gate of the shared thin film transistor T3 is connected to the scan line Gate, and the drain of the shared thin film transistor T3 is connected to the common electrode line Acom.
A second liquid crystal capacitor C is formed between the pixel electrode a2 and the common electrode layer 22 in the color filter substrate 2LC2. That is, the drain of the TFT T2 and the second liquid crystal capacitor CLC2Is connected to the second liquid crystal capacitor CLC2And the other end thereof is connected to the common electrode line CFcom in the common electrode layer 22.
In the present embodiment, the main pixel region 111 and the sub pixel region 112 each correspond to liquid crystal molecules of four domains. In other embodiments, the master pixel region 111 and the slave pixel region 112 may also each correspond to liquid crystal molecules of a plurality of domains other than four domains.
In this embodiment, when performing optical phase matching on the liquid crystal panel, the voltage input by the common electrode line Acom is controlled to be equal to the voltage input by the data line Date, and the voltage input by the scan line Gate is greater than the turn-on voltage of each thin film transistor in the pixel unit 11, so that the main pixel region 111 and the sub pixel region 112 have the same voltage.
Specifically, when the liquid crystal panel is photo-matched, the voltage supplied to the scan line Gate is greater than the turn-on voltage Vth of the main thin film transistor T1, the slave thin film transistor T2, and the shared thin film transistor T3, so that the main thin film transistor T1, the slave thin film transistor T2, and the shared thin film transistor T3 are all in an on state, that is, the source and drain of the three thin film transistors isolated by the channel are in a short-circuited state at all times. When the voltages supplied to the common electrode line Acom and the Data line Data are the same positive voltage, the voltages of the master pixel region 111 and the slave pixel region 112 are at the same level, so that the same voltage difference between the master pixel region 111 and the slave pixel region 112 and the common electrode layer 22 of the color filter substrate 2 is ensured in the optical phase matching process, and further the first liquid crystal capacitors C formed by the master pixel region 111 and the slave pixel region 112 and the common electrode layer 22 on the color filter substrate 2 respectivelyLC1And a second liquid crystal capacitor CLC2The capacitance values of the liquid crystal display panel are the same, so that the condition of phase matching disorder caused by different pressure differences in the liquid crystal display panel optical phase matching process in the prior art can be reduced, and the stability and the phase matching capability of the liquid crystal optical phase matching are improved.
In this embodiment, the array substrate 1 further includes a plurality of DBS (Data Line BM less) common electrode lines Dcom disposed on the plurality of Data lines Data and the common electrode lines Acom, and the plurality of DBS common electrode lines Dcom are electrically connected to the corresponding common electrode lines Acom through the vias.
Preferably, the plurality of DBS common electrode lines Dcom and the plurality of Data lines Data are correspondingly disposed, and the width of the DBS common electrode lines Dcom is greater than that of the Data lines Data, wherein the DBS common electrode lines Dcom are made of Indium Tin Oxide (ITO). It can be understood that, when the liquid crystal panel is in normal operation, the electric field formed by the common electrode lines Dcom of DBS can keep the liquid crystal molecules in a non-deflected state, so as to achieve the purpose of shading light, and further save the black matrix at the corresponding position of the data lines in the liquid crystal panel, and increase the aperture ratio.
Preferably, the plurality of DBS common electrode lines Dcom are disposed at the same layer and interval as the plurality of pixel units 11. Specifically, the pixel unit 11 includes a red pixel unit R, a green pixel unit G, and a blue pixel unit B repeatedly arranged in order, and the common electrode lines DBS, Dcom, are respectively disposed between the red pixel unit R and the green pixel unit G, between the green pixel unit G and the blue pixel unit B, and between the blue pixel unit B and the red pixel unit R.
In this embodiment, when the liquid crystal panel is photo-matched, since the DBS common electrode line Dcom is electrically connected to the corresponding common electrode line Acom through the via hole, the voltage of the DBS common electrode line Dcom is at the same level as the voltages of the main pixel region 111 and the slave pixel region 112, and the voltage difference between the DBS common electrode line Dcom, the main pixel region 111, the slave pixel region 112, and the common electrode layer 22 of the color filter substrate 2 is further the same, so that the stability and the photo-matching capability of the liquid crystal panel can be further improved.
Referring to fig. 4, fig. 4 is a schematic diagram of voltages applied to the liquid crystal panel shown in fig. 1. As shown in FIG. 4, when the liquid crystal panel is photo-matched, the voltage applied to the Data line Data is VdataThe voltage applied to the common electrode line Acom is VAcomIn which V isdata＝VAcom。
The DBS common electrode line Dcom is electrically connected with the common electrode line Acom through the via hole, so that the voltage V on the DBS common electrode line Dcom is enabledDcom＝VAcom。
Since the voltage of the scan line Gate is greater than the turn-on voltage Vth of the main tft T1, the slave tft T2, and the shared tft T3, the voltages of the main pixel region 111 and the slave pixel region 112 are equal, i.e., Vmain-pixel＝Vsub-pixel＝VAcom。
Due to the voltage V of the common electrode layer 22 of the color film substrate 2CFcomA constant voltage value so that the voltage difference between the main pixel region 111, the sub-pixel region 112, the DBS common electrode line Dcom and the common electrode layer 22 is the same.
The invention has the beneficial effects that: when optical phase matching is carried out, the voltage input by the common electrode wire is controlled to be equal to the voltage input by the data wire, and the voltage input by the scanning wire is controlled to be greater than the starting voltage of each thin film transistor in the pixel unit, so that the main pixel area and the auxiliary pixel area have the same voltage. Through the mode, the liquid crystal display panel phase matching method can reduce the condition of phase matching disorder caused by different pressure differences in the liquid crystal panel phase matching process, and improves the stability and the phase matching capability of the liquid crystal optical phase matching.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A liquid crystal panel comprising an array substrate, the array substrate comprising: the liquid crystal display device comprises a plurality of scanning lines, a plurality of data lines arranged to intersect with the plurality of scanning lines, a plurality of common electrode lines arranged at the same layer as the plurality of data lines, and a plurality of pixel units defined by the plurality of scanning lines and the plurality of data lines, wherein each pixel unit comprises a main pixel area and a slave pixel area;
when the liquid crystal panel is subjected to optical phase matching, the voltage input by the common electrode line is controlled to be equal to the voltage input by the data line, and the voltage input by the scanning line is controlled to be greater than the turn-on voltage of each thin film transistor in the pixel unit, so that the main pixel area and the auxiliary pixel area have the same voltage.
2. The liquid crystal panel according to claim 1, wherein the main pixel region includes a main thin film transistor and a main pixel electrode;
the grid electrode of the main thin film transistor is connected with the scanning line, the source electrode of the main thin film transistor is connected with the data line, and the drain electrode of the main thin film transistor is connected with the main pixel electrode.
3. The liquid crystal panel according to claim 2, wherein the slave pixel region includes a slave thin film transistor, a shared thin film transistor, and a slave pixel electrode; the gate of the slave thin film transistor is connected to the scanning line, the source of the slave thin film transistor is connected to the data line, the drain of the slave thin film transistor is connected to the slave pixel electrode and the source of the shared thin film transistor, the gate of the shared thin film transistor is connected to the scanning line, and the drain of the shared thin film transistor is connected to the common electrode line.
4. The liquid crystal panel according to claim 1, wherein the array substrate further comprises a plurality of DBS common electrode lines disposed above the plurality of data lines and the common electrode lines, and the plurality of DBS common electrode lines are electrically connected to the corresponding common electrode lines via vias.
5. The liquid crystal panel according to claim 4, wherein a plurality of the DBS common electrode lines and a plurality of the data lines are disposed correspondingly, and a width of the DBS common electrode lines is larger than a width of the data lines.
6. The liquid crystal panel according to claim 5, wherein a plurality of the DBS common electrode lines are disposed at intervals on a same layer as a plurality of the pixel units.
7. The liquid crystal panel according to claim 4, further comprising a color film substrate and a liquid crystal layer, wherein the color film substrate is disposed opposite to the array substrate, and the liquid crystal layer is sandwiched between the array substrate and the color film substrate;
when the liquid crystal panel is subjected to optical phase matching, the voltage differences among the main pixel area, the auxiliary pixel area, the DBS common electrode line and the common electrode layer of the color film substrate are the same.
8. The liquid crystal panel according to claim 7, wherein when the liquid crystal panel is subjected to photo-alignment, the main pixel region and the sub-pixel region have the same capacitance values as a first liquid crystal capacitor and a second liquid crystal capacitor formed on a common electrode layer on the color filter substrate.
9. The liquid crystal panel according to claim 1, wherein the master pixel region and the slave pixel region each correspond to liquid crystal molecules of four domains.
10. The liquid crystal panel according to claim 1, wherein the pixel cells include a red pixel cell, a green pixel cell, and a blue pixel cell.
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| CN201711018944.1A CN107817631B (en) | 2017-10-26 | 2017-10-26 | Liquid crystal display panel |
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| CN201711018944.1A CN107817631B (en) | 2017-10-26 | 2017-10-26 | Liquid crystal display panel |
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| CN107817631B true CN107817631B (en) | 2020-12-04 |
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Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109298574B (en) * | 2018-11-20 | 2021-09-24 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN110928084A (en) * | 2019-11-18 | 2020-03-27 | 深圳市华星光电半导体显示技术有限公司 | Pixel unit, array substrate and display device |
| CN111081717B (en) * | 2019-12-06 | 2022-10-04 | Tcl华星光电技术有限公司 | Shared thin film transistor and display panel |
| CN111208683B (en) * | 2020-02-28 | 2021-04-27 | 深圳市华星光电半导体显示技术有限公司 | Display panel |
| CN113050330B (en) | 2021-03-26 | 2022-04-01 | Tcl华星光电技术有限公司 | Liquid crystal display panel and alignment method thereof |
| CN113257203A (en) * | 2021-05-12 | 2021-08-13 | Tcl华星光电技术有限公司 | Pixel driving circuit and liquid crystal display panel |
| US11847989B2 (en) | 2021-05-12 | 2023-12-19 | Tcl China Star Optoelectronics Technology Co., Ltd. | Pixel driving circuit and liquid crystal display panel |
| CN115377127B (en) * | 2022-10-25 | 2023-01-31 | 惠科股份有限公司 | Array substrate, preparation method thereof and display panel |
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| KR101666622B1 (en) * | 2009-08-26 | 2016-10-17 | 삼성디스플레이 주식회사 | Photoalignment agent and liquid crystal display device using the same |
| US20130003004A1 (en) * | 2010-01-22 | 2013-01-03 | Masahiro Shimizu | Liquid crystal panel and liquid crystal display device |
| KR102071633B1 (en) * | 2013-10-15 | 2020-01-31 | 삼성디스플레이 주식회사 | Liquid crystal display |
| KR102378211B1 (en) * | 2015-06-23 | 2022-03-25 | 삼성디스플레이 주식회사 | Mask and fabrication method of display device by using the mask |
| KR102422576B1 (en) * | 2015-10-14 | 2022-07-21 | 삼성디스플레이 주식회사 | Liquid crystal display device |
| CN106226961B (en) * | 2016-09-29 | 2019-09-13 | 深圳市华星光电技术有限公司 | A kind of COA array substrate and display device |
| CN106647078A (en) * | 2017-01-11 | 2017-05-10 | 深圳市华星光电技术有限公司 | Pixel structure and liquid crystal display |
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| CN106249486A (en) * | 2015-06-03 | 2016-12-21 | 三星显示有限公司 | Liquid crystal display and manufacture method thereof |
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Address after: No.9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee after: TCL China Star Optoelectronics Technology Co.,Ltd. Address before: No.9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |