CN107801033B

CN107801033B - Decoding method and decoding device applied to digital audio and video coding and decoding technical standard system

Info

Publication number: CN107801033B
Application number: CN201610803547.4A
Authority: CN
Inventors: 林和源; 童怡新
Original assignee: MediaTek Inc
Current assignee: MediaTek Inc
Priority date: 2016-09-06
Filing date: 2016-09-06
Publication date: 2021-05-11
Anticipated expiration: 2036-09-06
Also published as: CN107801033A

Abstract

The invention provides a decoding method applied to a digital audio and video coding and decoding technical standard system, which is used for decoding audio and video data. An upper limit of displacement of the offset value greater than zero and less than an upper limit of displacement of the interval value is provided in advance. According to whether an offset displacement reaches the upper limit of the offset displacement, whether an offset pre-reading process is stopped is determined. After the offset pre-read process is stopped, a most significant bit of an offset effective amount is reserved. Then, when a symbol to be decoded in the audio/video data is determined to be a greater probability symbol or a lesser probability symbol, the most significant bit of the reserved effective amount of the offset value is used as a basis for consideration.

Description

Decoding method and decoding device applied to digital audio and video coding and decoding technical standard system

Technical Field

The present invention relates to multimedia signal processing techniques, and more particularly to decompression techniques in the digital audio coding standard (AVS).

Background

With the progress of communication technology, digital television broadcasting is becoming mature and popular. In addition to transmission via cable lines, digital television signals may also be transmitted as wireless signals through equipment such as base stations or satellites. In order to meet the requirements of improving the picture quality and reducing the amount of transmitted data, the transmitting end usually encodes and compresses the video and audio signals to be transmitted. Correspondingly, the receiving end must correctly decode and decompress the received signal to restore the video signal.

The digital audio/video coding and decoding (AVS) standard currently used in continental china uses Advanced Entropy Coding (AEC) to process audio/video data, and its implementation can refer to the technical documents provided by U.S. patent No. 7,808,406 and the AVS working group. As known to those skilled in the art, binary arithmetic decoding performed by a binary arithmetic coding engine (binary arithmetic coding engine) at the receiving end of the AVS is a recursive process, and the input of the recursive process is called an offset value (offset). By finding out the relative relationship between the offset value and a range value, it can be determined that the symbol to be decoded currently is a More Probable Symbol (MPS) or a Less Probable Symbol (LPS). The symbol to be decoded in binary arithmetic coding has only two possibilities of 1 and 0; of the two possibilities, those with an occurrence probability greater than 0.5 are more probable symbols, while the other is less probable symbols.

The two main variables related to the interval value are the interval value displacement and the interval value effective amount, and the two main variables related to the offset value are the offset value displacement and the offset value effective amount. In practice, the arithmetic coding engine has a limited data length to process at a time. The current AVS specification specifies that the arithmetic coding engine should set the interval value displacement and the interval value effective amount length to be eight bits of binary system. On the other hand, the offset and the effective offset length should be set to thirty-two bits and nine bits, respectively.

The arithmetic coding engine at the receiving end of the AVS first performs an offset initialization procedure, and the conventional process is shown in fig. 1. In step S101, the offset is set to zero, and in step S102, nine bits of audio/video data are read as an effective offset. Next, step 103 and step 104 represent an offset value pre-reading procedure, wherein step S103 is to determine whether "the effective amount of offset value is less than 256". An offset payload less than 256 indicates that the most significant bit (the ninth bit) of the offset payload is a binary zero. If the determination in step S103 is positive, step S104 is performed, i.e., the effective amount of the offset is shifted to the left by one bit and a subsequent bit is read. Correspondingly, the offset displacement is added by 1. Subsequently, step S103 is executed again. If the determination result in step S103 is negative, the offset pre-reading process represented by steps S103-S104 is stopped. Then, in step S105, the last eight bits of the offset effective amount are retrieved as a new offset effective amount. The offset value shift determined in step S104 and the effective offset value determined in step S105 together constitute an initial offset value used in the subsequent decoding process.

The main decoding procedures performed by the arithmetic coding engine on the receiving end of the conventional AVS are shown in fig. 2(a) to 2 (B). The function of step S201 is to read the last updated context model of the previous decoding procedure, and accordingly, it is known that the symbol with higher probability in the current decoding procedure is binary zero or binary one, and the occurrence probability of the symbol with higher probability is known. The function of step S202 is to update the bin shift amount and the bin effective amount according to the old bin value and the occurrence probability of the symbol with greater probability, and determine whether the content of a flag is binary zero or binary one, and the detailed process is shown as sub-steps S202A-S202G in FIG. 3.

Step S203 is the main determination step in the whole decoding process, i.e. determining the current symbol to be decoded as a more probable symbol or a less probable symbol. Step S203 can be decomposed into three criteria: (1) whether the interval value displacement amount is greater than the offset value displacement amount, (2) whether the interval value displacement amount is equal to the offset value displacement amount, and (3) whether the effective amount of the offset value is greater than or equal to the effective amount of the interval value. If the determination result of the formula (1) is yes, or the determination results of the formula (2) and the formula (3) are both yes, step S204 of determining the symbol to be decoded as a less probable symbol is performed. On the contrary, if the first decision formula is negative and any of the latter two decision formulas is negative, step S291 of determining that the symbol to be decoded is a symbol with a higher probability is performed.

Steps S205 to S213 following step S204 are a series of parameter updating processes, which are executed only when the symbol to be decoded is determined to be a less probable symbol. More specifically, steps S205-S207 determine how to update a smaller probability symbol interval value according to the status of the flag. In steps S208-S210, how to update the effective amount of the offset value is determined according to the relationship between the interval value displacement and the offset value displacement. In steps S211-S213, how to update the effective amount of the offset value and the effective amount of the interval value is determined according to the less probable symbol interval value.

The main function of steps S214-S218 is to pre-read the subsequent offset value for the next symbol determination procedure. Step S214 resets the section value displacement amount to zero. Step S215 resets the offset value displacement amount to zero. Steps S216 to S218 are the same as steps S103 to S105 in fig. 1, i.e. the subsequent bits are selectively read from the audio/video data as effective offset amount, and the offset amount is set according to the actually read number of bits. Finally, step S219 is to update the context model and return the decoding result. As shown in fig. 2(a), after step S291 of determining that the symbol to be decoded is a symbol with a larger probability, step S292 also updates the context model and returns the decoding result.

In the above decoding procedure, the steps related to pre-reading the subsequent offset value have defects, as described below.

In step S203 shown in fig. 2(a), the offset value displacement amount and the interval value displacement amount are compared with each other. As previously described, the offset value shift amount is thirty-two bits long, while the span value shift amount is eight bits long. Therefore, the maximum displacement of the offset value can be thirty-second power minus one, but the maximum displacement of the interval value can only be eight power minus one (i.e. two hundred and fifty-five). In practice, when the offset displacement does not exceed twenty-two hundred fifty-four, the interval value displacement can be constantly tracked through step S202E to make the comparison basis of the effective offset amount and the effective interval value consistent.

It is known that there may be more than twenty-five-fourteen binary zeros continuously appearing in the audio/video data received by the arithmetic coding engine at the receiving end, so that the pre-reading steps S216 to S217 are repeatedly executed more than twenty-five-fourteen times, and the offset displacement is accumulated to be higher than twenty-five-fourteen times. However, in the above decoding process, the step of resetting the offset to zero (S215) is only performed if the determination result of step S203 is yes (i.e. the symbol to be decoded is determined to be a less probable symbol). In practice, once the offset displacement is accumulated to be higher than twenty-hundred fifty-four, the determination result in step S203 is no, so that the whole decoding process is broken down and an erroneous decoding result is output.

The same may occur in the offset value initialization procedure presented in fig. 1. As can be seen by comparing fig. 1 and fig. 2(B), the pre-reading steps S103 to S105 are identical to the pre-reading steps S216 to S218. That is, the offset may be accumulated to be higher than twenty-five-fourteen in the initialization process, which may cause the decoding process to be broken down.

Disclosure of Invention

The invention provides a novel decoding method and a decoding device, which are applied to a digital audio and video coding and decoding technical standard system. By properly setting a reading stop flag for the offset reading program, the decoding method and the decoding device according to the present invention can effectively avoid the situation that the offset displacement is higher than the upper limit of the interval value displacement, thereby avoiding the problem of decoding process breakdown. It should be noted that, if the decoding method and the decoding apparatus according to the present invention are adopted, it is not necessary to apply relevant preventive restrictions to the encoding result output by the AVS encoding end (for example, more than twenty-five-fourteen binary zeros must not continuously appear in the audio/video data), and it is also not necessary to modify the size of the register for storing the interval value displacement in the AVS decoding end.

According to an embodiment of the present invention, a decoding method applied to a digital audio/video codec technology standard system is provided for decoding audio/video data. According to the decoding method, an upper limit of the offset amount is provided in advance, wherein the upper limit is greater than zero and less than an upper limit of the interval value. Whether to stop the pre-reading process of an offset value depends on whether the offset value reaches the upper limit of the offset value. After the offset pre-read process is stopped, a most significant bit of an offset effective amount is reserved. When the next symbol judgment procedure is performed to judge that a symbol to be decoded in the audio/video data is a symbol with a larger probability or a symbol with a smaller probability, the most significant bit of the offset value with the effective amount reserved is used as a basis for consideration.

Another embodiment of the present invention is a decoding device applied to a digital audio/video codec standard system, for decoding audio/video data. The decoding device comprises an offset value pre-reading circuit and a symbol judging circuit. An upper limit of displacement of the offset value greater than zero and less than an upper limit of displacement of the interval value is provided in advance. The offset pre-reading circuit is used for executing an offset pre-reading program, determining whether to stop the offset pre-reading program according to whether an offset displacement reaches the upper limit of the offset displacement, and reserving a most significant bit of an effective amount of an offset after the offset pre-reading program is stopped. The symbol judgment circuit is used for carrying out a next symbol judgment procedure according to the most significant bit of the reserved effective amount of the deviation value so as to judge a symbol to be decoded in the audio and video data to be a symbol with a larger probability or a symbol with a smaller probability.

Another embodiment of the present invention is a decoding method applied to a digital audio/video codec standard system, for decoding audio/video data. According to the decoding method, an offset pre-reading procedure comprises the following steps: (a) determining whether an effective amount of an offset value is below a specified value; (b) if the determination result in step (a) is yes, reading a new least significant bit for the effective amount of the offset value; and (c) stopping the offset value pre-reading process after the step (b) is performed once.

Another embodiment of the present invention is a decoding device applied to a digital audio/video codec standard system, for decoding audio/video data. The decoding device comprises an offset value pre-reading circuit for executing an offset value pre-reading program. The offset pre-reading circuit comprises a judgment circuit and a reading circuit. The judging circuit is used for judging whether an effective amount of an offset value is lower than a specific value. If the judgment result of the judgment circuit is yes, the reading circuit reads a new least significant bit for the effective amount of the offset value and then stops the offset value pre-reading process.

Another embodiment of the present invention is a decoding method applied to a digital audio/video codec standard system, for decoding audio/video data. The decoding method comprises the step of judging whether the audio and video data contain at least one bypass (bypass) data to be decoded. If the judgment result is negative, the audio and video data is applied with a first decoding program. If the judgment result is yes, the at least one piece of bypass data to be decoded is subjected to a second decoding procedure different from the first decoding procedure.

The advantages and spirit of the present invention can be further understood by the following detailed description and accompanying drawings.

Drawings

Fig. 1 is a flowchart illustrating an offset initialization procedure adopted by a conventional AVS receiving end.

Fig. 2(a) -2 (B) are flowcharts illustrating the main decoding procedure adopted by the arithmetic coding engine of the conventional AVS receiving end.

Fig. 3 shows the detailed sub-steps and flow of step S202 of fig. 2.

FIG. 4 is a flowchart of an offset initialization procedure according to an embodiment of the present invention.

Fig. 5(a) -5 (B) are flow charts illustrating the main decoding process according to an embodiment of the present invention.

FIG. 6 is a block diagram of a decoding apparatus according to an embodiment of the present invention.

FIG. 7 is a flowchart illustrating an offset initialization procedure according to another embodiment of the invention.

FIG. 8 is a partial flow chart of the main decoding process according to another embodiment of the present invention.

FIG. 9 is a flowchart of a decoding method according to an embodiment of the present invention.

FIG. 10 is a flowchart illustrating a second decoding procedure according to an embodiment of the invention.

FIG. 11 is a flow chart of a second decoding procedure according to another embodiment of the invention.

FIG. 12 is a block diagram of a decoding apparatus according to an embodiment of the present invention.

Description of the symbols

S101 to S108: step flows S201 to S224: flow of steps

S202A-S202G: step flows S401 to S404: flow of steps

S501 to S524: step flow 600: decoding device

601: front-end operation circuit 602: symbol judging circuit

603: circuit for determining symbol interval value with less probability

604: the offset value effective amount resetting circuit 605: effective amount reset circuit for interval value

606: offset value pre-read circuit 607: pre-read driving circuit

608: context update circuits S701 to S704: flow of steps

S811 to S824: step flows S901 to S903: flow of steps

S1001 to S1024: step flows S1101 to S1106: flow of steps

1200: the decoding apparatus 1201: judgment circuit

1202: the first decoding circuit 1203: second decoding circuit

1203A: the comparator 1203B: bit checker

1203C: the output circuit 500: decoding program

It is noted that the drawings of the present invention include functional block diagrams that represent various functional circuits in association with one another. These drawings are not detailed circuit diagrams, and the connecting lines are only used to indicate signal flows. The various interactions between functional elements and/or processes need not be achieved through direct electrical connections. In addition, the functions of the individual elements do not have to be distributed as shown in the drawings, and the distributed blocks do not have to be implemented by distributed electronic elements.

Detailed Description

An embodiment of the present invention is a decoding method applied to a digital audio/video coding and decoding technology standard (AVS) system, and a flowchart thereof is shown in fig. 4 and fig. 5(a) to 5 (B). The following description is mainly assumed that the lengths of four variables such as the interval value displacement, the interval value effective amount, the offset displacement, and the offset effective amount are set to eight bits, thirty-two bits, and nine bits of binary system, respectively. As will be understood by those of ordinary skill in the art from the following description, the concepts of the present invention are applicable to situations where the variable length differs from this assumption.

First, please refer to the offset initialization procedure 400 shown in fig. 4. As can be seen by comparing fig. 1 and 4, steps S401 to S402 are the same as steps S101 to S102. Unlike step S103, step S403 further includes determining whether "the offset value displacement amount is smaller than an offset value displacement amount upper limit N" in addition to determining whether "the effective offset value amount is smaller than 256". The upper limit N of the displacement of the offset value is larger than zero and smaller than the upper limit of the displacement of an interval value. In the case of an interval value shift of eight bits in length, the upper limit of the interval value shift is equal to 255, and the upper limit of the offset value shift N may be any positive integer from 1 to 254. If the determination result in step S403 is negative, the offset initialization routine 400 is immediately stopped. If the determination of step S403 is positive, step S404 is performed, i.e., the effective amount of the offset is shifted to the left by one bit and a subsequent bit is read. Correspondingly, the offset displacement is added by 1. Subsequently, step S403 is executed again.

It is noted that the step (S105) of resetting the most significant bits of the effective offset amount to binary zeros does not occur in the offset initialization procedure 400. More specifically, after the offset pre-read procedure is stopped, the most significant bit (ninth bit) of the effective amount of the offset is intentionally reserved to record the reason for stopping the offset pre-read procedure. More specifically, if the determination result in step S403 (whether "the effective offset amount is less than 256" and "the offset amount is less than an upper limit N") is negative, the reason is that "the effective offset amount is greater than or equal to 256", and the most significant bits of the effective offset amount are determined to be binary ones. Similarly, if the two conditions of "the effective offset amount is greater than or equal to 256" and "the offset amount is greater than or equal to the upper limit N" are both satisfied in step S403, the most significant bit of the effective offset amount is determined to be binary one in step S403. On the contrary, if the determination result in step S403 is "no" because the offset value shift reaches the offset value shift upper limit N ", but" the offset value effective amount is greater than or equal to 256 "does not hold, the most significant bit of the offset value effective amount must be binary zero.

Taking the case that the effective amount of the offset read in step S402 is 000000001 and the upper limit N of the offset displacement is equal to 4 as an example, steps S403 to S404 are repeatedly executed four times; until the offset displacement is no longer less than 4, the determination result in step S403 is no. In this case, the effective amount of offset is 00001XXXX, where the symbol X represents 1 or 0. As shown by the fact that the MSB of the effective offset amount is binary zero, step S403 is false because the condition "the offset amount is smaller than the upper limit N" is not satisfied.

Taking the case that the effective offset amount read in step S402 is 001001101 and the upper limit N of the offset displacement amount is equal to 4 as an example, steps S403 to S404 are repeated twice; until the effective amount of the offset value is adjusted to 1001101XX, the determination of step S403 is no. In this case, the offset amount is only 2, and the upper limit N of the offset amount has not yet been reached. As can be seen from the fact that the most significant bit of the offset effective amount is binary one, step S403 is no because the condition "the offset effective amount is less than 256" is not satisfied.

As can be seen from the above description, the upper limit N of the displacement amount of the offset value can limit the displacement amount of the offset value not to equal to or exceed the upper limit of the displacement amount of the interval value. Therefore, the offset displacement is not accumulated to be higher than 254 during the initialization process. Therefore, the cause of decoding process breakdown caused by too high offset displacement in the offset initialization procedure can be eliminated.

As described above, when the offset displacement does not exceed 254, the interval value displacement can be constantly tracked through step S202E to match the comparison basis of the effective offset amount and the effective interval value amount. After the interval value displacement amount catches up with or exceeds the offset value displacement amount, the interval value displacement amount and the offset value displacement amount are zeroed and accumulated again as long as the decoding result is a symbol with a smaller probability. One of the advantages of the above method is that the constraint condition of adding the upper limit N of the offset amount does not negatively affect the correctness of the decoding result, but only a longer time for tracing the offset amount by the original interval value offset amount is divided into a plurality of shorter time segments.

After the offset value initialization routine 400 is completed, the main decoding routine represented by fig. 5(a) to 5(B) is continuously executed. As can be seen from comparing fig. 5(a) and fig. 2(a), steps S501 to S502 are known technologies, and detailed description thereof is omitted. Step S503 can be decomposed into four decisions: (1) whether the interval value displacement is larger than the offset displacement, (2) whether the interval value displacement is equal to the offset displacement, (3) whether the last eight bits of the effective amount of the offset are larger than or equal to the effective amount of the interval value, and (4) whether the most significant bit (ninth bit) of the effective amount of the offset that is reserved is a binary one. If the determination result of the formula (1) is yes, or the three determination results of the formulas (2) to (4) are all yes, the determination result of the step S503 is yes, and the step S504 of determining that the symbol to be decoded is a symbol with a smaller probability is executed. On the contrary, if the determination result of the formula (1) is no and any one of the determination results of the formulae (2), (3), and (4) is no, the determination result of the step S503 is no, and the step S523 of determining that the symbol to be decoded is a symbol with a higher probability is executed.

In practice, all of the four determination equations in step S503 are not necessarily required to be executed. For example, if the determination formula (1) is executed first and the determination result of the determination formula (1) is found to be yes, it can be confirmed that the determination result of the step S503 is necessarily yes, and the determination formulas (2) to (4) need not be executed continuously. For another example, if the determination result of the determination formula (1) is found to be negative and the determination result of any one of the determination formulae (2) to (4) is found to be negative, it is determined that the determination result of the step S503 is negative and it is not necessary to continue to execute the other determination formulae.

In addition, step S503 can also be implemented by other equivalent combinations of the above-mentioned judgment formulas (1), (2), (3) and (4). For example, the determinations (3) and (4) are related to the effective amount of the offset value, and can be further combined into a single determination. More specifically, it holds that "the last eight bits of the effective offset amount are greater than or equal to the effective interval value" and "the ninth bit of the effective offset amount is a binary one", which is equivalent to "the effective offset amount is greater than or equal to the effective interval value plus 256". By combining the judgment formulas (3) and (4), the judgment formula included in step S503 can be reduced from four to three. Fig. 5(a) shows the step S503 modified as such. The scope of the present invention covers various equivalent combinations of the above judgment formulas, and is not limited to specific combinations.

Steps S505 to S515 are well-known techniques, and are the same as steps S205 to S215 in fig. 2, and detailed description thereof is omitted. It is noted that steps S509 and S510 require only the last eight bits of the offset to be effective. Therefore, a step S521 is added before the step S508 to reset the ninth bit of the offset to binary zero and only the last eight bits are reserved to maintain the consistency of the operation logic.

The subsequent steps S516 to S517 are an offset value pre-reading process, and function the same as steps S403 to S404 in fig. 4. More specifically, in step S516, when determining whether to stop the offset pre-reading process, whether "the offset displacement is smaller than an offset displacement upper limit N" is also taken into consideration, so as to avoid the decoding process from being crashed due to too high offset displacement. If the determination result in step S516 is negative, the offset pre-reading procedure is stopped, and the most significant bit (ninth bit) of the effective amount of the offset is reserved for the next symbol determination procedure (step S503). That is, unlike the decoding process 200, the decoding process 500 does not include a step of discarding the ninth bit after the offset pre-reading process (step S218). As shown in fig. 5(B), if the determination result in the step S516 is negative, the step S522 of updating the context model and returning the decoding result is performed.

On the other hand, unlike the decoding process 200, after the symbol to be decoded is determined as a more probable symbol (step S523), the decoding process 500 does not immediately perform the step S522 of updating the context model and returning the decoding result. As shown in fig. 5(B), the step S523 is followed by a determination step S524 for determining whether the interval value displacement is equal to the upper limit N of the offset value displacement (step S524). If the determination result in the step S523 is yes, steps S514 to S517 are executed. If the determination result in the step S523 is negative, the step S522 of updating the context model and returning the decoding result is executed.

It can be understood by those skilled in the art that the order of some steps or the combination of the determination logic in fig. 4 and fig. 5(a) -5 (B) can be equivalently changed without affecting the overall effect of the decoding method.

Another embodiment of the present invention is a decoding apparatus applied to a digital audio/video codec standard system for decoding audio/video data, and a functional block diagram thereof is shown in fig. 6. The decoding apparatus 600 comprises a pre-operation circuit 601, a symbol decision circuit 602, a less probable symbol interval value decision circuit 603, an offset value valid amount reset circuit 604, an interval value valid amount reset circuit 605, an offset value pre-read circuit 606, a pre-read driving circuit 607, and a context update circuit 608.

The pre-operation circuit 601 is responsible for performing an offset initialization procedure (corresponding to steps S401 to S404), reading the context model (corresponding to step S501), updating the interval value according to the old interval value and the symbol occurrence probability with greater probability, and setting a determination flag (corresponding to step S502). In addition, the front-end operation circuit 601 also stores an offset displacement upper limit N in advance. In practice, the pre-operation circuit 601 may be provided with a plurality of registers for storing the parameters or variables to be used in the decoding process. It should be emphasized that, in the offset initialization process, the pre-operation circuit 601 considers "the effective offset is smaller than 256" and "the offset is smaller than an upper offset limit N" (corresponding to step S403) when determining whether the offset pre-read process should be stopped, so as to avoid the decoding process from being broken down due to the excessively high offset.

The symbol decision circuit 602 can know from the pre-operation circuit 601 whether the symbol with the larger probability is a binary zero or a binary one. The symbol determination circuit 602 is responsible for performing a symbol determination procedure (corresponding to step S503) according to the interval value displacement, the offset value displacement, the effective offset value amount and the effective interval value amount provided by the pre-operation circuit 601, so as to determine that a symbol to be decoded in the audio/video data is a symbol with a higher probability or a symbol with a lower probability (corresponding to steps S504 and S523). It should be noted that the effective amount of the offset provided by the pre-operation circuit 601 to the symbol decision circuit 602 has nine bits, and the most significant bit (the ninth bit) is not reset after the previous offset pre-reading procedure (which may be performed by the pre-operation circuit 601 or the offset pre-reading circuit 606) is finished. The ninth bit is one of the reference bases for the symbol decision circuit 602 to perform the symbol decision process.

The less probable symbol interval value determination circuit 603 and the offset value effective amount reset circuit 604 are both driven by the output signal of the symbol decision circuit 602. If the symbol decision circuit 602 determines that the current symbol to be decoded is a less probable symbol, the less probable symbol interval value determination circuit 603 determines a less probable symbol interval value according to the greater probable symbol occurrence probability provided by the pre-operation circuit 601, the decision flag, and an effective amount of an old symbol interval value (corresponding to steps S505 to S507). In addition, if the symbol decision circuit 602 determines that the current symbol to be decoded is a less probable symbol, the offset effective amount resetting circuit 604 first sets the most significant bit of the offset effective amount to binary zero, and takes the last eight bits of the offset effective amount as a new offset effective amount (corresponding to step S521). Next, the offset effective amount resetting circuit 604 resets the offset effective amount again according to the interval value displacement amount, the offset displacement amount and the interval value effective amount provided by the pre-operation circuit 601 (corresponding to steps S508 to S510). In fig. 6, the offset value effective amount generated by the offset value effective amount reset circuit 604 is denoted as "offset value effective amount _ 1".

Based on the less probable symbol duration value provided by the less probable symbol duration value determination circuit 603, the duration effective amount reset circuit 605 resets the less probable symbol duration value and the duration effective amount (corresponding to steps S511 to S513). In this process, the interval-value-effective-amount resetting circuit 605 adjusts the offset-value effective amount accordingly (corresponding to step S512). In fig. 6, the effective amount of the offset value generated by the interval value effective amount resetting circuit 605 is denoted as "effective amount of offset value _ 2". Next, the offset pre-read circuit 606 resets the interval value displacement amount and the offset value displacement amount to zero, and then generates a new offset value effective amount and an offset value displacement amount according to the updated offset value effective amount generated by the interval value effective amount resetting circuit 605 and the offset value displacement amount upper limit provided by the pre-operation circuit 601 (corresponding to steps S514 to S517). In fig. 6, the effective amount of the offset value generated by the offset value pre-read circuit 606 is denoted as "effective amount of offset value _ 3". The offset pre-read circuit 606 is responsible for executing an offset pre-read procedure. It should be noted that the offset pre-read circuit 606 considers "the effective offset is less than 256" and "the offset is less than an upper offset limit N" when determining whether the offset pre-read process should be stopped (corresponding to step S516). Therefore, the decoding process breakdown problem caused by the over-high offset value can be effectively avoided. In addition, after the offset pre-reading procedure is stopped, the offset pre-reading circuit 606 will keep the most significant bit of the effective amount of the offset for the symbol determination circuit 602 to use next symbol determination procedure.

On the other hand, if the symbol determination circuit 602 determines that the symbol to be decoded is a symbol with a larger probability, the pre-read driving circuit 607 is responsible for determining whether the current interval value displacement is equal to the offset value displacement upper limit (corresponding to step S524). If the determination result of the pre-read driving circuit 607 is yes, the pre-read driving circuit 607 also requests the offset pre-read circuit 606 to execute the offset pre-read procedure. If the determination result of the pre-read driving circuit 607 is negative or the offset pre-read process is finished, the context updating circuit 608 updates the context model for the pre-operation circuit 601 to refer to according to the interval value effective amount received from the interval value effective amount resetting circuit 605, and the offset value effective amount, the offset value displacement amount, and the interval value displacement amount received from the offset pre-read circuit 606 (corresponding to step S522).

In practice, each of the above circuits can be implemented by various control and processing platforms, including fixed and programmable logic circuits, such as programmable logic gate arrays, application specific integrated circuits, microcontrollers, microprocessors, digital signal processors. Furthermore, the circuits may be designed to perform various tasks by executing processor instructions stored in a memory (not shown). Those skilled in the art will appreciate that there are numerous circuit configurations and components which can implement the concepts of the present invention without departing from the spirit of the invention. Moreover, in practical applications, some of the functional blocks that are not simultaneously operated and have similar functions may be designed to share hardware, so as to reduce the implementation cost.

It should be noted that various operation variations described in the foregoing description of the decoding process presented in fig. 4 and fig. 5(a) -5 (B) can also be applied to the decoding apparatus 600, and details thereof are not repeated.

As described previously, the upper limit N of the displacement amount of the offset value appearing in steps S403, S516, S524 may be any positive integer between 1 and 254. In an embodiment according to the present invention, the upper limit N of the offset displacement is set to 1. Substituting this setting into the offset initialization routine 400 of fig. 4 results in a more simplified process. Since the offset value displacement amount is set to zero in step S401, the offset value displacement amount is equal to zero when step S403 is executed for the first time, so that the condition that "the offset value displacement amount is smaller than the offset value displacement amount upper limit N (═ 1)" is necessarily satisfied. Therefore, as long as the condition "the effective offset is less than 256" is satisfied, step S404 is executed to increase the offset to 1 and shift the effective offset by one bit and read in one bit. In the offset initialization routine 400, after step S404 is finished, step S403 is executed again. Since the current offset amount is equal to 1, and the condition that the offset amount is smaller than the offset amount upper limit N (equal to 1) is no longer satisfied, the result of performing the step S403 for the second time is inevitably no.

In summary, if the upper limit N of the offset displacement is set to 1, the offset initialization process 400 can be simplified to the flow shown in fig. 7. Steps S701 to S702 are the same as steps S401 to S402. Step S703 is simpler than step S403, and only determines whether or not the effective offset amount is less than 256. Step S704 is also the same as step S404. In the simplified offset initialization procedure, step S704 is executed only once, and then the offset pre-reading procedure is stopped.

Similarly, the above concept can also be applied to the steps S516 and S524 in the decoding process 500. Fig. 8 presents the second half of the decoding procedure after this simplification. Step S811 follows step S510 of fig. 5(a), and step S823 follows step S503 of fig. 5 (a). As can be seen from comparing fig. 7 and fig. 5(B), setting the upper limit N of the offset displacement to 1 makes steps S816 and S824 simpler than steps S516 and S524.

It should be noted that the concept of setting the upper limit N of the offset amount to 1 can also be applied to the decoding process shown in fig. 1 and fig. 2(a) to fig. 2 (B). Therefore, another embodiment of the present invention is a decoding method applied to an AVS system for decoding audio/video data. According to the decoding method, an offset pre-reading procedure comprises the following steps: (a) determining whether an effective amount of an offset value is below a specified value; (b) if the determination result in step (a) is yes, reading a new least significant bit for the effective amount of the offset value; wherein, after the step (b) is executed once, the offset pre-reading procedure is stopped.

The concept of setting the upper limit N of the offset amount to 1 can also be applied to hardware circuits such as the decoding apparatus 600. Another embodiment of the present invention is a decoding apparatus using an AVS system for decoding audio/video data. The decoding apparatus includes an offset pre-reading circuit (e.g., the offset pre-reading circuit 606 in fig. 6) for performing an offset pre-reading procedure. The offset pre-reading circuit comprises a judgment circuit and a reading circuit. The determining circuit determines whether an effective amount of an offset value is below a specified value (256). If the judgment result of the judgment circuit is yes, the reading circuit reads a new least significant bit for the effective amount of the offset value and then stops the offset value pre-reading process.

In practical application, the AVS transmitting end often encodes the absolute value and the sign of the audio/video data, i.e., the absolute values of a plurality of data are encoded first, and then the signs corresponding to the plurality of data are encoded. In most cases, the appearance sequence of the signs is rather random (the probability of each occurrence of the signs is close to 0.5), and the compression process applied to the signs in the encoding process cannot obtain a good compression effect. Therefore, the AVS transmitter will regard these signs as bypass (bypass) data and use a simpler compression/encoding procedure. For example, unlike non-bypass data, symbols with greater probability of bypass data are fixed values, and symbols with greater probability of occurrence are also fixed values.

The above-described characteristics of the bypass data can be exploited to simplify the decoding procedure in the AVS receiver. A decoding method applied to an AVS system according to an embodiment of the present invention is shown in fig. 9. Step S901 is to determine whether an audio/video data includes at least one to-be-decoded bypass data. If the determination result in the step S901 is "no", the step S902 is executed, that is, a first decoding procedure (for example, the general decoding procedure shown in fig. 4 and fig. 5(a) to fig. 5 (B)) is applied to the audio/video data. If the determination result in the step S901 is yes, the step S903 is executed, that is, the first decoding procedure is performed on the non-bypass data in the audio/video data, and a second decoding procedure is performed on the at least one to-be-decoded bypass data. Unlike the first decoding procedure, the second decoding procedure may be designed for bypass data, which is simpler than the first decoding procedure. It can be understood that the decoding process 900 can reduce the overall computational resources consumed by the AVS receiver compared to the prior art in which a general decoding process is performed on all audio/video data.

Fig. 10 shows a detailed implementation example of the second decoding procedure. Step S1001 is the same as step S501. As described above, the symbol occurrence probability of the bypass data with a higher probability is a known constant value. The AVS specification currently requires that this more probable symbol occurrence probability be set to correspond to a value of 1024. Therefore, the result of right-shifting the probability of occurrence of the more probable symbol by two bits (256) is always larger than the maximum possible range-wise effective amount (255). Based on this characteristic, certain decision steps may be omitted. For example, since the determination result of step S202A in fig. 3 is necessarily no, it will make the determination flag be 1. In this case, it is judged that the flag does not actually exist. Therefore, step S1002 may include only steps S202E-S202F in FIG. 3.

The subsequent steps S1003 to S1004, S1021, and S1008 to S1010 are respectively the same as steps S503 to S504, S521, and S508 to S510. As mentioned above, the flag is determined to be 1, and the determination result in step S505 is no, so that the symbol interval value with smaller probability is set to be equal to the symbol interval value with larger probability shifted to the right by two bits (256) plus the effective amount of the old interval value in step S507. The smaller probability symbol interval value thus generated inevitably results in the negative result in step S511. Based on the above logic deduction, steps S505 to S507 and S511 to S513 can be omitted in the decoding process 1000. The following steps S1014 to S1017 and S1022 to S1024 are respectively the same as steps S514 to S517 and steps S522 to S524, and are not described again. If the decoding process shown in fig. 4 and fig. 5(a) to 5(B) is compared with the first decoding process, the second decoding process shown in fig. 10 is obviously simplified.

Furthermore, for AVS receivers, the bypass data is typically sent following the non-bypass data. For example, the AVS receiver may expect to receive a sequence of respective signs of consecutive data after receiving the absolute values of the data. More specifically, after receiving the absolute values of M consecutive pieces of data (M is an integer greater than 1), the AVS receiving end may expect to subsequently receive bypass data to be decoded corresponding to M consecutive positive and negative symbols. It should be noted that when the audio/video data includes a plurality of consecutive bypass data to be decoded, the second decoding procedure can be further simplified, as described in detail below.

If the offset pre-reading procedure has pre-read the effective offset (P is an integer) of P bits before the M to-be-decoded bypass data are decoded, the offset will be equal to P, which is the information that can be originally mastered by the AVS receiving end. In an embodiment of the present invention, according to the magnitude-relative relationship between the values P and M, the number of symbols with larger probability corresponding to the M pieces of bypass data to be decoded can be quickly determined.

The case where M is less than P is discussed first. Since M is greater than 1 and M is known to be less than P, P must be greater than 2. As mentioned above, the interval value shift amount is reset to zero in the offset pre-read process. Next, when the decoding of the consecutive M pieces of bypass data to be decoded is started, the interval value displacement is increased to 1 in step S1002. Since the current interval value displacement (═ 1) is smaller than the offset value displacement P (>2), the result of the first step S1003 is inevitably no, so that the first decoding result is inevitably a symbol with a higher probability. As long as the upper limit N of the offset value shift is designed to be a higher value (for example, higher than the maximum possible value of M), the determination result in the following step S1024 is also necessarily no. In this case, steps S1001, S1002, S1003, S1023, S1024 and S1022 in fig. ten are sequentially executed M times in a loop. It can be deduced that when M is smaller than P, the decoding results of the consecutive M pieces of bypass data to be decoded are necessarily M symbols with larger probability. In addition, after the M cycles, the displacement of the last interval value is gradually increased to be equal to the value M.

Next, the case where M is greater than or equal to P is discussed. Based on the determination rule in step S1003, if the most significant bit of the effective amount of the offset value is binary one after the offset value pre-reading procedure, the determination result in step S1003 executed in the previous (P-1) time is no, and the determination result is not yes until the P-th time is executed. It can be deduced that when M is greater than or equal to P and the most significant bit of the offset effective amount is binary one, the decoding results of the previous P to-be-decoded bypass data in the consecutive M to-be-decoded bypass data are necessarily consecutive (P-1) more-probable symbols and one less-probable symbol. In addition, the displacement of the last interval value is gradually increased to be equal to the value P.

Also based on the determination rule in step S1003, if M is greater than or equal to P, if the most significant bit of the effective amount of the offset value is binary zero, step S1003 executed P times before will obtain no determination result. It can be deduced that, when M is greater than or equal to P and the most significant bit of the offset effective amount is binary zero, the decoding results of the previous P pieces of bypass data to be decoded in the consecutive M pieces of bypass data to be decoded are necessarily P larger probability symbols. In addition, the displacement of the last interval value is gradually increased to be equal to the value (P-1).

In summary, according to the relationship between the value P and the value M, the second decoding process can be simplified as the flow shown in fig. 11. First, in step S1101, a value M and a value P are obtained. Next, step S1102 determines whether "M is smaller than P" or not. If the determination result in the step S1102 is yes, step S1103 is executed to directly determine that the decoding results of the consecutive M pieces of bypass data to be decoded are M symbols with larger probability, and set the interval value shift equal to the value M. If the determination result in step S1102 is negative, step S1104 is executed, that is, it is continuously determined whether "the most significant bit of the effective amount of offset is binary one". If the determination result in the step S1104 is yes, step S1105 is executed to directly determine that the decoding results of the previous P pieces of bypass data to be decoded in the M pieces of bypass data to be decoded are consecutive (P-1) more probable symbols and one less probable symbol, and set the interval value displacement equal to the value P. If the determination result in the step S1104 is "no", then step S1106 is executed to directly determine that the decoding results of the previous P pieces of bypass data to be decoded in the M pieces of bypass data to be decoded are P larger probability symbols, and set the interval value shift equal to the value (P-1). The second decoding process shown in fig. 11 is obviously much simplified compared to the second decoding process shown in fig. 10.

The above-described concept of simplifying the decoding process by using the bypass data feature can also be applied to hardware devices. Another embodiment of the present invention is a decoding device applied to a digital audio/video codec standard system, for decoding audio/video data. FIG. 12 is a functional block diagram thereof. The decoding apparatus 1200 includes a determining circuit 1201, a first decoding circuit 1202, and a second decoding circuit 1203. The judgment circuit 1201 judges whether the audio/video data contains at least one to-be-decoded bypass data. If the judgment result of the judgment circuit 1201 is negative, the first decoding circuit 1202 is responsible for applying a first decoding program to the audio/video data. If the result of the determination of the determining circuit 1201 is yes, the first decoding circuit 1202 is responsible for applying a first decoding procedure to the non-bypass data in the audio/video data, and the second decoding circuit 1203 is responsible for applying a second decoding procedure different from the first decoding procedure to the at least one to-be-decoded bypass data.

In practice, the internal circuit of the first decoding circuit 1202 can be the decoding apparatus 600 described above, and the first decoding procedure can be the decoding process shown in fig. 4 and fig. 5(a) to fig. 5(B), which is not described herein again. In the example shown in FIG. 12, the second decoding circuit 1203 includes a comparator 1203A, a bit checker 1203B and an output circuit 1203C. The comparator 1203A is used for comparing the value M obtained from the determining circuit 1201 with the value P obtained from the first decoding circuit 1202. The bit checker 1203B is responsible for checking whether the most significant bit of the effective amount of the offset value obtained from the first decoding circuit 1202 is a binary one or a binary zero.

If the comparator 1203A determines that the value M is smaller than the value P, the output circuit 1203C outputs M symbols with larger probability as decoding results, and provides the setting that the interval value displacement is equal to the value M to the first decoding circuit 1202. If the comparator 1203A determines that M is greater than or equal to P, and the bit checker 1203B determines that the most significant bit of the effective amount of offset is binary one, the output circuit 1203C outputs (P-1) more probable symbols and a less probable symbol as decoding results, and provides the first decoding circuit 1202 with the setting that the interval value displacement is equal to the value P. If the comparator 1203A determines that M is greater than or equal to P and the syndrome 1203B determines that the most significant bits of the effective amount of the offset are binary zeros, the output circuit 1203C outputs P more probable symbols as the decoding result and provides the first decoding circuit 1202 with the setting of interval value shift equal to the value (P-1).

It should be noted that various operation variations described in the foregoing description of the decoding process presented in fig. 9 to fig. 11 can also be applied to the decoding apparatus 1200, and details thereof are not repeated.

The foregoing detailed description of the preferred embodiments is intended to more clearly illustrate the features and spirit of the present invention, and not to limit the scope of the invention by the preferred embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the claims.

Claims

1. A decoding method applied to a digital audio/video coding and decoding technology standard system is used for decoding audio/video data, and comprises the following steps:

(d) judging whether the audio and video data contains at least one to-be-decoded bypass data;

(e) if the judgment result in the step (d) is negative, applying a first decoding program to the audio and video data; and

(f) if the judgment result in the step (d) is yes, applying a second decoding procedure different from the first decoding procedure to the at least one to-be-decoded bypass data;

the audio and video data comprises M continuous bypass data to be decoded, M is an integer larger than 1, the offset value displacement is equal to P, and P is a positive integer; the second decoding process includes:

if M is less than P, the continuous M pieces of bypass data to be decoded are judged to correspond to M symbols with larger probability.

2. The decoding method of claim 1, wherein the first decoding process comprises:

(a) determining whether to stop an offset pre-reading process according to whether an offset displacement reaches an offset displacement upper limit, wherein the offset displacement upper limit is larger than zero and smaller than an interval value displacement upper limit;

(b) after the offset pre-reading program stops, reserving a most significant bit of an offset effective quantity; and

(c) according to the most significant bit of the reserved effective amount of the deviation value, a symbol to be decoded in the audio/video data is judged to be a symbol with a larger probability or a symbol with a smaller probability.

3. The decoding method of claim 2, wherein step (c) comprises:

(c1) judging whether an interval value displacement is equal to an offset value displacement;

(c2) judging whether the effective amount of the deviation value is larger than or equal to the effective amount of an interval value;

(c3) determining whether the MSB of the reserved effective amount of the offset is a binary one; and

(c4) if the results of the steps (c1), (c2) and (c3) are all yes, the symbol to be decoded is determined to be the less probable symbol.

4. The decoding method of claim 2, wherein step (c) comprises:

(c5) judging whether an interval value displacement is equal to an offset value displacement;

(c6) judging whether the effective quantity of the deviation value reserved with the most significant bit is larger than or equal to the sum of an interval value effective quantity and a specific numerical value; and

(c7) if the results of the steps (c5) and (c6) are both yes, the symbol to be decoded is determined to be the less probable symbol.

5. The decoding method of claim 2, further comprising:

if the symbol to be decoded is determined to be the symbol with greater probability in step (c) and an interval value shift amount is equal to an offset value shift amount upper limit, executing the offset value pre-reading procedure.

6. The decoding method of claim 2, wherein the offset pre-read procedure comprises:

if the effective amount of the offset value is lower than a specific value, a new least significant bit is read for the effective amount of the offset value, and the pre-reading process of the offset value is stopped.

7. The decoding method according to claim 1, wherein when the audio-video data includes a plurality of consecutive bypass data to be decoded, the second decoding procedure includes:

determining a larger probability symbol number corresponding to the continuous multiple bypass data to be decoded according to the magnitude relation between an offset displacement and the number of the continuous multiple bypass data to be decoded and by referring to a most significant bit of an offset effective amount.

8. The decoding method according to claim 7, wherein the audio/video data includes M consecutive bypass data to be decoded, M is an integer greater than 1, and the offset value is equal to P, P is a positive integer; the second decoding process includes:

if M is greater than or equal to P and the MSB of the offset effective amount is binary one, it is determined that the previous P pieces of bypass data to be decoded in the M consecutive pieces of bypass data to be decoded respectively correspond to (P-1) more-probable symbols and a less-probable symbol.

9. The decoding method according to claim 7, wherein the audio/video data includes M consecutive bypass data to be decoded, M is an integer greater than 1, and the offset value is equal to P, P is a positive integer; the second decoding process includes:

if M is greater than or equal to P and the MSB of the offset effective amount is binary zero, the previous P pieces of bypass data to be decoded in the M continuous pieces of bypass data to be decoded are determined to respectively correspond to P larger probability symbols.

10. A decoding device applied to a digital audio/video coding and decoding technology standard system is used for decoding audio/video data, and comprises:

the judgment circuit is used for judging whether the audio and video data contains at least one to-be-decoded bypass data;

the first decoding circuit applies a first decoding program to the audio and video data if the judgment result of the judgment circuit is negative; and

a second decoding circuit, if the judgment result of the judgment circuit is yes, the second decoding circuit applies a second decoding program different from the first decoding program to the at least one to-be-decoded bypass data;

the audio/video data comprises M continuous bypass data to be decoded, the offset value displacement is equal to P, M is an integer larger than 1, and P is a positive integer; the second decoding circuit includes:

a comparator for comparing the value M with the value P;

if the comparator determines that the value M is smaller than the value P, the second decoding circuit determines that the M consecutive pieces of bypass data to be decoded correspond to M symbols with larger probability.

11. The decoding device as claimed in claim 10, wherein an offset pre-reading circuit is used for executing the first decoding process, the offset pre-reading circuit is used for executing an offset pre-reading process, determining whether to stop the offset pre-reading process according to whether an offset displacement reaches an offset upper limit, and retaining an offset effective amount of MSB after the offset pre-reading process is stopped, wherein the offset upper limit is larger than zero and smaller than an interval upper limit; and

a symbol judging circuit, for judging a symbol to be decoded in the audio/video data as a symbol with a larger probability or a symbol with a smaller probability according to the most significant bit of the reserved effective amount of the deviation value.

12. The decoding device as claimed in claim 11, wherein the symbol decision circuit comprises:

a first judging circuit for judging whether an interval value displacement is equal to an offset value displacement;

a second determining circuit for determining whether the effective amount of the offset value is greater than or equal to an effective amount of an interval value;

a third judgment circuit for judging whether the most significant bit of the effective amount of the reserved offset value is a binary one; and

a fourth judging circuit, if the judging results of the first judging circuit, the second judging circuit and the third judging circuit are all yes, the fourth judging circuit judges the symbol to be decoded as the symbol with smaller probability.

13. The decoding device as claimed in claim 11, wherein the symbol decision circuit comprises:

a second judgment circuit for judging whether the effective amount of the offset value reserved with the most significant bit is greater than or equal to the sum of an interval value effective amount and a specific value; and

a third judging circuit, if the judging results of the first judging circuit and the second judging circuit are both yes, the third judging circuit judges the symbol to be decoded as the symbol with smaller probability.

14. The decoding apparatus of claim 11, further comprising:

a pre-read driving circuit, if the symbol judgment circuit judges that the symbol to be decoded is the symbol with higher probability, the pre-read driving circuit judges whether the displacement of an interval value is equal to the upper limit of the displacement of an offset value; if the interval value displacement is equal to the upper limit of the offset value displacement, the pre-read driving circuit requests the offset value pre-read circuit to execute the offset value pre-read program.

15. The decoding device as claimed in claim 11, wherein the offset pre-reading circuit comprises:

a judging circuit for judging whether the effective amount of the offset value is lower than a specific value; and

a reading circuit, if the judgment result of the judging circuit is yes, the reading circuit reads a new least significant bit for the effective quantity of the offset value, and then stops the offset value pre-reading procedure.

16. The decoding device as claimed in claim 10, wherein the second decoding circuit determines a larger probability symbol number corresponding to the consecutive bypass data to be decoded according to a magnitude relationship between an offset and the number of the consecutive bypass data to be decoded and with reference to a most significant bit of an offset effective amount.

17. The decoding device according to claim 16, wherein the audio/video data includes M consecutive bypass data to be decoded, M is an integer greater than 1, and the offset value is equal to P, P is a positive integer; the second decoding circuit includes:

a bit checker for checking whether the most significant bit of the effective amount of the offset value is a binary one or a binary zero;

if the comparator determines that M is greater than or equal to P and the bit checker determines that the most significant bit of the effective amount of the offset value is binary one, the second decoding circuit determines that the first P to-be-decoded bypass data in the M consecutive to-be-decoded bypass data correspond to (P-1) more-probability symbols and a less-probability symbol.

18. The decoding device according to claim 16, wherein the audio/video data includes M consecutive bypass data to be decoded, and the offset value is equal to P, M is an integer greater than 1, P is a positive integer; the second decoding circuit includes:

if the comparator determines that M is greater than or equal to P and the bit checker determines that the most significant bit of the offset effective amount is binary zero, the second decoding circuit determines that the previous P to-be-decoded bypass data in the M consecutive to-be-decoded bypass data correspond to P larger-probability symbols.