CN107800529B - Clock frequency synchronization method of network node - Google Patents

Clock frequency synchronization method of network node Download PDF

Info

Publication number
CN107800529B
CN107800529B CN201711085380.3A CN201711085380A CN107800529B CN 107800529 B CN107800529 B CN 107800529B CN 201711085380 A CN201711085380 A CN 201711085380A CN 107800529 B CN107800529 B CN 107800529B
Authority
CN
China
Prior art keywords
time
setting process
time setting
synchronization
frequency deviation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711085380.3A
Other languages
Chinese (zh)
Other versions
CN107800529A (en
Inventor
杨振华
陈洪顺
曹忻军
唐劼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Philisense Electronics Co ltd
Original Assignee
Beijing Philisense Electronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Philisense Electronics Co ltd filed Critical Beijing Philisense Electronics Co ltd
Priority to CN201711085380.3A priority Critical patent/CN107800529B/en
Publication of CN107800529A publication Critical patent/CN107800529A/en
Application granted granted Critical
Publication of CN107800529B publication Critical patent/CN107800529B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The invention provides a clock frequency synchronization method of a network node, which comprises the following steps: s1, acquiring the starting time point of the time setting process based on the last time of the time setting process; and S2, according to the frequency deviation of the last time of time setting, adjusting the frequency deviation of the slave node relative to the master node at the initial time point of the time setting, and according to the adjusted frequency deviation, determining the termination time point of the time setting, so as to take the termination time point of the time setting as the initial time point of the next time of time setting. According to the method provided by the invention, the local clock frequency of the slave node is synchronized with the reference clock frequency of the master node by adjusting the frequency deviation of the slave node relative to the master node. Because the frequency deviation is relative to the master node of each slave node and does not depend on intermediate nodes of each stage, the accumulation of errors can not be generated, and the stability of the network and the accuracy of frequency synchronization among network nodes are improved.

Description

Clock frequency synchronization method of network node
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a clock frequency synchronization method for a network node.
Background
The serial network with the structure of hand pulling is widely applied to systems such as an industrial bus, a field conference bus and the like due to the advantages of simple structure, convenience in wiring and the like. Data is transmitted through links by forwarding through each network node. Applications such as industrial buses and field conference buses require high synchronization between network nodes, and therefore, the frequency deviation of the local clock of each network node must be controlled within a small range.
To control the frequency deviation of the local clocks of the network nodes within a small range, the frequency synchronization between the local clocks of the network nodes must be realized. In order to achieve frequency synchronization between the local clocks of the network nodes, local clock information must be exchanged between the network nodes, and such local clock information may be the local clock signal itself or a data signal containing the local clock information. The party receiving the local clock information synchronizes its local clock to the party sending the local clock information using the phase locked loop.
In the series network of the hand-in-hand structure, a step-by-step synchronization mode is generally adopted. Fig. 1 is a schematic diagram of step-by-step synchronization of node clock frequencies in a serial network with a "hand-in-hand" structure in the prior art, as shown in fig. 1, a Slave #1 synchronizes to a MASTER node MASTER, and a Slave #2 synchronizes to a Slave # 1. And by analogy, all the slave nodes are synchronized step by step, and finally, the synchronization of all the nodes and the master node clock is realized. The Slave #1 node is directly synchronized with the master node, and other nodes are indirectly synchronized with the master node.
In the step-by-step synchronization mode, the subordinate nodes have a dependency relationship with the superior nodes. If a node's phase locked loop fails, all nodes downstream from it will lose synchronization with the master node clock, thereby reducing overall network stability. In addition, deviation exists in the synchronization process, and the step-by-step synchronization enables the deviation to be accumulated, so that the synchronization precision of nodes at the later stage is poorer, and the synchronization precision of the whole network is limited.
Disclosure of Invention
The invention provides a method for overcoming the defects that the dependency of a lower node on a higher node in the existing step-by-step synchronization mode is high, and once a certain node has a problem, the lower node of the node is not synchronized with a main node any more; and a step-by-step synchronization mode makes the synchronization precision worse and worse.
According to an aspect of the present invention, there is provided a method of clock frequency synchronization of a network node, the method comprising:
s1, acquiring the starting time point of the time setting process based on the last time of the time setting process;
and S2, according to the frequency deviation of the last time of time setting, adjusting the frequency deviation of the slave node relative to the master node at the initial time point of the time setting, and according to the adjusted frequency deviation, determining the termination time point of the time setting, so as to take the termination time point of the time setting as the initial time point of the next time of time setting.
Preferably, step S2 includes:
s21, acquiring the frequency deviation of the last time of time setting;
s22, if the frequency deviation of the last time of time setting is larger than twice of the adjusting threshold, taking half of the frequency deviation of the last time of time setting as the adjusted frequency deviation; if the frequency deviation of the last time of time setting is less than or equal to twice of the adjustment threshold, taking the adjustment threshold as the adjusted frequency deviation;
and S23, determining the ending time point of the time setting process according to the adjusted frequency deviation, and taking the ending time point of the time setting process as the starting time point of the next time setting process.
Preferably, the adjustment threshold is a minimum resolution of the clock frequency of the node.
Preferably, step S21 includes:
s211, obtaining the cumulant of the time setting deviation in the last time of time setting;
s212, obtaining the frequency deviation of the last time setting process according to the accumulated amount of the time setting deviation of the last time setting process.
Preferably, step S211 includes:
s2111, acquiring the starting time offset of the slave node relative to the master node at the starting time point of the last time synchronization process; acquiring the time synchronization termination deviation of the slave node relative to the master node at the time synchronization termination time point of the last time of time synchronization;
s2112, according to the starting time tick offset and the ending time tick offset, obtaining the cumulative amount of the time tick offset in the last time tick.
Preferably, step S212 includes:
s2121, acquiring the time length of the last time setting process;
s2122, obtaining the frequency deviation of the last time setting process according to the time length of the last time setting process and the accumulated amount of the time setting deviation of the last time setting process.
Preferably, step S23 includes:
for the time setting process, acquiring the cumulant of the adjusted frequency deviation along with the time at regular time intervals;
and taking the time point when the cumulant of the adjusted frequency deviation along with the time is equal to or more than a preset threshold value as the ending time point of the time setting process, and taking the ending time point of the time setting process as the starting time point of the next time setting process.
Preferably, before step S1, the method further includes:
s0, at the starting time point of the initial time synchronization process, adjusting the time synchronization deviation of the slave node relative to the master node to 0.
According to another aspect of the present invention, there is provided a clock frequency synchronization apparatus of a network node, the apparatus comprising:
at least one processor; and at least one memory communicatively coupled to the processor, wherein: the memory stores program instructions executable by the processor, which when called by the processor are capable of performing the synchronization method described above.
According to yet another aspect of the present invention, there is provided a non-transitory computer-readable storage medium storing computer instructions that cause the computer to perform the synchronization method described above.
According to the clock frequency synchronization method of the network node, clock information is transmitted by using protocol data instead of signal waveforms, the time synchronization deviation of the slave node relative to the master node is acquired in a fully digital mode, the frequency deviation is acquired through the time synchronization deviation, and the frequency deviation of the slave node relative to the master node is adjusted, so that the local clock frequency of the slave node is synchronized with the reference clock frequency of the master node. Because the frequency deviation is relative to the master node of each slave node and does not depend on intermediate nodes of each stage, the accumulation of errors can not be generated, and the stability of the network and the accuracy of frequency synchronization among network nodes are improved.
Drawings
FIG. 1 is a schematic diagram of step-by-step synchronization of node clock frequencies in a serial network of a "hand-in-hand" structure in the prior art;
fig. 2 is a flowchart of a clock frequency synchronization method of a network node according to an embodiment of the present invention;
fig. 3 is a timing diagram illustrating a timing information of a master node obtained through IEEE1588 according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of calculating a frequency deviation of an initial time setting process according to an embodiment of the present invention;
fig. 5 is a schematic diagram illustrating a process of adjusting a local clock frequency according to an embodiment of the present invention.
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
In the step-by-step synchronization mode, the subordinate nodes have a dependency relationship with the superior nodes. If the phase-locked loop of a node fails, all nodes of its lower level will no longer be synchronized with the master node, thereby reducing the stability of the entire network. In addition, the synchronization process has deviation, and the step-by-step synchronization accumulates the deviation, so that the synchronization precision of the nodes at the lower level is poorer, and the synchronization precision of the whole network is limited.
In order to overcome the defects brought by the conventional step-by-step synchronization mode, the invention provides a clock frequency synchronization method of a network node.
Fig. 2 is a flowchart of a clock frequency synchronization method of a network node according to an embodiment of the present invention, as shown in fig. 2, the method includes:
and S1, acquiring the starting time point of the time setting process based on the last time of the time setting process.
And S2, according to the frequency deviation of the last time of time setting, adjusting the frequency deviation of the slave node relative to the master node at the initial time point of the time setting, and according to the adjusted frequency deviation, determining the termination time point of the time setting, so as to take the termination time point of the time setting as the initial time point of the next time of time setting.
Specifically, the master node and the slave nodes are both network nodes. "master" and "slave" are used only to functionally distinguish different network nodes, wherein the master node differs from the slave node in function in that: the reference clock of the master node has a reference clock frequency, and the plurality of slave nodes need to adjust their local clocks so that their local clock frequencies are consistent with the clock frequency of the master node.
In this embodiment, this process in which the slave node adjusts its local clock so that its local clock frequency coincides with the clock frequency of the master node is referred to as a "time tick process". The time setting process is a continuous process, and each time setting process is operated based on the last time setting process.
This embodiment only explains the time synchronization process once:
in step S1, based on the last time of time setting, the starting time point of the time setting process is obtained. Wherein, the starting time point of the time setting process is the ending time point of the last time of the time setting process.
In step S2, according to the frequency deviation of the previous time synchronization process, at the starting time point of the current time synchronization process, adjusting the frequency deviation of the slave node relative to the master node, and according to the adjusted frequency deviation, determining the ending time point of the current time synchronization process; and taking the termination time point as the starting time point of the next time setting process.
Specifically, after the frequency deviation of the slave node relative to the master node is adjusted at the starting time point of the time synchronization process, the adjusted frequency deviation is kept unchanged until the ending time point.
In the clock frequency synchronization method for a network node provided in this embodiment, the local clock frequency of the slave node is synchronized with the reference clock frequency of the master node by adjusting the frequency deviation of the slave node with respect to the master node. Because the frequency deviation is relative to the master node of each slave node and does not depend on intermediate nodes of each stage, the accumulation of errors can not be generated, and the stability of the network and the accuracy of frequency synchronization among network nodes are improved.
Based on the foregoing embodiment, this embodiment mainly describes the adjustment process of the frequency deviation in the time tick at this time, that is, the step S2 in the foregoing embodiment specifically, and the step S2 includes:
and S21, acquiring the frequency deviation of the last time tick setting process.
S22, if the frequency deviation of the last time of time setting is larger than twice of the adjusting threshold, taking half of the frequency deviation of the last time of time setting as the adjusted frequency deviation; and if the frequency deviation of the last time of time setting is less than or equal to twice of the adjustment threshold, taking the adjustment threshold as the adjusted frequency deviation.
And S23, determining the ending time point of the time setting process according to the adjusted frequency deviation, and taking the ending time point of the time setting process as the starting time point of the next time setting process.
Wherein the adjustment threshold is a minimum resolution of the clock frequency of the node. In this embodiment, the node is preferably a slave node.
It should be noted that, acquiring the frequency offset of the last time tick in step S1 means: and acquiring the adjusted frequency deviation of the last time of the time setting process.
Based on the foregoing embodiment, the present embodiment specifically describes the obtaining of the frequency deviation of the time tick at the last time, that is, specifically describes step S21 in the foregoing embodiment, and step S21 includes:
and S211, acquiring the accumulated amount of the time setting deviation in the last time setting process.
S212, obtaining the frequency deviation of the last time setting process according to the accumulated amount of the time setting deviation of the last time setting process.
Note that time offset is the cumulative effect of frequency offset between two nodes. For example, the two nodes #1 and #2 are each clocked using their own local clocks clk1 and clk 2. The nominal frequencies of both clocks are 10Hz, but due to the offset, the actual clock frequencies are f19Hz and f 211 Hz. In 1s, node #1 records the number of elapsed clock cycles as c1When the time t elapses, 910.9 s; node #2 records the number of elapsed clock cycles as c2When the time t elapses, 1121.1 s. The time difference recorded by each of the two nodes is the time difference, and in this example, the time difference between the two nodes is Δ t ═ t within 1s1-t20.2 s. It can also be said that the time offset of one node with respect to the other is Δ t ═ t1-t2=0.2s。
Based on the above embodiments, this embodiment specifically describes a method for obtaining the accumulated amount of the time tick offset in the last time tick, that is, specifically describes step S211, where step S211 includes:
s2111, acquiring the starting time offset of the slave node relative to the master node at the starting time point of the last time synchronization process; and acquiring the time deviation of the slave node relative to the master node when the slave node terminates the time of the last time of the time synchronization process.
S2112, according to the starting time tick offset and the ending time tick offset, obtaining the cumulative amount of the time tick offset in the last time tick.
Specifically, for a time synchronization process, if the time synchronization deviation of two nodes is 0s at the initial time point, and the time synchronization deviation of two nodes is 4s at the termination time point. Then, for this time synchronization process, the cumulative amount of time synchronization deviation of the two nodes is 4 s.
Based on the above embodiments, this embodiment specifically describes a process of acquiring a frequency deviation of a last time tick according to an accumulated amount of time tick deviations of the last time tick, that is, specifically describes step S212, where step S212 includes:
and S2121, acquiring the time length of the last time setting process.
S2122, obtaining the frequency deviation of the last time setting process according to the time length of the last time setting process and the accumulated amount of the time setting deviation of the last time setting process.
Specifically, according to the time length Δ T of the previous time synchronization process and the cumulative amount Δ T of the time synchronization deviation of the previous time synchronization process, the formula for obtaining the frequency deviation Δ f of the previous time synchronization process is as follows:
Figure BDA0001459953680000071
wherein f is0Is the nominal frequency of the local clock of the slave node.
For example, for a time tick process, if the time length of the time interval from the initial time point to the end time point is 20s, the nominal frequency of the local clock of the slave node is 10Hz, and if the time tick offset of the slave node relative to the master node at the initial time point is 0s, and the time tick offset of the slave node relative to the master node at the end time point is 4s, the accumulated amount of the time tick offsets of the two nodes is 4 s. As can be seen from the above formula, the frequency deviation Δ f of the slave node from the master node in this time interval is:
Figure BDA0001459953680000081
based on the above embodiment, this embodiment determines the termination time point of the time setting process according to the adjusted frequency deviation; and the ending time point is taken as the starting time point of the next time comparison process, that is, step S23 in the above embodiment is described. Step S23 includes:
and acquiring the cumulant of the adjusted frequency deviation along with the time at regular time intervals in the time setting process.
And taking the time point when the cumulant of the adjusted frequency deviation along with the time is equal to or more than a preset threshold value as the ending time point of the time setting process, and taking the ending time point of the time setting process as the starting time point of the next time setting process.
Specifically, this embodiment mainly explains the selection of the termination time point of the time setting process this time. And for the time setting process, acquiring the cumulant of the frequency deviation after one adjustment along with the time at regular time intervals. And when the accumulated amount of the adjusted frequency deviation along with the time is just equal to or larger than a preset threshold value, taking the time point as the termination time point of the time setting process. And the ending time point of the time setting process is taken as the starting time point of the next time setting process, and the next time setting process is started immediately. The selection of the ending time point of the next time synchronization process is consistent with the selection method of the ending time point of the current time synchronization process, and the details are not repeated here.
In particular, it should be noted that the selection of the ending time point of each time setting process is consistent with the selection method of the ending time point of the current time setting process, and details are not described here.
It should be noted that specific values of the certain time interval and the preset threshold are determined according to specific scenarios, and this embodiment does not limit this.
Based on the above embodiment, the present embodiment specifically describes the initialization process before step S1, that is, before step S1, the present embodiment further includes:
s0, at the starting time point of the initial time synchronization process, adjusting the time synchronization deviation of the slave node relative to the master node to 0.
It should be noted that the initial time synchronization process is the first time synchronization process in all the time synchronization processes. At the starting time point of the initial time synchronization process, the time synchronization offset of the slave node relative to the master node is adjusted to 0.
This adjustment process will be specifically described below:
and at the initial time point of the initial time setting process, the timing information of the master node is obtained according to an IEEE1588 protocol, and the timing information of the slave node is set to be consistent with the timing information of the master node through a program. When the timing information of the slave node is set to be consistent with the timing information of the master node, the timing offset of the slave node with respect to the master node is 0 at the start time point. The timing information is the number of clock cycles that have elapsed at a time point.
Specifically, the measurement of the time synchronization deviation between nodes in the network needs to be implemented by exchanging frame data according to a certain protocol, including information such as the time when a protocol frame is sent from a node, the time when the protocol frame arrives at a node, and the propagation time on a line. The present invention uses IEEE1588 protocol to implement measurement of time offset, which is a standard protocol suitable for general network structures, and this embodiment explains a basic principle of acquiring timing information of a master node through the protocol, in conjunction with the accompanying drawings.
Fig. 3 is a timing diagram of acquiring timing information of a master node according to an embodiment of the present invention through IEEE1588, where, as shown in fig. 3, the master node transmits a synchronization frame including its own time t1(ii) a Receiving the synchronous frame from the node, and recording the receiving time t2And data t contained in the synchronization frame1
The slave node sends a return frame and records the time t for sending the return frame3(ii) a The main node receives the return frame and records the receiving time t4
The master node sends a response frame containing the recorded time t4And the time t of sending out the response frame5(ii) a Receiving the response frame from the node, and recording the data t contained in the response frame4And t5
To this end, t is recorded from the node1、t2、t3、t4And t5Can be according to t1、t2、t3And t4Calculating the time delay t from the main node to the slave nodedelayThe calculation formula is as follows:
Figure BDA0001459953680000101
the slave node may then be based on tdelayAnd t5Calculating the timing information t of the main node at the moment of receiving the response framexThe calculation formula is as follows:
tx=t5+tdelay
based on the above embodiments, this embodiment is taken as a preferred embodiment, and with reference to the accompanying drawings, and by way of specific examples, further details are provided for obtaining the frequency deviation in the clock frequency synchronization method for the network node according to the present invention.
FIG. 4 is a schematic diagram of calculating a frequency deviation during an initial time synchronization process according to an embodiment of the present invention, as shown in FIG. 4, tmasterTiming information of the main node is obtained according to an IEEE1588 protocol; t is tlocalIs the local timing information of a slave node; Δ t is the difference of the two timing information, i.e., the timing offset; Δ T is the time elapsed for the time offset to accumulate to a certain value, i.e., the accumulated time. At the beginning, t master8 and tlocalWhen the time synchronization deviation Δ t is equal to t, the same as 8local-tmasterAt this time, Δ T is counted from 0. When the time is set for the next time, t is measuredmaster24, and the local timer is t local28, the two are no longer the same, and the local timing is faster, indicating that the local clock frequency is higher. The accumulated time is Δ T-20, that is, during the time of Δ T-20, the local clock frequency is higher, so the accumulated time causes Δ T-Tlocal-tmasterA time tick offset of 4.
According to the time deviation Δ T and the accumulated time Δ T, the clock frequency deviation Δ f of the slave node relative to the master node can be calculated as:
Figure BDA0001459953680000102
wherein f is0Is the nominal frequency of the clock. For example, if the nominal frequency of the clock is f0=10kHz,Then according to fig. 4, one can obtain
Figure BDA0001459953680000103
I.e. the frequency deviation of the local clock with respect to the master clock is 2Hz and is dependent on tlocal>tmasterIt can be judged that the local clock frequency is too large.
Based on the above embodiments, this embodiment is taken as a preferred embodiment, and with reference to the accompanying drawings, and by way of specific examples, a clock frequency synchronization method for a network node provided by the present invention is further specifically described.
In this embodiment, the time synchronization deviation S ═ Δ t ═ tlocal-tmasterAs the preset threshold, it should be noted that the preset threshold is selected according to a specific scenario, and this embodiment is not limited to this.
Fig. 5 is a schematic diagram of a process of adjusting the frequency of a local clock according to an embodiment of the present invention, wherein a vertical axis Δ f in fig. 5(a) is a frequency deviation of the local clock from a master node clock, which is our object of adjustment; the vertical axis Δ t in fig. 5(b) represents the time tick offset of the slave node relative to the master node; the horizontal axis of both figures represents time t.
As shown in fig. 5, 5 intervals are shown in each of fig. 5(a) and 5 (b): [0, T ]1]、[T1,T2]、[T2,T3]、[T3,T4]And [ T4,T5]And the 5 intervals are respectively called as: the method comprises an initial time setting process, a second time setting process, a third time setting process, a fourth time setting process and a fifth time setting process.
It should be noted that, the initial time synchronization process does not adjust the frequency offset, but only needs to adjust the local timing information of the slave node at the initial time point of the initial time synchronization process, so that the local timing information of the slave node is consistent with the reference timing information of the master node, that is, the time synchronization offset of the slave node relative to the master node is 0.
Recording the initial time point of the initial time setting process as 0, and acquiring the accumulated amount of the frequency deviation along with the time at regular time intervals, namely acquiringThe time tick offset of a primary slave node relative to the master node. When the accumulated amount of the frequency deviation along with the time, namely the time deviation of the slave node relative to the master node, is just equal to or just larger than a preset threshold value, the time point T is used1As the starting time point of the next time tick setting process.
The next time of synchronization is referred to as the second time of synchronization. At the starting time T of the second time setting process1Where Δ f is greater at T1At, Δ f is adjusted to have its sign inverted and its magnitude halved.
At T1After the time, the cumulative amount of the frequency deviation with time after once adjustment is obtained at regular time intervals. And when the accumulated amount of the adjusted frequency deviation along with the time is just equal to or just larger than the preset threshold value, taking the time point as the termination time point of the second time setting process. It should be noted that, in each time tick after the initial time tick, once the frequency deviation is adjusted at the starting time point of each time tick, the adjusted frequency deviation is kept unchanged in the time tick.
The method is used to obtain the ending time point of the second time setting process, in this embodiment, the ending time point of the second time setting process is T2Will T2As the starting time point of the third time tick.
At the starting time T of the third time of synchronization2At, Δ f is adjusted to have its sign inverted and its magnitude halved. The method is used to obtain the ending time point of the third time synchronization process, in this embodiment, the ending time point of the third time synchronization process is T3Will T3As the starting time point of the fourth time tick.
At the starting time T of the fourth time synchronization process3At, Δ f is adjusted to have its sign inverted and its magnitude halved. In the figure, the adjusted frequency deviation is exactly equal to the adjustment threshold Δ fminAnd (5) the consistency is achieved. Obtaining the termination time point T of the fourth time setting process by the method4And will T4As the starting time point of the fifth time tick.
In the first placeStarting time point T of five time setting processes4At, Δ f is adjusted. The frequency deviation and the adjustment threshold value delta f in the fourth time setting processminTherefore, only Δ f is inverted in sign at this time, and the amplitude is unchanged.
According to the above method, the frequency deviation of the slave node with respect to the master node is continuously adjusted, and the adjustment process is not described herein again.
In addition, in [ T ]3,T4]When Δ f is internally adjusted, the amplitude of Δ f is not halved (the amplitude is smaller than Δ f after halving)min) But rather is made to have an amplitude of Δ fmin. Here,. DELTA.fminIs the adjustment threshold, i.e. the minimum resolution of the clock frequency of the nodes of the entire adjustment process. For Δ fminIs limited by the associated measurement and control errors, including measurement errors for time offsets Δ T, measurement errors for accumulated time Δ T, errors in the response curve of the local clock, etc. Since it is meaningless to set Δ f to a value infinitely close to 0 because of the existence of these errors, it is set to Δ fminSo that the frequency deviation of the slave node clock from the master node clock is within a well-known and controllable range. By more accurately measuring Δ T and Δ T, a smaller Δ f can be achieved using a more accurate voltage controlled oscillatorminI.e. higher clock frequency synchronization accuracy.
It should be noted that, in the present embodiment, the voltage-controlled oscillator is used as a local clock of the frequency-adjustable slave node, and the frequency of the voltage-controlled oscillator is adjusted by inputting a specific voltage signal to the voltage-controlled oscillator. Within a certain range around the rated voltage of the voltage-controlled oscillator, the frequency of the voltage-controlled oscillator and the voltage of the input voltage signal have a positive correlation linear relationship.
Based on the above embodiment, another embodiment of the present invention discloses a clock frequency synchronization device for a network node, including: at least one processor; and at least one memory communicatively coupled to the processor, wherein: the memory stores program instructions executable by the processor, and the processor calls the program instructions to execute the synchronization method provided by the method embodiments, for example, the method includes: acquiring the starting time point of the time setting process based on the last time of the time setting process; according to the frequency deviation of the last time of time setting, adjusting the frequency deviation of the slave node relative to the master node at the initial time point of the time setting process, and according to the adjusted frequency deviation, determining the termination time point of the time setting process so as to take the termination time point of the time setting process as the initial time point of the next time of time setting process.
Those of ordinary skill in the art will understand that: the implementation of the above-described apparatus embodiments or method embodiments is merely illustrative, wherein the processor and the memory may or may not be physically separate components, i.e. may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Based on the foregoing embodiments, a further embodiment of the present invention provides a non-transitory computer-readable storage medium storing computer instructions, which cause the computer to execute the method provided by the foregoing method embodiments, for example, including: acquiring the starting time point of the time setting process based on the last time of the time setting process; according to the frequency deviation of the last time of time setting, adjusting the frequency deviation of the slave node relative to the master node at the initial time point of the time setting process, and according to the adjusted frequency deviation, determining the termination time point of the time setting process so as to take the termination time point of the time setting process as the initial time point of the next time of time setting process.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
It should also be noted that the present invention is applicable to frequency synchronization of both slave nodes that are directly connected to the master node and slave nodes that are indirectly connected to the master node (i.e., there are intermediate nodes). Therefore, the present invention can be applied to networks of various configurations, including a serial configuration, a star configuration, or a mixture of both, with high flexibility.
In summary, the clock frequency synchronization method for a network node according to the present invention utilizes protocol data rather than signal waveforms to transmit clock information, obtains the time synchronization deviation of a slave node with respect to a master node in a fully digital manner, obtains a frequency deviation through the time synchronization deviation, and further adjusts the frequency deviation of the slave node with respect to the master node, so as to synchronize the local clock frequency of the slave node with the reference clock frequency of the master node. Because the frequency deviation is relative to the master node of each slave node and does not depend on intermediate nodes of each stage, the accumulation of errors can not be generated, and the stability of the network and the accuracy of frequency synchronization among network nodes are improved.
Finally, the method of the present invention is only a preferred embodiment and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (9)

1. A method for clock frequency synchronization of a network node, comprising:
s1, acquiring the starting time point of the time setting process based on the last time of the time setting process;
s2, according to the frequency deviation of the last time of time setting, at the starting time point of the time setting process, adjusting the frequency deviation of the slave node relative to the master node, and according to the adjusted frequency deviation, determining the ending time point of the time setting process, so as to take the ending time point of the time setting process as the starting time point of the next time of time setting process;
wherein, step S2 includes:
s21, acquiring the frequency deviation of the last time of time setting;
s22, if the frequency deviation of the last time of time setting is larger than twice of the adjusting threshold, taking half of the frequency deviation of the last time of time setting as the adjusted frequency deviation; if the frequency deviation of the last time of time setting is less than or equal to twice of the adjustment threshold, taking the adjustment threshold as the adjusted frequency deviation;
and S23, determining the ending time point of the time setting process according to the adjusted frequency deviation, and taking the ending time point of the time setting process as the starting time point of the next time setting process.
2. The synchronization method according to claim 1, characterized in that the adjustment threshold is a minimum resolution of the clock frequency of the nodes.
3. The synchronization method according to claim 1, wherein step S21 comprises:
s211, obtaining the cumulant of the time setting deviation in the last time of time setting;
s212, obtaining the frequency deviation of the last time setting process according to the accumulated amount of the time setting deviation of the last time setting process.
4. The synchronization method according to claim 3, wherein step S211 comprises:
s2111, acquiring the starting time offset of the slave node relative to the master node at the starting time point of the last time synchronization process; acquiring the time synchronization termination deviation of the slave node relative to the master node at the time synchronization termination time point of the last time of time synchronization;
s2112, according to the starting time tick offset and the ending time tick offset, obtaining the cumulative amount of the time tick offset in the last time tick.
5. The synchronization method according to claim 3, wherein step S212 comprises:
s2121, acquiring the time length of the last time setting process;
s2122, obtaining the frequency deviation of the last time setting process according to the time length of the last time setting process and the accumulated amount of the time setting deviation of the last time setting process.
6. The synchronization method according to claim 1, wherein step S23 comprises:
for the time setting process, acquiring the cumulant of the adjusted frequency deviation along with the time at regular time intervals;
and taking the time point when the cumulant of the adjusted frequency deviation along with the time is equal to or more than a preset threshold value as the ending time point of the time setting process, and taking the ending time point of the time setting process as the starting time point of the next time setting process.
7. The synchronization method according to claim 1, wherein before step S1, further comprising:
s0, at the starting time point of the initial time synchronization process, adjusting the time synchronization deviation of the slave node relative to the master node to 0.
8. A clock frequency synchronization apparatus of a network node, comprising:
at least one processor; and at least one memory communicatively coupled to the processor, wherein: the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the synchronization method of any of claims 1 to 7.
9. A non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the synchronization method according to any one of claims 1 to 7.
CN201711085380.3A 2017-11-07 2017-11-07 Clock frequency synchronization method of network node Active CN107800529B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711085380.3A CN107800529B (en) 2017-11-07 2017-11-07 Clock frequency synchronization method of network node

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711085380.3A CN107800529B (en) 2017-11-07 2017-11-07 Clock frequency synchronization method of network node

Publications (2)

Publication Number Publication Date
CN107800529A CN107800529A (en) 2018-03-13
CN107800529B true CN107800529B (en) 2020-10-20

Family

ID=61547852

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711085380.3A Active CN107800529B (en) 2017-11-07 2017-11-07 Clock frequency synchronization method of network node

Country Status (1)

Country Link
CN (1) CN107800529B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108828567B (en) * 2018-04-23 2022-06-21 河北大学 Improved bidirectional bilateral distance measurement method
CN110953682B (en) * 2019-12-17 2021-05-11 珠海格力电器股份有限公司 Air conditioning system and time correction method of GPRS module thereof
CN114025406B (en) * 2021-11-04 2024-02-02 杭州老板电器股份有限公司 Communication method and device of smoke exhaust system and smoke exhaust system
CN114095166A (en) * 2021-11-23 2022-02-25 北京京东方技术开发有限公司 Method, node and system for generating node temporary identity

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1645935A2 (en) * 2004-10-07 2006-04-12 Westerngeco Seismic Holdings Limited Synchronization of real time clocks of nodes in a network environment
CN101227246A (en) * 2008-01-28 2008-07-23 中兴通讯股份有限公司 Method and apparatus for master-salve clock synchronization
CN101547268A (en) * 2009-04-24 2009-09-30 北京飞利信科技股份有限公司 Digital voice transmission system based on LAN
CN101789859A (en) * 2010-01-29 2010-07-28 中国科学院空间科学与应用研究中心 Noncoherent distance measurement/time synchronism system of cluster link two-way asynchronous communication channel
CN101888292A (en) * 2009-05-13 2010-11-17 中兴通讯股份有限公司 Clock synchronization method and device based on packet switching
CN102332935A (en) * 2011-09-21 2012-01-25 北京华力创通科技股份有限公司 Carrier compensation system and carrier compensation method
CN102347926A (en) * 2011-09-26 2012-02-08 豪威科技(上海)有限公司 Carrier frequency capturing method and device
CN102833061A (en) * 2012-08-31 2012-12-19 北京东土科技股份有限公司 Method for improving clock accuracy based on seamless redundancy ring network and node
CN103138828A (en) * 2013-02-07 2013-06-05 航天恒星科技有限公司 Network node clock synchronization method and clock synchronization network
CN105680969A (en) * 2015-12-31 2016-06-15 浙江中控技术股份有限公司 Clock synchronization method and device
CN105722207A (en) * 2016-01-28 2016-06-29 武汉慧联无限科技有限公司 Self-adaptive clock synchronization method for wireless network at low transmission speeds
CN106992830A (en) * 2017-04-05 2017-07-28 中国科学院空间应用工程与技术中心 A kind of clock synchronizing method in the networks of FC AE 1553

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1645935A2 (en) * 2004-10-07 2006-04-12 Westerngeco Seismic Holdings Limited Synchronization of real time clocks of nodes in a network environment
CN101227246A (en) * 2008-01-28 2008-07-23 中兴通讯股份有限公司 Method and apparatus for master-salve clock synchronization
CN101547268A (en) * 2009-04-24 2009-09-30 北京飞利信科技股份有限公司 Digital voice transmission system based on LAN
CN101888292A (en) * 2009-05-13 2010-11-17 中兴通讯股份有限公司 Clock synchronization method and device based on packet switching
CN101789859A (en) * 2010-01-29 2010-07-28 中国科学院空间科学与应用研究中心 Noncoherent distance measurement/time synchronism system of cluster link two-way asynchronous communication channel
CN102332935A (en) * 2011-09-21 2012-01-25 北京华力创通科技股份有限公司 Carrier compensation system and carrier compensation method
CN102347926A (en) * 2011-09-26 2012-02-08 豪威科技(上海)有限公司 Carrier frequency capturing method and device
CN102833061A (en) * 2012-08-31 2012-12-19 北京东土科技股份有限公司 Method for improving clock accuracy based on seamless redundancy ring network and node
CN103138828A (en) * 2013-02-07 2013-06-05 航天恒星科技有限公司 Network node clock synchronization method and clock synchronization network
CN105680969A (en) * 2015-12-31 2016-06-15 浙江中控技术股份有限公司 Clock synchronization method and device
CN105722207A (en) * 2016-01-28 2016-06-29 武汉慧联无限科技有限公司 Self-adaptive clock synchronization method for wireless network at low transmission speeds
CN106992830A (en) * 2017-04-05 2017-07-28 中国科学院空间应用工程与技术中心 A kind of clock synchronizing method in the networks of FC AE 1553

Also Published As

Publication number Publication date
CN107800529A (en) 2018-03-13

Similar Documents

Publication Publication Date Title
CN107800529B (en) Clock frequency synchronization method of network node
RU2660458C1 (en) Method for synchronization of clock generators of network devices
JP4766128B2 (en) Slave device, slave device time synchronization method, and electronic device system
WO2017063450A1 (en) Timestamp filtering method and apparatus
JP2014238357A (en) Reception device, time difference calculation method and program
EP3284244A1 (en) Methods, systems, and computer readable media for emulating network devices with different clocks
CN109392074A (en) Clock correcting method and device
JP2013083450A (en) Time control device, time control method, and program
JP2012222833A (en) System and method to overcome wander accumulation to achieve precision clock distribution over large networks
JP2017069669A (en) Time synchronizing device, base station device, and time synchronizing method
US20130215910A1 (en) Transmission apparatus, transmission method, program, and communication system
JP2013083451A (en) Time control device, time control method, and program
JP2014027437A (en) Communication device, communication system, synchronization processing method, and program
TW201618465A (en) Frequency division clock alignment
CN113872597A (en) Method for generating independent clock signals from the same oscillator
WO2013163793A1 (en) Automatic time and frequency synchronization over an asynchronous network
WO2018099375A1 (en) Synchronization method, synchronization device, synchronization apparatus and communication system
JP2014165582A (en) Time synchronization system, time synchronization method, slave node and computer program
US9442511B2 (en) Method and a device for maintaining a synchronized local timer using a periodic signal
CN103857029A (en) Uplink and downlink time-delay difference determination method, device and equipment thereof
WO2016177240A1 (en) Frequency synchronization method and device
CN110098885B (en) Clock synchronization circuit, device and method
CN114520703B (en) Clock drift compensation method and circuit for time synchronization between industrial network devices
JP6198075B2 (en) Time synchronization apparatus, time synchronization method, and time synchronization program
Kim et al. Time synchronization method of IEEE 802.1 AS through automatic optimal sync message period adjustment for in-car network

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant