CN107786201B - Second-order generalized integrator structure based on frequency-locked loop and phase-locked loop synchronization method - Google Patents

Second-order generalized integrator structure based on frequency-locked loop and phase-locked loop synchronization method Download PDF

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CN107786201B
CN107786201B CN201710923207.XA CN201710923207A CN107786201B CN 107786201 B CN107786201 B CN 107786201B CN 201710923207 A CN201710923207 A CN 201710923207A CN 107786201 B CN107786201 B CN 107786201B
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薛蕙
张焱
王珂
林歆昊
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China Agricultural University
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    • H—ELECTRICITY
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    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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Abstract

The invention provides a second-order generalized integrator structure based on a frequency locking loop and a phase-locked loop synchronization method, wherein the structure comprises a second-order generalized integrator, a frequency locking loop based on the second-order generalized integrator and a feedback loop; the second-order generalized integrator is used for receiving a voltage input signal of a single-phase power grid and outputting a first orthogonal signal and a second orthogonal signal; wherein the voltage input signal comprises an input voltage signal and an input frequency; the frequency locking loop based on the second-order generalized integrator is used for acquiring an adjusting frequency, a third orthogonal signal and a fourth orthogonal signal according to the first orthogonal signal; the feedback loop is used for feeding the adjusting frequency back to the second-order generalized integrator as a new input frequency. The second-order generalized integrator structure based on the frequency locking loop improves the filtering capacity of direct current components in voltage signals, improves the phase locking precision when input signals contain direct current components, and has better harmonic filtering capacity.

Description

Second-order generalized integrator structure based on frequency-locked loop and phase-locked loop synchronization method
Technical Field
The invention relates to the technical field of communication, in particular to a second-order generalized integrator structure based on a frequency-locked loop and a phase-locked loop synchronization method.
Background
In order to ensure the safe and stable operation of the grid-connected single-phase power electronic device, the single-phase power grid synchronization technology becomes a very important control technology, and the phase-locked loop is a simple and effective synchronization tool. A single phase locked loop generally consists of three parts: a phase detector, a loop filter and a voltage controlled oscillator.
From the perspective of the phase detector, the multiplication phase detector has long application history, but can still generate a frequency doubling component with large amplitude in steady-state output. Therefore, techniques for generating the fundamental wave and its orthogonal signal before the phase detector are available, such as delay module, orthogonal signal generator based on hilbert transform, orthogonal signal generator based on kalman filter, second-order generalized integrator, and inverse-park transform. Meanwhile, various filters for filtering various types of fluctuating components are also applied to a phase-locked loop filter, such as an infinite impulse response low-pass or notch filter, an adaptive notch filter, a moving average filter, a delay-cancellation filter, and the like.
Liu sweet osmanthus flower in article "single-phase photovoltaic grid-connected inverter lock frequency ring synchronization method under weak grid" the method that puts forward can be reliable and stable under the condition of grid voltage disturbance and zero crossing oscillation, but can not fully consider the influence of harmonic to the phase-locked effect.Yuanqing in article "grid-connected phase-locked loop technique based on specific harmonic elimination" has put forward a single-phase-locked loop method based on specific harmonic elimination, Yuanqing in article "grid voltage synchronization signal detection based on improved DSOGI-P LL", through constructing the harmonic elimination module, on the basis of DSOGI-P LL, an improved phase-locked loop structure is put forward, but the PI link is still kept in most in the prior art, make the structure of circuit lock frequency loop too complicated.
Disclosure of Invention
In order to solve the problem that a phase-locked loop based on a second-order generalized integrator needs to reserve a PI link, so that a circuit frequency-locked loop is too complex in the prior art, a second-order generalized integrator structure based on the frequency-locked loop and a phase-locked loop synchronization method are provided.
According to an aspect of the present invention, there is provided a second-order generalized integrator structure based on a frequency-locked loop, comprising: the device comprises a second-order generalized integrator, a frequency locking loop based on the second-order generalized integrator and a feedback loop; the second-order generalized integrator is used for receiving a voltage input signal of a single-phase power grid and outputting a first orthogonal signal and a second orthogonal signal;
wherein the voltage input signal comprises an input voltage signal and an input frequency;
the frequency locking loop based on the second-order generalized integrator is used for acquiring an adjusting frequency, a third orthogonal signal and a fourth orthogonal signal according to the first orthogonal signal;
the feedback loop is used for feeding the adjusting frequency back to the second-order generalized integrator as a new input frequency.
Wherein the first and second orthogonal signals are vaAnd vb(ii) a V isaThe same amplitude and phase as the voltage input signal; v isbThe voltage input signal is the same amplitude and 90 ° out of phase.
Wherein the third and fourth orthogonal signals are va' and vb'; v isa' with said vaThe amplitude and the phase of the signal are the same; v isb' with said vaThe amplitudes are the same and the phases differ by 90.
Wherein, the transfer function formula of the second-order generalized integrator is as follows:
Figure BDA0001427113060000021
and
Figure BDA0001427113060000022
in the formula, viFor the purpose of inputting a signal for said voltage,
Figure BDA0001427113060000023
for the resonant frequency, s is the time domain and k is 1.
The transfer function formula of the second-order generalized integrator based on the frequency locking loop is as follows:
Ga'(s)＝Ga(s)·Ga(s) and Gb'(s)＝Ga(s)·Gb(s)。
And when the input frequency and the adjusting frequency are equal, taking the third orthogonal signal and the fourth orthogonal signal at the moment as final output signals.
According to a second aspect of the present invention, there is provided a phase-locked loop synchronization method based on a second-order generalized integrator structure of a frequency-locked loop, including:
receiving a voltage signal of a single-phase power grid, inputting the signal into a first frequency-locking ring-based second-order generalized integrator structure, a second frequency-locking ring-based second-order generalized integrator structure and a third frequency-locking ring-based second-order generalized integrator structure which are connected in parallel, and outputting the adjusting frequency, the third orthogonal signal and a fourth orthogonal signal from the first frequency-locking ring-based second-order generalized integrator structure;
inputting the adjusting frequency into the first second-order generalized integrator structure based on the frequency-locked loop as a new input frequency, inputting 2 times of adjusting frequency into the second-order generalized integrator structure based on the frequency-locked loop as a new input frequency, and inputting 3 times of adjusting frequency into the third second-order generalized integrator structure based on the frequency-locked loop as a new input frequency;
and the phase angle values output by the second order generalized integrator structure based on the frequency locking ring and the third second order generalized integrator structure based on the frequency locking ring are used as the input phase angle of the first second order generalized integrator structure based on the frequency locking ring.
Inputting the third orthogonal signal to a fourth second-order generalized integrator based on a frequency locking loop, which is serially connected with the first second-order generalized integrator based on a frequency locking loop structure, to obtain a fifth orthogonal signal and a sixth orthogonal signal;
and the output frequency of the fourth second-order generalized integrator based on the frequency-locked loop is used as the adjusting frequency and is input into the first second-order generalized integrator structure based on the frequency-locked loop as a new input frequency.
Wherein the output quadrature signal is taken as a final output signal when the input frequency is the same as the adjustment frequency.
The second-order generalized integrator based on the frequency locking loop improves the filtering capacity of direct-current components in voltage signals, improves the phase locking precision when input signals contain direct-current components, and has better harmonic filtering capacity compared with the traditional second-order generalized integrator.
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Fig. 1 is a second-order generalized integrator structure based on a frequency-locked loop according to an embodiment of the present invention;
FIG. 2 is a block diagram of a second-order generalized integrator according to an embodiment of the present invention;
fig. 3 is a structural diagram of a frequency-locked loop based on a second-order generalized integrator according to an embodiment of the present invention;
fig. 4 is a bode diagram of transfer functions of a second-order generalized integrator and a second-order generalized integrator based on a frequency-locked loop according to an embodiment of the present invention;
fig. 5 is a structural diagram of a frequency-locked loop according to an improvement of a second-order generalized integrator based on the frequency-locked loop according to an embodiment of the present invention;
fig. 6 is a flowchart of a phase-locked loop synchronization method of a second-order generalized integrator structure based on a frequency-locked loop according to another embodiment of the present invention;
fig. 7 is a circuit diagram of a phase-locked loop based on a second-order generalized integrator structure of a frequency-locked loop according to another embodiment of the present invention;
fig. 8 is a circuit diagram of a phase-locked loop based on a second-order generalized integrator structure of a frequency-locked loop according to still another embodiment of the present invention;
FIG. 9 is a graph comparing the performance of four phase-locked loops under simulation 1 according to yet another embodiment of the present invention;
FIG. 10 is a graph comparing the performance of four phase-locked loops under simulation 2 according to yet another embodiment of the present invention;
fig. 11 is a graph comparing the performance of four pll cases under simulation 3 according to still another embodiment of the present invention.
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
Referring to fig. 1, a second-order generalized integrator structure based on a frequency-locked loop according to an embodiment of the present invention includes; a second-order generalized integrator 1, a frequency-locked loop 2 based on the second-order generalized integrator, and a feedback loop 3.
The Second-Order Generalized Integrator (SOGI) 1 is configured to receive a voltage input signal of a single-phase power grid and output a first quadrature signal and a Second quadrature signal.
Wherein the voltage input signal comprises an input voltage signal and an input frequency.
The frequency locking loop based on the second-order generalized integrator is used for 2, and according to the first orthogonal signal, the adjusting frequency, a third orthogonal signal and a fourth orthogonal signal are obtained;
wherein the feedback loop 3 is configured to feed back the adjustment frequency to the second-order generalized integrator as a new input frequency.
Specifically, referring to FIG. 2, FIG. 2 shows a second order generalized integrator structure diagram, where viIs the input signal of the digital signal processing circuit,
Figure BDA0001427113060000054
is the resonant frequency, vaAnd vbIs the output quadrature signal. From fig. 2, the transfer function of the second-order generalized integrator is as follows
Figure BDA0001427113060000051
Figure BDA0001427113060000052
In the formula, viFor the purpose of inputting a signal for said voltage,
Figure BDA0001427113060000053
and s is the resonance frequency, s is the time domain, and k takes the value of 1.
Wherein G isa(s) shows in
Figure BDA0001427113060000055
Bandpass filtering effect of center frequency, Gb(s) then exhibits a low-pass filtering effect. If the estimated frequency is equal to the input frequency, the first output signal vaWill have the same amplitude and phase as the fundamental wave of the input signal, and a second output signal vbThen the input signal is of the same amplitude as the fundamental wave but is 90 deg. out of phase, i.e.The quadrature signal of the fundamental wave.
Since the second-order generalized integrator structure shown in fig. 1 needs to include dq conversion and PI control in the corresponding phase-locked loop, if the ideal input signal fundamental wave and its quadrature signal can be extracted, the second-order generalized integrator can directly implement the phase-locked function, and the dq conversion and PI control are no longer needed. The amplitude and the phase angle of the input signal can be calculated through the output signal of the second-order generalized integrator, wherein the calculation formula is as follows:
Figure BDA0001427113060000061
in the formula, θ is the phase angle of the input signal, and a is the amplitude of the input signal. However, equation (3) cannot be used directly for calculation in practical applications because of the transfer function Ga(s) and Gb(s) it can be known that the conventional second-order generalized integrator can only partially attenuate harmonic interference. If a large number of harmonics are still present in the input signal, this will result in an output signal vaAnd vbHarmonic interference exists in the process, so that the calculation of the formula (3) generates errors. Therefore, the capability of the second-order generalized integrator to filter out the harmonic needs to be further enhanced so that the formula (3) can be directly used for the calculation of the grid synchronization signal.
Besides the harmonic filtering capability, the second-order generalized integrator still has other two factors that affect the phase-locking accuracy of equation (3).
One factor is the output signal vbIs sensitive to dc components. Transfer function Gb(s) exhibits a low-pass filtering effect, the input signal viThe DC component of (1) appears almost without attenuation at vbIn (1). Therefore, if there is a direct current component in the input signal, the phase angle calculation of equation (3) may have a serious error.
According to the Bode diagram of the transfer function, if the frequency of an input signal is different from the resonant frequency of the second-order generalized integrator, a phase angle error exists between an output signal and the input signal, and in order to solve the problem that the second-order generalized integrator is sensitive to the frequency offset, a frequency-locked loop (SOGI-F LL) is introduced on the basis of the frequency-locked loop.
Referring to fig. 3, fig. 3 is a structural diagram of a frequency locking loop based on a second-order generalized integrator according to an embodiment of the present invention, where the frequency locking loop adjusts a resonant frequency in real time, and thus the frequency locking loop based on the second-order generalized integrator is no longer sensitive to a frequency offset. But the second order generalized integrator-based frequency locked loop is still sensitive to the dc component and even more sensitive than the second order generalized integrator. Because the frequency-locked loop is subjected to vbControl, vbThe direct current content in the second-order generalized integrator can further influence the frequency-locked loop and the tracked frequency, so that the second-order generalized integrator is more seriously influenced.
Another disadvantage of a frequency locked loop based on a second order generalized integrator is its sensitivity to input signal amplitude variations. As shown in fig. 2, the control signal ζ of the frequency locked loop is the quadrature output signal vbAnd error signalvThe control signal is affected by the amplitude variation of the input signal, and the frequency estimation of the frequency locked loop and the output signal are affected by the amplitude variation of the input signal.
Based on the second-order generalized integrator and the frequency locking loop based on the second-order generalized integrator, as shown in fig. 1, the second-order generalized integrator based on the frequency locking loop is composed of three parts, the first part is the second-order generalized integrator, the second part is the frequency locking loop based on the second-order generalized integrator, the third part is the feedback loop, and the output signal v of the first part is fed back to the feedback loopaIs the input signal of the second part. In the feedback loop, the frequency-locked loop adjusting frequency omega 'is fed back to the first part, and when the output adjusting frequency omega' is the same as the input frequency, the output signal v at the moment is fed backa' and vb' as the final output signal.
The transfer function of the enhanced second-order generalized integrator is shown as the formula (4) and the formula (5):
Ga'(s)＝Ga(s)·Ga(s) (4)
Gb'(s)＝Ga(s)·Gb(s) (5)
as can be seen from FIG. 4, G is compared to a second order generalized integratora'(s) and Gb'(s) Filtering capability for DC componentIncreasing to-60 dB and-30 dB, it is considered that the input signal and the dc component contained in the input signal are greatly attenuated, and at the same time, eliminating the influence of the dc component brings more accurate frequency tracking.
In addition to the above improvement, in the newly proposed enhanced second-order generalized integrator, the present embodiment proposes a new frequency-locked loop, which can no longer be affected by the amplitude variation of the input signal. The new frequency-locked loop structure is shown in FIG. 5
If the input signal frequency is different from the resonant frequency of the second-order generalized integrator, a phase angle difference is generated between the output signal and the input signal. Suppose the input signal is viAsin (θ), the output signal is vaAsin (θ + Δ θ) and vaWhere a is the input signal amplitude and Δ θ is the phase angle difference between the output signal and the input signal, a new signal η may be defined as follows:
Figure BDA0001427113060000071
equation (6) indicates that signal η contains a DC component Δ θ/2 and a sinusoidal component (Δ θ/2) cos (2 θ +3 Δ θ/2), where only the DC component Δ θ/2 affects the frequency locked loop-1(η) is a control signal for a frequency locked loop, where tan-1() For clipping.
Through the structure, the filtering capacity of the direct current component in the voltage signal is improved, the phase locking precision when the input signal contains the direct current component is improved, and the harmonic filtering capacity is better compared with that of a traditional second-order generalized integrator.
Referring to fig. 6, fig. 6 is a flowchart of a phase-locked loop synchronization method for a second-order generalized integrator structure based on a frequency-locked loop according to another embodiment of the present invention, where the method includes:
s1, receiving a voltage signal of a single-phase power grid, inputting the signal to a first second-order generalized integrator structure based on a frequency-locked loop, a second-order generalized integrator structure based on the frequency-locked loop and a third second-order generalized integrator structure based on the frequency-locked loop which are connected in parallel, and obtaining the adjusting frequency, the third orthogonal signal and the fourth orthogonal signal from the first second-order generalized integrator structure based on the frequency-locked loop;
s2, inputting the adjusted frequency as a new input frequency into the first second-order generalized integrator structure based on frequency-locked loop, inputting 2 times of adjusted frequency as a new input frequency into the second-order generalized integrator structure based on frequency-locked loop, and inputting 3 times of adjusted frequency as a new input frequency into the third second-order generalized integrator structure based on frequency-locked loop;
and the phase angle values output by the second order generalized integrator structure based on the frequency locking ring and the third second order generalized integrator structure based on the frequency locking ring are used as the input phase angle of the first second order generalized integrator structure based on the frequency locking ring.
Specifically, a specific structure of a phase-locked loop of a second-order generalized integrator structure based on a frequency-locked loop is shown in fig. 7, and the phase-locked loop includes three second-order generalized integrators based on a frequency-locked loop connected in parallel, where a first second-order generalized integrator based on a frequency-locked loop is used to extract an orthogonal signal of a fundamental wave, and the other two second-order generalized integrators are used to filter second and third harmonics.
In general, the input signal viWill be affected by lower harmonics, such as the second and third harmonics. Although most of the higher harmonics are filtered out by the phase-locked loop with the structure of fig. 7, the phase-locked loop still has a high low-order harmonic passing rate, so that an optimized structure is required to filter out the low-order harmonics. The resonance frequency of the enhanced phase-locked loop connected in parallel is set to be the frequency of the harmonic wave, and the enhanced phase-locked loop can be used for filtering the harmonic wave. A parallel enhanced phase-locked loop is used for filtering a harmonic wave, the more parallel structures are, the stronger the harmonic wave filtering capability is, but a more complex structure is brought at the same time. In order to consider both harmonic filtering capability and structural complexity, the present embodiment provides two parallel second-order generalized integrators based on a frequency-locked loop, and the input frequency is 2 times and 3 times of the output frequency of the first second-order generalized integrator based on a frequency-locked loop, respectively, so as to filter low-order harmonics in the output signal.
When the frequency of the input signal is the same as the output frequency of the first second-order generalized integrator based on the frequency-locked loop, the output signal at the momentva' and vb' can be considered as an ideal fundamental and its quadrature signal. Then the phase angle, amplitude and frequency of the input signal can be calculated as follows:
Figure BDA0001427113060000091
by the method, the filtering capacity of the direct current component in the voltage signal is improved, and meanwhile, the phase locking precision of the input signal containing the direct current component is improved.
On the basis of the above embodiment, the method further includes inputting the third quadrature signal to a fourth second-order frequency-locked loop-based generalized integrator connected in series with the first frequency-locked loop-based second-order generalized integrator structure, and obtaining a fifth quadrature signal and a sixth quadrature signal;
and the output frequency of the fourth second-order generalized integrator based on the frequency-locked loop is used as the adjusting frequency and is input into the first second-order generalized integrator structure based on the frequency-locked loop as a new input frequency.
Specifically, in order to further filter out harmonics and improve the phase-locking accuracy, in this embodiment, on the basis of fig. 8, a second-order generalized integrator based on a frequency-locking loop is connected in series, and in the second-order generalized integrator based on the frequency-locking loop, v is useda' as input signals, thereby obtaining a fifth quadrature signal and a sixth quadrature signal, table 1 shows harmonic passing percentages of the second-order generalized integrator the phase-locked loop provided in fig. 7 and the phase-locked loop provided in fig. 8,
Figure BDA0001427113060000092
Figure BDA0001427113060000101
TABLE 1 harmonic pass-through ratio of different phase-locked loops
In table 1, P1, P2, and P3 represent the harmonic passing rates of the second-order generalized integrator, the type I pll provided in fig. 7, and the type II pll provided in fig. 8, respectively, in which the second and third harmonics are filtered by the two parallel enhanced plls, and thus the passing rates of the second and third harmonics can be considered to be close to zero. Fourth, fifth, sixth and seventh harmonics of 6.68%, 4.22%, 2.88%, 2.09% are still present in the type I pll. In the type II pll, the fourth, fifth, sixth, and seventh harmonic passing rates are reduced to 0.90%, 0.41%, 0.21%, and 0.12%. Therefore, type II phase-locked loops have better harmonic filtering capabilities than type I phase-locked loops.
In yet another embodiment of the present invention, the simulation is performed under MAT L AB environment, the sampling frequency is 3200Hz, the nominal frequency is 50 Hz., the phase-locked loop II provided in FIG. 8, the phase-locked loop I provided in FIG. 7, the phase-locked loop SOGI-P LL of the second-order generalized integrator in the prior art, and the phase-locked loop FFSOGI-P LL based on the second-order generalized integrator with natural frequency are compared, and the PI control parameter of the phase-locked loop is set to ki＝7878，kpAt the beginning of the simulation, 137.5, the input signal is an ideal sinusoidal voltage signal, and the phase-locked loop works normally. Subsequently, phase jumps, frequency jumps, voltage dips, noise, dc components and harmonics are added at t ═ 0.4 s.
In the case of simulation 1, fig. 9 shows that a 60 ° phase jump, a 0.2Hz frequency jump, a third harmonic of 0.04pu, a second harmonic of 0.03pu, and fifth, seventh, ninth, and eleventh harmonics of 0.02pu are added when t is 0.4 s. And under the condition that the total harmonic distortion is 6.4%, comparing the performances of the four phase-locked loops.
In the case of simulation 2, fig. 10 shows a graph comparing the performance of four phase-locked loops with the addition of 60 ° phase jump, 0.2Hz frequency jump, second, third, fourth, fifth, seventh and ninth harmonics of 0.3pu and total harmonic distortion of 73.4% when t is 0.4 s.
In the case of simulation 3, fig. 11 shows that on the basis of simulation 1, 20% of the dc component of the fundamental amplitude is added at t-0.4 s, 50% of the voltage sag and 50dB of noise is the signal-to-noise ratio. The performance of the four phase-locked loops is compared with the situation chart.
By comparing fig. 9, fig. 10 and fig. 11, SOGI-P LL and FFSOGI-P LL are both sensitive to dc components, voltage sag and severe harmonic interference in terms of noise immunity, while ESOGI-P LL 1 is sensitive to severe harmonics, however ESOGI-P LL 2 has good noise immunity under any interference from simulations 1-3.
In terms of transient response speed, the response speeds of FFSOGI-P LL, SOGI-P LL and ESOGI-P LL 1 are basically the same, but ESOGI-P LL 1 ensures higher steady-state response accuracy.
In the aspect of steady-state response speed, ESOGI-P LL 2 still has the highest steady-state response accuracy under various types of interference, the phase errors of SOGI-P LL, FFSOGI-P LL and ESOGI-P LL 1 become larger along with the increase of the interference, and under the condition of serious harmonic interference, the errors can reach 3-4 degrees, SOGI-P LL cannot carry out addressing in the presence of a direct-current component, and the steady-state error of ESOGI-P LL 2 can be always kept within 0.2 degree no matter under any grid condition, obviously, ESOGI-P LL 2 has the highest steady-state accuracy.
The invention provides a phase-locked loop synchronization method of a second-order generalized integrator structure based on a frequency-locked loop, which realizes the suppression of harmonic waves and direct current components by the series connection of the second-order generalized integrator. Based on different combination modes, namely an I-type phase-locked loop and a II-type phase-locked loop, dq conversion and a PI controller are not used, but input alternating current signals are directly tracked, so that higher dynamic response speed is ensured, and in addition, according to the transfer function analysis of the I-type phase-locked loop structure and the II-type phase-locked loop structure, the phase-locked loop has better anti-interference capability and higher steady-state precision, and can realize higher transient response speed, higher steady-state response precision and high anti-interference performance under various interferences, particularly harmonic waves and direct current components. Can be used for power grid signal synchronization under various polluted power grid working conditions
Finally, the method of the present application is only a preferred embodiment and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (8)

1. A second order generalized integrator structure based on a frequency locked loop, comprising:
the device comprises a second-order generalized integrator, a frequency locking loop based on the second-order generalized integrator and a feedback loop;
the second-order generalized integrator is used for receiving a voltage input signal of a single-phase power grid and outputting a first orthogonal signal and a second orthogonal signal;
the first orthogonal signal and the second orthogonal signal are vaAnd vb；
Wherein, v isaThe same amplitude and phase as the voltage input signal;
wherein, v isbThe voltage input signal has the same amplitude and 90 degrees of phase difference;
the second-order generalized integrator is used for acquiring the value and the phase angle of the voltage input signal according to the output, and the calculation formula is as follows:
Figure FDA0002423936900000011
wherein, theta is a phase angle of the input signal, and A is an amplitude of the input signal;
wherein the voltage input signal comprises an input voltage signal and an input frequency;
the frequency locking loop based on the second-order generalized integrator is used for acquiring an adjusting frequency, a third orthogonal signal and a fourth orthogonal signal according to the first orthogonal signal;
control signal ζ of the frequency locked loop is said second quadrature output signal vbAnd error signalvThe product of (a);
the feedback loop is used for feeding the adjusting frequency back to the second-order generalized integrator as a new input frequency;
the transfer function formula of the second-order generalized integrator based on the frequency locking loop is as follows:
Ga'(s)＝Ga(s)·Ga(s) and Gb'(s)＝Ga(s)·Gb(s)；
If the frequency of the voltage input signal is different from the resonant frequency of the second-order generalized integrator, let the input signal be vi＝Asin(θ)The output signal is vaAsin (θ + Δ θ) and vaWhere a is the input signal amplitude and Δ θ is the phase angle difference between the output signal and the input signal, a new signal η is defined as follows:
η＝ζ/A2＝vb×/A2
＝[sin(θ)-sin(θ+Δθ)]cos(θ+Δθ)
＝sin(Δθ/2)[cos(Δθ/2)-cos(2θ+3Δθ/2)]
≈sin(Δθ/2)[1-cos(2θ+3Δθ/2)]
≈(Δθ/2)[1-cos(2θ+3Δθ/2)]
wherein the signal η contains a DC component Δ θ/2 and a sinusoidal component (Δ θ/2) cos (2 θ +3 Δ θ/2), wherein only the DC component Δ θ/2 affects the frequency-locked loop, and further defines tan-1(η) is a control signal for a frequency locked loop, where tan-1() For clipping;
until the frequency of the voltage input signal is the same as the resonant frequency of the second-order generalized integrator, taking the output orthogonal signal as a final output signal;
the phase-locked loop of the second-order generalized integrator structure comprises three second-order generalized integrators which are connected in parallel and are based on a frequency locking loop and a second-order generalized integrator which is connected in series and is based on the frequency locking loop, wherein the first second-order generalized integrator which is connected in parallel and is based on the frequency locking loop is used for extracting orthogonal signals of fundamental waves, and the other two second-order generalized integrators which are connected in parallel and are based on the frequency locking loop are used for filtering second and third harmonics; in the series second-order generalized integrator based on frequency-locked loop, v is useda' as an input signal; v isa' is a third orthogonal signal.
2. The structure of claim 1, wherein the third and fourth orthogonal signals are each va' and vb'；
Wherein, v isa' with said vaThe amplitude and the phase of the signal are the same;
wherein, v isb' with said vaThe amplitudes are the same and the phases differ by 90.
3. The architecture of claim 2, wherein the transfer function formula of the second order generalized integrator is:
Figure FDA0002423936900000021
and
Figure FDA0002423936900000022
in the formula, viFor the purpose of inputting a signal for said voltage,
Figure FDA0002423936900000023
for the resonant frequency, s is the time domain and k is 1.
4. The structure according to claim 1, wherein when the input frequency and the adjustment frequency are the same, the third quadrature signal and the fourth quadrature signal at that time are taken as final output signals.
5. A phase-locked loop synchronization method based on the frequency-locked loop-based second-order generalized integrator structure of any one of claims 1 to 4, comprising:
receiving a voltage signal of a single-phase power grid, inputting the signal to a first second-order generalized integrator structure based on a frequency locking ring, a second-order generalized integrator structure based on the frequency locking ring and a third second-order generalized integrator structure based on the frequency locking ring which are connected in parallel, and obtaining the adjusting frequency, the third orthogonal signal and a fourth orthogonal signal from the first second-order generalized integrator structure based on the frequency locking ring;
inputting the adjusting frequency into the first second-order generalized integrator structure based on the frequency-locked loop as a new input frequency, inputting 2 times of adjusting frequency into the second-order generalized integrator structure based on the frequency-locked loop as a new input frequency, and inputting 3 times of adjusting frequency into the third second-order generalized integrator structure based on the frequency-locked loop as a new input frequency;
and the phase angle values output by the second order generalized integrator structure based on the frequency locking ring and the third second order generalized integrator structure based on the frequency locking ring are used as the input phase angle of the first second order generalized integrator structure based on the frequency locking ring.
6. The method of claim 5, further comprising inputting the third quadrature signal to a fourth frequency-locked loop-based second-order generalized integrator in series with the first frequency-locked loop-based second-order generalized integrator structure to obtain a fifth quadrature signal and a sixth quadrature signal;
and the output frequency of the fourth second-order generalized integrator based on the frequency-locked loop is used as the adjusting frequency and is input into the first second-order generalized integrator structure based on the frequency-locked loop as a new input frequency.
7. The method of claim 6, wherein the output quadrature signal is used as a final output signal when the input frequency is the same as the adjustment frequency.
8. The method of claim 7, wherein the output quadrature signal is used as a final output signal when the input frequency is the same as the adjustment frequency.
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