CN107786201B - Second-order generalized integrator structure based on frequency-locked loop and phase-locked loop synchronization method - Google Patents

Abstract

The invention provides a second-order generalized integrator structure based on a frequency locking loop and a phase-locked loop synchronization method, wherein the structure comprises a second-order generalized integrator, a frequency locking loop based on the second-order generalized integrator and a feedback loop; the second-order generalized integrator is used for receiving a voltage input signal of a single-phase power grid and outputting a first orthogonal signal and a second orthogonal signal; wherein the voltage input signal comprises an input voltage signal and an input frequency; the frequency locking loop based on the second-order generalized integrator is used for acquiring an adjusting frequency, a third orthogonal signal and a fourth orthogonal signal according to the first orthogonal signal; the feedback loop is used for feeding the adjusting frequency back to the second-order generalized integrator as a new input frequency. The second-order generalized integrator structure based on the frequency locking loop improves the filtering capacity of direct current components in voltage signals, improves the phase locking precision when input signals contain direct current components, and has better harmonic filtering capacity.

Description

A second-order generalized integrator structure based on frequency-locked loop and synchronization method of phase-locked loop

technical field

The invention relates to the technical field of communication, and more particularly, to a second-order generalized integrator structure based on a frequency-locked loop and a synchronization method of a phase-locked loop.

Background technique

In order to ensure the safe and stable operation of grid-connected single-phase power electronic devices, single-phase grid synchronization technology has become a very important control technology, and phase-locked loop is a simple and effective synchronization tool. A single-phase phase-locked loop usually consists of three parts: a phase detector, a loop filter and a voltage-controlled oscillator.

From the point of view of the phase detector, the multiplication phase detector has a long history of application, but it still produces a large-value double frequency component in the steady-state output. Therefore, the technology of generating the fundamental wave and its quadrature signal before the phase detector came into being, such as delay module, quadrature signal generator based on Hilbert transform, quadrature signal generator based on Kalman filtering, second-order Techniques such as generalized integrators and anti-Pike transforms. At the same time, a variety of filters for filtering out various fluctuation components are also used in phase-locked loop loop filters, such as infinite impulse response low-pass or notch filters, adaptive notch filters, moving average filter, delay cancellation filter, etc.

Among the proposed phase-locked loop structures, phase-locked loops based on second-order generalized integrators have been widely used. The method proposed by Liu Guihua in the article "Single-phase photovoltaic grid-connected inverter frequency-locked loop synchronization method under weak grid" can work stably and reliably in the case of grid voltage disturbance and zero-crossing oscillation, but it fails to fully consider the effect of harmonics. The effect of the lock-in effect. Yuan Qingqing proposed a single-phase phase-locked loop method based on specific harmonic elimination in the article "Grid-connected PLL Technology Based on Specific Harmonic Elimination", and Tu Juan in the article "Grid Voltage Synchronization Signal Detection Based on Improved DSOGI-PLL". 》 By constructing a harmonic elimination module and based on DSOGI-PLL, an improved phase-locked loop structure is proposed, but most of the existing technologies still retain the PI link, which makes the structure of the circuit frequency-locked loop too complicated.

SUMMARY OF THE INVENTION

In order to overcome the problem in the prior art that the phase-locked loop based on the second-order generalized integrator needs to retain the PI link, which makes the circuit frequency-locked loop too complicated, a second-order generalized integrator structure based on the frequency-locked loop and a phase-locked loop are provided. synchronization method.

According to one aspect of the present invention, a second-order generalized integrator structure based on a frequency-locked loop is provided, comprising: a second-order generalized integrator, a frequency-locked loop based on the second-order generalized integrator, and a feedback loop; the second-order generalized integrator The integrator is used for receiving the voltage input signal of the single-phase power grid, and outputting the first quadrature signal and the second quadrature signal;

Wherein, the voltage input signal includes an input voltage signal and an input frequency;

The frequency-locked loop based on the second-order generalized integrator is used to obtain the adjustment frequency, the third quadrature signal and the fourth quadrature signal according to the first quadrature signal;

The feedback loop is used to feed back the adjusted frequency to the second order generalized integrator as a new input frequency.

The first quadrature signal and the second quadrature signal are respectively v _a and v _b ; the v _a and the voltage input signal have the same amplitude and phase; the v _b is the same as the voltage input signal The amplitude is the same, and the phase is 90° out of phase.

Wherein, the third quadrature signal and the fourth quadrature signal are v _a ' and v _b 'respectively; the v _a ' and the v _a have the same amplitude and phase; the v _b ' is the same as the v a ' v _a have the same amplitude and are 90° out of phase.

Wherein, the transfer function formula of the second-order generalized integrator is:

和

and

为谐振频率，s为时域，k值为1。where _vi is the voltage input signal,

is the resonant frequency, s is the time domain, and k is 1.

Wherein, the transfer function formula of the second-order generalized integrator based on the frequency-locked loop is:

G _a '(s)=G _a (s)·G _a (s) and G _b '(s)=G _a (s)·G _b (s).

Wherein, when the input frequency and the adjustment frequency are equal, the third quadrature signal and the fourth quadrature signal at this time are used as the final output signal.

According to a second aspect of the present invention, a phase-locked loop synchronization method based on a second-order generalized integrator structure of a frequency-locked loop is provided, comprising:

Receive the voltage signal of the single-phase power grid, and input the signal into the first frequency-locked loop-based second-order generalized integrator structure, the second frequency-locked loop-based second-order generalized integrator structure, and the third frequency-locked-based generalized integrator structure. a second-order generalized integrator structure of the loop, outputting the adjusted frequency and the third quadrature signal and the fourth quadrature signal from the first frequency-locked loop-based second-order generalized integrator structure;

Input the adjusted frequency as a new input frequency into the first frequency-locked loop-based second-order generalized integrator structure, and input twice the adjusted frequency as a new input frequency into the second frequency-locked loop-based In the second-order generalized integrator structure of , the 3 times adjustment frequency is input into the third frequency-locked loop-based second-order generalized integrator structure as a new input frequency;

Wherein, the phase angle values output by the second frequency-locked loop-based second-order generalized integrator structure and the third frequency-locked loop-based second-order generalized integrator structure are used as the first frequency-locked loop-based second-order generalized integrator structure input phase angle.

The method further includes inputting the third quadrature signal into a fourth frequency-locked loop-based second-order generalized integrator connected in series with the first frequency-locked loop-based second-order generalized integrator to obtain a fifth quadrature signal and the sixth quadrature signal;

Wherein, the output frequency of the fourth frequency-locked loop-based second-order generalized integrator is used as the adjustment frequency, and is input into the structure of the first frequency-locked-loop-based second-order generalized integrator as a new input frequency.

Wherein, when the input frequency is the same as the adjustment frequency, the output quadrature signal is used as the final output signal.

The second-order generalized integrator based on the frequency-locked loop proposed by the present invention improves the filtering ability of the DC component in the voltage signal, and at the same time improves the phase-locking accuracy when the input signal contains the DC component. Compared with the traditional second-order Generalized integrators have better harmonic filtering capabilities.

Description of drawings

1 is a structure of a second-order generalized integrator based on a frequency-locked loop provided by an embodiment of the present invention;

2 is a structural diagram of a second-order generalized integrator provided by an embodiment of the present invention;

3 is a structural diagram of a frequency-locked loop based on a second-order generalized integrator provided by an embodiment of the present invention;

4 is a Bode diagram of the transfer function of a second-order generalized integrator and a frequency-locked loop-based second-order generalized integrator provided by an embodiment of the present invention;

5 is a structural diagram of a frequency-locked loop improved according to a second-order generalized integrator based on a frequency-locked loop provided by an embodiment of the present invention;

6 is a flowchart of a phase-locked loop synchronization method based on a second-order generalized integrator structure of a frequency-locked loop provided by another embodiment of the present invention;

7 is a structural diagram of a phase-locked loop circuit based on a second-order generalized integrator structure based on a frequency-locked loop provided by another embodiment of the present invention;

8 is a structural diagram of a phase-locked loop circuit based on a second-order generalized integrator structure based on a frequency-locked loop provided by yet another embodiment of the present invention;

FIG. 9 is a performance comparison diagram of four phase-locked loops under simulation 1 provided by still another embodiment of the present invention;

10 is a performance comparison diagram of four phase-locked loops under simulation 2 conditions provided by yet another embodiment of the present invention;

FIG. 11 is a performance comparison diagram of four phase-locked loops under simulation 3 conditions provided by another embodiment of the present invention.

Detailed ways

The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments. The following examples are intended to illustrate the present invention, but not to limit the scope of the present invention.

Referring to FIG. 1, an embodiment of the present invention provides a second-order generalized integrator structure based on a frequency-locked loop. The structure includes: a second-order generalized integrator 1, a frequency-locked loop 2 based on a second-order generalized integrator, and A feedback loop 3.

Wherein, the second-order generalized integrator (SOGI for short) 1 is used for receiving a voltage input signal of a single-phase power grid, and outputting a first quadrature signal and a second quadrature signal.

Wherein, the voltage input signal includes an input voltage signal and an input frequency.

Wherein, the frequency-locked loop based on the second-order generalized integrator is used for 2, and according to the first quadrature signal, the adjusted frequency and the third quadrature signal and the fourth quadrature signal are obtained;

Wherein, the feedback loop 3 is used to feed back the adjusted frequency to the second-order generalized integrator as a new input frequency.

是谐振频率，v_a和v_b是输出的正交信号。根据图2可知二阶广义积分器的传递函数如下Specifically, referring to Fig. 2, Fig. 2 shows a structural diagram of a second-order generalized integrator, where v _i is the input signal,

is the resonant frequency, and v _a and v _b are the output quadrature signals. According to Figure 2, the transfer function of the second-order generalized integrator is as follows

为谐振频率，s为时域，k取值为1。where _vi is the voltage input signal,

is the resonant frequency, s is the time domain, and k is 1.

为中心频率的带通滤波效果，G_b(s)则展示了低通滤波效果。如果估计频率等于输入频率，那么第一输出信号v_a会与输入信号基波同幅值、同相位，而第二输出信号v_b则与输入信号基波同幅值但会产生90°相位差，即基波的正交信号。where _Ga (s) shows that with

is the band-pass filtering effect of the center frequency, and G _b (s) shows the low-pass filtering effect. If the estimated frequency is equal to the input frequency, then the first output signal v _a will have the same amplitude and phase as the fundamental of the input signal, while the second output signal v _b will have the same amplitude as the fundamental of the input signal but with a 90° phase difference , that is, the quadrature signal of the fundamental wave.

Since the second-order generalized integrator structure shown in Figure 1 needs to include dq transform and PI control in the corresponding phase-locked loop, but if the ideal input signal fundamental wave and its quadrature signal can be extracted, the second-order generalized integrator can The phase-locking function is directly realized without the need for dq transformation and PI control. The amplitude and phase angle of the input signal can be calculated from the output signal of the second-order generalized integrator, where the calculation formula is:

In the formula, θ is the phase angle of the input signal, and A is the amplitude of the input signal. However, equation (3) cannot be directly used for calculation in practical applications, because according to the transfer functions G _a (s) and G _b (s), the traditional second-order generalized integrator can only partially weaken the harmonic interference. If there are still a lot of harmonics in the input signal, it will cause harmonic interference in the output signals v _a and v _b , which will cause errors in the calculation of formula (3). Therefore, it is necessary to further strengthen the ability of the second-order generalized integrator to filter out harmonics so that equation (3) can be directly used in the calculation of the power grid synchronization signal.

In addition to the harmonic filtering ability, there are two other factors of the second-order generalized integrator that affect the phase-locking accuracy of Eq. (3).

One factor is that the output signal v _b is sensitive to DC components. The transfer function G _b ( _s ) exhibits a low-pass filtering effect, so that the DC component in the input signal vi appears in v _b with almost no attenuation. Therefore, if there is a DC component in the input signal, there will be serious errors in the phase angle calculation of equation (3).

Another factor is that second-order generalized integrators are sensitive to frequency offsets. From the Bode plot of the transfer function, if the input signal frequency is different from the resonant frequency of the second-order generalized integrator, there will be a phase angle error between the output signal and the input signal. In order to solve the problem that the second-order generalized integrator is sensitive to frequency offset, a frequency-locked loop (SOGI-FLL) is introduced on this basis.

Referring to FIG. 3, FIG. 3 is a structural diagram of a frequency-locked loop based on a second-order generalized integrator provided by an embodiment of the present invention. The frequency-locked loop adjusts the resonant frequency in real time, so the frequency-locked loop based on the second-order generalized integrator no longer controls the frequency. Offset sensitive. But the frequency-locked loop based on the second-order generalized integrator is still sensitive to the DC component, even more sensitive than the second-order generalized integrator. Because the frequency-locked loop is controlled by _vb , the DC content in _vb will further affect the frequency-locked loop, affecting the frequency being tracked, and thus having a more serious effect on the second-order generalized integrator.

Another disadvantage of the frequency-locked loop based on the second-order generalized integrator is its sensitivity to changes in the amplitude of the input signal. As shown in Figure 2, the control signal ζ of the frequency-locked loop is the product of the quadrature output signal v _b and the error signal ε _v . Therefore, the control signal will be affected by the change in the amplitude of the input signal, and then the frequency estimation of the frequency-locked loop and The output signal is affected by changes in the amplitude of the input signal.

Based on the above-mentioned second-order generalized integrator and frequency-locked loop based on second-order generalized integrator, as shown in Figure 1, the second-order generalized integrator based on frequency-locked loop consists of three parts, the first part is the second-order generalized integrator, The second part is a frequency-locked loop based on a second-order generalized integrator, the third part is _a feedback loop, and the output signal va of the first part is the input signal of the second part. In the feedback loop, the frequency-locked loop adjustment frequency ω' is fed back to the first part, and when the output adjustment frequency ω' is the same as the input frequency, the output signals v _a ' and v _b ' at this time are used as the final output signals.

The transfer function sum of the enhanced second-order generalized integrator is shown in Equation (4) and Equation (5):

G _a '(s)=G _a (s)·G _a (s) (4)

G _b '(s)=G _a (s) · G _b (s) (5)

It can be seen from Fig. 4 that compared with the second-order generalized integrator, the filtering ability of _{Ga '(s) and G b '} (s) to DC components increases to -60dB and -30dB, so it can be considered that the input signal and the neutral The included DC component has been greatly attenuated, and at the same time, eliminating the influence of the DC component will bring more accurate frequency tracking.

In addition to the above improvements, in the newly proposed enhanced second-order generalized integrator, this embodiment proposes a new frequency-locked loop, which can no longer be affected by changes in the amplitude of the input signal. The new frequency-locked loop structure is shown in Figure 5

If the frequency of the input signal is different from the resonant frequency of the second-order generalized integrator, a phase angle difference occurs between the output signal and the input signal. Assuming that the input signal is vi = _Asin (θ), the output signal is va ₌ Asin(θ+Δθ) and va ₌ Acos(θ+Δθ), where A is the input signal amplitude, Δθ is the output signal and the input signal At this time, a new signal η can be defined as follows:

Equation (6) indicates that the signal η contains a DC component Δθ/2 and a sine component (Δθ/2) cos(2θ+3Δθ/2), of which only the DC component Δθ/2 affects the frequency-locked loop. Redefine tan ^-1 (η) to be the control signal of the frequency-locked loop, where tan ^-1 ( ) is used for clipping.

Through this structure, the filtering ability of the DC component in the voltage signal is improved, and the phase-locking accuracy when the input signal contains the DC component is improved, and the harmonic filtering ability is better than the traditional second-order generalized integrator.

Referring to FIG. 6, FIG. 6 is a flowchart of a phase-locked loop synchronization method based on a second-order generalized integrator structure of a frequency-locked loop provided by another embodiment of the present invention, and the method includes:

S1, receive the voltage signal of the single-phase power grid, and input the signal into the first frequency-locked loop-based second-order generalized integrator structure, the second frequency-locked loop-based second-order generalized integrator structure, and the third frequency-locked loop-based second-order generalized integrator structure. a second-order generalized integrator structure of a frequency-locked loop, obtaining the adjusted frequency and the third quadrature signal and the fourth quadrature signal from the first frequency-locked loop-based second-order generalized integrator structure;

S2: Input the adjustment frequency as a new input frequency into the first second-order generalized integrator structure based on a frequency-locked loop, and input twice the adjustment frequency as a new input frequency into the second lock-based In the second-order generalized integrator structure of the frequency loop, 3 times the adjustment frequency is input into the third frequency-locked loop-based second-order generalized integrator structure as a new input frequency;

Wherein, the phase angle values output by the second frequency-locked loop-based second-order generalized integrator structure and the third frequency-locked loop-based second-order generalized integrator structure are used as the first frequency-locked loop-based second-order generalized integrator structure input phase angle.

Specifically, the specific structure of the phase-locked loop based on the second-order generalized integrator structure based on the frequency-locked loop is shown in Fig. 7, which includes three parallel-connected second-order generalized integrator based on the frequency-locked loop. The second-order generalized integrator of the loop is used to extract the quadrature signal of the fundamental, and the other two are used to filter the second and third harmonics.

Typically, the input signal _vi will be affected by lower harmonics, such as the second and third harmonics. Although the phase-locked loop of the structure of FIG. 7 filters out most of the high-order harmonics, the phase-locked loop still has a high pass rate of the low-order harmonics, so it is necessary to optimize the structure to filter out the low-order harmonics. The resonance frequency of the parallel enhanced phase-locked loop is set to the frequency of the harmonics, which can be used to filter out the harmonics. A parallel-enhanced phase-locked loop is used to filter out a harmonic. The more parallel structures there are, the stronger the harmonic filtering capability will be, but at the same time, it will also bring about a more complex structure. In order to take into account the harmonic filtering capability and the complexity of the structure, this embodiment provides two parallel frequency-locked loop-based second-order generalized integrators, and the input frequencies are respectively equal to the output frequency of the first frequency-locked loop-based second-order generalized integrator. 2 times and 3 times, thereby filtering out low-order harmonics in the output signal.

When the frequency of the input signal is the same as the output frequency of the first frequency-locked loop-based second-order generalized integrator, the output signals v _a ' and v _b ' can be regarded as ideal fundamental waves and their quadrature signals. Then the phase angle, amplitude and frequency of the input signal can be calculated as follows:

Through this method, the filtering ability of the DC component in the voltage signal is improved, and the phase locking accuracy when the input signal contains the DC component is improved at the same time.

On the basis of the above embodiment, the method further comprises a fourth frequency-locked loop-based second-order generalized integrator connected in series by inputting the third quadrature signal to the first frequency-locked loop-based second-order generalized integrator structure, obtaining a fifth quadrature signal and a sixth quadrature signal;

Wherein, the output frequency of the fourth frequency-locked loop-based second-order generalized integrator is used as the adjustment frequency, and is input into the structure of the first frequency-locked-loop-based second-order generalized integrator as a new input frequency.

Specifically, in order to further filter out harmonics and improve the phase-locking accuracy, on the basis of FIG. 8 , in this embodiment, a second-order generalized integrator based on a frequency-locked loop is connected in series. In the generalized integrator, _va ' is used as the input signal to obtain the fifth quadrature signal and the sixth quadrature signal. Table 1 shows the phase-locked loop provided by the second-order generalized integrator in Fig. The harmonic pass percentage of the phase loop,

Table 1. Harmonic pass rates of different phase-locked loops

In Table 1, P1, P2 and P3 represent the harmonic pass rates of the second-order generalized integrator, the type I phase-locked loop provided by Figure 7 and the type II phase-locked loop provided by Figure 8, respectively. In a Type II PLL, the second and third harmonics are filtered by two parallel enhanced PLLs, so the pass rates of the second and third harmonics can be considered close to zero. There are still 6.68%, 4.22%, 2.88%, 2.09% of the fourth, fifth, sixth and seventh harmonics in the I-type PLL. In the type II phase-locked loop, the pass rates of the fourth, fifth, sixth and seventh harmonics drop to 0.90%, 0.41%, 0.21% and 0.12%. Therefore, Type II PLL has better harmonic filtering capability than Type I PLL.

In yet another embodiment of the present invention, the simulation is performed in the MATLAB environment, the sampling frequency is set to 3200 Hz, and the nominal frequency is set to 50 Hz. The type II phase-locked loop provided by FIG. 8, the type I phase-locked loop provided by FIG. 7, the phase-locked loop SOGI-PLL of the second-order generalized integrator in the prior art, and the phase-locked phase-locked based on the natural frequency second-order generalized integrator Compared with the FFSOGI-PLL loop, the PI control parameters of the phase-locked loop are set to k _i =7878, k _p =137.5 At the beginning of the simulation, the input signal is an ideal sinusoidal voltage signal, and the phase-locked loop works normally. Subsequently, phase jumps, frequency jumps, voltage dips, noise, DC components and harmonics are added at t=0.4s.

In the case of Simulation 1, Figure 9 shows the addition of a 60° phase jump at t=0.4s, a 0.2Hz frequency jump, the third harmonic of 0.04pu, the second harmonic of 0.03pu, and the fifth harmonic of 0.02pu 1st, 7th, 9th, 11th harmonics. The performance comparison of the four phase-locked loops when the total harmonic distortion is 6.4%.

In the case of simulation 2, Fig. 10 shows the addition of 60° phase jump at t=0.4s, 0.2Hz frequency jump, and the second, third, fourth, fifth, seventh, and ninth harmonics of 0.3pu Wave, the total harmonic distortion is 73.4%, the performance comparison chart of the four phase-locked loops.

In the case of simulation 3, Fig. 11 shows that on the basis of simulation 1, a DC component of 20% of the fundamental amplitude is added at t=0.4s, a voltage sag of 50% and a noise with a signal-to-noise ratio of 50 dB. The performance comparison chart of the four phase-locked loops at the time.

By comparing Fig. 9, Fig. 10 and Fig. 11, in terms of noise immunity, both SOGI-PLL and FFSOGI-PLL are sensitive to DC components, voltage sag and severe harmonic interference, while ESOGI-PLL1 is sensitive to severe harmonic interference. But ESOGI-PLL2 has good anti-interference under any disturbance of simulation 1-3.

In terms of transient response speed, the response speeds of FFSOGI-PLL, SOGI-PLL and ESOGI-PLL1 are basically the same, but ESOGI-PLL1 ensures higher steady-state response accuracy.

In terms of steady-state response speed, ESOGI-PLL2 still has the highest steady-state response accuracy under various disturbances. The phase errors of SOGI-PLL, FFSOGI-PLL and ESOGI-PLL1 increase with the increase of interference, and the error can reach 3-4° in the presence of severe harmonic interference. SOGI-PLL cannot perform its direction in the presence of a DC component. However, the steady-state error of ESOGI-PLL2 can always be kept within 0.2 degrees under any grid conditions. Obviously, ESOGI-PLL2 has the highest steady-state accuracy.

The invention proposes a phase-locked loop synchronization method based on a second-order generalized integrator structure of a frequency-locked loop. The series connection of the second-order generalized integrator realizes the suppression of harmonics and direct current components. Based on different combination methods, they are called I-type PLL and II-type PLL, which do not use dq transform and PI controller, but directly track the input AC signal, which ensures faster dynamic response speed. In addition, according to I The transfer function analysis of the phase-locked loop structure of type II and type II makes the phase-locked loop have better anti-interference ability and higher steady-state accuracy, and can achieve faster transient response speed and higher steady-state response accuracy. And a high degree of immunity to various disturbances, especially harmonics and DC components. It can be used for power grid signal synchronization under various polluted power grid conditions

Finally, the method of the present application is only a preferred embodiment, and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims (8)

1. a second-order generalized integrator structure based on a frequency-locked loop, is characterized in that, comprises: Second-order generalized integrator, frequency-locked loop based on second-order generalized integrator, and a feedback loop; The second-order generalized integrator is used for receiving the voltage input signal of the single-phase power grid, and outputting the first quadrature signal and the second quadrature signal; the first quadrature signal and the second quadrature signal are respectively v _a and v _b ; Wherein, the _va is the same as the amplitude and phase of the voltage input signal; Wherein, the v _b and the voltage input signal have the same amplitude and a phase difference of 90°; The second-order generalized integrator is also used to obtain the value and phase angle of the voltage input signal according to the output, and the calculation formula is:

Among them, θ is the phase angle of the input signal, and A is the amplitude of the input signal; Wherein, the voltage input signal includes an input voltage signal and an input frequency; The frequency-locked loop based on the second-order generalized integrator is used to obtain the adjustment frequency, the third quadrature signal and the fourth quadrature signal according to the first quadrature signal; The control signal ζ of the frequency-locked loop is the product of the second quadrature output signal v _b and the error signal ε _v ; the feedback loop is used to feed back the adjusted frequency to the second-order generalized integrator as a new input frequency; The transfer function formula of the second-order generalized integrator based on the frequency-locked loop is: G _a '(s) = G _a (s) · G _a (s) and G _b '(s) = G _a (s) · G _b (s); If the frequency of the voltage input signal is different from the resonant frequency of the second-order generalized integrator, let the input signal be v _i =Asin(θ), the output signal be v _a =Asin(θ+Δθ) and v _a =Acos (θ+Δθ), where A is the input signal amplitude, Δθ is the phase angle difference between the output signal and the input signal, and a new signal η is defined as follows: η=ζ/A ² =v _b ×ε/A ² =[sin(θ)-sin(θ+Δθ)]cos(θ+Δθ) =sin(Δθ/2)[cos(Δθ/2)-cos(2θ+3Δθ/2)] ≈sin(Δθ/2)[1-cos(2θ+3Δθ/2)] ≈(Δθ/2)[1-cos(2θ+3Δθ/2)] Among them, the signal η contains the DC component Δθ/2 and the sine component (Δθ/2) cos(2θ+3Δθ/2), of which only the DC component Δθ/2 affects the frequency-locked loop; then define tan ^-1 (η) as The control signal of the frequency-locked loop, where tan ^-1 () is used for amplitude limiting; Until the frequency of the voltage input signal is the same as the resonant frequency of the second-order generalized integrator, the output quadrature signal is used as the final output signal; The phase-locked loop of the second-order generalized integrator structure includes three parallel-connected second-order generalized integrators based on frequency-locked loops and one series-connected second-order generalized integrator based on frequency-locked loops, wherein the first parallel-connected second-order generalized integrator is based on The second-order generalized integrator of the frequency-locked loop is used to extract the quadrature signal of the fundamental wave, and the other two parallel-connected second-order generalized integrators based on the frequency-locked loop are used to filter the second and third harmonics; In the second-order generalized integrator of the loop, v _a ' is used as the input signal; the v _a ' is the third quadrature signal. 2. The structure according to claim 1, wherein the third quadrature signal and the fourth quadrature signal are respectively v _a ' and v _b '; Wherein, the _va ' is the same as the amplitude and phase of the va _; Wherein, the v _b ' and the v _a have the same amplitude and a phase difference of 90°. 3. structure according to claim 2, is characterized in that, the transfer function formula of described second-order generalized integrator is:

and

where _vi is the voltage input signal,

is the resonant frequency, s is the time domain, and k is 1. 4. The structure according to claim 1, wherein when the input frequency and the adjustment frequency are the same, the third quadrature signal and the fourth quadrature signal at this time are used as the final output signal . 5. a phase-locked loop synchronization method based on the arbitrary described frequency-locked loop-based second-order generalized integrator structure of claim 1-4, is characterized in that, comprising: Receive the voltage signal of the single-phase power grid, and input the signal into the first frequency-locked loop-based second-order generalized integrator structure, the second frequency-locked loop-based second-order generalized integrator structure, and the third frequency-locked-based generalized integrator structure. a second-order generalized integrator structure of the loop, obtaining the adjusted frequency and the third quadrature signal and the fourth quadrature signal from the first frequency-locked loop-based second-order generalized integrator structure; Input the adjusted frequency as a new input frequency into the first frequency-locked loop-based second-order generalized integrator structure, and input twice the adjusted frequency as a new input frequency into the second frequency-locked loop-based In the second-order generalized integrator structure of , the 3 times adjustment frequency is input into the third frequency-locked loop-based second-order generalized integrator structure as a new input frequency; Wherein, the phase angle values output by the second frequency-locked loop-based second-order generalized integrator structure and the third frequency-locked loop-based second-order generalized integrator structure are used as the first frequency-locked loop-based second-order generalized integrator structure input phase angle. 6. The method of claim 5, further comprising inputting the third quadrature signal to a fourth frequency-locked loop-based second order generalized integrator structure in series with the first frequency-locked loop-based The second-order generalized integrator obtains the fifth quadrature signal and the sixth quadrature signal; Wherein, the output frequency of the fourth frequency-locked loop-based second-order generalized integrator is used as the adjustment frequency, and is input into the structure of the first frequency-locked-loop-based second-order generalized integrator as a new input frequency. 7 . The method according to claim 6 , wherein when the input frequency is the same as the adjustment frequency, the output quadrature signal is used as the final output signal. 8 . 8. The method according to claim 7, wherein when the input frequency is the same as the adjustment frequency, the output quadrature signal is used as the final output signal.

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