CN107783628A - Voltage and frequency adjusting device, System on Chip/SoC and voltage and frequency adjusting method - Google Patents

Voltage and frequency adjusting device, System on Chip/SoC and voltage and frequency adjusting method Download PDF

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Publication number
CN107783628A
CN107783628A CN201610740955.XA CN201610740955A CN107783628A CN 107783628 A CN107783628 A CN 107783628A CN 201610740955 A CN201610740955 A CN 201610740955A CN 107783628 A CN107783628 A CN 107783628A
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voltage
processing unit
chip
logic circuit
sensing
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郭俊仪
陈莹晏
林欣樟
李日农
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Realtek Semiconductor Corp
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Realtek Semiconductor Corp
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Priority to CN201610740955.XA priority Critical patent/CN107783628A/en
Publication of CN107783628A publication Critical patent/CN107783628A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

The present invention relates to voltage and frequency adjusting device, System on Chip/SoC and voltage and frequency adjusting method.A kind of voltage includes processing unit, at least a sensing unit and control unit with frequency adjusting device.An at least sensing unit electric property coupling processing unit.An at least sensing unit exports an at least sensing result to processing unit, processing unit and produces a control signal according to an at least sensing result to measure an at least equipment energy characteristic at least logic circuit in a System on Chip/SoC.Control unit receives control signal and adjusted at least one at least operating frequency of a logic circuit and operating voltage.In addition, the present invention also provides a kind of System on Chip/SoC and voltage and frequency adjusting method.

Description

Voltage and frequency adjusting device, System on Chip/SoC and voltage and frequency adjusting method
Technical field
The invention relates to a kind of power management of system, the operating voltage and frequency of more particularly a kind of System on Chip/SoC Management, and related voltage and frequency adjusting device and its method.
Background technology
Dynamic electric voltage adjusts (Dynamic Voltage and Frequency Scaling, DVFS) technology with frequency A kind of power management techniques in calculator structure.DVFS technologies can improve or reduce according to the real-time behaviour in service of processor Supply voltage, wherein voltage, which reduce, can be used to save electric power, the particularly field in pen electricity and running gear;Voltage is improved then may be used For promoting the treatment efficiency of related chip.In addition, in some cases, the reduction of voltage can also increase whole electronic installation System dependability.
Traditional DVFS technologies can be realized by the application program in processor.However, chip is pre- in the design phase The efficiency when efficiency estimated and actual use is discrepant, the traditional simple application software method of DVFS technologies, and can not root Most suitable operating voltage/frequency gear is given according to efficiency during chip actual operation, causes the system effectiveness of electronic installation Loss.
The content of the invention
According to an embodiment of the present invention, there is provided a kind of voltage and frequency adjusting device, it includes processing unit, at least One sensing unit and control unit.An at least sensing unit electric property coupling processing unit.An at least sensing unit is measuring An at least equipment energy characteristic for an at least logic circuit in one System on Chip/SoC, and an at least sensing result is exported to processing unit, Processing unit produces a control signal according to an at least sensing result.Control unit receives control signal and adjusts an at least logic It is at least one in the operating frequency and operating voltage of circuit.
According to an embodiment of the present invention, a kind of System on Chip/SoC is separately provided, it includes an at least logic circuit, at least one Sensing unit and processing unit.An at least sensing unit measures an at least equipment energy characteristic, and exporting for an at least logic circuit An at least sensing result.A processing unit electric property coupling at least sensing unit.Processing unit adjusts at least one according to sensing result It is at least one in the operating frequency and operating voltage of logic circuit.
According to an embodiment of the present invention, then a kind of voltage and frequency adjusting method are provided, to adjust a system core The voltage and/or frequency of an at least logic circuit in piece.Voltage includes with frequency adjusting method and receives an at least logic circuit An at least sensing result for a corresponding at least equipment energy characteristic, and control signal is produced according to an at least sensing result, to control It is at least one in the system at least operating frequency of a logic circuit and operating voltage.
According to said one or multiple embodiments, when measuring logic circuit through sensing unit and being integrated into System on Chip/SoC Actual operation efficiency so that sensing unit can give most suitable operating frequency according to the actual operation efficiency of logic circuit And it is at least one in operating voltage, to optimize chip efficiency.
Brief description of the drawings
Fig. 1 is the present invention on dynamic electric voltage and the block diagram of the related framework of frequency regulation technology.
Fig. 2 is the schematic diagram of the System on Chip/SoC for including voltage and frequency adjusting device of an embodiment of the present invention.
Fig. 3 is the schematic diagram of the System on Chip/SoC for including voltage and frequency adjusting device of another embodiment of the present invention.
Fig. 4 is the System on Chip/SoC and voltage and the schematic diagram of frequency adjusting device of an embodiment of the present invention.
Fig. 5 is the System on Chip/SoC reality according to Fig. 2 to Fig. 4 of present invention voltage and the embodiment of frequency adjusting device Make details.
Fig. 6, which is that the example of the embodiment shown in Fig. 5 is predetermined, to table look-up.
Fig. 7 is the flow chart of the voltage and frequency adjusting method of an embodiment of the present invention.
Embodiment
Some vocabulary has been used among specification and follow-up claim to censure specific component.In art Has usually intellectual, it is to be appreciated that hardware manufacturer may call same component with different nouns.This specification And follow-up claim is in a manner of the difference of title is used as and distinguishes component, but with component functionally Difference is used as the criterion of differentiation.It is open for one in the "comprising" system of specification in the whole text and follow-up claims mentioned in Term, therefore " include but be not limited to " should be construed to.In addition, " electric property coupling " one word is comprising any directly and indirect herein Electrical connection.Therefore, if the first device of described in the text one is electrically coupled to a second device, the first device is represented The second device can be directly electrically connected at, or second dress is electrically connected to indirectly through other devices or connection means Put.
Fig. 1 adjusts (Dynamic Voltage and Frequency for the present invention on dynamic electric voltage and frequency Scaling, DVFS) technology related framework block diagram.As shown in figure 1, in DVFS frameworks 10, processing unit 11 can be by One application program 12 goes the behaviour in service of monitoring logic circuit 13 (such as chip of certain function), then is gone through control unit 14 Regulate and control operating voltage/frequency of logic circuit 13.
However, using application program 12 and most suitable electricity purely can not be given according to the efficiency of chip actual operation Pressure/frequency gear.More specifically, efficiency of the chip in actual operation follows the efficiency estimated in design chips can be It is different.During chip actual operation, its efficiency can be by some changes because of influence, such as technique change (Process Variation) With environment temperature etc..Especially in advanced technologies (such as 28 nanometers or less than 20 nanometers), technique change causes chip actual operation When efficiency and the efficiency drop estimated during design and manufacture it is more and more obvious.For example, process of one group of chip in manufacture In, transistor channel length, semiconductor thickness in each chip may be not quite similar, and cause the saturation current of transistor more It is or less.Therefore, same group of chip be after having manufactured, and the electrical source consumption of each chip and performance speed simultaneously differ.It is if pure The pure gear that chip running is determined with application program 12, has the different chip of speed and is all asked with the same gear come what is controlled Topic, it is unable to reach the optimization of chip efficiency.
In addition, in the system of complexity, different parts also has influence to a certain degree, such as voltage decay to chip (IR drop or Voltage drop) etc..Such as it may be included in System on Chip/SoC (System on Chip, SoC), inside it There are multiple logic circuits 13.It is able to may also be interacted between these logic circuits 13 so that the performance of these logic circuits 13 Estimated performance drop during with manufacturing and designing.Therefore, purely the mode (that is, utilizing application program 12) of software has been used Can not be according to these changes because of and operating voltage/frequency shelves most suitable when being supplied to chip (such as logic circuit 13) actual operation Position.
Fig. 2 is the schematic diagram of the System on Chip/SoC for including voltage and frequency adjusting device of an embodiment of the present invention.Such as Shown in figure, voltage includes processing unit 110, sensing unit 112 and control unit 114 with frequency adjusting device 100.Sensing is single First 112 electric property coupling processing units 110.Sensing unit 112 is measuring the logic circuit 121 in such as System on Chip/SoC 120 An at least equipment energy characteristic, and an at least sensing result S1 is exported to processing unit 110.Processing unit 110 can according to this at least one Sensing result S1 produces control signal C1.Control unit 114 is electrically coupled between processing unit 110 and logic circuit 121, control Unit 114 processed can receive control signal C1 and adjust logic circuit 121 operating frequency and operating voltage in it is at least one.
Above-mentioned " measurement " (measurement) refers to the estimation or survey to a physical quantity (physical quantity) It is fixed, rather than simply monitored (the quantitative measurement of neither one) with software mode.Specifically, above-mentioned " measurement ", is referred to thing The sensing for the amount that can be measured in reason, such as temperature, voltage, transistor speed.Using sensing unit 112 in System on Chip/SoC 120 Logic circuit 121 carry out the measurements of some equipment energy characteristics, can truly and immediately working condition that logic circuit 121 is current Send processing unit 110 to so that processing unit 110 can be according to the actual operational effectiveness of logic circuit 121, through control unit 114 give it is at least one in 121 suitable operating frequency of logic circuit and operating voltage.
It is sayed in more detail, and processing unit 110 can receive the sensing result S1 that sensing unit 112 measures in real time and respond Output control signal C1.In one embodiment, processing unit 110 can be based on the predetermined 118 generation control signal C1 that table look-up.Implement When, the predetermined 118 voltage/frequency information at least corresponding to an equipment energy characteristic that can include logic circuit 121 of tabling look-up.It is for example, pre- Surely table look-up 118 multigroup voltage, temperature and the speed characteristics that can include such as logic circuit 121, and each group voltage, temperature and speed Characteristic has corresponding individual voltage/frequency information respectively so that, can be according to sensing after processing unit 110 receives sensing result S1 As a result S1 and predetermined operating frequency/voltage that 118 decision logic circuits 121 are adapted at present of tabling look-up, and respond output control letter Number C1.
It will be understood that in some embodiments, processing unit 110 also can be by other manner generation to control logic electricity The control signal C1 on road 121, such as can be by there is algorithm to extrapolate operating voltage/frequency gear that logic circuit 121 is adapted at present. Now, processing unit 110 can be not required to table look-up 118 according to predetermined and produce control signal C1.
Fig. 2 is gone back to, control unit 114 can receive control signal C1 and adjust operating frequency and the behaviour of logic circuit 121 Make at least one in voltage.In this way, using the sensing result S1 of sensing unit 112, processing unit 110 is no longer according to logic The efficiency that circuit 121 is estimated when the design phase, give logic circuit 121 and operate gear, but set according to logic circuit 121 After meter manufacture, and the practical operation efficiency after System on Chip/SoC 120 is integrated into, gives logic circuit 121 and suitably operate gear.Change Sentence is talked about, and in logic circuit 121, by technique change and other parts, on being influenceed caused by logic circuit 121, (such as voltage declines Move back) after, processing unit 110 can operation gear that accurately decision logic circuit 121 should be given.Therefore, present embodiment can Optimize the efficiency of logic circuit 121.
In one or more above-mentioned embodiments, logic circuit 121 may be, for example, central processing unit, graphics processor, thing Layer chip is managed, but the present invention is not limited, and wherein physical chip may be, for example, Ethernet port physical layer (Port Physical Layer, PHY) chip, Double Data Rate physical layer (Double Data Rate Physical Layer, DDR PHY) chip etc..In other embodiments, logic circuit 121 can be the IP core of other species (intellectual property core,IP core)。
In said one or multiple embodiments, the equipment energy characteristic of logic circuit 121 may be, for example, voltage characteristic, temperature Characteristic, speed characteristics etc., but the present invention is not limited.Every physical characteristic arrived that can be measured, should all fall into the present invention's Scope.
In said one or multiple embodiments, sensing unit 112 can be voltage sensor, temperature sensor, speed Sensor etc., but the present invention is not limited.The selection of sensing unit 112 can be allocated according to the difference of logic circuit 121.Example As central processing unit and graphics processor running speed are high, area is big and power is big, therefore voltage sensor, temperature can be set simultaneously Sensor and velocity sensor are spent to measure the equipment energy characteristic of central processing unit and graphics processor.And for example ether PHY chip And DDR PHY chips, then can a setting velocity sensor carry out measuring speed characteristic, such as measurement assembly delay (cell Delay) time, rise time (rise time), fall time (fall time), saturation current (Isat) etc..
In said one or multiple embodiments, control unit 114 can include the phase of frequency management and/or voltage management Powered-down road.Furthermore, control unit 114 can be electrically coupled to logic circuit 121 frequency gate control (clock gate) or Power lock control (power gate), with according to the control signal C1 of processing unit 112 adjust logic circuit 121 operating frequency and It is at least one in operating voltage.
In said one or multiple embodiments, predetermined table look-up 118 can be stored in mnemon (not illustrating) in advance, Predetermined 118 are tabled look-up to facilitate processing unit 110 rapidly to access.For example, make a reservation for table look-up 118 to be stored in read-only storage Device (Read-Only Memory, ROM), DRAM (Dynamic Random Access Memory, DRAM), Static random access memory (Static Random-Access Memory, SRAM) or electrical fuse internal memory (electronic Fuse, e-fuse) in.
In said one or multiple embodiments, processing unit 110 may be, for example, microprocessor (Microprocessor), can be used to control or adjust other logic circuits 121 operating frequency and operating voltage at least One.
In said one or multiple embodiments, System on Chip/SoC 120 can be the system core for integrating a variety of key parts and components Piece, such as internal memory, microcontroller, digital signal processor, radio frequency chip, reduced instruction set computer microprocessor.System on Chip/SoC 120 can answer In the electronic installation such as such as pen electricity, table electricity, intelligent mobile phone, digital camera, tablet PC.
Fig. 3 is the schematic diagram of the System on Chip/SoC for including voltage and frequency adjusting device of another embodiment of the present invention. As illustrated, Fig. 3 embodiment place different from Fig. 2 embodiment is that Fig. 3 embodiment has further included simulation Digital conversion unit 116.Analog digital converting unit 116 is electrically coupled between processing unit 110 and sensing unit 112, can To change sensing result S1 as data signal D1.During concrete application, if the sensing result S1 that sensing unit 112 is transmitted is simulation Signal, analog digital converting unit 116 is can pass through by analog signal conversion digital signal D1 so that processing unit 110 can be more smart It is at least one in standard and the rapidly operating frequency of decision logic circuit 121 and operating voltage.
Fig. 4 is the System on Chip/SoC and voltage and the schematic diagram of frequency adjusting device of an embodiment of the present invention.Fig. 4 implementation The mode place different from Fig. 2 to Fig. 3 embodiment is that the control unit 114 in Fig. 4 embodiment is located at outside chip (off-chip).That is, control unit 114 is not in System on Chip/SoC 120.Processing unit 110 passes through and is arranged at system core It is at least one in the operating frequency and operating voltage of the adjustment logic circuit 121 of control unit 114 outside piece 120.Such a implementation Mode can be applied to the logic circuit 121 that itself does not have DVFS technologies so that some logic circuits 121 are being integrated into system core During piece 120, when finding the demand for having voltage/frequency to regulate and control, the mode adjustment of utilized chip outer (off-chip) is patrolled It is at least one in the operating frequency and operating voltage of volume circuit 121.
Further, it should be appreciated that arrive, in the embodiment illustrated in fig. 4,116 visual actual demand of analog digital converting unit selectivity Setting.Such as the signal of sensing unit 112 if analog signal when, analog digital converting unit 116 can help processing unit 110 interpretation sensing result S1, therefore it is necessary component that analog digital converting unit 116, which is not,.In addition, sensing unit 112 It may be arranged on originally among logic circuit 121, when manufacturing system chip 120, it is only necessary to be connected to processing unit 110, without the extra sensing unit 112 of the setting among voltage and frequency adjusting device 100.
Fig. 5 is the System on Chip/SoC implementation according to Fig. 2 of the present invention to Fig. 4 voltage and the embodiment of frequency adjusting device Details.As illustrated, System on Chip/SoC 200 includes central processing unit 202, graphics processor 204 and physical chip 206.In Central processor 202 and graphics processor 204 are due to for high speed Wise property core, and area is big, power is big, therefore central processing Device 202 and graphics processor 204 have the demand of speed sensitive, voltage sensing and temperature sensing respectively.Physical chip 206 Data transfer is can be used to, the demand for having speed sensitive.
Fig. 5 is refer to, System on Chip/SoC 200 includes multiple sensing units, such as includes the first temperature sensor 208 and second Temperature sensor 210, first voltage sensor 212, second voltage sensor 214, First Speed sensor 216, second speed Sensor 218 and third speed sensor 220.During first temperature sensor 208 is respectively adjacent to second temperature sensor 210 Central processor 202 and graphics processor 204 are set, to sense the operation temperature of central processing unit 202 and graphics processor 204 Degree, and produce respectively the temperature characterisitic of corresponding central processing unit 202 and graphics processor 204 the first sensing result S11, S12.First voltage sensor 212 distinguishes electric property coupling central processing unit 202 and graphics processor with second voltage sensor 214 204, to sense the operating voltage of central processing unit 202 and graphics processor 204, and produce the second sensing result S21, S22. First Speed sensor 216, second speed sensor 218 and third speed sensor 220 distinguish electric property coupling central processing Device 202, graphics processor 204 and physical chip 206, and the 3rd sensing result S31, S32, S33 is produced respectively.
Fig. 5 is refer to, in some embodiments, System on Chip/SoC 200 can also include the first Analog-digital Converter The ADC units 224 of (Analog-to-Digital Converter, ADC) unit 222 and the 2nd.First ADC units, 222 electrical coupling It is connected between the first temperature sensor 208 and processing unit 201, the 2nd ADC units 224 are electrically coupled to second temperature sensing Device 210 and processing unit 201.First ADC units 222 and the 2nd ADC units 224 can be by the first temperature sensors 208 and The analog signal of two temperature sensors 210 switchs to data signal, and to facilitate processing unit 201, fast and accurately interpretation first is felt Survey result S11, S12.It is to be understood that in other embodiments, analog digital converting unit also can be used to change other classes The analog signal of shape sensor, and it is not limited to the first temperature sensor 208 and second temperature sensor 210.It is in addition, real in part Apply in mode, the analog signal that processing unit 201 also can directly received by interpretation.That is, the first ADC units 222 and second ADC units 224 are optionally set, and non-essential component.
, can be according to a predetermined 226 generations control letter of tabling look-up after processing unit 201 receives the sensing result of each sensor Number.Fig. 6 is refer to, it, which is that the example of the embodiment shown in Fig. 5 is predetermined, tables look-up 226.As shown in fig. 6, predetermined table look-up 226 includes Central processing unit (Central Processing Unit, CPU) 202, graphics processor (Graphics Processing Unit, GPU) 204 and physical layer (Physical Layer, PHY) chip 206 multigroup equipment energy characteristic information, such as voltage (millivolt/mV), temperature (Celsius/DEG C) and speed (millisecond/ms) characteristic, wherein speed characteristics are by taking time delay as an example, its generation The time delay of a component (such as phase inverter in a ring oscillator) in watch core piece.It is predetermined to table look-up 226 also Include output gear information, that is, each voltage, temperature voltage (millivolt/mV) corresponding with speed characteristics difference and frequency (MHz) information.
In one embodiment, if the first temperature that processing unit 201 receives the associated of central processing unit 202 passes The sensing result S11 of sensor 208, the first, second of first voltage sensor 212 and First Speed sensor 216 and the 3rd, S21 and S31.Then processing unit 201 can compare first, second and the 3rd sensing result S11, S21 and S31 with predetermined table look-up 226 In equipment energy characteristic whether coincide, if there is identical equipment energy characteristic information, processing unit 201 can be according to this equipment energy characteristic information Corresponding output gear information produces the first control signal C11, to control the operating voltage of central processing unit 202 and/or behaviour Working frequency.
During implementation, if first, second and the 3rd sensing result S11, S12 and S13 and the predetermined device tabled look-up in 226 it is special Property not coincide, then processing unit 201 can still determine export gear.For example, if processing unit 201 from first, second It is 900mV/80 DEG C/1.18ms to receive voltage/temperature/velocity information with the 3rd sensing result S11, S12 and S13, then handles The corresponding output gear 1050mV/750 (MHz) that the meeting selection device characteristic information of unit 201 is 900mV/80 DEG C/1.15ms, and Using 1050mV/750 (MHz) as operating voltage/frequency of central processing unit 202, to avoid the frequency of central processing unit 202 too fast And cause to overheat.
In said one or multiple embodiments, predetermined table look-up 118 or 226 can carry out voltage according to chip development personnel With being stored in after the experiment and adjustment of frequency in internal memory (not illustrating), but the present invention is not limited.In other embodiments, in advance Surely tabling look-up 118 or 226 also can be judged and be stored in memory by user in advance.
Fig. 5 is gone back to, according to first, second and the 3rd sensing result S11, S12, S21, S22, S31, S32, S33, processing Unit 201 can produce first, second and the 3rd control signal C11, C12 and C13.First, second and the 3rd control signal C11, C12 and C13 can be separately input into first, second and the 3rd control unit 228,230,232.First, second and the 3rd controls list Member 228,230,232 can control central processing unit 202, graphics processor 204 and the operating voltage of phy chip layer 206 respectively And/or operating frequency, wherein the second control unit 230 may be disposed at outside System on Chip/SoC 200, it is similar to Fig. 4 embodiment Outer (off-chip) framework of described chip.
Please continue to refer to Fig. 5, in some embodiments, processing unit 201 can be gone in monitoring by an application program 234 The behaviour in service of central processor 202, graphics processor 204 and physical chip 206, similar to Fig. 1 example.Namely Say, the voltage disclosed in Fig. 2 of the present invention to Fig. 4 and frequency adjusting device 100 be not with software supervision (and by application program 234) mode conflicts.It should be appreciated, however, that when user is given more than central processing unit 202, figure through application program 234 Shape processor 204 or physical chip 206 can load operating voltage and/or operating frequency when, disclosed voltage With frequency adjusting device 100 by with the behaviour for preferentially regulating and controlling central processing unit 202, graphics processor 204 or physical chip 206 Make the right of voltage and/or operating frequency.For example, if user is during to the overclocking of central processing unit 202, if First temperature sensor 208 senses high temperature, then processing unit 201 can be preferentially to the frequency reducing of central processing unit 202.
In addition, in some embodiments, if user raises the operation frequency of some logic circuit through application program 234 Rate, such as the operating frequency of raised central processor 202.Now, unit 201 can pass through described in internal calculation mechanism prediction in place The temperature potential of central processing unit 202 must raise, therefore can be in advance through for example predetermined 226 decision central processing units of tabling look-up 202 suitable gears, to optimize or maximize the efficiency of central processing unit 202.
Please continue to refer to Fig. 5, in some embodiments, System on Chip/SoC 200 can pass through a power management chip (Power Management IC, PMIC) the 236 multigroup initial voltage V of offer1、V2、VnInto System on Chip/SoC 200, to drive system chip The different logic circuit in 200 inside, such as central processing unit 202, graphics processor 204, physical chip 206, processing unit 201st, mnemon (not illustrating) etc..In one embodiment, power management chip 236 can be integrated in System on Chip/SoC 200.
Fig. 7 is the flow chart of the voltage and frequency adjusting method of an embodiment of the present invention.This voltage and frequency adjustment side Method can be used to adjust the voltage and/or frequency of at least logic circuit 121 in System on Chip/SoC 120 or 200, such as by earlier figures System on Chip/SoC 120 or 200 shown in 2 to Fig. 5 is implemented.Voltage is described as follows with frequency adjusting method 300.
In step 302, at least one sensing knot corresponding with an at least equipment energy characteristic for an at least logic circuit 121 is received Fruit.In step 304, control signal is produced according to an at least sensing result, to control an at least logic circuit 121 It is at least one in operating frequency and operating voltage.It refer to Fig. 2 to Fig. 5, during implementation, step 302 can be by one with step 304 Or multiple processing units 110 or 201 are realized.
In some embodiments, at least the number of a sensing result is multiple, and voltage can with frequency adjusting method 300 Also include step 301:Measure the equipment energy characteristic of an at least logic circuit 121.Equipment energy characteristic may be, for example, temperature characterisitic, voltage spy Property and/or speed characteristics, but the present invention is not limited.It refer to Fig. 2 to Fig. 5, during implementation, step 301 can be by sensing unit 112 realize, such as, but not limited to temperature sensor, voltage sensor and velocity sensor.
In some embodiments, producing the step 304 of control signal can also include:Predetermined 118 or 226 are tabled look-up based on one Produce control signal C1.It refer to Fig. 6, it is predetermined to table look-up 226 to wrap the voltage characteristic of each logic circuit, temperature special during implementation Voltage/frequency information corresponding to property, speed characteristics.
In summary, one or more embodiments of the present invention disclose the voltage and frequency control apparatus in System on Chip/SoC And its numerous embodiments of method.Specifically, one or more above-mentioned embodiment party are to pass through embedded sensing unit, are measured The equipment energy characteristic of logic circuit so that processing unit can be given suitable according to performance of the logic circuit in System on Chip/SoC Operating frequency and operating voltage in it is at least one.Compared to operating frequency and the behaviour for only regulating and controlling logic circuit with software mode Make at least one mode in voltage, due to such as temperature, voltage, speed of the logic circuit in System on Chip/SoC can not be learnt Deng equipment energy characteristic, therefore more conservative mode can only be taken, be not superheated to principle go regulate and control logic circuit operating frequency and It is at least one in operating voltage.Therefore, the voltage and FREQUENCY CONTROL in the System on Chip/SoC of one or more embodiments of the invention Devices and methods therefor, it can further optimize the efficiency of logic circuit.
However, the foregoing is only illustrative, rather than it is restricted person.Any spirit and scope without departing from the present invention, And the equivalent modifications carried out to it or change, it is intended to be limited solely by rear attached claim.
Symbol description
10:DVFS frameworks
11:Processing unit
12:Application program
13:Logic circuit
14:Control unit
100:Voltage and frequency adjusting device
110:Processing unit
112:Sensing unit
114:Control unit
116:Analog digital converting unit
118:It is predetermined to table look-up
120:System on Chip/SoC
121:Logic circuit
200:System on Chip/SoC
201:Processing unit
202:Central processing unit
204:Graphics processor
206:Physical chip
208:First temperature sensor
210:Second temperature sensor
212:First voltage sensor
214:Second voltage sensor
216:First Speed sensor
218:Second speed sensor
220:Third speed sensor
222:First ADC units
224:2nd ADC units
226:It is predetermined to table look-up
228:First control unit
230:Second control unit
232:3rd control unit
234:Application program
236:Power management chip
300:Voltage and frequency adjusting method
301、302、304:Step
S1:Sensing result
S11、S12:First sensing result
S21、S22:Second sensing result
S31、S32、S33:3rd sensing result
C1:Control signal
C11:First control signal
C12:Second control signal
C13:3rd control signal
D1:Data signal
V1、V2、Vn:Initial voltage

Claims (10)

1. a kind of voltage and frequency adjusting device, comprising:
One processing unit;
An at least sensing unit, the electric property coupling processing unit, an at least sensing unit is measuring in a System on Chip/SoC An at least equipment energy characteristic for an at least logic circuit, and an at least sensing result is exported to the processing unit, the processing unit root A control signal is produced according to an at least sensing result;And
One control unit, receive the control signal and the operation frequency of an at least logic circuit is adjusted according at least to the control signal It is at least one in rate and operating voltage.
2. voltage according to claim 1 and frequency adjusting device, wherein an at least sensing unit pass comprising a voltage Sensor, a temperature sensor are with least one in a velocity sensor, and wherein it is special to include a voltage for an at least equipment energy characteristic Property, a temperature characterisitic with it is at least one in a speed characteristics.
3. voltage according to claim 1 and frequency adjusting device, the wherein processing unit compare at least one sensing knot Fruit with one it is predetermined table look-up, to produce the control signal, wherein this it is predetermined table look-up comprising an at least logic circuit this at least one Voltage/frequency information corresponding to equipment energy characteristic.
4. a kind of System on Chip/SoC, comprising:
An at least logic circuit;
An at least sensing unit, an at least equipment energy characteristic for an at least logic circuit is measured, and export an at least sensing result; And
One processing unit, an electric property coupling at least sensing unit, the processing unit according to the sensing result adjust this at least one It is at least one in the operating frequency and operating voltage of logic circuit.
5. System on Chip/SoC according to claim 4, wherein an at least logic circuit include a central processing unit, a figure It is at least one in processor, a physical chip.
6. System on Chip/SoC according to claim 5, wherein an at least logic circuit comprise at least the central processing unit with The graphics processor, and the number of an at least sensing unit is multiple, multiple sensing units include multiple temperature sensors, should Multiple temperature sensors are respectively adjacent to the central processing unit and set with the graphics processor.
7. System on Chip/SoC according to claim 5, wherein an at least logic circuit comprise at least the central processing unit with The graphics processor, and the number of an at least sensing unit is multiple, multiple sensing units include multiple voltage sensors, should Multiple voltage sensor difference electric property coupling central processing units and the graphics processor.
8. System on Chip/SoC according to claim 5, wherein an at least logic circuit include the central processing unit, the figure Processor and the physical chip, and the number of an at least sensing unit is multiple, and multiple sensing units include multiple speed Spend sensor, the plurality of velocity sensor difference electric property coupling central processing unit, the graphics processor and the physical layer core Piece.
9. a kind of voltage and frequency adjusting method, to adjust at least voltage of a logic circuit in a System on Chip/SoC and/or Frequency, the voltage adjusting method include:
Receive an at least sensing result corresponding with an at least equipment energy characteristic for an at least logic circuit;And
One control signal is produced according to an at least sensing result, to control at least operating frequency of a logic circuit and the behaviour Make at least one in voltage.
10. voltage according to claim 9 and frequency adjusting method, the number of a wherein at least sensing result is more Individual, the voltage also includes with frequency adjusting method:
Measure a temperature characterisitic of an at least logic circuit, a voltage characteristic divides with least one in a speed characteristics Do not produce to should temperature characterisitic one first sensing result, to should voltage characteristic one second sensing result, and correspondingly One the 3rd sensing result of the speed characteristics.
CN201610740955.XA 2016-08-26 2016-08-26 Voltage and frequency adjusting device, System on Chip/SoC and voltage and frequency adjusting method Pending CN107783628A (en)

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