CN107769787B - DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof - Google Patents

DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof Download PDF

Info

Publication number
CN107769787B
CN107769787B CN201710929252.6A CN201710929252A CN107769787B CN 107769787 B CN107769787 B CN 107769787B CN 201710929252 A CN201710929252 A CN 201710929252A CN 107769787 B CN107769787 B CN 107769787B
Authority
CN
China
Prior art keywords
circuit
differential
audio
single channel
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201710929252.6A
Other languages
Chinese (zh)
Other versions
CN107769787A (en
Inventor
孙建辉
刘子函
周勇
黄发忠
张紫晗
杨志政
董尧尧
王晓菲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shandong Normal University
Original Assignee
Shandong Normal University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shandong Normal University filed Critical Shandong Normal University
Priority to CN201710929252.6A priority Critical patent/CN107769787B/en
Publication of CN107769787A publication Critical patent/CN107769787A/en
Application granted granted Critical
Publication of CN107769787B publication Critical patent/CN107769787B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

The invention discloses a DAC driving circuit after audio decoding and a driving method thereof, wherein the circuit comprises a digital part and an analog part; the digital part comprises a sampling filter circuit, a noise shaping circuit and a random generator which are sequentially connected, the analog part comprises a clock generator and a differential stereo output driver, the differential stereo output driver comprises two paths of same single channels, and each single channel utilizes a push-pull current mechanism to output voltage; each path of the single channel can transmit current with an adaptive value and can generate corresponding resolution and differential voltage by combining with the on-chip resistance of the path. The invention has the advantages of simple circuit structure, good noise immunity, flexible configuration and stable performance, and solves the problems of complex structure and low reusability of the traditional circuit.

Description

DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof
Technical Field
The invention relates to the field of data processing, in particular to a DAC (digital-to-analog converter) driving circuit after audio decoding and a driving method thereof.
Background
Analog audio and digital audio are two signal forms of audio data, and when the audio needs to be played, a decoded digital voice signal needs to be converted into an analog signal. At present, a DAC circuit for converting a digital voice signal into an analog signal focuses on how to simplify the circuit structure, improve the anti-interference capability, and reduce the cost.
However, these digital-to-analog signal circuits also have certain problems, which are mainly reflected in: the DAC circuit is single, a plurality of circuits with advantages can be integrated on one circuit by few inventions, and some circuits are relatively complex in structure, high in hardware cost, low in anti-interference capability and low in reusability.
The invention patent application of the zhahai sback electronic equipment limited with the patent application number of '201621195237.0' discloses a novel audio double-decoding digital-to-analog conversion circuit, wherein a left channel output circuit and a right channel output circuit both adopt digital-to-analog conversion chips in a single channel mode to convert digital audio signals input by a signal source into audio current output signals, and the audio double-decoding digital-to-analog conversion circuit has good anti-interference performance, but is complex in circuit and difficult to realize.
The invention discloses a digital audio-to-analog audio conversion circuit which is invented by Dajie Industrial development Limited company with the patent application number of '201420391139.9', and the circuit realizes that the corresponding analog audio data is obtained after audio format decoding and analog-to-digital conversion are carried out on the digital audio data through a simple structure, and has simple hardware circuit but poor anti-interference performance.
The invention of Sichuan and core microelectronics GmbH with patent application number of '201410019248.2' applies for 'audio digital-to-analog conversion circuit', which improves the signal-to-noise ratio and precision of the audio digital-to-analog conversion circuit and reduces harmonic distortion, but the circuit structure is complex and the cost is high.
In summary, in the prior art, an effective solution is still lacking for the problems of complex circuit implementation, low interference immunity, low reusability, high hardware cost, and the like.
Disclosure of Invention
The invention provides a DAC driving circuit after audio decoding and a driving method thereof in order to solve the problems.
In order to achieve the purpose, the invention adopts the following technical scheme:
a DAC driving circuit after audio decoding, the circuit includes digital part and analog part; the digital part comprises a sampling filter circuit, a noise shaping circuit and a random generator which are sequentially connected, the analog part comprises a clock generator and a differential stereo output driver, the differential stereo output driver comprises two paths of same single channels, and each single channel utilizes a push-pull current mechanism to output voltage; in addition, the invention integrates the structure into the same chip, has small volume and light weight, and is beneficial to batch production.
Furthermore, each single channel is provided with an on-chip resistor, the on-chip resistors are connected with the reference voltage, and the positions of the on-chip resistors in the single channel can symmetrically absorb or supply current so as to adapt to the access of an external amplifier circuit when the reference voltage value changes.
Furthermore, the two identical single channels are respectively a left channel and a right channel, the left channel and the right channel are driven together to output a differential voltage, and the output value of the differential voltage is up-down floated at the reference voltage value.
Further, each single channel is a 7-bit DAC, and a push-pull current mechanism is used for outputting voltage, and the principle that the single channel (left channel or right channel) is output based on the push-pull mechanism is as follows: two pull-up networks with the same parameters are connected with a pull-down network, when the circuit works, only one of the two symmetrical networks works at a time, and the two symmetrical networks are alternately started, so that output is generated.
Further, the switching circuit is controlled and generated by a random generator of the digital part.
Further, the frequency of audio sampling Fs of the circuit is 48 KHz; the clock frequency is 6 × 128 × Fs — 36.864 MHz; an input interface: a parallel 16bit data bus.
Further, the resistance value of the on-chip resistor is 570ohms, the resolution is 57mV, and the differential voltage is 800 mV.
Further, the adaptive value of the current that each branch path of the single channel can deliver is 100 uA.
A driving method based on the DAC driving circuit after audio decoding comprises the following steps:
1) the digital part samples the decoded audio signal and carries out filtering set denoising treatment, and meanwhile, a random generator generates a random number to control the switch on and off;
2) the clock generator of the analog part provides an initialized clock signal, and each single channel of the differential stereo output driver transmits signals in the form of current and generates corresponding resolution and differential output voltage by combining with the on-chip resistor of the differential stereo output driver.
Further, in the step 1), the frequency Fs of audio sampling of the circuit is 48 KHz;
further, in step 2), the clock frequency of the clock generator is 6 × 128 × Fs — 36.864 MHz.
Compared with the prior art, the invention has the beneficial effects that:
(1) the digital-to-analog DAC driving circuit after audio decoding is simple in circuit implementation, small in size and light in weight due to the fact that an integrated chip is adopted, cost is saved, and production efficiency is improved.
(2) By adopting circuits such as sampling filtering, noise shaping and the like, the noise can be effectively removed, the reliability is higher, and the problem of poor noise immunity of the traditional circuit is solved; the circuit is simple in overall structure, flexible in configuration and stable in performance, and solves the problems of complex structure and low reusability of the traditional circuit.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application.
FIG. 1 is a schematic block diagram of the present invention;
fig. 2 is a single-channel output circuit based on a push-pull mechanism of the present invention.
The specific implementation mode is as follows:
the invention is further described with reference to the following figures and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
As described in the background of the invention, the prior art has shortcomings, and in order to solve the above technical problems, the present application provides an audio decoding digital-to-analog DAC circuit core.
As shown in fig. 1, in the Digital-to-analog DAC circuit core after audio decoding of this embodiment, the Digital Part (Digital Part) includes a sampling filter Part, a noise shaping Part, and a randomizer, and a voice sampling frequency "Fs ═ 48 KHz"; the clock frequency is "6 × 128 × Fs ═ 36.864 MHz"; the input interface adopts a parallel 16-bit data bus.
The sampling Filter circuit 'Oversampling Filter' can change the distribution of noise, reduce the noise in the bandwidth of useful signals, and then Filter out the noise through a low-pass Filter, thereby improving the time domain resolution and obtaining better time domain waveform;
the Noise shaping circuit 'Noise Shaper' can control the spectral distribution shape of Noise, thereby reducing the influence of the Noise on signals;
the Randomizer generates random numbers for the switches "in fig. 2 to control the closing thereof.
As shown in fig. 1, the audio decoded digital-to-Analog DAC circuit core of the present invention, the Analog Part (Analog Part) includes a clock generator and a differential stereo output driver:
the Clock Generator "is used to provide an initialization Clock signal;
a Differential Stereo Output Driver' whose basic structure is shown in fig. 2, comprises two identical channels (Stereo Output), each channel (i.e. each single channel) being a 7-bit-DAC Output; ROUT + and ROUT- (right channel), and the other LOUT + and LOUT- (left channel) drive to output a differential output voltage around the reference voltage VREF, the peak-to-peak voltage of the output is 800mVPP (typical value), wherein the switch "switches" is generated by any random number generator "Randomizer" module control of the digital part, each branch path (sink or source path) of a single channel can transmit 100uA of current, and combined with 570ohms of resistance on the chip, a differential output voltage of 57mv and 800mVPP is generated.
As shown in fig. 2, the principle of the output of the single channel (left channel or right channel) based on the push-pull mechanism is as follows: two pull-up networks with the same parameters are connected with a pull-down network, when the circuit works, only one of the two symmetrical networks works at a time, and the two symmetrical networks are alternately started, so that output is generated.
The digital-to-analog DAC driving circuit after audio decoding of the present embodiment includes a digital part and an analog part:
the digital part comprises an oversampling filtering part, a noise shaping part and a randomness generator;
the analog part comprises two identical channels (stereo output), each channel (namely each single channel) is a 7-bit DAC, and the voltage is output by using a push-pull current mechanism; each chip on each channel (left channel/right channel) has 2 resistors (each resistor R is 570Ohms) connected to a reference voltage (VREF is VCC/2, when VCC is 3.3V, the reference voltage is typically 1.65V as a common mode voltage);
each branch path (sink or source path) of a single channel can carry 100uA of current and, in combination with a 570ohm resistor on the chip, produces a differential output voltage of 57mv resolution and 800 mVPP.
The circuit of the invention is simple to realize, and simultaneously adopts an integrated chip, thereby having small volume, light weight, saving cost and improving production efficiency. In addition, the circuit is flexible in configuration and stable in performance, and solves the problems of complex structure and low reusability of the traditional circuit.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.

Claims (4)

1. A DAC driving circuit after audio decoding, characterized in that: comprises a digital part and an analog part; the digital part comprises a sampling filter circuit, a noise shaping circuit and a random generator which are sequentially connected, the analog part comprises a clock generator and a differential stereo output driver, the differential stereo output driver comprises two paths of same single channels, and each single channel utilizes a push-pull current mechanism to output voltage; each path of circuit of the single channel can transmit current with an adaptive value and can generate corresponding resolution and differential voltage by combining with on-chip resistance of the circuit;
each single channel is a 7-bit DAC, and a push-pull current mechanism is utilized to output voltage;
the frequency of audio sampling Fs of the circuit is 48 KHz; the clock frequency was 6 × 128 × Fs =36.864 MHz; an input interface: a parallel 16bit data bus;
the two identical single channels are respectively a left channel and a right channel, the left channel and the right channel are driven together to output a differential voltage, and the output value of the differential voltage is floated up and down at a reference voltage value;
the distribution of noise is changed through a sampling filter circuit, and the noise is reduced within the bandwidth of a useful signal; controlling the spectral distribution shape of the noise through a noise shaping circuit; the random generator is used for generating random numbers for the switches in the differential stereo output driver so as to control the switches to be closed;
each single channel is provided with an on-chip resistor, the on-chip resistors are connected with reference voltage, and the positions of the on-chip resistors in the single channel can symmetrically absorb or supply current so as to adapt to the access of an external amplifier circuit when the reference voltage value changes;
the single channel is output based on a push-pull mechanism: two pull-up networks with the same parameters are connected with a pull-down network, when the circuit works, only one of the two symmetrical networks works at a time, and the two symmetrical networks are alternately started, so that output is generated.
2. The audio-decoded DAC driving circuit according to claim 1, wherein: the resistance value of the on-chip resistor is 570ohms, the resolution is 57mV, and the differential voltage is 800 mV.
3. The audio-decoded DAC driving circuit according to claim 1, wherein: the current of the adaptation value that each way of the single channel can convey is 100 uA.
4. An audio-decoded DAC driving method applied to the audio-decoded DAC driving circuit as claimed in any one of claims 1-3, wherein: the method comprises the following steps:
1) the digital part samples the decoded audio signal and carries out filtering set denoising treatment, and meanwhile, a random generator generates a random number to control the switch on and off;
2) the clock generator of the analog part provides an initialized clock signal, and each single channel of the differential stereo output driver transmits signals in the form of current and generates corresponding resolution and differential output voltage by combining with the on-chip resistor of the differential stereo output driver.
CN201710929252.6A 2017-10-09 2017-10-09 DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof Expired - Fee Related CN107769787B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710929252.6A CN107769787B (en) 2017-10-09 2017-10-09 DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710929252.6A CN107769787B (en) 2017-10-09 2017-10-09 DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof

Publications (2)

Publication Number Publication Date
CN107769787A CN107769787A (en) 2018-03-06
CN107769787B true CN107769787B (en) 2021-12-03

Family

ID=61267114

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710929252.6A Expired - Fee Related CN107769787B (en) 2017-10-09 2017-10-09 DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof

Country Status (1)

Country Link
CN (1) CN107769787B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1306347A (en) * 2000-01-17 2001-08-01 华为技术有限公司 D/A converter with current helm structure for 12c logic
CN101299610A (en) * 2008-06-16 2008-11-05 湖南大学 High speed digital-analog converter with ten bits current rudder structure
CN101960722A (en) * 2008-03-07 2011-01-26 高通股份有限公司 The equipment and the method that are used for the dynamic circuit element selection of D/A
CN102332866A (en) * 2011-09-07 2012-01-25 豪威科技(上海)有限公司 High-linearity upper mixer

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1115770C (en) * 1999-05-08 2003-07-23 阎文革 Digitalized efficient 1-bit power amplifier
EP2453618B1 (en) * 2010-11-16 2016-09-14 Nxp B.V. Power reduction in switched-current line-drivers
CN104716962A (en) * 2014-12-31 2015-06-17 南京天易合芯电子有限公司 Digital-analog converter unit and current steering type digital-analog converter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1306347A (en) * 2000-01-17 2001-08-01 华为技术有限公司 D/A converter with current helm structure for 12c logic
CN101960722A (en) * 2008-03-07 2011-01-26 高通股份有限公司 The equipment and the method that are used for the dynamic circuit element selection of D/A
CN101299610A (en) * 2008-06-16 2008-11-05 湖南大学 High speed digital-analog converter with ten bits current rudder structure
CN102332866A (en) * 2011-09-07 2012-01-25 豪威科技(上海)有限公司 High-linearity upper mixer

Also Published As

Publication number Publication date
CN107769787A (en) 2018-03-06

Similar Documents

Publication Publication Date Title
TWI641232B (en) Low power switching techniques for digital-to-analog converters
US9344108B2 (en) Device having a delta-sigma modulator and a switching amplifier connected thereto
CN103152673B (en) Digital loudspeaker drive method and device based on quaternary code dynamic mismatch reshaping
JP4747199B2 (en) Architecture using digital / analog converter and low-pass filter with continuous time stage and switched capacitor stage
Kup et al. A bit-stream digital-to-analog converter with 18-b resolution
ATE297623T1 (en) INTERNET GIGABIT ETHERNET TRANSMITTER ARCHITECTURE
US9797932B2 (en) Voltage sampling system
JP2007504754A (en) Ternary pulse width modulation output stage and method and system using the same
CN101540609A (en) Method and apparatus for delta-sigma digital to analog conversion
CN109672444B (en) Ultra-high-speed digital-to-analog converter with multi-channel clock interweaving
CN107769787B (en) DAC (digital-to-analog converter) driving circuit after audio decoding and driving method thereof
CN112994695B (en) High-speed low-power-consumption Sigma-Delta analog-to-digital converter and digital processing unit
JP2012138881A (en) Digital-to-analog conversion device
JP2009507410A (en) Finite impulse response type digital-analog converter
WO2010063592A1 (en) System and method for converting between cml signal logic families
JPH0879186A (en) Optical transmission circuit, optical reception circuit, and optical transmission/reception circuit
CN115208406A (en) Hybrid digital-analog conversion circuit, chip and conversion method
CN1344437A (en) 1Bit-digital-analog converter circuit
CN218676026U (en) LVDS signal isolation circuit structure
US9213761B1 (en) Electronic systems and methods for integrated, automatic, medium-quality audio
US12015447B2 (en) Microcontroller and signal modulation method
CN215120828U (en) Video fusion gateway based on digital video conference system
WO2003023970A2 (en) Serial data interface with reduced power consumption
CN112929780B (en) Audio chip and earphone of noise reduction processing
CN111865322B (en) Sum-difference analog-to-digital converter and operation method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20211203