CN107768236B - Method for preparing polycrystalline silicon layer, polycrystalline silicon thin film transistor and preparation method thereof, array substrate and display device - Google Patents
Method for preparing polycrystalline silicon layer, polycrystalline silicon thin film transistor and preparation method thereof, array substrate and display device Download PDFInfo
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- CN107768236B CN107768236B CN201711020536.XA CN201711020536A CN107768236B CN 107768236 B CN107768236 B CN 107768236B CN 201711020536 A CN201711020536 A CN 201711020536A CN 107768236 B CN107768236 B CN 107768236B
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 105
- 238000000034 method Methods 0.000 title claims abstract description 64
- 239000010409 thin film Substances 0.000 title claims abstract description 35
- 239000000758 substrate Substances 0.000 title claims abstract description 32
- 238000002360 preparation method Methods 0.000 title abstract description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 70
- 230000009471 action Effects 0.000 claims abstract description 13
- 238000000059 patterning Methods 0.000 claims abstract description 12
- 238000005224 laser annealing Methods 0.000 claims abstract description 9
- 229920005591 polysilicon Polymers 0.000 claims description 45
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- 238000004519 manufacturing process Methods 0.000 claims description 6
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- 239000010410 layer Substances 0.000 description 106
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- 230000015572 biosynthetic process Effects 0.000 description 2
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- 229910052739 hydrogen Inorganic materials 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
Abstract
The invention provides a method for preparing a polycrystalline silicon layer, a polycrystalline silicon thin film transistor and a preparation method thereof, an array substrate and a display device. The method for preparing the polycrystalline silicon layer comprises the following steps: forming an amorphous silicon layer having a first surface provided with a plurality of protrusion portions and groove portions alternating with each other; performing excimer laser annealing treatment on the amorphous silicon layer to obtain a prefabricated polycrystalline silicon layer; and patterning the prefabricated polycrystalline silicon layer to obtain a polycrystalline silicon layer, wherein the amorphous silicon layer corresponding to the groove part can be completely melted under the action of the excimer laser, and the amorphous silicon layer corresponding to the bulge part is partially melted under the action of the excimer laser. The inventors found that the unmelted portion in the convex portion can act as a seed crystal, thereby guiding the melted portion to grow along a predetermined crystal direction, so that the obtained polycrystalline silicon has a uniform grain growth direction and a large grain size.
Description
Technical Field
The invention relates to the technical field of display, in particular to a method for preparing a polycrystalline silicon layer, a polycrystalline silicon thin film transistor and a preparation method thereof, an array substrate and a display device.
Background
At present, a method for preparing a polycrystalline silicon layer adopts an excimer laser annealing process, the process method is to perform excimer laser annealing on amorphous silicon with a uniform film layer, but the growth of the polycrystalline silicon has no fixed direction by using the method, so that the crystal orientation of the formed polycrystalline silicon is not very regular, and the uniformity degree of the grain size of the polycrystalline silicon is not very good.
Thus, the current method for preparing the polysilicon layer still needs to be improved.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, an object of the present invention is to provide a method for preparing a polysilicon layer, which is simple in operation or can obtain a polysilicon layer having good grain direction uniformity.
In one aspect of the invention, a method of preparing a polysilicon layer is provided. According to an embodiment of the invention, the method comprises: forming an amorphous silicon layer having a first surface provided with a plurality of protrusion portions and groove portions alternating with each other; performing excimer laser annealing treatment on the amorphous silicon layer to obtain a prefabricated polycrystalline silicon layer; and patterning the prefabricated polycrystalline silicon layer to obtain a polycrystalline silicon layer, wherein the amorphous silicon layer corresponding to the groove part can be completely melted under the action of the excimer laser, and the amorphous silicon layer corresponding to the bulge part is partially melted under the action of the excimer laser. The inventor finds that the projecting part and the groove part with different thicknesses are formed on the amorphous silicon film layer, the amorphous silicon layer with smaller thickness and corresponding to the groove part can be completely melted under the action of excimer laser, the amorphous silicon layer with larger thickness and corresponding to the projecting part is partially melted, so that the polycrystalline silicon forming process has gradient, the polycrystalline silicon with small thickness and complete melting can grow towards the direction of partial melting amorphous silicon subcrystal, the growing direction of crystal grains can be ensured, the formation of large-size crystal grains is facilitated, and the method is simple and convenient to operate and easy to realize.
According to an embodiment of the present invention, the patterning process is to remove the amorphous silicon layer corresponding to the groove portion. Therefore, the method is simple to operate and easy to realize, the finally obtained polycrystalline silicon layer has good crystal orientation consistency and larger grain size, and the service performance of the polycrystalline silicon layer is improved.
According to an embodiment of the invention, the patterning is performed by etching. Therefore, the operation is simple and convenient, and the realization is easy.
According to an embodiment of the present invention, a thickness of the amorphous silicon layer corresponding to the groove portion is equal to or less than
The thickness of the amorphous silicon layer corresponding to the convex part is larger than that of the amorphous silicon layer
Thus, in the standardUnder the action of molecular laser, the amorphous silicon layer corresponding to the groove part can be completely melted, and the amorphous silicon layer corresponding to the protrusion part is partially melted, so that the growing environment of crystal grains is of a gradient structure, and the partially melted amorphous silicon is used as a sub-crystal to guide the growth of polycrystalline silicon, so that the amorphous silicon can form a certain crystal orientation during growth, the consistency of the crystal grain direction of the polycrystalline silicon layer of a patterned structure is ensured, and the polycrystalline silicon with larger crystal grain size can be obtained.
According to the embodiment of the present invention, each of the protruding portions has a uniform width in the first direction, and each of the groove portions has a uniform width in the first direction. Therefore, the structure is simple and easy to realize.
According to an embodiment of the present invention, a width of the groove portion in the first direction is 3 to 5 micrometers, and a width of the protrusion portion in the first direction is 1.5 to 3.5 micrometers. Therefore, the structure is simple, the realization is easy, and the polycrystalline silicon with good crystal orientation consistency and larger grain size is favorably formed.
In another aspect of the present invention, the present invention provides a method of manufacturing a polycrystalline silicon thin film transistor. According to an embodiment of the present invention, the active layer of the polysilicon thin film transistor is formed by the method for preparing the polysilicon layer as described above. Therefore, the method is simple and convenient to operate and easy to realize, the crystal orientation of the polycrystalline silicon in the prepared active layer is regular, the consistency is high, the grain size is large, and the polycrystalline silicon thin film transistor containing the active layer has good use performance.
In still another aspect of the present invention, the present invention provides a polycrystalline silicon thin film transistor. According to the embodiment of the invention, the polycrystalline silicon thin film transistor is prepared by the method. The inventor finds that the polycrystalline silicon thin film transistor prepared by the method is simple in structure, easy to realize and good in service performance.
In yet another aspect of the present invention, an array substrate is provided. According to an embodiment of the invention, the array substrate comprises the polysilicon thin film transistor. The inventor finds that the array substrate containing the polycrystalline silicon thin film transistor is simple in structure, easy to implement and good in service performance.
In yet another aspect of the present invention, a display device is provided. According to an embodiment of the present invention, the display device includes the array substrate described above. The inventor finds that the display device comprising the array substrate is simple in structure, easy to realize, good in display effect and capable of greatly improving the consumption experience of consumers.
Drawings
Fig. 1 is a schematic process flow diagram of a process for preparing a polysilicon layer in the prior art.
Fig. 2 to 4 are schematic flow charts of methods for preparing a prefabricated polysilicon layer in the prior art.
Fig. 5 is a schematic process flow diagram for fabricating a polysilicon layer in some embodiments of the invention.
Fig. 6 is a schematic structural diagram of a polysilicon tft with a top gate structure according to some embodiments of the present invention.
Detailed Description
The following describes embodiments of the present invention in detail. The following examples are illustrative only and are not to be construed as limiting the invention. The examples, where specific techniques or conditions are not indicated, are to be construed according to the techniques or conditions described in the literature in the art or according to the product specifications. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products commercially available.
The present invention has been completed based on the following knowledge and findings of the inventors:
the polysilicon layer formed by Excimer Laser Annealing (ELA) is mainly used to form an N-channel or P-channel mos active layer. Referring to fig. 1 and 2, a conventional method for preparing a polysilicon layer includes forming a thicker and uniform amorphous silicon layer 200 on a substrate 100, performing a dehydrogenation process, then performing excimer laser 400 annealing on the amorphous silicon layer 200 to obtain a prefabricated polysilicon layer, and finally performing a patterning process to obtain the polysilicon layer. The crystal orientation of the polycrystalline silicon obtained by the method is not very regular, and the grain size uniformity of the polycrystalline silicon is not very good. However, in order to ensure good uniformity of the grain growth direction of the polysilicon layer of the fine patterned structure formed on the active layer and to ensure a larger grain size, a large amount of polysilicon in a molten state is required to grow on the pattern in a certain direction. The inventor carries out intensive research aiming at the problems and finds that the thickness of an amorphous silicon film layer at an unnecessary position can be reduced to the thickness capable of being completely melted by using process methods such as masking, etching and the like, and then excimer laser annealing is carried out, so that good consistency of the direction of crystal growth can be ensured, and polycrystalline silicon with larger grain size can be obtained.
In view of the above, in one aspect of the present invention, a method of preparing a polysilicon layer is provided. According to an embodiment of the present invention, referring to fig. 3 and 4, the method includes: forming an amorphous silicon layer 200, wherein a plurality of protrusion portions 210 and groove portions 220 are arranged on a first surface 201 of the amorphous silicon layer 200 and alternate with each other; performing excimer laser 400 annealing treatment on the amorphous silicon layer 200 to obtain a prefabricated polycrystalline silicon layer; and patterning the prefabricated polysilicon layer to obtain a polysilicon layer 300, wherein the amorphous silicon layer corresponding to the groove portion 220 can be completely melted under the action of the excimer laser 400, and the amorphous silicon layer corresponding to the protrusion portion 210 is partially melted under the action of the excimer laser 400. The inventor finds that the projecting part and the groove part with different thicknesses are formed on the amorphous silicon film layer, the amorphous silicon layer with smaller thickness and corresponding to the groove part can be completely melted under the action of excimer laser, the amorphous silicon layer with larger thickness and corresponding to the projecting part is partially melted, so that the polycrystalline silicon forming process has gradient, the polycrystalline silicon with small thickness and complete melting can grow towards the direction of partial melting amorphous silicon subcrystal, the growing direction of crystal grains can be ensured, the formation of large-size crystal grains is facilitated, and the method is simple and convenient to operate and easy to realize.
According to an embodiment of the present invention, the thickness of the groove portion and the protrusion portion is not particularly limited as long as amorphous silicon corresponding to the groove portion can be entirely melted to correspond to the protrusion portion after absorption of the excimer laserThe amorphous silicon of (2) is partially melted, and those skilled in the art can flexibly select the amorphous silicon according to actual needs. In some embodiments of the present invention, a thickness of the amorphous silicon layer corresponding to the groove portion is equal to or less than
The thickness of the amorphous silicon layer corresponding to the convex part is larger than that of the amorphous silicon layer
Therefore, under the action of excimer laser, the amorphous silicon layer corresponding to the groove part can be completely melted, and the amorphous silicon layer corresponding to the protrusion part is partially melted, so that the growing environment of crystal grains is of a gradient structure, and the partially melted amorphous silicon can be used as a sub-crystal to guide the growth of polycrystalline silicon, so that the amorphous silicon can form a certain crystal orientation during growth, the consistency of the crystal grain orientation of the polycrystalline silicon layer of a patterned structure is ensured, and the polycrystalline silicon with larger crystal grain size can be obtained.
According to the embodiment of the present invention, the size setting of the groove portion and the protruding portion is not particularly limited, and those skilled in the art can flexibly select the size as needed as long as the requirements can be satisfied. In some embodiments of the present invention, referring to fig. 3, the width of the groove part 220 in the first direction is 3 to 5 micrometers, and the width of the protrusion part 210 in the first direction is 1.5 to 3.5 micrometers. Therefore, the structure is simple, the realization is easy, the widths of the protruding part and the groove part can be adjusted according to actual needs, and the application range is wide.
According to the embodiment of the present invention, the arrangement manner of the groove portions or the protruding portions is not particularly limited, and the widths of each groove portion or each protruding portion in the first direction may be uniform or non-uniform, and a person skilled in the art may flexibly select the groove portions or the protruding portions as needed as long as the requirements are met. In some embodiments of the present invention, referring to fig. 3, each of the protruding portions 210 has a uniform width in the first direction, and each of the groove portions 220 has a uniform width in the first direction. Therefore, the structure is simple and easy to realize.
According to the embodiment of the present invention, the wavelength of the excimer laser is not particularly limited as long as the amorphous silicon corresponding to the groove portion can be completely melted, and those skilled in the art can flexibly select the wavelength according to the actual requirement, and the wavelength may include, but is not limited to, 157nm, 193nm, 248nm, 308nm, 351nm, and the like. In some embodiments of the present invention, the excimer laser has a wavelength of 308 nm. Therefore, the source is wide, the price is low, and the application range is wide.
According to an embodiment of the present invention, the patterning process is to remove the amorphous silicon layer corresponding to the groove portion. Therefore, the method is simple to operate and easy to realize, the finally obtained polycrystalline silicon layer has good crystal orientation consistency and larger grain size, and the service performance of the polycrystalline silicon layer is improved.
According to the embodiment of the present invention, the manner of the patterning process is not particularly limited, and a person skilled in the art may flexibly select the patterning process according to actual needs, for example, the patterning process may include, but is not limited to, etching or cutting, as long as the amorphous silicon layer corresponding to the groove portion can be effectively removed. In some embodiments of the invention, the patterning is performed by etching. Therefore, the operation is simple and convenient, and the realization is easy.
According to the embodiment of the present invention, the etching manner is not particularly limited, and as long as the requirement can be met, a person skilled in the art may flexibly select the etching manner according to the actual requirement, for example, wet etching or dry etching may be included. Wherein, the kind of the wet etching is not particularly limited, and may include, but is not limited to, acid etching or alkali etching, etc.; the kind of the dry etching is also not particularly limited, and may include, but is not limited to, photolithography, sputtering, plasma etching, or the like, for example. Therefore, the method is simple and convenient to operate, easy to realize, good in etching effect and capable of effectively removing the amorphous silicon layer corresponding to the groove portion.
According to the embodiment of the present invention, the hydrogen content in the amorphous silicon is high before the excimer laser annealing treatment is performed, so that the dehydrogenation process is performed on the amorphous silicon layer before or after the protrusion portions and the groove portions are formed alternately with each other on the amorphous silicon layer. The method for preparing a polycrystalline silicon layer according to the present invention is described below by way of example of a dehydrogenation process after forming a protrusion portion and a groove portion alternately with each other on an amorphous silicon layer: specifically, referring to fig. 5, an amorphous silicon layer 200 is formed on a substrate layer 100; forming a first mask plate on the first surface 201 of the amorphous silicon layer 200, forming a plurality of protrusion portions 210 and groove portions 220 alternating with each other on the first surface 201 of the amorphous silicon layer 200 by using an etching process, and then peeling off the first mask plate; removing hydrogen in the amorphous silicon layer 200 by using a dehydrogenation process; then, an excimer laser 400 annealing process is used to completely melt the amorphous silicon corresponding to the groove portion 220 and partially melt the amorphous silicon corresponding to the protrusion portion 210; and then forming a second mask plate on the surface of the groove portion 220, removing amorphous silicon corresponding to the groove portion 220 by using an etching process, and stripping the second mask plate to obtain the polysilicon layer 300. Therefore, the method has the advantages of simple process, convenient operation and easy realization, and can obtain the polycrystalline silicon with good crystal orientation consistency and larger crystal grain size. According to the embodiment of the invention, in order to further simplify the process and reduce the cost, the patterns of the first mask and the second mask can be consistent, so that the same mask can be adopted, and the cost is greatly reduced.
In another aspect of the present invention, the present invention provides a method of manufacturing a polycrystalline silicon thin film transistor. According to an embodiment of the present invention, the active layer of the polysilicon thin film transistor is formed by the method for preparing the polysilicon layer as described above. Therefore, the method is simple and convenient to operate and easy to realize, the crystal orientation of the polycrystalline silicon in the prepared active layer is regular, the consistency is high, the grain size is large, and the polycrystalline silicon thin film transistor containing the active layer has good use performance.
According to the embodiment of the present invention, the structure of the polysilicon thin film transistor is not particularly limited, and a person skilled in the art can flexibly select the structure according to actual needs as long as the requirement can be met, and the structure may include, but is not limited to, a bottom gate structure or a top gate structure, for example. The structure of the polysilicon thin film transistor of the present invention is described below by taking the polysilicon thin film transistor of the top gate structure as an example: specifically, referring to fig. 6, the polysilicon thin film transistor with the top gate structure may include a substrate 11, a light shielding layer 12 disposed on one side of the substrate 11, a buffer layer 13 disposed on one side of the substrate 11 and covering the light shielding layer 12, an active layer 14 disposed on one side of the buffer layer 13 away from the substrate 11, a gate insulating layer 15 disposed on one side of the buffer layer 13 away from the substrate 11 and covering the active layer 14, a gate electrode 16 disposed on one side of the gate insulating layer 15 away from the substrate 11, an interlayer insulating layer 17 disposed on one side of the gate insulating layer 15 away from the substrate 11 and covering the gate electrode 16, and a drain electrode 18 and a source electrode 19 disposed on one side of the interlayer insulating layer 17 away from the substrate 11 and electrically connected to the active layer 14, wherein the active layer 14 has the structure and properties of the polysilicon layer as described above.
According to an embodiment of the present invention, in addition to the active layer formed by the method for preparing a polysilicon layer as described above, the method for preparing a polysilicon thin film transistor further includes other steps and operations that are conventionally necessary for preparing a polysilicon thin film transistor, such as steps of forming a gate electrode, a gate insulating layer, a source/drain electrode, a passivation layer, a planarization layer, and the like, and thus, redundant description is omitted here.
In still another aspect of the present invention, the present invention provides a polycrystalline silicon thin film transistor. According to the embodiment of the invention, the polycrystalline silicon thin film transistor is prepared by the method. The inventor finds that the polycrystalline silicon thin film transistor prepared by the method is simple in structure, easy to realize and good in service performance.
According to an embodiment of the present invention, the polysilicon thin film transistor has the structure and properties of the polysilicon thin film transistor described above, and therefore, redundant description is omitted.
In yet another aspect of the present invention, an array substrate is provided. According to an embodiment of the invention, the array substrate comprises the polysilicon thin film transistor. The inventor finds that the array substrate containing the polycrystalline silicon thin film transistor is simple in structure, easy to implement and good in service performance.
According to an embodiment of the present invention, the polysilicon thin film transistor in the array substrate has the structure and properties of the polysilicon thin film transistor described above, which are not described herein again.
According to the embodiments of the present invention, the specific structure of the array substrate is not particularly limited, and except for the polysilicon tft described above, the structure and components of the conventional array substrate are not described herein again.
In yet another aspect of the present invention, a display device is provided. According to an embodiment of the present invention, the display device includes the array substrate described above. The inventor finds that the display device comprising the array substrate is simple in structure, easy to implement, good in display effect and capable of improving the consumption experience of consumers.
According to an embodiment of the present invention, the type of the display device is not particularly limited, and may include, but is not limited to, a mobile phone, a computer, a television, a wearable device, and the like, and the specific structure of the display device is also not particularly limited, and except for the array substrate described above, the display device has the structure and components of a conventional display device, which are not described herein in detail.
According to an embodiment of the present invention, the array substrate in the upper display device has the structure and properties of the array substrate described above, which are not described herein again.
According to the embodiments of the present invention, in a general display device, the method for forming the polysilicon layer of the active layer is to directly perform excimer laser annealing on the amorphous silicon layer with a relatively thick thickness, which results in poor or irregular uniformity of the crystal orientation of the formed polysilicon, and uneven grain size, resulting in poor display effect of the display device. In the invention, the amorphous silicon layer in the active layer is firstly formed into a plurality of protrusion parts and groove parts which are mutually alternated, then under the action of excimer laser, the amorphous silicon corresponding to the groove parts is completely melted, the amorphous silicon corresponding to the protrusion parts is partially melted, so that the growing environment of crystal grains is of a gradient structure, and the completely melted polycrystalline silicon grows towards the direction of the partially melted amorphous silicon sub-crystal, thereby not only ensuring the growing direction of the crystal grains, but also being beneficial to forming large-size crystal grains.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (9)
1. A method of making a polysilicon layer, comprising:
forming an amorphous silicon layer having a first surface provided with a plurality of protrusion portions and groove portions alternating with each other;
performing excimer laser annealing treatment on the amorphous silicon layer to obtain a prefabricated polycrystalline silicon layer;
removing the prefabricated polysilicon layer corresponding to the groove part to obtain a polysilicon layer,
the amorphous silicon layer corresponding to the groove part can be completely melted under the action of the excimer laser, and the amorphous silicon layer corresponding to the protrusion part is partially melted under the action of the excimer laser.
2. The method of claim 1, wherein the patterning is performed by etching.
3. The method of claim 1, wherein a thickness of the amorphous silicon layer corresponding to the groove portion is equal to or less than
The thickness of the amorphous silicon layer corresponding to the convex part is larger than that of the amorphous silicon layer
4. The method according to claim 1, wherein a width of each of the convex portions in a first direction is uniform, and a width of each of the concave portions in the first direction is uniform.
5. The method according to claim 1 or 4, wherein the width of the groove portion in the first direction is 3 to 5 micrometers, and the width of the protrusion portion in the first direction is 1.5 to 3.5 micrometers.
6. A method of fabricating a polycrystalline silicon thin film transistor, wherein an active layer of the polycrystalline silicon thin film transistor is formed by the method of fabricating a polycrystalline silicon layer according to any one of claims 1 to 5.
7. A polysilicon thin film transistor, wherein the polysilicon thin film transistor is prepared by the method of claim 6.
8. An array substrate comprising the polysilicon thin film transistor of claim 7.
9. A display device comprising the array substrate according to claim 8.
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| CN201711020536.XA CN107768236B (en) | 2017-10-26 | 2017-10-26 | Method for preparing polycrystalline silicon layer, polycrystalline silicon thin film transistor and preparation method thereof, array substrate and display device |
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| CN201711020536.XA CN107768236B (en) | 2017-10-26 | 2017-10-26 | Method for preparing polycrystalline silicon layer, polycrystalline silicon thin film transistor and preparation method thereof, array substrate and display device |
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| US6812052B2 (en) * | 2002-05-03 | 2004-11-02 | Ritdisplay Corporation | Method for fabricating low-temperature polysilicon organic electroluminescent device |
| CN106373922A (en) * | 2015-07-24 | 2017-02-01 | 昆山国显光电有限公司 | Low-temperature polycrystalline silicon thin film transistor array substrate and manufacturing method thereof |
| CN106876480A (en) * | 2017-04-28 | 2017-06-20 | 京东方科技集团股份有限公司 | Low-temperature polysilicon film transistor and preparation method thereof, array base palte and display device |
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| US6812052B2 (en) * | 2002-05-03 | 2004-11-02 | Ritdisplay Corporation | Method for fabricating low-temperature polysilicon organic electroluminescent device |
| CN106373922A (en) * | 2015-07-24 | 2017-02-01 | 昆山国显光电有限公司 | Low-temperature polycrystalline silicon thin film transistor array substrate and manufacturing method thereof |
| CN106876480A (en) * | 2017-04-28 | 2017-06-20 | 京东方科技集团股份有限公司 | Low-temperature polysilicon film transistor and preparation method thereof, array base palte and display device |
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