CN107749937A - Place side by side the adaptive corrective algorithm and system of formula colored thread array CCD - Google Patents
Place side by side the adaptive corrective algorithm and system of formula colored thread array CCD Download PDFInfo
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- CN107749937A CN107749937A CN201710957296.XA CN201710957296A CN107749937A CN 107749937 A CN107749937 A CN 107749937A CN 201710957296 A CN201710957296 A CN 201710957296A CN 107749937 A CN107749937 A CN 107749937A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/50—Constructional details
- H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N17/00—Diagnosis, testing or measuring for television systems or their details
- H04N17/002—Diagnosis, testing or measuring for television systems or their details for television cameras
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/50—Constructional details
- H04N23/55—Optical parts specially adapted for electronic image sensors; Mounting thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/73—Circuitry for compensating brightness variation in the scene by influencing the exposure time
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/74—Circuitry for compensating brightness variation in the scene by influencing the scene brightness using illuminating means
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/62—Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels
Abstract
The invention discloses the adaptive corrective algorithm and system for placing side by side formula colored thread array CCD, including camera hardware body, correction coefficient algorithm, FPGA hardware chip and line array CCD heterogeneity detecting system, the camera hardware body includes A/D converting units, unit, logic control and dual port RAM are realized in correction, CCD video datas realize unit, logic control and dual port RAM data communication into A/D converting units processing, the A/D converting units with correction；The correction coefficient algorithm is the nonlinear function that the output image data of video camera are regarded as to video camera input, that is g (x)=N (f (x)), the picture frame of X pixels deposits positional value, therefore, g (x) can be at fixed input value f0 (x) place.The present invention by this correction system make CCD output numerical value and light brightness change it is linear, the precision of color selector is improved, correction accuracy is high and speed is very fast, can meet the requirement of color selector, correction coefficient corrects several times before machine dispatches from the factory, convenient for users to use.
Description
Technical field
The present invention relates to digital camera technical field, specially place side by side formula colored thread array CCD adaptive corrective algorithm and
System.
Background technology
Ccd image sensor as a kind of novel photoelectric converter, is ground on extensive silicon integrated circuit Process ba- sis
The Analogous Integrated Electronic Circuits chip formed is made, integrates three kinds of opto-electronic conversion, light integration, scanning functions.Its essential part is by MOS
Photosensitive element array and reading shift register composition.CCD device has small small volume, quality, vibration and shock resistant, by environment electromagnetics
Influence it is small, operating distance is big, accuracy of measurement is high, low cost and other advantages, be widely used in industrial detection, machine vision,
The numerous areas such as aerospace remote sensing, lll night vision, Imaging Guidance, digital hologram, automatic monitoring.Obtaining the picture signal of high quality is
Common prescription of these application fields to ccd sensor.For line array CCD acquisition system, when video camera is to illumination absolute uniform
Image objects when, all pixels should have same gray scale in theory.And it is actually really not so, following factor determines
The gray scale heterogeneity of image:The heterogeneity of 1 light source illumination；The Cos4 θ effects of 2 lens edges reduce luminous flux biography
It is defeated, cause the illuminance of edge image to be far below center image illumination；The pixel photoelectric respone nonuniformity of 3 sensors；4 fix
The influence of modal noise.When light quantity Uniform Illuminations such as uses, if the response sensitivity of each pixel is different, will scheme
As the upper histogram picture for forming longitudinal direction, bar takes that pixel is different from its neighborhood territory pixel gray value, and this FPN for coming from for pixel makes an uproar
Sound and photoelectric respone nonuniformity.
CCD is a kind of technology maturation, widely used imaging sensor, it has also become the main flow device of high end digital shooting.
According to the difference of device architecture, CCD device can be divided into line array CCD and area array CCD.One preferable line array CCD is absolute
During uniform light field irradiation, the gray scale of each pixel output should be identical, but actual conditions are really not so.If no
It is calibrated just to come into operation, will have a negative impact in actual applications, therefore, it is necessary to device carry out Nonuniformity Correction,
Therefore certain correcting algorithm must be used to eliminate the influence that factors above is brought, to improve picture quality.
The content of the invention
The characteristics of present invention is directed to photoelectric respone inhomogeneities, line array CCD heterogeneity noise is carried out using two-point method
Correction, is solved the problems, such as proposed in background technology.
To solve the above problems, the present invention provides following technical method：The adaptive corrective for placing side by side formula colored thread array CCD is calculated
Method and system, including camera hardware body, correction coefficient algorithm, FPGA hardware chip and line array CCD heterogeneity detection system
System, the camera hardware body includes A/D converting units, unit, logic control and dual port RAM, CCD video counts are realized in correction
Handled according to the A/D converting units are entered, the A/D converting units realize unit, logic control and dual port RAM data with correction
Connection；
The correction coefficient algorithm is the nonlinear function that the output image data of video camera are regarded as to video camera input,
That is g (x)=N (f (x)), the picture frame of X--- pixels deposit positional value, and therefore, g (x) can be in fixed input value f0 (x) place, root
Deploy according to Tailor progression：
That is, g (x)=a0 (x)+a1 (x) f (x)+a2 (x) f2 (x)+....Wherein, a0 (x), a2 (x) ... are constant coefficient, right
Higher order term more than the line array sensor of high quality, second order can be neglected, and video camera input is approximately：F=g (x)-a0
(x) a1 (x), as long as constant coefficient a0 (x) is determined, a1 (x), it is possible to video camera is corrected, in order to realize correcting algorithm,
The response of each pixel is analyzed first, and each CCD device is different from, and it is considered as the shadow of temperature and time for exposure
Ring, correcting algorithm obtains correction factor and dark biasing, and peg method is carried out as follows：
A, in the case where not exposing, each pixel output of CCD device is tested, that is, measures the value of the dark biasing of pixel, y
(DN) in=x { n (DN)-a } formula:Y (DN) --- correction value output, i.e. g (x)；X --- correction factor, i.e., a1 above
(x)；N (DN) --- raw value, i.e., f (x) above；A --- the value secretly biased；
B, CCD is exposed to the Uniform Illumination of known certain rank, and is allowed to close to saturation exposure, that is, allow CCD defeated
Go out the saturation output voltage close to Vsat, two limit point measurements determine correction factor, and the measurement of other intermediate points can be used
Make reference value, so as to establish calibration curve；In x=Vsat/ { n (DN) 100%-a } formula:Vsat --- saturation output voltage；n
(DN) 100% --- close to pixel output gray level value under 100% exposure status；A --- the value secretly biased；(- x*a)=
a0(x).During constant coefficient a1 (x) and a0 (x) is solved, multiple scaling points can be taken for each pixel, obtained equation
Being write as matrix format is
Because equation number is more than the number of unknown number, therefore a1 (x) and a0 (x) can be solved using least square method
Value, can so obtain accurate correction coefficient.
Preferably, the A/D converting units use pixel synchronous and gone synchronous with the logic control.
Preferably, the FPGA hardware chip is set to programmable, and the FPGA hardware chip is adapted to each CCD device
Correction parameter flexibly change；The FPGA hardware chip logic resource can meet the reality of correcting algorithm and control logic circuit
It is existing；The proprietary structure in inside of the FPGA hardware chip is adapted to the realization of multiplier, Digital Signal Processing scheduling algorithm.
Preferably, the line array CCD heterogeneity detecting system is by LED light source, line array CCD, signal processing circuit, image
Acquisition system, luminance meter are formed, and detecting step includes as follows：
S1, Serial regulation LED brightness is pressed by luminance meter；
S2, the numerical value of CCD now is read by image capturing system, is repeated several times, you can CCD school is obtained using data
Positive coefficient；
S3, this coefficient is stored on host computer, when using color selector every time, this coefficient is sent to FPGA by host computer
Channel plate, FPGA can be by the algorithms that above illustrated, the numerical value after output calibration.
Compared with prior art, beneficial effects of the present invention are as follows：
1. the present invention by this correction system make CCD output numerical value and light brightness change it is linear, close to people
The perception of eye, improves the precision of color selector, while compares conventional correcting algorithm and system, and this algorithm uses and uses least square
Method carries out real time correction to be corrected by FPGA, and correction accuracy is high and speed is very fast, can meet color sorting
The requirement of machine, correction coefficient correct the use for several times, greatly facilitating user before machine dispatches from the factory.
Brief description of the drawings
Fig. 1 places side by side the adaptive corrective algorithm of formula colored thread array CCD and the pixel photoelectric respone curve of system for the present invention
Schematic diagram；
Fig. 2 is that the present invention places side by side the adaptive corrective algorithm of formula colored thread array CCD and the camera hardware body of system
Structured flowchart schematic diagram.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical method in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
Fig. 1-2 is referred to, this practicality invention provides a kind of technical method：Place side by side the adaptive corrective of formula colored thread array CCD
Algorithm and system, including camera hardware body, correction coefficient algorithm, FPGA hardware chip and the detection of line array CCD heterogeneity
System, the camera hardware body includes A/D converting units, unit, logic control and dual port RAM, CCD videos are realized in correction
Data realize unit, logic control and dual port RAM number into A/D converting units processing, the A/D converting units with correction
According to connection；
The correction coefficient algorithm is the nonlinear function that the output image data of video camera are regarded as to video camera input,
That is g (x)=N (f (x)), the picture frame of X--- pixels deposit positional value, and therefore, g (x) can be in fixed input value f0 (x) place, root
Deploy according to Tailor progression：
That is, g (x)=a0 (x)+a1 (x) f (x)+a2 (x) f2 (x)+....Wherein, a0 (x), a2 (x) ... are constant coefficient, right
Higher order term more than the line array sensor of high quality, second order can be neglected, and video camera input is approximately：F=g (x)-a0
(x) a1 (x), as long as constant coefficient a0 (x) is determined, a1 (x), it is possible to video camera is corrected, in order to realize correcting algorithm,
The response of each pixel is analyzed first, and each CCD device is different from, and it is considered as the shadow of temperature and time for exposure
Ring, correcting algorithm obtains correction factor and dark biasing, and peg method is carried out as follows：
A, in the case where not exposing, each pixel output of CCD device is tested, that is, measures the value of the dark biasing of pixel, y
(DN) in=x { n (DN)-a } formula:Y (DN) --- correction value output, i.e. g (x)；X --- correction factor, i.e., a1 above
(x)；N (DN) --- raw value, i.e., f (x) above；A --- the value secretly biased；
B, CCD is exposed to the Uniform Illumination of known certain rank, and is allowed to close to saturation exposure, that is, allow CCD defeated
Go out the saturation output voltage close to Vsat, two limit point measurements determine correction factor, and the measurement of other intermediate points can be used
Make reference value, so as to establish calibration curve；In x=Vsat/ { n (DN) 100%-a } formula:Vsat --- saturation output voltage；n
(DN) 100% --- close to pixel output gray level value under 100% exposure status；A --- the value secretly biased；(- x*a)=
a0(x).During constant coefficient a1 (x) and a0 (x) is solved, multiple scaling points can be taken for each pixel, obtained equation
Being write as matrix format is
Because equation number is more than the number of unknown number, therefore a1 (x) and a0 (x) can be solved using least square method
Value, can so obtain accurate correction coefficient.
The A/D converting units use pixel synchronous and gone synchronous with the logic control.
The FPGA hardware chip is set to programmable, and the FPGA hardware chip is adapted to the correction of each CCD device
Parameter flexibly changes；The FPGA hardware chip logic resource can meet the realization of correcting algorithm and control logic circuit；It is described
The proprietary structure in inside of FPGA hardware chip is adapted to the realization of multiplier, Digital Signal Processing scheduling algorithm.
The line array CCD heterogeneity detecting system is by LED light source, line array CCD, signal processing circuit, IMAQ system
System, luminance meter are formed, and detecting step includes as follows：
S1, Serial regulation LED brightness is pressed by luminance meter；
S2, the numerical value of CCD now is read by image capturing system, is repeated several times, you can CCD school is obtained using data
Positive coefficient；
S3, this coefficient is stored on host computer, when using color selector every time, this coefficient is sent to FPGA by host computer
Channel plate, FPGA can be by the algorithms that above illustrated, the numerical value after output calibration.
To sum up state, the present invention by this correction system make CCD output numerical value and light brightness change it is linear, connect
The perception of person of modern times's eye, the precision of color selector is improved, while compare conventional correcting algorithm and system, this algorithm is used using minimum
Square law carries out real time correction to be corrected by FPGA, and correction accuracy is high and speed is very fast, can meet
The requirement of color selector, correction coefficient correct the use for several times, greatly facilitating user before machine dispatches from the factory.
Finally it should be noted that：The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention,
Although the present invention is described in detail with reference to the foregoing embodiments, for those skilled in the art, it still may be used
To be modified to the technical method described in foregoing embodiments, or equivalent substitution is carried out to which part technical characteristic.
Within the spirit and principles of the invention, any modification, equivalent substitution and improvements made etc., it should be included in the present invention's
Within protection domain.
Claims (4)
1. place side by side the adaptive corrective algorithm and system of formula colored thread array CCD, it is characterised in that：Including camera hardware body,
Correction coefficient algorithm, FPGA hardware chip and line array CCD heterogeneity detecting system, the camera hardware body include A/D
Converting unit, correction realize unit, logic control and dual port RAM, and CCD video datas are handled into the A/D converting units, institute
State A/D converting units and realize unit, logic control and dual port RAM data communication with correction；
The correction coefficient algorithm be by the output image data of video camera regard as video camera input nonlinear function, i.e. g
(x)=N (f (x)), the picture frame of X--- pixels deposit positional value, and therefore, g (x) can fix input value f0 (x) place, according to platform
Labor series expansion obtains：
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That is, g (x)=a0 (x)+a1 (x) f (x)+a2 (x) f2 (x)+....Wherein, a0 (x), a2 (x) ... are constant coefficient, for height
The line array sensor of quality, higher order term more than second order can be neglected, and video camera input is approximately：F=g (x)-a0 (x) a1
(x), as long as constant coefficient a0 (x) is determined, a1 (x), it is possible to be corrected to video camera, in order to realize correcting algorithm, first
The response of each pixel is analyzed, and each CCD device is different from, and it is considered as the influence of temperature and time for exposure, school
Normal operation method obtains correction factor and dark biasing, and peg method is carried out as follows：
A, in the case where not exposing, each pixel output of CCD device is tested, that is, measures the value of the dark biasing of pixel, y (DN)
In=x { n (DN)-a } formula:Y (DN) --- correction value output, i.e. g (x)；X --- correction factor, i.e., a1 (x) above；n
(DN) --- raw value, i.e., f (x) above；A --- the value secretly biased；
B, CCD is exposed to the Uniform Illumination of known certain rank, and is allowed to close to saturation exposure, that is, allows CCD outputs to connect
Nearly Vsat saturation output voltage, two limit point measurements determine correction factor, and the measurement of other intermediate points may be used as joining
Value is examined, so as to establish calibration curve；In x=Vsat/ { n (DN) 100%-a } formula:Vsat --- saturation output voltage；n(DN)
100% --- close to pixel output gray level value under 100% exposure status；A --- the value secretly biased；(- x*a)=a0
(x).During constant coefficient a1 (x) and a0 (x) is solved, multiple scaling points can be taken for each pixel, obtained equation is write
It is into matrix format
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Because equation number is more than the number of unknown number, therefore it can solve a1's (x) and a0 (x) using least square method
Value, can so obtain accurate correction coefficient.
2. the adaptive corrective algorithm according to claim 1 for placing side by side formula colored thread array CCD and system, it is characterised in that：
The A/D converting units use pixel synchronous and gone synchronous with the logic control.
3. the adaptive corrective algorithm according to claim 1 for placing side by side formula colored thread array CCD and system, it is characterised in that：
The FPGA hardware chip is set to programmable, and the correction parameter that the FPGA hardware chip is adapted to each CCD device is flexible
Change；The FPGA hardware chip logic resource can meet the realization of correcting algorithm and control logic circuit；The FPGA hardware
The proprietary structure in inside of chip is adapted to the realization of multiplier, Digital Signal Processing scheduling algorithm.
4. the adaptive corrective algorithm according to claim 1 for placing side by side formula colored thread array CCD and system, it is characterised in that：
The line array CCD heterogeneity detecting system is by LED light source, line array CCD, signal processing circuit, image capturing system, luminance meter
Form, detecting step includes as follows：
S1, Serial regulation LED brightness is pressed by luminance meter；
S2, the numerical value of CCD now is read by image capturing system, is repeated several times, you can CCD correction system is obtained using data
Number；
S3, this coefficient is stored on host computer, when using color selector every time, this coefficient is sent to FPGA passages by host computer
Plate, FPGA can be by the algorithms that above illustrated, the numerical value after output calibration.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108765360A (en) * | 2018-06-04 | 2018-11-06 | 景德镇陶瓷大学 | A kind of multi-focus image fusing method that images in anti-noise environment effect is good |
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