CN107743054A - System during a kind of synchronous pair of multisensor - Google Patents

System during a kind of synchronous pair of multisensor Download PDF

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Publication number
CN107743054A
CN107743054A CN201710740451.2A CN201710740451A CN107743054A CN 107743054 A CN107743054 A CN 107743054A CN 201710740451 A CN201710740451 A CN 201710740451A CN 107743054 A CN107743054 A CN 107743054A
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China
Prior art keywords
microcontroller
sensor
timestamp
packet
thread
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CN201710740451.2A
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Chinese (zh)
Inventor
杨峰
高军
黄广宁
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Hangzhou Deze Robot Technology Co Ltd
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Hangzhou Deze Robot Technology Co Ltd
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Priority to CN201710740451.2A priority Critical patent/CN107743054A/en
Publication of CN107743054A publication Critical patent/CN107743054A/en
Priority to CN201810731560.2A priority patent/CN109104259B/en
Priority to CN201810732148.2A priority patent/CN108900272B/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658Clock or time synchronisation among packet nodes
    • H04J3/0661Clock or time synchronisation among packet nodes using timestamps

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Optical Radar Systems And Details Thereof (AREA)

Abstract

The invention discloses system during a kind of synchronous pair of multisensor.The system includes:Microcontroller, some sensors and logic computing unit;The microcontroller includes:Some sensor interfaces, communication interface (such as USB) and the crystal oscillator that synchronised clock is provided;The microcontroller is connected by the sensor interface with the sensor, is connected by the communication interface (such as USB) with the logic computing unit;The logic computing unit includes being used to gather the data acquisition thread of the packet of sensor, design synchronized timestamp management thread and memory for receiving timestamp and pulse train number from microcontroller;The timestamp and pulse train number are determined by the synchronised clock.

Description

System during a kind of synchronous pair of multisensor
Technical field
The present invention relates to data acquisition process technical field, more particularly to system during a kind of synchronous pair of multisensor.
Background technology
When multiple and/or multiple sensors carry out data acquisition, the acquisition time of different sensors is respectively by respective Internal time system is managed, or, by sensor internal time system and micro controller/logic computing unit inside when Between system in combination management.And deviation often be present in the timing between multiple time systems, therefore, it is necessary to multiple and/or a variety of The acquisition time of sensor sets time unification.
Synchronous method has the clock system inside by logic computing unit to carry out software synchronization, by micro- at existing pair Control device inside clock system carry out hardware synchronization, GPS pairs when, NTP pairs when, SNTP pairs when, IEEE 1588 to when etc..
Due to time deviation be present between the timekeeping system of each sensor so that the acquisition time of each sensor is not same Under time coordinate system, the result of data application is caused deviation occur.For example, when data application is to time sensitive application, application Precision is relatively low.Moreover, the automatic reclocking of meeting after internal time system work a period of time of sensor, it is impossible to meet for a long time The requirement of collection.
The mode of software synchronization is influenceed by logic computing unit timeslice, and precision is relatively low.And the internal time of microcontroller Drift occurs in system after a period of operation, timing deviation is occurred, it is impossible to meets the requirement of collection for a long time.GPS pairs When mode there is cost high (each node is required for installing GPS device), installation to be restricted and (need outdoor unobstructed), availability Poor (being influenceed by weather, environment), the shortcomings of application risk (U.S. does not provide safeguard to civilian GPS) be present.At NTP pairs and SNTP Pair when ratio of precision it is relatively low, IEEE 1588 to when compatibility it is low (each node has been required for the agreements of IEEE 1588).If customize energy Meet that the sensor/micro controller/logic computing unit cost for the high configuration that collection requires is very high.
Therefore, prior art is also to be developed.
The content of the invention
In view of in place of above-mentioned the deficiencies in the prior art, it is an object of the invention to provide be during a kind of synchronous pair of multisensor System, it is intended to when solving the problems, such as to realize accurate pair between multisensor in the prior art.
In order to achieve the above object, this invention takes following technical scheme:
System during a kind of synchronous pair of multisensor.Wherein, the system includes:Microcontroller, some sensors, power supply electricity Source and logic computing unit;The microcontroller includes:Some sensor interfaces, communication interface and provide synchronised clock Crystal oscillator;The microcontroller is connected by the sensor interface with the sensor, is patrolled by the communication interface with described Collect computing unit connection;The power supply is used to power to the microcontroller, sensor and logic computing unit;It is described Logic computing unit include be used for gather sensor packet data acquisition thread, for receive from microcontroller when Between stamp and the design synchronized timestamp of pulse train number management thread and memory;The timestamp and pulse train number are by institute Synchronised clock is stated to be determined.
Alternatively, the sensor includes but is not limited to camera, laser radar, encoder and inertance element.
Alternatively, the camera includes fisheye camera, general camera, depth camera and other imaging techniques.
Alternatively, the crystal oscillator is temperature compensating crystal oscillator.
Alternatively, when the data that the packet of the sensor of data acquisition thread collection is camera or laser radar Bao Shi, the data acquisition thread are additionally operable to obtain the time corresponding with packet to the design synchronized timestamp management thread Stamp, and synthesize the complete data packet with lock in time and store into the memory.
Alternatively, the data acquisition thread is additionally operable to calculate the packet loss of the packet;When the packet loss is more than During predetermined threshold value, stopping action (such as sensor resets or reported an error);When the packet loss is less than or equal to predetermined threshold value, after Continuous action (such as sensor resets or reported an error).
Alternatively, the microcontroller is additionally operable to the frequency acquisition according to the laser radar, judges whether packet belongs to In interference signal.
Alternatively, the microcontroller be additionally operable to by the data of inertance element and/or encoder, corresponding timestamp and Pulse train number is uploaded to the design synchronized timestamp management thread.
Alternatively, before the working sensor, the design synchronized timestamp management thread is additionally operable to the micro-control Device processed is asked when sending pair;Ask when the microcontroller is according to described pair, returned to the design synchronized timestamp management thread Return confirmation.
Beneficial effect:System during synchronous pair of multisensor provided by the invention, can make the acquisition time of each sensor The acquisition time of each sensor is managed by same clock system so that the acquisition time of each sensor uniformly arrive it is same Under individual time coordinate system.The time synchronizing method of system is hardware synchronization, pair when precision it is high.After the system, sensor The data precision is higher, and the data application in later stage is more accurate.
Brief description of the drawings
The hardware schematic of system when Fig. 1 is synchronous pair of the multisensor of the specific embodiment of the invention;
The system framework schematic diagram of system when Fig. 2 is synchronous pair of the multisensor of the specific embodiment of the invention.
Embodiment
The system when present invention provides a kind of synchronous pair of multisensor.To make the purpose of the present invention, technical scheme and effect more Add clear, clear and definite, the present invention is described in more detail for the embodiment that develops simultaneously referring to the drawings.It is it should be appreciated that described herein Specific embodiment only to explain the present invention, be not intended to limit the present invention.
It is that the acquisition time for instigating each sensor is managed by same clock system at described pair, makes each sensor Acquisition time can be arrived under coordinate system at the same time so that low skewed manner is unified.
System when Fig. 1 is a kind of synchronous pair of multisensor of the specific embodiment of the invention.As shown in figure 1, the system bag Include:Microcontroller 110, some sensors and logic computing unit 140.
The microcontroller 110 includes:Some sensor interfaces, communication interface (such as USB) 111 and offer synchronised clock Crystal oscillator 118.Specifically, the crystal oscillator is temperature compensating crystal oscillator.
The microcontroller 110 is connected by the sensor interface with the sensor, by the communication interface (such as USB) 111 it is connected with the logic computing unit 140.
Specifically, the sensor can include:Camera, laser radar, encoder and inertance element.Alternatively, institute It is fisheye camera, general camera, depth camera or other imaging techniques to state camera.
As shown in figure 1, the microcontroller 110 then has corresponding camera synchronizing signal interface 112, laser radar synchronous Signaling interface 113, inertance element interface 114 and encoder interfaces 115.
In certain embodiments, the microcontroller can further include other suitable functional interfaces, such as count Word input and output interface 116, other externally sync caps 117.
As shown in Fig. 2 the system framework figure for the embodiment of the present invention.In the present embodiment, the logic computing unit 140 Including:Data acquisition thread 141 for the packet that gathers sensor, for receiving timestamp and arteries and veins from microcontroller Rush the design synchronized timestamp management thread 142 and memory 143 of sequence number.The logic computing unit 140 specifically can be with It is any suitable, there is the hardware device of certain logical calculated ability, such as main frame or embedded unit, it is only necessary to It is able to carry out above-mentioned thread 141 and thread 142.
The timestamp and pulse train number are determined by the synchronised clock.In the present embodiment, using modelled signal Synchronous processing unit (SSPU) represented in the microcontroller, the clock provided based on the crystal oscillator, for managing and realizing Functional module during high-precision pair between different sensors.SSPU timestamp be the crystal oscillator clock, the pulse sequence Row number is the count value of the crystal oscillator.
In certain embodiments, the microcontroller is provided with the different first camera interfaces and second camera of working frequency Interface.The working frequency of the first camera interface is higher than the second camera interface.
The first camera interface and second camera interface are connected with camera array respectively, and the camera array is included at least One principal phase machine and some from camera.A camera array is belonged to, is connected to the principal phase machine and slave phase of same camera interface Machine has identical working frequency.
Individually below by taking each sensor as an example, be specifically described sensor pair when workflow:
Before the working sensor, the design synchronized timestamp management thread is additionally operable to send to the microcontroller Pair when ask.Asked when the microcontroller is according to described pair, confirmation letter is returned to the design synchronized timestamp management thread Breath, produces complete system time.
In certain embodiments, the workflow of camera in the system is:Arteries and veins is sent by microcontroller timing first Punching triggering camera gathered data, while timestamp of the microcontroller using the crystal oscillator clock time as camera, using step-by-step counting as The sequence number of corresponding timestamp, sequence number and corresponding timestamp are uploaded to the design synchronized timestamp management thread 142.
Camera starts and gathers image, and the packet for generating subsidiary sequence number (has acquisition time and image in packet Characteristic) after, by packet and it is uploaded to the data acquisition thread 141.
After the design synchronized timestamp management thread 142 receives the sequence number and corresponding timestamp, Ke Yitong Cross sequence number and judge whether packet loss.If generation packet loss, according to timestamp corresponding to last time sequence number and frequency acquisition to it is current when Between stab information completion, and packet loss information (sequence number of loss, frequency acquisition, currently lose number) is charged into log daily records.
The data acquisition thread 141 receives the packet of camera and judges data by sequence number subsidiary in packet Whether packet loss.If generation packet loss, packet loss information (sequence of message number of loss, frequency acquisition, currently lose number) is charged into log Daily record.
Finally, the data acquisition thread 141 is asked for according to sequence number to the design synchronized timestamp management thread 142 Corresponding timestamp.The design synchronized timestamp management thread 142 asks for corresponding timestamp according to request is asked for, and is returned to it Return timestamp.Obtained timestamp is combined into a complete data packet by the data acquisition thread 141, and is stored to and is deposited In reservoir.It is described to store the readable logic computing unit storage medium that implement body be any suitable type, such as flash memory, machine Tool formula hard disk lamp.
In certain embodiments, the microcontroller can also calculate packet loss.Exceed predetermined threshold value in packet loss, then stop Only the sensor data acquisition and reset or report an error.If packet loss is allowed access into and gathered next time not less than threshold value.Institute State data and may apply to time-sensitive application.
In certain embodiments, the workflow of laser radar in the system is:First, the data acquisition thread 141 control laser radars are opened, and laser radar timing transmitting laser simultaneously sends pulse-triggered microcontroller to micro controller, and generation is attached The packet of tape serial number and packet is directly uploaded to data acquisition thread 141.Wherein, there is hair in the packet Penetrate time and laser radar data.
The microcontroller receives the pulse that laser radar is sent, the time using the clock time of crystal oscillator as laser radar Stamp, the sequence number using step-by-step counting as corresponding timestamp, by sequence number and corresponding timestamp be uploaded to it is described design it is synchronous when Between stamp management thread 142.
The data acquisition thread 141 receives the packet of laser radar and judged by sequence number subsidiary in packet Data whether packet loss, if packet loss, packet loss information (sequence of message number of loss, frequency acquisition, currently lose number) is charged to Log daily records.
Finally, the data acquisition thread 141 is asked for according to sequence number to the design synchronized timestamp management thread 142 Corresponding timestamp.The design synchronized timestamp management thread 142 asks for corresponding timestamp according to request is asked for, and is returned to it Return timestamp.Obtained timestamp is combined into a complete data packet by the data acquisition thread 141, and is stored to and is deposited In reservoir.It is described to store the readable logic computing unit storage medium that implement body be any suitable type, such as flash memory, machine Tool formula hard disk etc..
In certain embodiments, the microcontroller can also calculate packet loss.Exceed predetermined threshold value in packet loss, then stop Only working sensor.If packet loss is allowed access into and gathered next time not less than threshold value.It is quick that the data may apply to the time Sensing is used.The micro controller can also be by catching trigger signal come recording laser radar timestamp, and is sentenced according to frequency acquisition Whether disconnected is interference signal.
For the workflow of inertance element in the system:First, the data acquisition thread 141 controls inertia member Part is opened, and inertance element gathers movable information in real time, and timing sends microcontroller described in pulse-triggered to microcontroller.
The microcontroller receives the pulse that inertance element is sent, the time using the clock time of crystal oscillator as inertance element Stab, the sequence number using step-by-step counting as corresponding timestamp, read the data of inertance element.Then, by sequence number, corresponding time Stamp and inertance element data are uploaded to the design synchronized timestamp management thread 142.
After the design synchronized timestamp management thread 142 receives the data of the inertance element, storage is stored to In device.It is described to store the readable logic computing unit storage medium that implement body be any suitable type, such as flash memory, machinery Formula hard disk etc..The data may apply to time-sensitive application.
For the workflow of encoder:First, the data acquisition thread 141 controls encoder to open, and encoder is real When gather movable information.Microcontroller timing reading encoder data, the timestamp using the clock time of crystal oscillator as encoder, Sequence number using step-by-step counting as corresponding timestamp, sequence number, corresponding timestamp and encoder data are uploaded to described set Count synchronized timestamp management thread 142.
The design synchronized timestamp management thread 142 receives the encoder data for being integrated with temporal information, by it Store in memory.It is described to store the readable logic computing unit storage medium that implement body be any suitable type, example Such as flash memory, mechanical hard disk.The data may apply to time-sensitive application
Certainly, the timestamp of the encoder can be consistent with the timestamp of inertance element, camera or laser radar.Example Such as, when the encoder timestamp is consistent with the inertance element timestamp, the microcontroller receives what inertance element was sent Pulse, using the clock time of crystal oscillator as inertance element and the timestamp of encoder, using step-by-step counting as corresponding timestamp Sequence number, the data of inertance element and encoder are read, by sequence number, corresponding timestamp, inertance element data and encoder number Thread 142 is managed according to the design synchronized timestamp is uploaded to.
In system provided in an embodiment of the present invention, there is provided the workflow of a variety of different sensors.Specifically can root According to the requirement of actual conditions, selection uses one or more kinds of groups in camera, inertial navigation, laser radar and encoder Close.
In summary, system during multisensor pair provided in an embodiment of the present invention, modelled signal synchronous processing unit is passed through (SSPU) acquisition time of each sensor is managed, the acquisition time of each sensor is carried out pipe in same clock system Reason, make the acquisition time of each sensor is unified to arrive under coordinate system at the same time.And SSPU pair when the method for synchronization be hard Part is synchronous, pair when precision it is high.
The data precision finally obtained by multiple sensors is higher, apply it is more accurate in time-sensitive occasion, pair when into This is relatively low.Different sensor flexibly configurables, forms different combinations, adapts to different usage scenarios.
It is understood that for those of ordinary skills, can be with technique according to the invention scheme and this hair Bright design is subject to equivalent substitution or change, and all these changes or replacement should all belong to the guarantor of appended claims of the invention Protect scope.

Claims (9)

1. system during a kind of synchronous pair of multisensor, it is characterised in that including:Microcontroller, some sensors and logic meter Calculate unit;
The microcontroller includes:Some sensor interfaces, communication interface and the crystal oscillator that synchronised clock is provided;The microcontroller Device is connected by the sensor interface with the sensor, is connected by the communication interface with the logic computing unit;
The logic computing unit includes being used to gather the data acquisition thread of the packet of sensor, comes from micro-control for receiving The timestamp of device processed and the design synchronized timestamp management thread and memory of pulse train number;The timestamp and pulse sequence Row number is determined by the synchronised clock.
2. system according to claim 1, it is characterised in that the sensor include but is not limited to camera, laser radar, Encoder and inertance element.
3. system according to claim 2, it is characterised in that the camera includes fisheye camera, general camera, depth phase Machine and other imaging techniques.
4. system according to claim 2, it is characterised in that the crystal oscillator is temperature compensating crystal oscillator.
5. system according to claim 2, it is characterised in that when the data of the sensor of data acquisition thread collection When wrapping the packet for camera or laser radar, the data acquisition thread is additionally operable to the design synchronized timestamp management Thread obtains timestamp corresponding with packet, and synthesizes the complete data packet storage with lock in time and arrive the memory In.
6. system according to claim 5, it is characterised in that the data acquisition thread is additionally operable to calculate the packet Packet loss;When the packet loss is more than predetermined threshold value, stop collection;When the packet loss is less than or equal to predetermined threshold value When, continue to gather.
7. system according to claim 6, it is characterised in that the microcontroller is additionally operable to according to the laser radar Frequency acquisition, judges whether packet belongs to interference signal.
8. system according to claim 2, it is characterised in that the microcontroller is additionally operable to inertance element and/or volume Data, corresponding timestamp and the pulse train number of code device are uploaded to the design synchronized timestamp management thread.
9. according to any described systems of claim 1-8, it is characterised in that before the working sensor, the design is same Step timestamp management thread is additionally operable to ask when sending pair to the microcontroller;
Asked when the microcontroller is according to described pair, confirmation is returned to the design synchronized timestamp management thread.
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CN201810731560.2A CN109104259B (en) 2017-08-25 2018-07-05 Multi-sensor time synchronization system and method
CN201810732148.2A CN108900272B (en) 2017-08-25 2018-07-05 Sensor data acquisition method and system and packet loss judgment method

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