CN107733445A - The generation method and interpretation method of Turbo code code word - Google Patents

The generation method and interpretation method of Turbo code code word Download PDF

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CN107733445A
CN107733445A CN201710804826.7A CN201710804826A CN107733445A CN 107733445 A CN107733445 A CN 107733445A CN 201710804826 A CN201710804826 A CN 201710804826A CN 107733445 A CN107733445 A CN 107733445A
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code
decoding
state
modules
coding
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CN107733445B (en
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管武
梁利平
吴凯
任雁鹏
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H03M13/296—Particular turbo code structure

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  • Engineering & Computer Science (AREA)
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Abstract

The invention discloses a kind of generation method and interpretation method of Turbo code code word.The generation method of Turbo code code word includes：At least two sub-encoders of encoding and decoding simultaneously are allowed to receive the list entries of code respectively, the list entries of code comprises at least：By at least two group of information bits into symbol；The list entries for receiving code is encoded using reponse system convolution coding RSC by least two sub-encoders, generates and exports coding result, the interpretation method of Turbo code code word includes：Receive the sequence to be decoded of input；Coding sequence is treated by decoder and performs decoding, obtain and export decoding result, wherein, decoding process includes performing the first decoding stage of reponse system convolution coding RSC decodings by the first code translator RSCDEC and performs the second decoding stage of cardiopulmonary bypass in beating heart redundancy check code PCRC decodings to the decoding result in the first decoding stage by the second code translator PCRCDEC.Solve the coding of the low bit- rate Turbo code in correlation technique and the higher technical problem of complexity of decoding.

Description

The generation method and interpretation method of Turbo code code word
Technical field
The present invention relates to field of information processing, generation method and decoding in particular to a kind of Turbo code code word Method.
Background technology
At present, the iterative decoding thought of Turbo code has been described as " Turbo Principle ", in many correlation necks Domain, such as balanced estimation, the high density field of storage of Multiuser Detection, combined channel parameter, or even artificial intelligence aspect all obtain Different degrees of application is arrived.In terms of practical application, although the following period of time after Turbo code appearance, due to The complexity and decoding delay of Turbo code, limit its application in practice.But pass through the research of more than ten years, Turbo All quite ripe in terms of code either encoding scheme or decoding algorithm, present Turbo code is own through formally having gone on master Stage is flowed, turns into real epoch favorite, various communication specifications are all using Turbo code as one of its standard.In deep space communication Field, 16 state Turbo codes are classified as a new standard by spatial data criterion Advisory Board (CCSDs).And in mobile communication Field, 3GPP is formally using Turbo code as one of IMT2000 channel coding standard of high-speed data communication.Wherein there is generation 3 3G standards (WCDMA, CDMA-2000 and TD-SCDMA) of table have used Turbo code in channel coding, are used for The communication service of high-speed, high quality.
Berrou proposes duobinary system Turbo code within 1996, compared with traditional binary Turbo code, duobinary system Turbo code has advantages below：(1) subcode is done using CRSC, improves code efficiency；(2) interleave depth is classical Turbo The half of code, decoding delay reduce；(3) interweaved by intersymbol and increase minimum free distance, eliminate error floor；(4) it is identical Under complexity decoder, the error-correcting performance of duobinary system Turbo code is better than traditional Turbo code；(5) code check is punctured for double two The performance impact of system Turbo code is less than traditional Turbo code.Due to its outstanding performance, duobinary system Turbo code has been at present Through being widely used in the standard of many radio communications, such as WiMAX (IEEE502.16) and European satellite network standard (DVB-RCS) duobinary system Turbo codes are all employed.However, Turbo code is mainly used in high code check field at present, in low bit- rate The design in field and application are also in the ascendant.Low bit- rate binary turbo code is designed, realizes low complex degree low bit- rate binary turbo The coding of code and decoding, are a problems urgently to be resolved hurrily.
The higher technical problem of the complexity of coding and decoding for the low bit- rate Turbo code in correlation technique, at present Not yet propose effective solution.
The content of the invention
The embodiments of the invention provide a kind of generation method and interpretation method of Turbo code code word, at least to solve correlation The coding of low bit- rate Turbo code in technology and the higher technical problem of the complexity of decoding.
One side according to embodiments of the present invention, there is provided a kind of generation method of Turbo code code word, this method bag Include：At least two sub-encoders of encoding and decoding simultaneously are allowed to receive the list entries of code respectively, wherein, the list entries of code is extremely Include less：By at least two group of information bits into symbol；Reponse system convolution coding is used by least two sub-encoders RSC encodes to the list entries for receiving code, generates coding result；Exports coding result.
Further, each sub-encoders include two circular recursion systematic convolutional code CRSC encoders, are allowing simultaneously Before at least two sub-encoders of encoding and decoding receive the list entries of code respectively, this method also includes：Eliminated by interleaver Correlation between the list entries for the code that at least two sub-encoders receive.
Further, CRSC encoders are based on, from truncation mechanism, controlling the original state of each sub-encoders and terminate shape State is identical, wherein, by least two sub-encoders using reponse system convolution coding RSC to receiving the input sequence of code Row are encoded, and generate coding result, including：The last current state that the original state position of acquisition sub-encoders and precoding obtain；Root Precoding is carried out according to last current state, obtains the recurrent state of circular recursion systematic convolutional code, generates encoder matrix；By sub-encoders Original state be arranged to the recurrent state that precoding is tried to achieve, and encode and obtain the final volume that final state is original state position Code result.
Further, during the list entries to sub-encoders input code, first control device is passed through MesgInAddr performs SECO, and at least one following in different stage execution：Input information bits, CRC check and For encoding the check bit data used.
Further, during coding, SECO is performed by second control device InnerAddr, and not The same stage performs at least one following：The coding that coding and information of the information without intertexture interweave.
Further, during input coding result, filled by the controls of the 3rd control device OutAddr and the 4th Put OutIndex and perform SECO, and it is at least one following in different stage execution：Input the coding knot of predetermined length Fruit.
Further, first control device to input information carry out first count, first count reach predetermined figure it After carry out bit check, and check results are preserved；Second control device is controlled to start the second meter in end-of-encode Number, promoter are encoded.
Further, the input of sub-encoders is controlled by second control device, and reads saved check results, And check results are encoded.
Present invention also offers a kind of embodiment of the interpretation method of Turbo code code word, this method includes：Receive input Sequence to be decoded；Coding sequence is treated by decoder and performs decoding, obtains decoding result, wherein, decoding process includes the One decoding stage and the second decoding stage, the first decoding stage are to perform reponse system by the first code translator RSCDEC to roll up Product code coding RSC decodings, the second decoding stage are the decoding knot to the first decoding stage by the second code translator PCRCDEC Fruit performs cardiopulmonary bypass in beating heart redundancy check code PCRC decodings；Output decoding result.
Further, receiving the sequence to be decoded of input includes：At least two sub-decoders are distinguished based on SECO The coding result that sub-encoders corresponding to reception generate；Decoding is performed to the sequence to be decoded by decoder, decoded As a result include：At least two sub-decoder is iterated decoding to the corresponding coding result respectively, obtains decoding knot Fruit.
Further, it is as follows in different stage execution by performing SECO during the iterative decoding At least one：Information interweaves without interweaving with information.Further, the sequence to be decoded of input is divided into multiple subcodes, each subcode Exported by corresponding encoder, multiple subcodes correspond to multiple encoders, receive the sequence to be decoded of input and include：Pass through first Output of the control device AddrInM controls to current encoder counts；Count and reach in first control device AddrInM To after default number of words, controlled by second control device AddInL according to preset order select in multiple encoders it is next The individual encoder for needing to receive input, and counting is re-executed by first control device AddrInM.
Further, the sequence to be decoded of input is divided into multiple subcodes, treats coding sequence execution by decoder and translates Code, obtain decoding result, including：Changed when performing by the 3rd control device InnerItern and enter row decoding to multiple subcodes For SECO, wherein, the 3rd control device is used to be counted, and selects to correspond in multiple subcodes according to current count Subcode.
Further, when performing reponse system convolution coding RSC decodings by the first code translator RSCDEC, point Not Zhi Hang before calculating to transition probability and backward transition probability, wherein, during performing and calculating, pass through the first storage To transition probability and backward transition probability before unit AxInfo storages, external information is stored by the second memory cell ExInfo, led to Cross the 3rd memory cell DxMesg and the 4th memory cell DxBits while store decoding decision bits.
Further, followed parallel by decoding result execution of the second code translator PCRCDEC to the first decoding stage When ring redundancy check code PCRC is decoded, performed by the 4th control device CRCAddr according to default timing planning and CRC is decoded SECO, preset timing planning for from the 3rd memory cell DxMesg read presetting digit capacity data.
Further, output decoding result includes：Performed by the 5th control device OutAddt and decoding result is carried out The SECO of output, wherein, decoding result is the data read from the 4th memory cell DxBits.
Further, the first code translator RSCDEC includes path metric Gamma modules, original state is measured IniMetric modules, state metric calculation Metric modules, forward state metric storage AxInfo modules, total state measurement TotalMetric modules, likelihood ratio calculate LLR modules, wherein, path metric Gamma modules are based on performing path metric Calculate, original state measurement iniMetric modules are used to perform the initialization to measuring Metric, state metric calculation Metric Module is used to perform the calculating to path metric, and forward state metric storage AxInfo modules are used to preserve state metric calculation The forward state metric that Metric modules are calculated, total state measurement TotalMetric modules are used to calculate total measurement, seemingly So it is used to calculate Soft Inform ation than calculating LLR modules.
Further, path metric Gamma modules are according to being distributed to the channel information, check information and external information of itself, It is combined according to the state transition diagram of convolutional code or Turbo code, output channel metrics, verification measurement and path metric.
Further, the sequence to be decoded of input is divided into multiple subcodes, and original state measurement iniMetric modules are used for The forward direction final states of each subcode and backward final states are preserved, final states as initial state, is measured corresponding to loading in next iteration Metric initialization.
Further, state metric calculation Metric modules carry out recursive operation according to path metric, obtain forward-facing state Measurement and backward state measurement.
Further, forward state metric stores AxInfo modules by forward state metric to be supplied to based on likelihood ratio Calculate LLR modules.
Further, likelihood ratio calculates LLR modules and obtains prior information according to forward state metric, and calculating judges likelihood Than.
In embodiments of the present invention, by allowing at least two sub-encoders of encoding and decoding simultaneously to receive the defeated of code respectively Enter sequence, wherein, the list entries of code comprises at least：By at least two group of information bits into symbol；Compiled by least two sons Code device is encoded using reponse system convolution coding RSC to the list entries for receiving code, generates coding result；Output Coding result；Coding sequence is treated by decoder and performs decoding, obtains decoding result, wherein, decoding process is translated including first Code stage and the second decoding stage, the first decoding stage are to perform reponse system convolutional code by the first code translator RSCDEC RSC decodings are encoded, the second decoding stage was that the decoding result in the first decoding stage is held by the second code translator PCRCDEC Row cardiopulmonary bypass in beating heart redundancy check code PCRC is decoded；Output decoding result, solves low bit- rate Turbo code in correlation technique Coding and the higher technical problem of complexity of decoding, and then the complexity of the coding for reducing Turbo code and decoding is realized, And then realize the technique effect of error correction.
Brief description of the drawings
Accompanying drawing described herein is used for providing a further understanding of the present invention, forms the part of the application, this hair Bright schematic description and description is used to explain the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings：
Fig. 1 is a kind of flow chart of the generation method of optional Turbo code code word according to embodiments of the present invention；
Fig. 2 is a kind of optional Turbo code code word generation schematic diagram according to embodiments of the present invention；
Fig. 3 is a kind of optional RSC state transition diagram schematic diagrames according to embodiments of the present invention；
Fig. 4 is a kind of schematic diagram of optional D-Turbo codings sequential according to embodiments of the present invention；
Fig. 5 is a kind of structural representation of optional D-Turbo encoders according to embodiments of the present invention；
Fig. 6 is a kind of flow chart of the interpretation method of optional Turbo code code word according to embodiments of the present invention；
Fig. 7 is a kind of schematic diagram of optional D-Turbo decodings sequential according to embodiments of the present invention；
Fig. 8 is a kind of structural representation of optional D-Turbo decoders according to embodiments of the present invention；
Fig. 9 is a kind of hardware architecture diagram of optional RSC decoders according to embodiments of the present invention.
Embodiment
In order that those skilled in the art more fully understand the present invention program, below in conjunction with the embodiment of the present invention Accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only It is the embodiment of a part of the invention, rather than whole embodiments.Based on the embodiment in the present invention, the common skill in this area The every other embodiment that art personnel are obtained under the premise of creative work is not made, should all belong to protection of the present invention Scope.
It should be noted that term " first " in description and claims of this specification and above-mentioned accompanying drawing, " Two " etc. be for distinguishing similar object, without for describing specific order or precedence.It should be appreciated that so make Data can exchange in the appropriate case, so that embodiments of the invention described herein can be with except scheming herein Show or describe those beyond order implement.In addition, term " comprising " and " having " and their any deformation, it is intended that Be to cover it is non-exclusive include, for example, containing the process of series of steps or unit, method, system, product or equipment Be not necessarily limited to those steps or the unit clearly listed, but may include not list clearly or for these processes, The intrinsic other steps of method, product or equipment or unit.
This application provides a kind of embodiment of the generation method of Turbo code code word.
Fig. 1 is a kind of flow chart of the generation method of optional Turbo code code word according to embodiments of the present invention, such as Fig. 1 Shown, this method comprises the following steps：
Step S101, it is allowed to while at least two sub-encoders of encoding and decoding receive the list entries of code respectively, wherein, The list entries of code comprises at least：By at least two group of information bits into symbol；
Step S102, by least two sub-encoders using reponse system convolution coding RSC to receiving the defeated of code Enter sequence to be encoded, generate coding result；
Step S103, exports coding result.
Compiled as an alternative embodiment, each sub-encoders include two circular recursion systematic convolutional code CRSC Code device, before at least two sub-encoders of permission encoding and decoding simultaneously receive the list entries of code respectively, method also includes： The correlation between two CRSC encoders of one of at least two sub-encoders is eliminated by interleaver.
As an alternative embodiment, CRSC encoders are based on from truncation mechanism, the first of each sub-encoders is controlled Beginning state is identical with final state, wherein, docked by least two sub-encoders using reponse system convolution coding RSC The list entries for receiving code is encoded, and generates coding result, including：Obtain original state position and the precoding of sub-encoders Obtained last current state；Precoding is carried out according to last current state, obtains the recurrent state of circular recursion systematic convolutional code, generation coding Matrix；The original state of sub-encoders is arranged to the recurrent state that precoding tries to achieve, and encodes that to obtain final state be first The final coding result of beginning mode bit.
As an alternative embodiment, during the list entries to sub-encoders input code, pass through first Control device MesgInAddr performs SECO, and at least one following in different stage execution：Input information bits, CRC check and the check bit data used for coding.
As an alternative embodiment, during coding, performed by second control device InnerAddr SECO, and it is at least one following in different stage execution：The coding that coding and information of the information without intertexture interweave.
As an alternative embodiment, during input coding result, pass through the 3rd control device OutAddr and the 4th control device OutIndex performs SECO, and at least one following in different stage execution：It is defeated Enter the coding result of predetermined length.
Count as an alternative embodiment, first control device carries out first to input information, counted first Reach predetermined figure and carry out bit check afterwards, and check results are preserved；The control of control second dress in end-of-encode Put beginning second to count, promoter is encoded.
As an alternative embodiment, the input of sub-encoders is controlled by second control device, and read and protected The check results deposited, and check results are encoded.
Explanation is further explained to a kind of concrete application mode of above-described embodiment with reference to Fig. 2：
The code word of D-Turbo codes is generated as shown in Fig. 2 being made up of two reponse system encoder for convolution codes RSC, two The correlation between the two subcodes is eliminated by interleaver Interleaver between component code, in order to improve code check, also needed Punctured to check bit progress, each symbol of list entries of code is made up of two information bits A and B, and component code is using certainly Truncation tail-biting reponse system convolutional code.
In order to improve the speed of encoding and decoding, each sub-encoders can be divided into two encoders, as shown in Fig. 2 first son Encoder is divided into RSC1a and RSC1b two parts, and second sub-encoders is divided into RSC2a and RSC2b two parts, and each section is only RSC codes are circulated from forming one so that this two parts can encoding and decoding simultaneously.
In exports coding result, parallel encoding is realized, coding output is sequentially output 1 bit between 4 encoders.
It is circular recursion systematic convolutional code CRSC that duobinary system Turbo code component code encoders, which use,.Circular recursion system Convolutional code is based on from truncation mechanism so that and the original state of encoder is identical with final state, reaches the circulation in state, this Individual identical state is referred to as recurrent state product Sc。
First, it is G to define generator matrix, and circular recursion systematic convolutional code encoder k moment state is Sk, list entries For vectorial Uk, then for moment k, recurrence Relation can be obtained：
Sk=G × Sk-1+Uk
So circular recursion systematic convolutional code encoder last current state：
Circular recursion systematic convolutional code requires recurrent state another name for Sichuan Province SN=S0=Sc, recurrent state can be tried to achieve by substituting into above formula：
If take S0=0, then, there is equation below：
The solution formula of recurrent state：
By above-mentioned derivation it is recognised that the cataloged procedure of circular recursion systematic convolutional code can be divided into two steps：
1. precoding process.Encoder original state is 0, and precoding obtains last current state formulaThen according to this last shape State, try to achieve the recurrent state S of circular recursion systematic convolutional code encoderc, because this solution procedure only has with generator matrix G Close, therefore corresponding specific generator matrix, can simply it be obtained by the method tabled look-up.
2. and then encoder original state is arranged to the recurrent state S that precoding tries to achievec, finally encoded, encoded Obtained final state is equal to original state Sc。
State transition diagram is as shown in figure 3, recurrent state ScIt is relevant with information sequence, and recurrent state S be presentcPremise It is matrix 1+GNIts state-transition table of reversible is as shown in table 1：
Table 1RSC state-transition tables
Under the transfer of this state, original state epitope (N%8==0).
Table 2RSC cyclic initial states tables
Code word is mapped with a variety of.
According to state transition diagram, different code words is mapped into Unified number, then addresses CodeMap by numbering.
Table 3RSC encodes CodeIndex tables
It is as follows that CodeMap is mapped as 10 bit examples.
Table 4RSC encodes CodeMap tables
For the coding sequential of the coded system described in above-mentioned embodiment, it encodes timing diagram as shown in Fig. 4, Coding mainly includes 3 stages：CRCENC, RSCENC and OUT stage.
This 3 stage subpackages are transferred by the data flow between 2 MesgBuffer and 2 CodeBuffer implementation phases.
CRCENC performs input and CRC codings.Control sequential is performed by MesgInAddr.MesgInAddr is in 0-999 When, input information bits；MesgInAddr exports the CRC check of 24 bits in 1000-1023.1000 information and 24 Check bit inputs MesgBuffer, is used for coding.
RSCENC performs RSC codings.Control sequential is performed by InnerAddr.InnerAddr points are 2 small stages, point Not Zhi Hang RSC1 (information without interweave) and RSC2 (information intertexture) coding；Each small stage is respectively divided into 2 groups, before performing respectively The coding of 256 2 bits and rear 256 2 bits.Each 256 bits of encoded is divided into two processes again, and first process calculatesSecond process according toCyclic initial states Sc is obtained by mark, tail biting codes is carried out further according to Sc, provides coding CodeIndex, it is shown in Table 3；In the result deposit CodeBuffer of tail biting codes.
The OUT stages perform CodeMap and output.Control sequential is controlled by OutAddr and OutIndex.OutAddr is by 0 To 255, each 256 coding word of encoder are represented.OutIndex is 0 ... 4/R-1, wherein R is code check 1/3,1/6,1/ 10、1/20.OutIndex inquires about RSC1a, RSC1b, RSC2a and RSC2b CodeIndex (tables successively within every 4 cycles 3) CodeMap (table 4), the OutIndex/4 bit of follower then, are inquired about according to respective CodeIndex.
As shown in figure 5, encoder includes 3 parts (being split by a dotted line per part in Figure 5).
Part I is to perform CRC operation, and MesgInAdd counts to input information, and CRCEnc is after counting 1000 24 bit checks are exported, are then stored in the MesgBuffer of ping-pong structure.Generator polynomial：GI [x]=x24+x7+x2+x+1
When CRC end-of-encodes, InnerAddr is started counting up, and starts RSCEnc, carries out RSCEnc codings.RSCEnc's Input is controlled by InnerAddr and IntlvAddr, and RSA1a, RSC1b, RSC2a and RSC2b are read from MesgBuffer Input, is encoded.Coding result is CodeIndex, is stored in CodeBuffer.
When RSC end-of-encodes, start to export.OutAddr reads the CodeIndex in CodeBu, then tables look-up CodeMap, exports coding result.
MesgInAddr is the counter of one 0 to 1024, and 1024 be stopping state.
InnerAddr is the technology device of one 0 to 2048, and 2048 be stopping state.
OutAddr is the counter of one 0 to 256, and 256 be stopping state.
OutIndex is one 0 counter to 4/R-1, and OutInd stops when OutAddr stops.
RSCEnc is a state machine, and state-transition table is shown in Table 3.
Present invention also provides a kind of embodiment of the interpretation method of Turbo code code word.
Fig. 6 is a kind of flow chart of the interpretation method of optional Turbo code code word according to embodiments of the present invention, such as Fig. 6 Shown, this method comprises the following steps：
Step S201, receive the sequence to be decoded of input；
Step S202, coding sequence is treated by decoder and performs decoding, obtain decoding result, wherein, decode process bag The first decoding stage and the second decoding stage are included, the first decoding stage was to perform feedback system by the first code translator RSCDEC The convolution coding RSC that unites is decoded, and the second decoding stage was that the first decoding stage was translated by the second code translator PCRCDEC Code result performs cardiopulmonary bypass in beating heart redundancy check code PCRC decodings；
Step S203, output decoding result.
As an alternative embodiment, receiving the sequence to be decoded of input includes：At least two sub-decoders are based on SECO is come the coding result of sub-encoders generation corresponding to receiving respectively；The sequence to be decoded is held by decoder Row decoding, obtaining decoding result includes：At least two sub-decoder is iterated to the corresponding coding result respectively Decoding, obtain decoding result.
As an alternative embodiment, during the iterative decoding, by performing SECO in difference Stage perform it is at least one following：Information interweaves without interweaving with information.
As an alternative embodiment, the sequence to be decoded of input is divided into multiple subcodes, each subcode is by corresponding Encoder exports, and multiple subcodes correspond to multiple encoders, and receiving the sequence to be decoded of input includes：Pass through first control device Output of the AddrInM controls to current encoder counts；Counted in first control device AddrInM and reach predetermined word After number, controlled by second control device AddInL according to preset order and select next needs to connect in multiple encoders The encoder of input is received, and counting is re-executed by first control device AddrInM.
As an alternative embodiment, the sequence to be decoded of input is divided into multiple subcodes, is treated and translated by decoder Code sequence performs decoding, obtains decoding result, including：Perform to enter multiple subcodes by the 3rd control device InnerItern Iteration SECO during row decoding, wherein, the 3rd control device is used to be counted, and according to current count in more height Subcode corresponding to selection in code.
As an alternative embodiment, compiled performing reponse system convolutional code by the first code translator RSCDEC During code RSC decodings, the calculating before performing respectively to transition probability and backward transition probability, wherein, in the process that execution calculates In, to transition probability and backward transition probability before being stored by the first storage unit A xInfo, pass through the second memory cell ExInfo stores external information, stores decoding judgement simultaneously by the 3rd memory cell DxMesg and the 4th memory cell DxBits Bit.
As an alternative embodiment, passing through decodings of the second code translator PCRCDEC to the first decoding stage When as a result performing cardiopulmonary bypass in beating heart redundancy check code PCRC decodings, by the 4th control device CRCAddr according to default timing planning The SECO to CRC decodings is performed, presets timing planning to read the number of presetting digit capacity from the 3rd memory cell DxMesg According to.
As an alternative embodiment, output decoding result includes：Performed by the 5th control device OutAddt The SECO exported to decoding result, wherein, decoding result is the number read from the 4th memory cell DxBits According to.
As an alternative embodiment, the first code translator RSCDEC includes path metric Gamma modules, initial State measurement iniMetric modules, state metric calculation Metric modules, forward state metric storage AxInfo modules, total shape Attitude amount TotalMetric modules, likelihood ratio calculate LLR modules, wherein, path metric Gamma modules are used to perform branch road degree Amount calculates, and original state measurement iniMetric modules are used to perform the initialization to measuring Metric, state metric calculation Metric modules are used to perform the calculating to path metric, and forward state metric storage AxInfo modules are used to preserve state degree Amount calculates the forward state metric that Metric modules are calculated, and total state measurement TotalMetric modules are used to calculate total degree Amount, likelihood ratio calculate LLR modules and are used to calculate Soft Inform ation.
As an alternative embodiment, path metric Gamma modules are according to being distributed to channel information, the school of itself Information and external information are tested, is combined according to the state transition diagram of convolutional code or Turbo code, output channel metrics, verification measurement And path metric.
As an alternative embodiment, the sequence to be decoded of input is divided into multiple subcodes, original state measurement IniMetric modules are used to preserve the forward direction final states of each subcode and backward final states, the final states corresponding to loading in next iteration As initial state, measure Metric initialization.
As an alternative embodiment, state metric calculation Metric modules carry out recurrence fortune according to path metric Calculate, obtain forward state metric and backward state measurement.
As an alternative embodiment, forward state metric storage AxInfo modules are used for forward state metric It is supplied to likelihood ratio to calculate LLR modules.
As an alternative embodiment, likelihood ratio calculates LLR modules obtains priori letter according to forward state metric Breath, calculating judge likelihood ratio.
Explanation is further explained to a kind of concrete application mode of above-described embodiment with reference to Fig. 7：
As shown in fig. 7, decoding mainly includes 4 stages：Input, RSCDEC, pcrcdec and Out stage.
This 4 stage subpackages are moved by the data flow between 2 CxInfo and 2 DxMesg, 2 DxBits implementation phases Hand over.
The Input stages perform input.Control sequential is controlled by AddrInM and AddrInL, corresponds to coding OUT's respectively OutAddr and OutIndex.For AddrInM by 0 to 255, corresponding each encoder 256 encodes word.AddrInL is 0 ... 4/ R-1, wherein R are code check 1/3,1/6,1/10,1/20.AddrInL inquired about successively within every 4 cycles RSC1a, RSC1b, RSC2a and RSC2b the AddrInL/4 information of input.Input in information deposit CxInfo.CxIn is corresponding by CodeMap Every 1/R information be stored in respectively in different RAM blocks so that follow-up decoding can be with parallel read-out.
RSCDEC performs RSC decodings.Control sequential is performed by InnerItern and InnerIndex.InnerItern points For 4 small stages, RSC1a/1b (information is without intertexture) and RSC2a/2b (information intertexture) decoding is performed respectively；It is each small Stage is respectively divided into 2 groups, to transition probability A before performing respectivelykAnd backward transition probability B (s)k(s) calculating.The two processes Effectively calculating needs 256 to clap, and has 8 bat spaces in front, is loaded into for original state, there are 8 bat spaces at rear, deposited for result of calculation Storage.The forward direction transition probability A of decodingkAnd backward transition probability B (s)k(s) AxInfo, external information L are stored ine(uk) deposit ExInfo, decoding decision bits are stored in DxMesg and DxBits simultaneously.The iteration of whole process is controlled by InnerItern, Every 4 of InnerItern, which is counted, completes an iterative process.
Pcrcdec performs parallel crc decodings.Control sequential is CRCAddr.The module reads 32 every time from DxMesg Bit, clapped by 32 and read the progress CRC decodings of 1024 bits, realize that the Parallel CRC decoding of 1024 bits is completed in 32 bats.
Out modules export.Control sequential is OutAddt.The module reads decoding result from DxBits by bit.
As shown in figure 8, decoder includes four parts：
Part I is to perform input.AddrInM is that code word reads counter, and AddrInL is the 1/R in each code word The reading counter of individual information.In input deposit Pingpang Memory CxInfo；CxInfo by 1/R information in each code word simultaneously Row storage.
Work as end of input, start to decode.Start two decoders during decoding simultaneously, perform respectively RSC1a and RSC1b (or RSC2a and RSC2b) decoding.During decoding, when InnerItern moulds 4 are 0, RSC1a and RSC1b forward direction transition probability is carried out Calculating；When InnerItern moulds 4 are 1, the calculating of RSC1a and RSC1b backward transition probability is carried out；InnerItern moulds 4 For 2 when, carry out RSC2a and RSC2b forward direction transition probability calculating；InnerItern moulds 4 be 3 when, carry out RSC2a and The calculating of RSC2b backward transition probability.RSC calculates output external information and decoding result, external information deposit ExInfo, decoding As a result it is stored in simultaneously in DxMesg and DxBits.
When decoding terminates, execution CRCdec operations, CRCAdd counts to input bit, and pcrcdec is when counting 32 The bit of output verification correctness.
When CRC decodings terminate, execution output operates.Output exports 1000 bits from DxBits by bit.
AddrInL is one 0 counter to 4/R, cycle count, is stopped in AddrInM==256.
AddrInL is the counter of one 0 to 256, and 256, to stop state, add 1 in AddrInL==4/R-1.
InnerIndex first adds for one subtracts to obtain cycle counter afterwards, is first added to 256+8 from -8, then subtracts from 256+8 To -8；InnerIter is one 0 counter to ITERNUM, and ITERNUM is stopping state.
CRCAddr is the counter of one 0 to 32, and 32 be stopping state.
OutAddr is the counter of one 0 to 1000, and 1000 be stopping state.
RSCDec is a RSC decoder.
As shown in figure 9, the hardware configuration of decoder includes path metric Gamma modules, original state is measured IniMetric modules, state metric calculation Metric modules, forward state metric storage AxInfo modules, total state measurement TotalMetric modules, likelihood ratio calculate LLR modules.
(1) Gamma modules perform path metric and calculated：
Channel information, check information and the external information that path metric comes according to distribution, according to convolutional code or Turbo code State transition diagram be combined, export channel metricsVerification measurementWith path metric Ek.I.e.
WhereinAs InGammaE in figure, EkAs InGamma in figure, 64 states of its 64 data corresponding tables 3 Shift branch road.T is normalization factor.
(2) Metric completes path metric calculating：
According to path metric, recursive operation is carried out, you can obtain forward state metric AkAnd backward state measurement B (s)k (s) it is：
Forward state metric A is performed when InnerItern moulds 2 are 0k(s) calculate, held when InnerItern moulds 2 are 1 The backward state measurement B of rowk(s) calculate.In this calculating process, the state such as table 5 of forward direction transfer, backward transfering state table is such as Table 1.
Table 5RSC forward-facing state transfer tables
(3) iniMetric completes the initialization to Metric.
Because RSC codes employ loop structure, so the initial state of each sub-decoder is the final states of its last iteration. IniMetric preserves RSCa forward direction final states, the forward direction final states of backward final states and RSCb, backward final states, totally 4 groups of state values, In the initial state the most of final states corresponding to loading during next iteration, carry out measuring Metric initialization.
(4) AxInfo preserves forward metrics result of calculation, is calculated for LLR.
(5) Totalmetric modules calculate total measurement, i.e.,
Work as ukWhen=0.3, the transfer of its state respectively has 16
Work as uk=0, s ' fetching corresponding table 1 the 2nd row；Work as uk=1, s ' fetching corresponding table 1 the 3rd row；Work as uk=2, s ' 4th row of fetching corresponding table 1；Work as uk=3, s ' fetching corresponding table 1 the 5th row.
(6) calculating of LLR Soft Inform ations, 3 steps mainly are included：
1) minimum state shifts, that is, completes to select 1 minimum value to compare for 4 16
2) likelihood ratio calculates, i.e., 0.3 likelihood ratio subtracts 0 likelihood ratio, and obtaining prior information is：
3) judgement likelihood ratio finally, is calculated, i.e.,
This application provides a kind of design method and coding and code translator of low bit- rate binary turbo case code, this method By circular recursion systematic convolutional code, anury bits of encoded is realized；By long sequence mapping check bit, low bit- rate code word is realized Generation；It is parallel by multiple recursive systematic convolutional codes, realize high-speed encoding and decoding.The device can high speed realize low complexity The encoding and decoding of the binary turbo code of low bit- rate anury bit are spent, solve that existing low bit- rate error correcting code complexity is larger to ask Topic.
Compared with prior art, the application includes advantages below：
The application will design low bit- rate binary turbo case code, realize the volume of low complex degree low bit- rate binary turbo case code Code and decoding, solve design and application problem of the Turbo code in low bit- rate field.
The application receives the list entries of code by least two sub-encoders of permission encoding and decoding simultaneously respectively, wherein, The list entries of code comprises at least：By at least two group of information bits into symbol；By at least two sub-encoders using feedback Systematic convolutional code coding RSC encodes to the list entries for receiving code, generates coding result；Exports coding result；Pass through Decoder treats coding sequence and performs decoding, obtains decoding result, wherein, decoding process included for the first decoding stage and second Decoding stage, the first decoding stage are to perform reponse system convolution coding RSC decodings by the first code translator RSCDEC, Second decoding stage was superfluous to the decoding result execution cardiopulmonary bypass in beating heart in the first decoding stage by the second code translator PCRCDEC Remaining check code PCRC decodings；Output decoding result, solves coding and the decoding of low bit- rate Turbo code in correlation technique The higher technical problem of complexity, and then the complexity of the coding for reducing Turbo code and decoding is realized, and then realize error correction The technique effect of function.
Certainly, any product for implementing the application it is not absolutely required to reach all the above advantage simultaneously.
It should be noted that accompanying drawing flow chart though it is shown that logical order, but in some cases, can be with To perform shown or described step different from order herein.
Above-mentioned device can include processor and memory, and said units can be stored in as program unit In reservoir, corresponding function is realized by the said procedure unit of computing device storage in memory.
Memory may include the volatile memory in computer-readable medium, random access memory (RAM) And/or the form such as Nonvolatile memory, such as read-only storage (ROM) or flash memory (flash RAM), memory includes at least one Storage chip.
The order of above-mentioned the embodiment of the present application does not represent the quality of embodiment.
In above-described embodiment of the application, the description to each embodiment all emphasizes particularly on different fields, and does not have in some embodiment The part of detailed description, it may refer to the associated description of other embodiment.In several embodiments provided herein, it should manage Solve, disclosed technology contents, can realize by another way.
Wherein, device embodiment described above is only schematical, such as the division of the unit, Ke Yiwei A kind of division of logic function, can there is an other dividing mode when actually realizing, for example, multiple units or component can combine or Person is desirably integrated into another system, or some features can be ignored, or does not perform.Another, shown or discussed is mutual Between coupling direct-coupling or communication connection can be by some interfaces, the INDIRECT COUPLING or communication of unit or module Connection, can be electrical or other forms.
In addition, each functional unit in each embodiment of the application can be integrated in a processing unit, can also That unit is individually physically present, can also two or more units it is integrated in a unit.Above-mentioned integrated list Member can both be realized in the form of hardware, can also be realized in the form of SFU software functional unit.
If the integrated unit is realized in the form of SFU software functional unit and is used as independent production marketing or use When, it can be stored in a computer read/write memory medium.Based on such understanding, the technical scheme essence of the application On all or part of the part that is contributed in other words to prior art or the technical scheme can be with the shape of software product Formula is embodied, and the computer software product is stored in a storage medium, including some instructions to cause one calculating Machine equipment (can be personal computer, server or network equipment etc.) performs the complete of each embodiment methods described of the application Portion or part steps.And foregoing storage medium includes：It is USB flash disk, read-only storage (ROM, Read-Only Memory), random Access memory (RAM, Random Access Memory), mobile hard disk, magnetic disc or CD etc. are various can be with storage program The medium of code.
Described above is only the preferred embodiment of the application, it is noted that for the ordinary skill people of the art For member, on the premise of the application principle is not departed from, some improvements and modifications can also be made, these improvements and modifications It should be regarded as the protection domain of the application.

Claims (22)

  1. A kind of 1. generation method of Turbo code code word, it is characterised in that including：
    At least two sub-encoders of encoding and decoding simultaneously are allowed to receive the list entries of code respectively, wherein, the input sequence of the code Row comprise at least：By at least two group of information bits into symbol；
    By at least two sub-encoders using reponse system convolution coding RSC to receiving the list entries of the code Encoded, generate coding result；
    Export the coding result.
  2. 2. according to the method for claim 1, it is characterised in that each sub-encoders include two circular recursion system convolution Code CRSC encoders, it is described before at least two sub-encoders of permission encoding and decoding simultaneously receive the list entries of code respectively Method also includes：
    The correlation between the list entries for the code that at least two sub-encoders receive is eliminated by interleaver.
  3. 3. according to the method for claim 2, it is characterised in that the CRSC encoders are based on every from truncation mechanism, control The original state of individual sub-encoders is identical with final state, wherein, use reponse system by least two sub-encoders Convolution coding RSC encodes to the list entries for receiving the code, generates coding result, including：
    Obtain the original state position of the sub-encoders and last current state that precoding obtains；
    Precoding is carried out according to the last current state, obtains the recurrent state of circular recursion systematic convolutional code, generates encoder matrix；
    The original state of the sub-encoders is arranged to the recurrent state that precoding tries to achieve, and encodes and obtains final state as institute State the final coding result of original state position.
  4. 4. according to the method for claim 1, it is characterised in that the list entries of the code is being inputted to the sub-encoders During, SECO is performed by first control device MesgInAddr, and perform in different stage it is following at least it One：Input information bits, CRC check and the check bit data used for coding.
  5. 5. according to the method for claim 4, it is characterised in that during coding, pass through second control device InnerAddr performs SECO, and at least one following in different stage execution：Coding and information of the information without intertexture are handed over The coding knitted.
  6. 6. according to the method for claim 5, it is characterised in that during the coding result is inputted, pass through the 3rd Control device OutAddr and the 4th control device OutIndex performs SECO, and is performed as follows at least in the different stages One of：Input the coding result of predetermined length.
  7. 7. according to the method for claim 6, it is characterised in that the first control device carries out the first meter to input information Number, bit check is carried out after the first counting reaches predetermined figure, and check results are preserved；In end-of-encode time control Make the second control device and start the second counting, promoter is encoded.
  8. 8. according to the method for claim 7, it is characterised in that the input of the sub-encoders is by the second control device Control, and saved check results are read, and check results are encoded.
  9. A kind of 9. interpretation method of Turbo code code word, it is characterised in that including：
    Receive the sequence to be decoded of input；
    Decoding is performed to the sequence to be decoded by decoder, obtains decoding result, wherein, decoding process includes the first decoding Stage and the second decoding stage, the first decoding stage is to perform reponse system convolutional code by the first code translator RSCDEC RSC decodings are encoded, the second decoding stage is by decodings of the second code translator PCRCDEC to the described first decoding stage As a result cardiopulmonary bypass in beating heart redundancy check code PCRC decodings are performed；
    Export the decoding result.
  10. 10. according to the method for claim 9, it is characterised in that
    Receiving the sequence to be decoded of input includes：At least two sub-decoders are based on SECO and compiled to receive corresponding son respectively The coding result of code device generation；
    Decoding is performed to the sequence to be decoded by decoder, obtaining decoding result includes：At least two sub-decoder Decoding is iterated to the corresponding coding result respectively, obtains decoding result.
  11. 11. according to the method for claim 10, it is characterised in that during the iterative decoding, when passing through execution Sequence control performs at least one following in the different stages：Information interweaves without interweaving with information.
  12. 12. according to the method for claim 9, it is characterised in that the sequence to be decoded of the input is divided into multiple subcodes, often Individual subcode is exported by corresponding encoder, and the multiple subcode corresponds to multiple encoders, is received the sequence to be decoded of input and is included：
    The output to current encoder is controlled to count by first control device AddrInM；
    The first control device AddrInM count reach default number of words after, by second control device AddInL according to Preset order control selects next encoder for needing to receive input in the multiple encoder, and is controlled by described first Device AddrInM processed re-executes counting.
  13. 13. according to the method for claim 9, it is characterised in that the sequence to be decoded of the input is divided into multiple subcodes, leads to Cross decoder and decoding is performed to the sequence to be decoded, obtain decoding result, including：
    Iteration SECO when entering row decoding to the multiple subcode is performed by the 3rd control device InnerItern, its In, the 3rd control device is used to be counted, and subcode corresponding to being selected in the multiple subcode according to current count.
  14. 14. according to the method for claim 9, it is characterised in that feedback system is being performed by the first code translator RSCDEC When the convolution coding RSC that unites is decoded, the calculating before performing respectively to transition probability and backward transition probability, wherein, performing meter During calculation, the forward direction transition probability and the backward transition probability are stored by the first storage unit A xInfo, passed through Second memory cell ExInfo stores external information, is deposited simultaneously by the 3rd memory cell DxMesg and the 4th memory cell DxBits Storage decoding decision bits.
  15. 15. according to the method for claim 14, it is characterised in that by the second code translator PCRCDEC to described the When the decoding result in one decoding stage performs cardiopulmonary bypass in beating heart redundancy check code PCRC decodings, pass through the 4th control device CRCAddr The SECO to CRC decodings is performed according to default timing planning, the default timing planning is from the 3rd memory cell The data of presetting digit capacity are read in DxMesg.
  16. 16. according to the method for claim 14, it is characterised in that the output decoding result includes：
    The SECO exported to the decoding result is performed by the 5th control device OutAddt, wherein, the decoding As a result the data to be read from the 4th memory cell DxBits.
  17. 17. according to the method for claim 14, it is characterised in that the first code translator RSCDEC includes path metric Gamma modules, original state measurement iniMetric modules, state metric calculation Metric modules, forward state metric storage AxInfo modules, total state measurement TotalMetric modules, likelihood ratio calculate LLR modules, wherein, the path metric Gamma Module is used to perform path metric calculating, and the original state measurement iniMetric modules are used to perform to measurement Metric's Initialization, the state metric calculation Metric modules are used to perform the calculating to path metric, and the forward state metric is deposited Storage AxInfo modules are used to preserve the forward state metric that the state metric calculation Metric modules are calculated, total shape Attitude amount TotalMetric modules are used to calculate total measurement, and the likelihood ratio calculates LLR modules and is used to calculate Soft Inform ation.
  18. 18. according to the method for claim 17, it is characterised in that the path metric Gamma modules are according to being distributed to oneself Channel information, check information and the external information of body, are combined according to the state transition diagram of convolutional code or Turbo code, output letter Road measurement, verification measurement and path metric.
  19. 19. according to the method for claim 17, it is characterised in that the sequence to be decoded of the input is divided into multiple subcodes, The original state measurement iniMetric modules are used to preserve the forward direction final states of each subcode and backward final states, in next iteration When be loaded into corresponding to final states be used as initial state, progress measurement Metric initialization.
  20. 20. according to the method for claim 17, it is characterised in that the state metric calculation Metric modules are according to Path metric carries out recursive operation, obtains forward state metric and backward state measurement.
  21. 21. according to the method for claim 17, it is characterised in that the forward state metric storage AxInfo modules are used for It is supplied to the likelihood ratio to calculate LLR modules the forward state metric.
  22. 22. according to the method for claim 21, it is characterised in that the likelihood ratio calculates LLR modules according to the forward direction State measurement obtains prior information, and calculating judges likelihood ratio.
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