CN107706185A - Manufacture the rear grid technique of three-dimensional storage - Google Patents
Manufacture the rear grid technique of three-dimensional storage Download PDFInfo
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- CN107706185A CN107706185A CN201710729964.3A CN201710729964A CN107706185A CN 107706185 A CN107706185 A CN 107706185A CN 201710729964 A CN201710729964 A CN 201710729964A CN 107706185 A CN107706185 A CN 107706185A
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- titanium nitride
- metal gate
- metal
- grid technique
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
Abstract
The present invention relates to the rear grid technique of manufacture three-dimensional storage, the technique is after metal gate formation, in the surface cvd nitride titanium film of trenched side-wall, separation layer and metal level, the titanium nitride metal film of trenched side-wall is removed with anisotropic plasma etching method again, remainder is attached to barrier layer of the partial nitridation titanium film on the surface of separation layer and metal gate as metal gate, prevent to be oxidized to the extremely strong palpus shape metal of penetration power in the subsequent step of this technique of metal gate, and then avoid the leaky between metal gate and tungsten wall.
Description
Technical field
The present invention relates to the manufacturing process area of semiconductor, more particularly to a kind of rear grid technique for manufacturing three-dimensional storage.
Background technology
With the continuous development of semiconductor technology, memory manufacturing technology is progressively from simple planar structure mistake at present
It is one of main flow of international research and development to cross to complex three-dimensional structure, the technical research of three-dimensional storage.
Grid technique is the major technique for the structure to form three-D structure memory afterwards, its first with silicon nitride as false grid,
It will be isolated between false grid with silica, forming raceway groove hole and then carrying out grizzly bar etching, then removing false grid, filling gold
Belong to tungsten grid, then separated metal gate using the method for etching.Complete metal gate separation after, then carry out side wall silica deposition,
Etching, the deposition (ACS, Array Common Source, array common source) of tungsten wall is then carried out again, form gold afterwards
Category contact.
We have found that in existing technique, in the side wall silica deposition process that metal gate easily continues after it is formed
Aoxidize, generation palpus shape metal (whisker), as shown in figure 1, this palpus shape metal is very easy to penetrate side wall titanium dioxide
Silicon, cause the electric leakage between metal gate and tungsten wall, so as to cause product failure.
The content of the invention
The purpose of the present invention is to solve at least one of problem above, and the present invention provides a kind of manufacture three-dimensional storage
Grid technique afterwards.
A kind of rear grid technique for manufacturing three-dimensional storage, including：
Substrate is provided, two kinds of deposits are alternately stacked in the upper surface of substrate, is formed and is alternately provided with insulating barrier from bottom to top
With the alternating layer of sacrifice layer, the alternating layer includes some insulating barriers and some sacrifice layers, and insulating barrier is always most its upper strata.
Deep hole etching is carried out to alternating layer, forms the raceway groove hole set in a row, alternating layer is run through in raceway groove hole.
Raceway groove hole is filled, forms raceway groove pore structure.
Etched in alternating layer between two adjacent row's raceway groove pore structures, form groove.
Sacrifice layer is removed, to form metal gate deposition space between adjacent dielectric layers.
One or more layers separation layer is deposited in metal gate deposition space.
On the surface of separation layer, deposited metal tungsten forms metal level to fill metal gate deposition space.
Return and carve metal level, the partial metal layers close to groove are removed, to expose the part surface of separation layer, remaining part
Metal level is metal gate.
Depositing titanium nitride, titanium nitride membrane is formed, make the table of titanium nitride membrane covering groove side wall, separation layer and metal gate
Face.
Etch nitride titanium film, to remove the titanium nitride membrane for being covered in trenched side-wall.
Silica is deposited, to form the silicon dioxide side wall of covering groove side wall and titanium nitride membrane surface；
Deposits tungsten forms tungsten wall, to fill up groove.
Wherein, depositing titanium nitride and the step of form titanium nitride membrane in, the thickness of the titanium nitride membrane of formation is located at 0.1
Between~10nm.
Wherein, in the step of being etched to titanium nitride membrane, using anisotropic dry plasma etch, trenched side-wall is removed
Titanium nitride membrane.
Wherein, in substrate step is provided, the deposit for forming sacrifice layer is silicon nitride, and the deposit for forming insulating barrier is
The thickness of silica, single layer sacrificial layer and insulating barrier is 10~80nm.
Wherein, total thickness of alternating layer is more than 1um.
Wherein, two layers of separation layer, including the first separation layer for being formed by aluminum oxide and by titanium nitride formed second every
Absciss layer, wherein the thickness of the second separation layer is 1~10nm.
Wherein, after removing sacrifice layer, form one or more layers separation layer step before, in addition to groove carry out phosphorus
The step of acid rinse：Between the temperature of phosphoric acid is 100~200 DEG C, rinsing time is 10~100min.
Wherein, raceway groove pore structure includes tunnel layer, accumulation layer, barrier layer and polysilicon layer.
Wherein, in the step of depositing titanium nitride, the method for depositing titanium nitride is ALD or CVD.
The invention has the advantages that：
After the present invention in metal gate by forming, one layer of titanium nitride membrane is deposited on the surface of metal gate, is effectively pressed down
Oxidation of the metal gate in subsequent technique has been made, so as to improve the leaky between metal gate and tungsten wall, has been improved
The yield of product.
Brief description of the drawings
By reading the detailed description of hereafter preferred embodiment, it is various other the advantages of and benefit it is common for this area
Technical staff will be clear understanding.Accompanying drawing is only used for showing the purpose of preferred embodiment, and is not considered as to the present invention
Limitation.And in whole accompanying drawing, identical part is denoted by the same reference numerals.In the accompanying drawings：
Fig. 1 shows the TEM sections of the three-dimensional storage of the common rear grid technique processing procedure according to embodiment of the present invention
Figure；
Fig. 2 shows the flow chart of the rear grid technique of the manufacture three-dimensional storage device according to embodiment of the present invention；
Fig. 3 a~Fig. 3 g show the structure flow chart of the rear grid technique of the manufacture three-dimensional storage device of embodiment of the present invention；
In figure, 1. substrates, 2. alternating layers, 210 insulating barriers, 220 sacrifice layers, 230 raceway groove holes, 240 grooves, 2101 tops are absolutely
The lower surface of edge layer, the upper surface of 2102 underlying insulating layers, 2,210 first separation layers, 2,220 second separation layers, 2230 metal levels,
2410 titanium nitride membranes, 2420 silicon dioxide side walls, 2430 tungsten walls.
Embodiment
The illustrative embodiments of the disclosure are more fully described below with reference to accompanying drawings.Although this public affairs is shown in accompanying drawing
The illustrative embodiments opened, it being understood, however, that may be realized in various forms the disclosure without the reality that should be illustrated here
The mode of applying is limited.Conversely, there is provided these embodiments are to be able to be best understood from the disclosure, and can be by this public affairs
The scope opened completely is communicated to those skilled in the art.
After existing in grid technique, due to the easy quilt in follow-up silica deposition process of metal gates of generation
Palpus shape metal is oxidized to, as shown in figure 1, the palpus shape metal of generation, which is close to silica, deposits the groove side wall to be formed growth, when
After it penetrates silicon dioxide side wall, the electric leakage between metal gate and tungsten wall is may result in, the present invention is to avoid the hair of such case
It is raw, the moderate titanium nitride membrane of a layer thickness is grown between metal gate and silicon dioxide side wall as protective layer, can be effective
Ground prevents metal gate to be oxidized, and then ensures the normal use of product.
As shown in Fig. 2 the rear grid technique provided by the invention containing titanium nitride membrane growth step specifically includes following step
Suddenly：
Substrate is provided, two kinds of deposits are alternately stacked in the upper surface of substrate, is formed and is alternately provided with insulating barrier from bottom to top
With the alternating layer of sacrifice layer, the alternating layer includes some insulating barriers and some sacrifice layers, and insulating barrier is always most its upper strata；It is right
Alternating layer carries out deep hole etching, forms the raceway groove hole set in a row, alternating layer is run through in raceway groove hole；Raceway groove hole is filled, forms raceway groove
Pore structure；Etched in alternating layer between two adjacent row's raceway groove pore structures, form groove；Sacrifice layer is removed, with adjacent two
Metal gate deposition space is formed between layer insulating；One or more layers separation layer is deposited in metal gate deposition space；In separation layer
Surface, deposited metal tungsten forms metal level to fill metal gate deposition space；Return and carve metal level, remove close to the portion of groove
Divide metal level, to expose the part surface of separation layer；Depositing titanium nitride, titanium nitride membrane is formed, titanium nitride membrane is covered ditch
The surface of groove sidewall, separation layer and metal level；Etch nitride titanium film, to remove the titanium nitride membrane for being covered in trenched side-wall；
Silica is deposited, to form covering groove side wall, the silicon dioxide side wall on titanium nitride membrane surface；Deposits tungsten forms tungsten wall,
To fill up groove.
Below in conjunction with Fig. 3 a~3g, by way of specific embodiment, the technical scheme provided present embodiment is entered
Row is specific to be explained, wherein Fig. 3 a~3g are the structure flow chart of the rear grid technique of the application, while each figure in 3a~3f
It is illustrated respectively in the structure change occurred in corresponding step.
The step of offer substrate of Fig. 3 a corresponding diagrams 2.As shown in Figure 3 a, a substrate 1 is first provided, then handed on substrate 1
For two kinds of deposits are stacked, every kind of deposit is correspondingly formed a kind of structure sheaf.Under normal circumstances, two kinds of deposit selections are nitrogen
SiClx and silica, silica form insulating barrier 210, silicon nitride sacrificial layers 220, insulating barrier 210 and sacrifice layer 220 using substrate as
Base, it is arranged alternately from bottom to top so as to form the alternating layer 2 positioned at substrate top surface, presses close to substrate top surface in alternating layer 2
The bottom is insulating barrier 210, and the superiors away from substrate top surface are similarly insulating barrier 210, therefore contain in alternating layer exhausted
Edge layer 210 is at least two layers, and the sacrifice layer contained is at least one layer.Ensure that the thickness of every layer insulating 210 and sacrifice layer 220 is equal
Between 10~80nm.It should be noted that both the above deposit is not limited only to silicon nitride and silica, other are any
The material composition of identical function can be played in the range of present claims protection.
The formation raceway groove hole of Fig. 3 b corresponding diagrams 2 and formation raceway groove two steps of pore structure.As shown in Figure 3 b, by photoetching and
The deep hole that etching technics carries out high-aspect-ratio to alternating layer 2 is etched, and the upper surface of the substrate 1 of correspondence position is exposed,
The raceway groove hole 230 run through is formed in alternating layer 2.Raceway groove hole 230 is in multiple rows of setting in alternating layer, and its number of permutations can be 1,
22, 32..., (1+n)2, n is the natural number more than 1.It is filled after forming raceway groove hole 230, in raceway groove hole 230
Wall forms tunnel layer, accumulation layer, barrier layer and polysilicon layer etc. respectively, and then forms raceway groove pore structure.
The step of formation trench step and removal sacrifice layer of Fig. 3 c corresponding diagrams 2 form metal gate deposition space, such as Fig. 3 c
It is shown, using etching technics, bar shaped deep trouth is etched between two adjacent row's raceway groove pore structures, forms groove 240.Continue with
Etching technics, remove sacrifice layer 220, formed between adjacent dielectric layers for deposited metal grid white space (i.e.
Metal gate deposition space described in claim).After being given in removal sacrifice layer, phosphoric acid rinsing is carried out to groove, removes ditch
Groove sidewall impurity, prepared for the step of subsequent deposition titanium nitride formation film.The temperature of the phosphoric acid of rinsing is located at 100~200
Between DEG C, rinsing time is between 10~100m.
The step of one or more layers separation layer of the formation of Fig. 3 d corresponding diagrams 2 and formation metal level step.As shown in Figure 3 d,
In a specific embodiment, two layers of separation layer is deposited in every layer of metal gate deposition space, i.e. the first separation layer and second every
Absciss layer.First separation layer is covered in adjacent this layer of metal gate deposition space and sets and be located at upper above the metal gate deposition space
The lower surface 2101 of square insulating barrier, adjacent this layer of metal gate deposition space set and are located at below this layer of metal gate deposition space
The side wall table of raceway groove pore structure between the upper surface 2102 of underlying insulating layer and insulating barrier above and underlying insulating layer
Face.Second separation layer is covered in the surface of the first separation layer.First separation layer 2210 is alumina layer, and the second separation layer 2220 is
Titanium nitride separation layer.Then, deposited metal tungsten is continued in metal gate deposition space, the tungsten is covered in the second separation layer 2220
Surface, and be filled in the remaining gap of metal gate deposition space, form metal level 2230.
In another embodiment, only deposit to form a kind of separation layer in metal gate deposition space, the composition of the separation layer
For silicon nitride, the thickness of the separation layer is 1~10nm, tungsten is covered in the surface of the nitride spacer, and fill gold
The remaining space for belonging to grid deposition space forms metal level.
Fig. 3 e corresponding diagrams 2 return the step of carving metal level.As shown in Figure 3 e, the part that will be close to groove side is carved by returning
Metal level removes, and the partial metal layers of remaining close raceway groove pore structure form metal gate, and the process exposes the portion of separation layer
Divide surface.
The step of the step of formation titanium nitride membrane of Fig. 3 f corresponding diagrams 2 and etching remove part titanium nitride membrane.Such as figure
Shown in 3f, using the method using ALD or LPCVD, the depositing titanium nitride into groove 240, formation is covered in trench wall, returned
Carve the partial outer face of separation layer and the titanium nitride membrane 2410 on metal gate surface exposed during metal level.Using anisotropic etc.
Ion dry method etches to titanium nitride membrane 2410, removes the titanium nitride membrane positioned at trenched side-wall, only retains and sunk positioned at metal gate
Remaining titanium nitride membrane in product space.
The step of the step of formation silicon dioxide side wall of Fig. 3 g corresponding diagrams 2 and formation tungsten wall.As shown in figure 3g, to groove
240 continue to deposit silica, form the silicon dioxide side wall 2420 on the surface of covering groove side wall and remaining titanium nitride membrane.
Continue the deposited metal tungsten into groove, tungsten is filled up 240 remaining gap of groove, form tungsten wall 2430.Due to metal gate
Be oxidized to form palpus shape metal has stronger penetration power to silicon dioxide side wall, the presence of titanium nitride membrane 2410, reduces
Oxidation when depositing silica on tungsten influences, it is suppressed that the generation of palpus shape metal, therefore reduce three-dimensional storage and leak
Electrical phenomena.
The foregoing is only a preferred embodiment of the present invention, but protection scope of the present invention be not limited thereto,
Any one skilled in the art the invention discloses technical scope in, the change or replacement that can readily occur in,
It should all be included within the scope of the present invention.Therefore, protection scope of the present invention should be with the protection model of the claim
Enclose and be defined.
Claims (9)
1. manufacture the rear grid technique of three-dimensional storage, it is characterised in that including：
Substrate is provided, is alternately stacked two kinds of deposits in the upper surface of substrate, is formed from bottom to top alternately provided with insulating barrier and sacrificial
The alternating layer of domestic animal layer, the alternating layer includes some insulating barriers and some sacrifice layers, and insulating barrier is always its superiors；
Deep hole etching is carried out to alternating layer, forms the raceway groove hole set in a row, the alternating layer is run through in the raceway groove hole；
Raceway groove hole is filled, forms raceway groove pore structure；
Etched in alternating layer between two adjacent row's raceway groove pore structures, form groove；
Sacrifice layer is removed, to form metal gate deposition space between adjacent two layers insulating barrier；
One or more layers separation layer is formed in the metal gate deposition space；
On the surface of the separation layer, deposited metal tungsten forms metal level to fill the metal gate deposition space；
Return and carve metal level, remove the partial metal layers close to groove, with the part surface of the exposure separation layer, remaining part
Metal level is metal gate；
Depositing titanium nitride, titanium nitride membrane is formed, make the surface of titanium nitride membrane covering groove side wall, separation layer and metal gate；
Titanium nitride membrane is etched, to remove the titanium nitride membrane for being covered in the trenched side-wall；
Silica is deposited, with the formation covering trenched side-wall, the silicon dioxide side wall on titanium nitride membrane surface；
Deposits tungsten forms tungsten wall, to fill up the groove.
2. grid technique after as claimed in claim 1, it is characterised in that
Depositing titanium nitride was formed in the step of titanium nitride membrane, and the thickness of the titanium nitride membrane of formation is between 0.1~10nm.
3. grid technique after as claimed in claim 1, it is characterised in that
In the step of being etched to titanium nitride membrane, using anisotropic dry plasma etch, the titanium nitride thin of trenched side-wall is removed
Film.
4. grid technique after as claimed in claim 1, it is characterised in that
In substrate step is provided, the deposit for forming sacrifice layer is silicon nitride, and the deposit for forming insulating barrier is silica, institute
The thickness for stating sacrifice layer and the insulating barrier is 10~80nm.
5. grid technique after as claimed in claim 1, it is characterised in that
Total thickness of the alternating layer is more than 1um.
6. grid technique after as claimed in claim 1, it is characterised in that
The separation layer is two layers, including the first separation layer formed by aluminum oxide and the second separation layer formed by titanium nitride,
Wherein the thickness of the second separation layer is 1~10nm.
7. grid technique after as claimed in claim 1, it is characterised in that after sacrifice layer step is removed, in one layer of formation or
Before multi-layer isolation layer step, in addition to groove carry out phosphoric acid rinsing the step of：
Wherein, between the temperature of phosphoric acid is 100~200 DEG C, rinsing time is 10~100min.
8. grid technique after as claimed in claim 1, it is characterised in that
Raceway groove pore structure includes tunnel layer, accumulation layer, barrier layer and polysilicon layer.
9. grid technique after as claimed in claim 1, it is characterised in that
In the step of depositing titanium nitride, the method for depositing titanium nitride is ALD or CVD.
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| CN201710729964.3A CN107706185A (en) | 2017-08-23 | 2017-08-23 | Manufacture the rear grid technique of three-dimensional storage |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109003983A (en) * | 2018-07-19 | 2018-12-14 | 长江存储科技有限责任公司 | 3D memory device and its manufacturing method |
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| US20100240205A1 (en) * | 2009-03-19 | 2010-09-23 | Samsung Electronics Co., Ltd. | Methods of fabricating three-dimensional nonvolatile memory devices using expansions |
| US20130200450A1 (en) * | 2012-02-03 | 2013-08-08 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and method of manufacturing the same |
| CN106024794A (en) * | 2015-03-31 | 2016-10-12 | 三星电子株式会社 | Semiconductor device and manufacturing method thereof |
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2017
- 2017-08-23 CN CN201710729964.3A patent/CN107706185A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20100079393A (en) * | 2008-12-31 | 2010-07-08 | 삼성전자주식회사 | Semiconductor memory devices and methods of forming the same |
| US20100240205A1 (en) * | 2009-03-19 | 2010-09-23 | Samsung Electronics Co., Ltd. | Methods of fabricating three-dimensional nonvolatile memory devices using expansions |
| US20130200450A1 (en) * | 2012-02-03 | 2013-08-08 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device and method of manufacturing the same |
| CN106024794A (en) * | 2015-03-31 | 2016-10-12 | 三星电子株式会社 | Semiconductor device and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109003983A (en) * | 2018-07-19 | 2018-12-14 | 长江存储科技有限责任公司 | 3D memory device and its manufacturing method |
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