CN107703433A - IGBT open fault recognition methods inside HBSM MMC based on XOR - Google Patents
IGBT open fault recognition methods inside HBSM MMC based on XOR Download PDFInfo
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The invention discloses IGBT open fault recognition methods inside a kind of HBSM MMC based on exclusive logic, it is characterised in that comprises the following steps：(1) n-th of HBSM state S is monitoredn；(2) n-th of HBSM capacitance voltage u is monitoredcn, calculate its capacitance current icn；(3) n HBSM of calculating capacitance current and the ratio λ of bridge arm currentn；(4) by SnWith λnLogical exclusive-OR is carried out, and uses symbolRepresent distance,Illustrate that open fault does not occur for IGBT in n-th of HBSM；Illustrate that open fault occurs for IGBT in n-th of HBSM, and if now Sn=1, illustrate T1nOpen a way, if Sn=0, illustrate T2nOpen a way.The computational methods that methods described uses are easy, and result of calculation form is simple, and only 0 and 1 two kind of form, it is possible to achieve quick, accurate, IGBT open faults in HBSM MMC are identified and positioned using less parameter.
Description
Technical Field
The invention belongs to the technical field of internal protection configuration of an HBSM-MMC body, and particularly relates to an open-circuit fault identification method for an IGBT (insulated Gate Bipolar translator) in an HBSM-MMC based on exclusive OR (exclusive OR) logic.
Background
A Modular Multilevel Converter (MMC) is a novel topological structure based on Voltage-source converter based direct current transmission (VSC-HVDC). With the rapid development of power electronic devices such as Insulated Gate Bipolar Transistors (IGBTs), MMCs are increasingly widely used worldwide. Compare with traditional two level or three level VSC topological structure, MMC can reduce device switching frequency, reduces the voltage change rate and the current change rate of device, and then reduces the loss and the voltage-sharing degree of difficulty of device.
The submodule is the most critical component in the MMC topology, not only plays a role of supporting direct-current voltage by a capacitor at the direct-current side of the two-level converter, but also determines the waveform quality of output voltage at the alternating-current side of the converter through a switch of a full-control device in the submodule, so that the submodule is a power unit in the MMC. Rainer Marquardt proposed the concept of generalized MMC on two power electronic conferences in 2010 and 2011, and divided Sub-modules into Half Bridge Sub-modules (HBSM), full Bridge Sub-modules (FBSM), and Double clamped Sub-modules (CDSM). Among them, MMC (abbreviated as HBSM-MMC) based on half-bridge submodule HBSM is the most commonly used in engineering practice, so the invention mainly researches the open circuit condition of IGBT in HBSM-MMC.
The open circuit of the IGBT in the HBSM-MMC can cause larger commutation of a bridge arm, and the normal operation of a system is influenced, so that the open circuit fault of the IGBT in the HBSM-MMC can be quickly identified and positioned, and corresponding protection is started very necessary. At present, few documents exist for researching an IGBT open-circuit fault identification method in an HBSM-MMC at home and abroad, and a diagnosis strategy of the IGBT open-circuit fault in a frequency converter is respectively provided in the swimming stage (Jiang Shengcheng, yang Rongfeng, and the like.) and the diagnosis method of the IGBT open-circuit fault of the frequency converter (J), chinese Motor engineering report, 2010,30 (6): 1-6.), but the diagnosis strategy is only specific to a two-level frequency converter and cannot be directly applied to the HBSM-MMC; shao S and the like (Shao S, wheeler P, clare J, et al. Fault detection for multilevel converters based on sliding mode observer [ J ]. IEEE trans. On Power Electronics, 2013.) propose a fault diagnosis strategy based on a sliding mode observer for HBSM-MMC, which mainly aims at IGBT open circuit fault and is researched, wherein the diagnosis strategy has better immunity to uncertainty, measurement error and time delay of device parameters, and the time consumption is longer from fault occurrence to diagnosis completion; li Tan and the like (Li Tan, zhao Chengyong, li Luyao and the like, MMC-HVDC submodule fault diagnosis and local protection strategy [ J ]. China Motor engineering reports 2014, 34 (10): 1641-1649.) utilize a certain fault diagnosis index to realize the diagnosis of the IGBT open circuit fault in the HBSM-MMC, and the method has short calculation time but more required parameters.
Therefore, a method which is faster and more accurate and has fewer using parameters is needed to be found to identify and locate the open-circuit fault of the IGBT in the HBSM-MMC, and research results can be used as a beneficial supplement for diagnosing the open-circuit fault of the IGBT in the conventional HBSM-MMC, which is helpful for improving the rapidity and reliability of internal protection of the HBSM-MMC body.
Disclosure of Invention
The method is mainly technically characterized in that the XOR is carried out on the working state of the HBSM and the ratio of the capacitance current and the bridge arm current in the HBSM, so that the quick and accurate recognition and positioning of the IGBT open-circuit fault in the HBSM are realized. The following definitions are first made.
(1) Defining working states of HBSM
By the use of S n The working state of the nth HBSM is shown and specified as follows:
wherein n =1,2 … N2N is the cascade HBSM number of the upper and lower bridge arms.
(2) Defining the ratio of HBSM capacitance current to bridge arm current:
the calculation formula of the capacitance current of the nth HBSM is as follows:
wherein i cn Is the capacitance current of the nth HBSM, u cn Is the capacitance voltage of the nth HBSM, C n The capacitance value of the nth HBSM.
Lambda is used for the ratio of the nth HBSM capacitance current to the bridge arm current n To express, namely:
the normal work has: when S is n If =1, it means that the nth HBSM is in the on state and the output voltage is the capacitance voltage u thereof cn The capacitor current is equal to the bridge arm current, i.e. i arm ＝i cn ，λ n =1; when S is n If =0, it indicates that the nth HBSM is in the off state, the output voltage is 0, and the capacitance current i cn ＝0，λ n ＝0。
(3) For T 1n And (3) analyzing the fault characteristics of the open circuit condition:
bridge arm current specified to charge HBSM capacitor is forward current, and is marked as i arm >, 0; the bridge arm current discharging the HBSM capacitor is a negative current, and is marked as i arm <0。T 1n After opening the circuit, when S n When =0, the operation is the same as the normal operation condition; when S is n When =1, if i arm >, 0, the bridge arm current passes through T under the same condition as normal working condition 1n Is connected in parallel with the diode D 1n Charge the sub-module capacitor while i remains arm ＝i cn ，λ n =1; if i arm < 0, due to T 1n Open circuit, bridge arm current will flow through T 2n Is connected in parallel with the diode D 2n When the capacitance current of HBSM is zero, when lambda is n =0, not λ n ＝1。
(4) For T 2n And (3) analyzing fault characteristics of the open circuit condition:
T 2n after opening the circuit, when S n If =1, the same as the normal working condition; when S is n When =0, if i arm <, 0, as in the normal operation, bridge arm current flows through T 2n Is connected in parallel with the diode D 2n At this time λ n =0; if i arm >, 0, due to T 2n Open circuit, bridge arm current will flow through T 1n Is connected in parallel with the diode D 1n Charging of HBSM capacitance, i arm ＝i cn At this time λ n =1, not λ n ＝0。
Note:
1) The alternating period of the alternating current is 0.02s, the bridge current changes the flowing direction in one period, so if T is 1n Open circuit, S must occur within an AC cycle n =1 and λ n Case of =0;
2) In addition, if S is present n 1 and i arm &Capacitance or T of gt, 0 time sub-module 1n Is connected in parallel with the diode D 1n Open circuit, or S n =0 and i arm &T at 0 2n Is connected in parallel with the diode D 2n Open circuit, which causes the bridge arm current to be interrupted, i occurs continuously in 3 or more sampling intervals arm ＝i cn =0, in which case the invention provides that λ is then n ＝*，And judging that the fault is an open circuit of the IGBT in the non-HBSM, and considering the identification of the open circuit of an anti-parallel diode, a sub-module capacitor or a bridge arm of the IGBT.
3) The bridge arm current has periodic zero-crossing points, and the zero-crossing points only occur in one sampling interval and are discontinuous. In order to avoid the interference of the periodic zero-crossing points of the bridge arm current, the periodic zero-crossing points are skipped when the bridge arm current is sampled, and the non-zero numerical value is directly utilized.
On the basis of the above description, the invention provides an open-circuit fault identification method for an IGBT (insulated gate bipolar transistor) in an HBSM-MMC (hybrid-multiple metal-media converter) based on XOR (exclusive OR) logic, which is characterized by comprising the following steps of:
step 1: monitoring status S of nth HBSM n ；
Step 2: monitoring the capacitance voltage u of the nth HBSM cn Calculating the capacitance current i thereof cn ；
And step 3: monitoring the ratio lambda of the capacitance current and the bridge arm current of n HBSM n ；
And 4, step 4: will S n And λ n Performing logical XOR and using the signRepresenting an xor,indicating that the nth HBSM has not failed open circuit;indicates that the nth HBSM is open failure, and if soS n =1, explanation T 1n Open circuit occurs if S n =0, description T 2n An open circuit occurs.
The method has the advantages that the adopted calculation method is simple and convenient, the calculation result form is simple, only 0 and 1 forms exist, and the fast and accurate identification and positioning of the IGBT open-circuit fault in the HBSM-MMC can be realized by using fewer parameters.
Drawings
FIG. 1 is a simulation diagram of a simulation model system of the method of the present invention.
Fig. 2 is a schematic flow diagram of an IGBT open-circuit fault identification method inside the HBSM-MMC based on xor logic according to an embodiment of the present invention.
FIG. 3 shows the 3 rd HBSM failure indicator k in the exemplary embodiment of the invention 3 Schematic illustration of (a).
Detailed Description
The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings.
A simulation model for the method for identifying an IGBT open-circuit fault in an HBSM-MMC is shown in fig. 1, and fig. 2 is a flowchart for identifying an IGBT open-circuit fault in an HBSM by using the method. The invention provides an open-circuit fault identification method for an IGBT (insulated gate bipolar transistor) in an HBSM-MMC (hybrid Bipolar translator-MMC) based on exclusive OR (exclusive OR), which can quickly and accurately identify the HBSM and the IGBT with open-circuit faults, and the specific process of the scheme is as follows:
(1) Monitoring status S of nth HBSM n ；
Wherein n =1,2 … 2N, N is the cascade HBSM number of the upper and lower bridge arms.
(2) Monitoring the capacitance voltage u of the nth HBSM cn Calculating the capacitance current i thereof cn ；
The capacitance current expression of the nth HBSM is as follows:
wherein i cn Capacitance current of nth HBSM, u cn Is the capacitance voltage of the nth HBSM, C n The capacitance value of the nth HBSM.
(3) Calculating the ratio lambda of the capacitance current and the bridge arm current of n HBSM n ；
Lambda is used for the ratio of the nth HBSM capacitance current to the bridge arm current n Represents, i.e.:
the normal work has: when S is n If =1, it indicates that the nth HBSM is in the on state and the output voltage is the capacitance voltage u cn The capacitive current is equal to the bridge arm current, i arm ＝i cn ，λ n =1; when S is n If =0, it indicates that the nth HBSM is in the off state, the output voltage is 0, and the capacitance current i cn ＝0，λ n ＝0。
(4) Will S n And λ n Performing logical XOR and using the signRepresenting an xor,indicating that the nth HBSM has not failed open circuit;indicates that the nth HBSM is open failure and if S is present n =1, description T 1n Open circuit occurs if S n =0, description T 2n An open circuit occurs.
The technical solution of the present invention is further described below by a specific embodiment.
Suppose T in HBSM 3 of the upper bridge arm of phase A in FIG. 1 13 When an open-circuit fault occurs at the time t =1S, S is added 3 And λ 3 The result of XOR is used as the fault indicator k 3 Is shown, i.e.Lambda after failure 3 =0, and as can be seen again from fig. 3, the fault time S 3 =1, since the calculation requires a certain time, k 3 And 2ms after the fault, the fault diagnosis is finished by jumping from 0 to 1. (Note: in order to see k more clearly 3 In the invention, the hopped k is placed for a constant time 1)
According to simulation results, the novel method for identifying the IGBT open-circuit fault in the HBSM-MMC based on the XOR logic function can realize the rapid and accurate identification and positioning of the IGBT open-circuit fault in the HBSM-MMC under the condition of using less parameters. Therefore, the scheme meets the requirements of the system on the rapidity, the reliability and the practicability of the HBSM-MMC internal open-circuit fault identification.
While the invention has been described with reference to specific preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Therefore, the scope of the present invention shall be defined by the appended claims.
Claims (6)
1. An open-circuit fault identification method for an IGBT (insulated gate bipolar transistor) in an HBSM-MMC (hybrid Bipolar transistor-MMC) based on exclusive OR (exclusive OR) logic is characterized by comprising the following steps of:
(1) Monitoring status S of nth HBSM n ；
(2) Monitoring the capacitance voltage u of the nth HBSM cn Calculating the capacitance current i thereof cn ；
(3) Calculating n HBSM capacitance current and bridge arm voltageRatio of flows lambda n ；
(4) Will S n And λ n Performing logical XOR and using the signRepresenting an xor,indicating that the nth HBSM has not failed open circuit;indicates that the nth HBSM is open failure and if S is present n =1, explanation T 1n Open circuit occurs if S n =0, description T 2n An open circuit occurs.
2. The method of claim 1, wherein:
the state of the nth HBSM in the step (1) adopts S n The working state of the nth HBSM is shown and specified as follows:
wherein n =1,2 … N2N is the cascade HBSM number of the upper and lower bridge arms.
3. The method of claim 1, wherein:
the calculation formula of the nth HBSM capacitance current in the step (2) is as follows:
wherein i cn Is the capacitance current of the nth HBSM, u cn Is the capacitance voltage of the nth HBSM, C n The capacitance value of the nth HBSM.
4. The method of claim 1, wherein:
in the step (3), the ratio of the nth HBSM capacitance current to the bridge arm current is lambda n Represents, i.e.:
when the normal work is carried out: when S is n If =1, it indicates that the nth HBSM is in the on state and the output voltage is the capacitance voltage u cn The capacitor current is equal to the bridge arm current, i.e. i arm ＝i cn ，λ n =1; when S is n If =0, it indicates that the nth HBSM is in the off state, the output voltage is 0, and the capacitance current i cn ＝0，λ n ＝0。
5. The method of claim 2, wherein:
for T 1n Fault characteristic analysis is carried out on the open circuit condition, and bridge arm current for charging the capacitor of the HBSM is specified to be forward current and is recorded as i arm >, 0; the bridge arm current discharging the HBSM capacitor is a negative current, and is marked as i arm <0。T 1n After opening the circuit, when S n If =0, the same as the normal working condition; when S is n If =1, if i arm >, 0, the bridge arm current passes through T under the same condition as normal working condition 1n Is connected with the anti-parallel diode D 1n Charge the sub-module capacitor while i remains arm ＝i cn ，λ n =1; if i arm < 0, due to T 1n Open circuit, bridge arm current will flow through T 2n Is connected in parallel with the diode D 2n When the capacitance current of HBSM is zero, when lambda is n =0, not λ n ＝1。
6. The method of claim 2, wherein:
for T 2n Analysis of the fault characteristics for open circuit conditions, T 2n After opening the circuit, when S n If =1, the same as the normal working condition; when S is n When =0, if i arm <, 0, as in the normal operation, bridge arm current flows through T 2n Is connected in parallel with the diode D 2n At this time λ n =0; if i arm >, 0, due to T 2n Open circuit, bridge arm current will flow through T 1n Is connected in parallel with the diode D 1n Charging of HBSM capacitance i arm ＝i cn At this time λ n =1, not λ n ＝0。
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Cited By (7)
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| CN108152623A (en) * | 2017-12-18 | 2018-06-12 | 西安交通大学 | A kind of on-line monitoring method of Modularized multi-level converter sub-module capacitor |
| CN109510491A (en) * | 2018-10-31 | 2019-03-22 | 中国电力科学研究院有限公司 | A kind of short-circuit recognition method and device of MMC full-bridge submodule IGBT |
| CN109541376A (en) * | 2019-01-08 | 2019-03-29 | 华北电力大学 | The identification of IGBT open-circuit fault and localization method in H bridge based on fault indices |
| CN109541377A (en) * | 2019-01-08 | 2019-03-29 | 华北电力大学 | A kind of new method of the inside diagnosis HBSM IGBT open-circuit fault |
| CN111781484A (en) * | 2020-06-19 | 2020-10-16 | 南京航空航天大学 | MMC loop structure based on IGBT sub-module and open-circuit fault diagnosis method |
| CN113281678A (en) * | 2021-04-12 | 2021-08-20 | 西安理工大学 | Method for positioning open-circuit fault of tubes on half-bridge submodule of modular multilevel converter |
| US12119741B2 (en) | 2020-06-03 | 2024-10-15 | Delta Electronics (Shanghai) Co., Ltd. | Modular multilevel converter system and voltage detection method and open-circuit fault diagnosis method thereof |
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| CN108152623A (en) * | 2017-12-18 | 2018-06-12 | 西安交通大学 | A kind of on-line monitoring method of Modularized multi-level converter sub-module capacitor |
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| CN109541377A (en) * | 2019-01-08 | 2019-03-29 | 华北电力大学 | A kind of new method of the inside diagnosis HBSM IGBT open-circuit fault |
| US12119741B2 (en) | 2020-06-03 | 2024-10-15 | Delta Electronics (Shanghai) Co., Ltd. | Modular multilevel converter system and voltage detection method and open-circuit fault diagnosis method thereof |
| CN111781484A (en) * | 2020-06-19 | 2020-10-16 | 南京航空航天大学 | MMC loop structure based on IGBT sub-module and open-circuit fault diagnosis method |
| CN113281678A (en) * | 2021-04-12 | 2021-08-20 | 西安理工大学 | Method for positioning open-circuit fault of tubes on half-bridge submodule of modular multilevel converter |
| CN113281678B (en) * | 2021-04-12 | 2022-11-08 | 西安理工大学 | Method for positioning open-circuit fault of tubes on half-bridge submodule of modular multilevel converter |
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