CN107689628B - Power grid loop detection method - Google Patents
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- H—ELECTRICITY
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- H—ELECTRICITY
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- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
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Abstract
The invention provides a power grid loop detection method, which comprises the following steps: acquiring equipment information and connection information of power grid equipment, and constructing the equipment information and the connection information of the power grid equipment into a power network topological graph according to graph theory; and carrying out loop detection according to the power network topological graph, counting the total number of the power grid loops, and recording the single loop path of each power grid loop. According to the power grid loop detection method, the power network topological graph is constructed according to the graph theory, and the function of loop detection on the power grid equipment is realized by processing graph data; the general topological loop detection of the power grid equipment is realized by utilizing the out-degree calculation and the union set search algorithm, and the multi-power-supply loop detection of the power grid equipment is realized by utilizing the breadth-first search algorithm, so that the efficiency of large-scale power grid loop detection is improved.
Description
Technical Field
The invention relates to the technical field of electric power information, in particular to a power grid loop detection method.
Background
In the power information system, the grid devices form a huge network topology. With the rapid construction and deep development of the global energy internet, the grid structure and the operation mode of the power grid are gradually complicated, the power grid equipment has a new trend of rapid growth, rapid change and diversification, the asset management level of the power grid equipment is continuously improved, and meanwhile, higher requirements are provided for loop detection service functions such as high-voltage ring network detection, low-voltage loop detection, low-voltage multi-power detection and the like.
As an important topology analysis service function in power grid topology analysis application, power grid loop detection is an indispensable functional module for power grid topology analysis, and meanwhile, because the complexity of implementation becomes a technical difficulty of power grid topology analysis, each power grid topology analysis system at present cannot realize the function of power grid loop detection, and can only perform manual cross-table query, so that the detection efficiency of the power grid loop is low.
Disclosure of Invention
The invention aims to solve the technical problems that the existing power grid topology analysis system does not have the power grid loop detection function, needs manual cross-table query and is low in power grid loop detection efficiency.
According to a first aspect, an embodiment of the present invention provides a power grid loop detection method, including: acquiring equipment information and connection information of power grid equipment, and constructing the equipment information and the connection information of the power grid equipment into a power network topological graph according to graph theory; and carrying out loop detection according to the power network topological graph, counting the total number of the power grid loops, and recording the single loop path of each power grid loop.
Optionally, in the power network topology, the grid devices are represented by vertices, the connection relationships between the grid devices are represented by edges, the device information of the grid devices is represented by vertex attributes, and the connection relationship information between the grid devices is represented by edge attributes.
Optionally, performing loop detection according to the power network topology, counting the total number of the power grid loops, and recording a single-loop path of each power grid loop, includes: detecting the number of paths of the common topological loops and the single loop path of each common topological loop; the number of paths of the multiple power supply loops and the single-loop path of each of the multiple power supply loops are detected.
Optionally, the detecting the number of paths of the normal topology loop and the single loop path of each normal topology loop includes:
step a: determining a starting vertex of the power network topological graph;
step b: traversing the vertexes with the same voltage class and the same voltage class as the initial vertex, and calculating the out degree of each vertex with the same voltage class;
step c: deleting the vertex with the same voltage class and the connecting edge thereof with the out degree of 1;
step d: updating the power network topological graph, and judging whether the updated power network topological graph comprises the peak with the same voltage level and the out degree of 1; if the vertex with the same voltage class with the out degree of 1 is included, returning to execute the step b, otherwise, executing the step e;
step e: judging whether the updated power network topological graph contains the initial vertex; if the initial vertex is included, the communication subgraph of the updated power network topological graph forms a single loop path of the common topological loop;
step f: and executing a union set searching algorithm on the connected subgraphs, counting the path number of the common topological loop, and recording the single loop path of the common topological loop.
Optionally, detecting the number of paths of the multiple power supply loops and the single-loop path of each multiple power supply loop comprises: performing breadth-first search on the vertexes with the same voltage class by taking the initial vertex as a starting point, and determining the number of vertexes of the step-down transformers with high voltage class; judging whether the number of the vertexes of the high-voltage-level step-down transformer is greater than 1 or not; when the number of the high-voltage class step-down transformer vertexes is larger than 1, recording topological paths from the initial vertex to each high-voltage class step-down transformer vertex, wherein any two topological paths are spliced to form a single-loop path of the multi-power-supply loop; and counting the number of paths of the multiple power supply loops according to the number of the vertexes of the high-voltage class step-down transformer, and recording single-loop paths of the multiple power supply loops.
Optionally, when the number of high voltage class step-down transformer vertices is n, the number of paths of the multi-power supply loop is (n-1) n/2.
Optionally, the total number of grid loops is the sum of the number of paths of the normal topology loop and the number of paths of the multiple power supply loop.
According to a second aspect, an embodiment of the present invention provides a power grid loop detection system, including: the power network topological graph constructing module is used for acquiring equipment information and connection information of the power grid equipment and constructing the equipment information and the connection information of the power grid equipment into a power network topological graph according to graph theory; and the loop detection module is used for carrying out loop detection according to the power network topological graph, counting the total number of the power grid loops and recording the single loop path of each power grid loop.
Optionally, in the power network topology constructed by the power network topology construction module, the grid devices are represented by vertices, the connection relationships between the grid devices are represented by edges, the device information of the grid devices is represented by vertex attributes, and the connection relationship information between the grid devices is represented by edge attributes.
Optionally, the loop detection module includes: the common topology loop detection submodule is used for detecting the number of paths of the common topology loops and the single loop path of each common topology loop; and the multi-power supply loop detection sub-module is used for detecting the number of paths of the multi-power supply loops and the single-loop path of each multi-power supply loop.
Optionally, the general topology loop detection sub-module is configured to perform the following steps:
step a: determining a starting vertex of the power network topological graph;
step b: traversing the vertexes with the same voltage class and the same voltage class as the initial vertex, and calculating the out degree of each vertex with the same voltage class;
step c: deleting the vertex with the same voltage class and the connecting edge thereof with the out degree of 1;
step d: updating the power network topological graph, and judging whether the updated power network topological graph comprises the peak with the same voltage level and the out degree of 1; if the vertex with the same voltage class with the out degree of 1 is included, returning to execute the step b, otherwise, executing the step e;
step e: judging whether the updated power network topological graph contains the initial vertex; if the initial vertex is included, the communication subgraph of the updated power network topological graph forms a single loop path of the common topological loop;
step f: and executing a union set searching algorithm on the connected subgraphs, counting the path number of the common topological loop, and recording the single loop path of the common topological loop.
Optionally, the multi-power-supply loop detection sub-module is configured to perform the following steps: performing breadth-first search on the vertexes with the same voltage class by taking the initial vertex as a starting point, and determining the number of vertexes of the step-down transformers with high voltage class; judging whether the number of the vertexes of the high-voltage-level step-down transformer is greater than 1 or not; when the number of the high-voltage class step-down transformer vertexes is larger than 1, recording topological paths from the initial vertex to each high-voltage class step-down transformer vertex, wherein any two topological paths are spliced to form a single-loop path of the multi-power-supply loop; and counting the number of paths of the multiple power supply loops according to the number of the vertexes of the high-voltage class step-down transformer, and recording single-loop paths of the multiple power supply loops.
Optionally, the total number of the power grid loops counted by the loop detection module is the sum of the number of the paths of the normal topology loops and the number of the paths of the multiple power supply loops.
Optionally, in the multi-power-supply-loop detection sub-module, when the number of detected high-voltage-class step-down transformer vertices is n, the number of paths of the multi-power-supply loop is (n-1) n/2.
According to a third aspect, an embodiment of the present invention provides a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the grid loop detection method of the first aspect or any one of the alternatives of the first aspect.
According to a fourth aspect, an embodiment of the present invention provides a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the grid loop detection method of the first aspect or any one of the alternatives of the first aspect.
According to the power grid loop detection method provided by the embodiment of the invention, the power grid topological graph is constructed according to the graph theory, and the function of loop detection on the power grid equipment is realized by processing graph data; the general topological loop detection of the power grid equipment is realized by utilizing the out-degree calculation and the union set search algorithm, and the multi-power-supply loop detection of the power grid equipment is realized by utilizing the breadth-first search algorithm, so that the efficiency of large-scale power grid loop detection is improved.
According to the power grid loop detection system provided by the embodiment of the invention, the power network topological graph is constructed through the power network topological graph construction module, and the loop detection function of the power grid equipment is realized through the loop detection module, wherein the common topological loop detection of the power grid equipment is realized through a calculation degree and parallel search algorithm by a common topological loop detection submodule, and the multi-power-supply loop detection submodule realizes the multi-power-supply loop detection of the power grid equipment through the breadth-first search algorithm, so that the efficiency of large-scale power grid loop detection is improved.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a power grid loop detection method in embodiment 1 of the present invention;
fig. 2 is a flowchart of a general topology loop detection and a multi-power loop detection in embodiment 1 of the present invention;
fig. 3 is a schematic block diagram of a power grid loop detection system in embodiment 2 of the present invention;
fig. 4 is a schematic structural diagram of an electronic device in embodiment 3 of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Example 1
The embodiment of the invention provides a power grid loop detection method, the flow of which is shown in figure 1, and the power grid loop detection method comprises the following steps:
step S1: and acquiring the equipment information and the connection information of the power grid equipment, and constructing the equipment information and the connection information of the power grid equipment into a power network topological graph according to a graph theory.
Step S2: and carrying out loop detection according to the power network topological graph, counting the total number of the power grid loops, and recording the single loop path of each power grid loop.
The power grid loop detection method provided by the embodiment of the invention realizes the function of loop detection on power grid equipment and improves the efficiency of large-scale power grid loop detection.
In a preferred embodiment, in the power network topology map, the grid devices are represented by vertices, the connection relationships between the grid devices are represented by edges, the device information of the grid devices is represented by vertex attributes, the connection relationship information between the grid devices is represented by edge attributes, and the power network topology map is constructed according to the relationship edges of the vertices and the edges to form a undirected topology map of the grid devices.
In a preferred embodiment, the step S2, performing loop detection according to the power network topology, counting the total number of the power grid loops, and recording the single-loop path of each power grid loop specifically includes: the method comprises the steps of detecting the number of paths of a common topology loop and a single-loop path of each common topology loop, and detecting the number of paths of multiple power supply loops and a single-loop path of each multiple power supply loop.
Further, the detecting the number of paths of the normal topology loops and the single loop path of each normal topology loop as shown in fig. 2 includes the following specific steps:
step S21: and selecting a vertex corresponding to one power grid device in the power network topological graph as a starting vertex.
Step S22: and searching voltage grade fields in the attributes of the vertexes corresponding to the power grid equipment, screening vertexes with the same voltage grade as the initial vertex, and calculating the out-degree of each vertex with the same voltage grade by counting the number of connecting edges of each vertex with the same voltage grade.
Step S23: and deleting the vertex with the same voltage class and the connecting edge thereof with the out degree of 1 in the topological graph of the power network.
Step S24: updating the power network topological graph, and judging whether the updated power network topological graph comprises a vertex with the same voltage level and the out degree of 1; if the same voltage class vertex with the out degree of 1 is included, the step S22 is executed again, otherwise, the step S25 is executed.
Step S25: judging whether the updated power network topological graph contains an initial vertex; when the starting vertex is not included, the common topological loop is not detected from the starting vertex; and when the initial vertex is included, finding out a connected subgraph containing the initial vertex of the updated power network topological graph to form a single loop path of the common topological loop.
Step S26: and executing a union set searching algorithm on the connected subgraphs to obtain the number of the paths of the common topological loops detected from the initial vertex, and recording the single loop path of each common topological loop.
Further, the detecting the number of paths of the multiple power supply loops and the single-loop path of each multiple power supply loop as shown in fig. 2 includes the following specific steps:
step S31: starting from the initial vertex, traversing all reachable vertexes with the same voltage class by breadth-first search, finding the vertex of which the equipment type is the high-voltage class step-down transformer, and counting the number.
Step S32: judging whether the number of the vertexes of the high-voltage-level step-down transformer is greater than 1; when the number of the vertexes of the high-voltage-level step-down transformer is less than or equal to 1, starting from the initial vertex, detecting no multi-power-supply loop; when the number of the vertexes of the high-voltage class step-down transformer is larger than 1, respectively recording topological paths from the initial vertex to the vertexes of the high-voltage class step-down transformer, wherein any two topological paths form a single-loop path of the multi-power-supply loop.
Step S33: and counting the path number of the multiple power supply loops according to the number of the vertexes of the high-voltage class step-down transformer, and recording the single-loop path of each multiple power supply loop.
In practical application, when the number of the high-voltage-level step-down transformers is n, the number of the multi-power-supply loop paths is (n-1) n/2, and the single-loop paths of the multi-power-supply loops are obtained by pairwise splicing topological paths from a starting vertex to a vertex of the high-voltage-level step-down transformer.
In a preferred embodiment, the total number of the grid loops is the sum of the number of paths of the normal topology loop and the number of paths of the multi-power-supply loop.
According to the power grid loop detection method, common topology loop detection of the power grid equipment is realized through the calculation degree and the parallel search algorithm, and multi-power-supply loop detection of the power grid equipment is realized through the breadth-first search algorithm, so that the efficiency of large-scale power grid loop detection is improved.
Example 2
An embodiment of the present invention provides a power grid loop detection system, as shown in fig. 3, including: the power network topological graph constructing module 1 is used for acquiring equipment information and connection information of the power grid equipment and constructing the equipment information and the connection information of the power grid equipment into a power network topological graph according to graph theory; and the loop detection module 2 is used for performing loop detection according to the power network topological graph, counting the total number of the power grid loops and recording the single loop path of each power grid loop.
The power grid loop detection system provided by the embodiment of the invention has the function of power grid equipment loop detection, and the detection efficiency of large-scale power grid loop detection can be obviously improved by using the system to perform power grid equipment loop detection.
In a preferred embodiment, in the power network topology diagram constructed by the power network topology diagram constructing module 1, the vertices represent the power grid devices, the edges represent the connection relationships between the power grid devices, the vertex attributes represent the device information of the power grid devices, and the edge attributes represent the connection relationship information between the power grid devices, and the power network topology diagram constructing module 1 constructs the power network topology diagram according to the relationship between the vertices and the edges, so as to form the undirected topology diagram of the power grid devices.
In a preferred embodiment, the loop detection module 2 includes: the common topology loop detection submodule 21 is configured to detect the number of paths of common topology loops and a single loop path of each common topology loop; and a multi-power-supply-loop detection sub-module 22 for detecting the number of paths of the multi-power-supply loops and the single-loop path of each multi-power-supply loop.
Further, as shown in fig. 2, the general topology loop detection sub-module 21 is configured to perform the following steps:
step S21: selecting a vertex corresponding to one power grid device in the power network topological graph as an initial vertex;
step S22: searching voltage grade fields in the attributes of the vertexes corresponding to the power grid equipment, screening vertexes with the same voltage grade as the initial vertex, and calculating the out-degree of each vertex with the same voltage grade by counting the number of connecting edges of each vertex with the same voltage grade;
step S23: deleting the vertex with the same voltage class and the connecting edge thereof with the out degree of 1 in the topological graph of the power network;
step S24: updating the power network topological graph, and judging whether the updated power network topological graph comprises a vertex with the same voltage level and the out degree of 1; if the same voltage class vertex with the out degree of 1 is included, returning to execute the step S22, otherwise executing the step S25;
step S25: judging whether the updated power network topological graph contains an initial vertex; when the starting vertex is not included, the common topological loop is not detected from the starting vertex; when the initial vertex is included, finding out a communication subgraph containing the initial vertex of the updated power network topological graph to form a single loop path of the common topological loop;
step S26: and executing a union set searching algorithm on the connected subgraphs to obtain the number of the paths of the common topological loops detected from the initial vertex, and recording the single loop path of each common topological loop.
Further, as shown in fig. 2, the above-mentioned multi-power-supply loop detection sub-module 22 is configured to perform the following steps:
s31: starting from the initial vertex, traversing all reachable vertexes with the same voltage class by breadth-first search, finding the vertex of which the equipment type is the high-voltage class step-down transformer, and counting the number.
S32: when the number of the vertexes of the high-voltage-level step-down transformer is less than or equal to 1, starting from the initial vertex, detecting no multi-power-supply loop; when the number of the vertexes of the high-voltage class step-down transformer is larger than 1, respectively recording topological paths from the initial vertex to the vertexes of the high-voltage class step-down transformer, wherein any two topological paths form a single-loop path of the multi-power-supply loop.
S33: and counting the path number of the multiple power supply loops according to the number of the vertexes of the high-voltage class step-down transformer, and recording the single-loop path of each multiple power supply loop.
In practical application, when the number of the high-voltage-level step-down transformers is n, the number of the multi-power-supply loop paths is (n-1) n/2, and the single-loop paths of the multi-power-supply loops are obtained by pairwise splicing topological paths from a starting vertex to a vertex of the high-voltage-level step-down transformer.
In a preferred embodiment, the total number of the grid loops is the sum of the number of paths of the normal topology loop and the number of paths of the multi-power-supply loop.
The power grid loop detection system realizes common topology loop detection of the power grid equipment through the common topology loop submodule 31, and realizes multi-power-supply loop detection of the power grid equipment through the multi-power-supply loop submodule 31, so that the efficiency of large-scale power grid loop detection is improved.
Example 3
An embodiment of the present invention provides a non-transitory computer storage medium, where a computer-executable instruction is stored, and the computer-executable instruction may execute the power grid loop detection method in any of embodiments 1 above. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD) or a Solid State Drive (SSD), etc.; the storage medium may also comprise a combination of memories of the kind described above.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware related to instructions of a computer program, and the program can be stored in a computer readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like.
Example 4
An embodiment of the present invention provides an electronic device for executing a power grid loop detection method, a schematic structural diagram of which is shown in fig. 4, and the device includes: one or more processors 410 and a memory 420, with one processor 410 being an example in fig. 3.
The electronic device performing the grid loop detection method may further include: an input device 430 and an output device 440.
The processor 410, the memory 420, the input device 430, and the output device 440 may be connected by a bus or other means, such as the bus connection in fig. 3.
The memory 420, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as program instructions/modules corresponding to the grid loop detection method in the embodiment of the present application (e.g., the general topology loop detection submodule 21 and the multi-power-supply loop detection submodule 22 shown in fig. 2). The processor 410 executes various functional applications of the server and data processing by executing non-transitory software programs, instructions and modules stored in the memory 420, namely, implements the grid loop detection method of the above method embodiment.
The memory 420 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to use of the processing apparatus operated by the list items, and the like. Further, the memory 420 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, memory 420 may optionally include memory located remotely from processor 410, which may be connected to a grid loop detection device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 430 may receive input numeric or character information and generate key signal inputs related to user settings and function control of the processing device of the grid loop detection operation. The output device 440 may include a display device such as a display screen.
One or more modules are stored in the memory 420, which when executed by the one or more processors 410 perform the method shown in fig. 1.
The product can execute the method provided by the embodiment of the invention, and has corresponding functional modules and beneficial effects of the execution method. Details of the technique not described in detail in the present embodiment may be specifically referred to the related description in the embodiments shown in fig. 1-2.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Claims (12)
1. A power grid loop detection method is characterized by comprising the following steps:
acquiring equipment information and connection information of power grid equipment, and constructing the equipment information and the connection information of the power grid equipment into a power network topological graph according to graph theory;
performing loop detection according to the power network topological graph, counting the total number of power grid loops, and recording single loop paths of all the power grid loops;
performing loop detection according to the power network topological graph, counting the total number of the power grid loops, and recording single-loop paths of the power grid loops, wherein the loop detection comprises the following steps:
detecting the number of paths of the common topological loops and the single loop path of each common topological loop;
detecting the number of paths of multiple power supply loops and single-loop paths of all the multiple power supply loops;
detecting the number of paths of the common topology loops and the single loop path of each common topology loop, including:
step a: determining a starting vertex of the power network topological graph;
step b: traversing the vertexes with the same voltage class and the same voltage class as the initial vertex, and calculating the out degree of each vertex with the same voltage class;
step c: deleting the vertex with the same voltage class and the connecting edge thereof with the out degree of 1;
step d: updating the power network topological graph, and judging whether the updated power network topological graph comprises the peak with the same voltage level and the out degree of 1; if the vertex with the same voltage class with the out degree of 1 is included, returning to execute the step b, otherwise, executing the step e;
step e: judging whether the updated power network topological graph contains the initial vertex; if the initial vertex is included, the communication subgraph of the updated power network topological graph forms a single loop path of the common topological loop;
step f: and executing a union set searching algorithm on the connected subgraphs, counting the path number of the common topological loop, and recording the single loop path of the common topological loop.
2. The grid loop detection method according to claim 1, wherein in the power network topology, the grid devices are represented by vertices, the connection relationships between the grid devices are represented by edges, the device information of the grid devices is represented by vertex attributes, and the connection relationship information between the grid devices is represented by edge attributes.
3. The grid loop detection method according to claim 2, wherein detecting the number of paths of the multiple power supply loops and the single-loop path of each of the multiple power supply loops comprises:
performing breadth-first search on the vertexes with the same voltage class by taking the initial vertex as a starting point, and determining the number of vertexes of the step-down transformers with high voltage class;
judging whether the number of the vertexes of the high-voltage-level step-down transformer is greater than 1 or not;
when the number of the high-voltage class step-down transformer vertexes is larger than 1, recording topological paths from the initial vertex to each high-voltage class step-down transformer vertex, wherein any two topological paths are spliced to form a single-loop path of the multi-power-supply loop;
and counting the number of paths of the multiple power supply loops according to the number of the vertexes of the high-voltage class step-down transformer, and recording single-loop paths of the multiple power supply loops.
4. The grid loop detection method according to claim 3, wherein when the number of high voltage class step-down transformer vertices is n, the number of paths of the multi-power supply loop is (n-1) n/2.
5. The grid loop detection method according to claim 3, wherein the total number of grid loops is a sum of the number of paths of the normal topology loop and the number of paths of the multiple power supply loop.
6. A grid loop detection system, comprising:
the power network topological graph constructing module (1) is used for acquiring equipment information and connection information of power grid equipment and constructing the equipment information and the connection information of the power grid equipment into a power network topological graph according to graph theory;
the loop detection module (2) is used for carrying out loop detection according to the power network topological graph, counting the total number of power grid loops and recording single loop paths of all the power grid loops;
the loop detection module (2) comprises:
the common topology loop detection submodule (21) is used for detecting the number of paths of the common topology loops and the single loop path of each common topology loop;
a multi-power-supply-loop detection sub-module (22) for detecting the number of paths of the multi-power-supply loops and the single-loop path of each multi-power-supply loop;
the common topology loop detection submodule (21) is configured to perform the following steps:
step a: determining a starting vertex of the power network topological graph;
step b: traversing the vertexes with the same voltage class and the same voltage class as the initial vertex, and calculating the out degree of each vertex with the same voltage class;
step c: deleting the vertex with the same voltage class and the connecting edge thereof with the out degree of 1;
step d: updating the power network topological graph, and judging whether the updated power network topological graph comprises the peak with the same voltage level and the out degree of 1; if the vertex with the same voltage class with the out degree of 1 is included, returning to execute the step b, otherwise, executing the step e;
step e: judging whether the updated power network topological graph contains the initial vertex; if the initial vertex is included, the communication subgraph of the updated power network topological graph forms a single loop path of the common topological loop;
step f: and executing a union set searching algorithm on the connected subgraphs, counting the path number of the common topological loop, and recording the single loop path of the common topological loop.
7. The grid loop detection system according to claim 6, wherein the power network topology map building module (1) builds the power network topology map in which the grid devices are represented by vertices, edges represent connection relationships between the grid devices, vertex attributes represent device information of the grid devices, and edge attributes represent connection relationship information between the grid devices.
8. The grid loop detection system according to claim 7, wherein the multiple power supply loop detection submodule (22) is configured to perform the steps of:
performing breadth-first search on the vertexes with the same voltage class by taking the initial vertex as a starting point, and determining the number of vertexes of the step-down transformers with high voltage class;
judging whether the number of the vertexes of the high-voltage-level step-down transformer is greater than 1 or not;
when the number of the high-voltage class step-down transformer vertexes is larger than 1, recording topological paths from the initial vertex to each high-voltage class step-down transformer vertex, wherein any two topological paths are spliced to form a single-loop path of the multi-power-supply loop;
and counting the number of paths of the multiple power supply loops according to the number of the vertexes of the high-voltage class step-down transformer, and recording single-loop paths of the multiple power supply loops.
9. The grid loop detection system according to claim 8, wherein in the multi-power-supply loop detection submodule (22), when the number of high-voltage-level step-down transformer vertices is detected to be n, then the number of paths of the multi-power-supply loop is (n-1) n/2.
10. The grid loop detection system according to claim 8, wherein the total number of grid loops counted by the loop detection module (2) is the sum of the number of paths of the normal topology loop and the number of paths of the multiple power supply loop.
11. A non-transitory computer readable storage medium storing computer instructions that, when executed by a processor, implement the grid loop detection method of any of claims 1-5.
12. An electronic device, comprising: at least one processor (410); and a memory (420) communicatively coupled to the at least one processor (410), wherein the memory (420) stores instructions executable by the at least one processor (410), the instructions being executable by the at least one processor (410) to cause the at least one processor (410) to perform the grid loop detection method of any of claims 1-5.
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