CN107656828A

CN107656828A - A kind of method and apparatus for detecting program operation deflection path

Info

Publication number: CN107656828A
Application number: CN201710752722.6A
Authority: CN
Inventors: 苏孟豪
Original assignee: Loongson Technology Corp Ltd
Current assignee: Loongson Technology Corp Ltd
Priority date: 2017-08-28
Filing date: 2017-08-28
Publication date: 2018-02-02
Anticipated expiration: 2037-08-28
Also published as: CN107656828B

Abstract

The embodiments of the invention provide a kind of method and apparatus for detecting program operation deflection path, methods described includes：Extraction, decode and perform block identification and set and detection instruction, so that obtained from the block identification register in the second block identification of the second forerunner's program basic block first carried out, and according to first block identification and the second block identification, determine that program runs deflection path, if the block identification to match with the second block identification is not present in the first block identification, then confirm program operation deflection path, realize in units of program basic block, it is performed before in first instruction of each program basic block, if check program basic block not perform according to correct path, then confirm program operation deflection path, the phenomenon of calling program operation deflection path is set to be found early, so as to be transferred to error handle, avoid that critical data caused by program operation deflection path is deleted or code segment such as is wiped free of at the serious consequence for being difficult to recover.

Description

A kind of method and apparatus for detecting program operation deflection path

Technical field

The present invention relates to secure microcontroller technical field, more particularly to a kind of side for detecting program operation deflection path Method, a kind of device, a kind of electronic equipment and a kind of readable storage medium storing program for executing for detecting program operation deflection path.

Background technology

Microcontroller be by the integrated one-chip microcomputer on a single die of the major part of microcomputer, There is extremely large number application in every field, from general is civilian, Industry Control, safe and reliable occasion emphasized to some, Such as financial payment, Aerospace Control, it is ubiquitous.

In the case where outside strong jamming is injected, microcontroller CPU operation is likely to occur exception, and it is so-called to occur Program fleet phenomenon, cause program operation to deviate normal operating path.These interference include to crack microcontroller and Power supply disturbance, the light artificially added disturbs, impulse disturbances, and high energy particle etc. present in cosmic space.Program fleet Factor and consequence are often unpredictable, under many circumstances, after program operation deviates normal operating path (run and fly), System can enter endless loop and cause to crash.

Systemic-function is abnormal after program operation deviates normal operating path, in general way be rely on it is a kind of dedicated for The chip of SCM program running status is monitored, makes microcontroller after exception occurs and is resetted, i.e., program is deposited from program The original position of reservoir starts to perform, and makes system normal work again.However, if CPU runs to one section of pass because of program fleet Key code, the modification of mistake is carried out to the critical data of microcontroller, or even erased code segment, that consequence will be calamity Difficulty, the chip can not also solve this problem.

The content of the invention

Technical problem to be solved of the embodiment of the present invention be to provide it is a kind of detect program operation deflection path method and Device, so that the phenomenon of program operation deflection path can be found early, avoid key caused by program operation deflection path Data are deleted or code segment such as is wiped free of at the serious consequence for being difficult to recover.

In order to solve the above problems, the invention discloses a kind of method for detecting program operation deflection path, applied to new Increase the processor of block identification register, including：

Extraction block identification is set to be instructed with detection, and the block identification setting includes present procedure basic block with detection instruction and referred to First block identification of fixed at least one first forerunner program basic block；

The block identification is decoded to set and detection instruction；

Perform decoded block identification to set and detection instruction so that obtain from the block identification register and formerly hold Second block identification of second capable forerunner's program basic block, and according to first block identification and the second block identification, determine program Run deflection path.

Alternatively, the decoded block identification of the execution is set and detection instruction also includes：

If it is determined that program is run without departing from path, or all first block identifications are all zero, then with the present procedure base The block identification of this block updates the second block identification in the block identification register.

Alternatively, before the extraction block identification sets and instructed with detection, methods described also includes：

In the entrance of the present procedure basic block, the newly-increased block identification of addition processor is set to be instructed with detection, described Block identification sets and obtains first block identification when being compiled with detection instruction.

Alternatively, first block identification is stored in the block identification by compiler and set and the first setting in detection instruction Instruct bit field.

Alternatively, the block identification sets the block identification with also including the present procedure basic block in detection instruction, institute The block identification for stating present procedure basic block is stored in the block identification setting and the second setting command bits in detection instruction by compiler Domain.

Alternatively, when the processor switches and performs the first program basic block, methods described also includes：

Extracting block identification and preserve instruction, the block identification, which preserves instruction, includes the first setting general-purpose register identification, wherein, The first setting general-purpose register identification specifies register position；

Decode the block identification and preserve instruction；

Perform the block identification and preserve instruction so that read into the second block identification in the block identification register described In the register position that first setting general-purpose register identification is specified.

Alternatively, methods described also includes：

Extracting block identification and recover instruction, the block identification, which recovers instruction, includes the second setting general-purpose register identification, wherein, The second setting general-purpose register identification specifies storage for the first program basic block in the forerunner's journey first carried out The register position of the block identification of sequence basic block.

Decode the block identification and recover instruction；

Perform the block identification and recover instruction so that the register-bit for specifying the second setting general-purpose register identification The value put is written in the block identification register.

Accordingly, the embodiment of the present invention additionally provides a kind of method for detecting program operation deflection path, is starting to perform Before present procedure basic block, including：

Obtain first piece of mark of at least one first forerunner program basic block specified for the present procedure basic block Know；

Obtained from register in the second block identification of the second forerunner's program basic block first carried out；

According to first block identification and the second block identification, determine that program runs deflection path.

Alternatively, methods described also includes：

If it is determined that program is run without departing from path, or all first block identifications are all zero, then with the present procedure base The second block identification in the block identification renewal register of this block.

Alternatively, when register is general register, methods described also includes：

In the entrance of the present procedure basic block, by compiler inserting instruction sequence, the command sequence specifies one General register is used to store the second block identification.

Alternatively, before the inserting instruction sequence by compiler, methods described also includes：

Judge that the present procedure basic block includes modification setting data manipulation or deletes code segment operation.

Accordingly, the embodiment of the present invention additionally provides a kind of device for detecting program operation deflection path, applied to newly-increased The processor of block identification register, described device include：

Detection instruction extraction module, instructed for extracting block identification setting with detection, the block identification is set to be referred to detection Order includes the first block identification of at least one first forerunner program basic block that present procedure basic block is specified；

Instruction decoder module is detected, is set and detection instruction for decoding the block identification；

Detection instruction execution module, for performing, decoded block identification is set and detection instructs so that from described piece of mark Know in register and obtain in the second block identification of the second forerunner's program basic block first carried out, and according to described first Block identification and the second block identification, determine that program runs deflection path.

Alternatively, the detection instruction execution module also includes：

Mark renewal submodule, for if it is determined that program operation without departing from path, or all first block identifications are all zero, The second block identification in the block identification register is then updated with the block identification of the present procedure basic block.

Alternatively, described device also includes：

Instruct add module, for it is described extraction block identification set with detection instruction before, in the present procedure base The entrance of this block, the newly-increased block identification of addition processor is set to be instructed with detection, and the block identification is set to be compiled with detection instruction First block identification is obtained when translating.

Alternatively, described device also includes：

Instruction extraction module is preserved, for when the processor switches and performs the first program basic block, extracting block identification Instruction is preserved, the block identification, which preserves instruction, includes the first setting general-purpose register identification, wherein, first setting general-purpose is posted Storage mark specifies register position；

Instruction decoder module is preserved, instruction is preserved for decoding the block identification；

Instruction execution module is preserved, preserves instruction for performing the block identification so that by the block identification register The second block identification read into the register position that the first setting general-purpose register identification is specified；

Recover instruction extraction module, recover instruction for extracting block identification, the block identification recovery instruction includes second and set Determine general register mark, wherein, the second setting general-purpose register identification specifies storage basic for first program Block the forerunner's program basic block first carried out block identification register position；

Recover instruction decoder module, recover instruction for decoding the block identification；

Recover instruction execution module, recover instruction for performing the block identification so that post second setting general-purpose Value in the register position that storage mark is specified is written in the block identification register.

Accordingly, the embodiment of the present invention additionally provides a kind of device for detecting program operation deflection path, including：

First block identification acquisition module, work as future for described for before starting to perform present procedure basic block, obtaining First block identification of at least one first forerunner program basic block that sequence basic block is specified；

Second block identification acquisition module, for being obtained from register in the second forerunner's program basic block first carried out Second block identification；

Deviate determining module, for according to first block identification and the second block identification, determining that program operation deviates Path.

Alternatively, when register is general register, described device also includes：

Sequence inserts module, described by compiler inserting instruction sequence for the entrance in the present procedure basic block Command sequence specifies a general register to be used to store the second block identification.

Alternatively, described device also includes：

Determination module is operated, for before the inserting instruction sequence by compiler, judging that the present procedure is basic Block includes modification setting data manipulation or deletes code segment operation.

Accordingly, the embodiment of the present invention additionally provides a kind of readable storage medium storing program for executing, when the instruction in the storage medium by During the computing device of electronic equipment so that electronic equipment is able to carry out said one or multiple described detection program operations are inclined From the method in path.

According to the embodiment of the present invention, set and detection instruction by extracting, decoding and perform block identification so that from described piece Obtained in marker register in the second block identification of the second forerunner's program basic block first carried out, and according to described first piece mark Knowledge and the second block identification, determine that program runs deflection path, match if be not present in the first block identification with the second block identification Block identification, then confirm program operation deflection path, realize in units of program basic block, the of each program basic block One instruction is performed before, and is not performed if checking program basic block according to correct path, confirms program operation Deflection path so that the phenomenon of program operation deflection path can be found early, so as to be transferred to error handle, avoid program from transporting Critical data caused by row deflection path is deleted or code segment such as is wiped free of at the serious consequence for being difficult to recover.

Brief description of the drawings

Fig. 1 shows a kind of step flow chart of the method for detection program operation deflection path of the embodiment of the present invention one；

Fig. 2 shows a kind of step flow chart of the method for detection program operation deflection path of the embodiment of the present invention two；

Fig. 3 shows that block identification sets the schematic diagram with detection instruction ID TS；

Fig. 4 shows a kind of step flow chart of the method for detection program operation deflection path of the embodiment of the present invention three；

Fig. 5 shows a kind of step flow chart of the method for detection program operation deflection path of the embodiment of the present invention four；

Fig. 6 shows block identification setting and overhaul flow chart；

Fig. 7 shows that block identification preserves instruction ID RD schematic diagram；

Fig. 8 shows that block identification recovers instruction IRWR schematic diagram；

Fig. 9 shows a kind of structural frames of the device embodiment of detection program operation deflection path of the embodiment of the present invention five Figure；

Figure 10 shows a kind of structure of the device embodiment of detection program operation deflection path of the embodiment of the present invention six Block diagram；

Figure 11 shows a kind of electronics for being used to detect program operation deflection path according to an exemplary embodiment The structured flowchart of equipment.

Embodiment

In order to facilitate the understanding of the purposes, features and advantages of the present invention, it is below in conjunction with the accompanying drawings and specific real Applying mode, the present invention is further detailed explanation.

Reference picture 1, show that the step of a kind of detection program of the embodiment of the present invention one runs the method for deflection path is flowed Cheng Tu, applied to the processor for having increased block identification register newly, specifically it may include steps of：

Step 101, block identification is extracted to set and detection instruction.

Program basic block refers to the statement sequence that an order performs in program, and only one of which entrance and one go out Mouthful, entrance is exactly first sentence therein, and outlet is exactly last sentence therein.For a basic block, Only enter during execution from its entrance, exited from its outlet, also referred to as basic block.

Present procedure basic block and forerunner's program basic block are relative concepts, and present procedure basic block is currently to hold Capable program basic block, forerunner's program basic block are exactly the program basic block performed before present procedure basic block.From program The first forerunner's program basic block specified for present procedure basic block can be obtained in code, that is, road is performed according to code First legal forerunner's program basic block of footpath.For a program basic block, the first forerunner's program basic block specified can To there is one or more.

In embodiments of the present invention, block identification is the mark distributed for each program basic block, for example, representing The block number of execution sequence.The block identification for the first forerunner's program basic block specified for present procedure basic block is first piece of mark Know.Before starting to perform present procedure basic block, present procedure basic block can be obtained by the static analysis for program First block identification of the first forerunner's program basic block specified, whether held for detection program by correct execution route OK.

In embodiments of the present invention, increase block identification register newly for processor, can specifically increase by one in register file Individual register, and it is assigned the coding different from general register.In annexation, block identification register can be posted with general Storage physically connects identical, and in decoding, block identification is set and detection instruction is fixed calls the register.At modification Manage device design, can be processor increase newly block identification set with detection instruct, processor can be directly realized by block identification set with The logic of instruction is detected, is realized without the command sequence by modification front processor, the instruction of insertion is lacked, processor expense It is small.

Processor can search instruction (for numerical value or series of values) from nondeclarative memory body, by program counter The position of (Program Counter, PC) designated program memory body, program counter preserve the number for identification current procedure position Value.For example, the precedence occurred in a program according to the look-up command for number of targets is extracted from internal memory or instruction buffer Look-up command, and it is sent into the stage of instruction decoding.Usually present instruction is got in command register.

In embodiments of the present invention, block identification is set includes present procedure basic block is specified at least one with detection instruction First block identification of individual first forerunner program basic block.

Step 102, the block identification is decoded to set and detection instruction.

In embodiments of the present invention, processor decoding block identification is set is instructed with detection, and instruction is disassembled to be significant Fragment, it will be interpreted as instructing according to the instruction set architecture of processor.Block identification is set and decoded with detection instruction, Ke Yicong Block identification is set with obtaining the first block identification in detection instruction.

Step 103, perform decoded block identification to set and detection instruction so that obtain from the block identification register In the second block identification of the second forerunner's program basic block first carried out, and according to first block identification and the second block identification, Determine that program runs deflection path.

In embodiments of the present invention, before present procedure basic block is performed, the second forerunner's program performed is basic The block identification of block is the second block identification, and the storage of the second block identification is in a register, is used for example, increase is special within a processor In the block identification register of the storage of the second block identification, can specifically any suitable register be used to store the second block identification, The embodiment of the present invention is not restricted to this.

In embodiments of the present invention, instruct decoded block identification to set to instruct with detection, can be from block identification register Middle acquisition judges to whether there is in first block identification in the second block identification of the second forerunner's program basic block first carried out The block identification to match with the second block identification, for example, whether each first block identification can be compared identical with the second block identification.Such as Fruit is not present, and illustrates first forerunner's program basic block that present procedure basic block specifies and in the second forerunner's journey first carried out Sequence basic block is different, and program is not performing according to correct execution route, then confirms program operation deflection path.

In one preferred embodiment of the invention, it is described perform that decoded block identification sets can be with detection instruction Including：If it is determined that program is run without departing from path, or all first block identifications are all zero, then with the present procedure basic block Block identification update the second block identification in the block identification register.

In one preferred embodiment of the invention, when the processor switches and performs the first program basic block, may be used also With including：Extracting block identification and preserve instruction, the block identification, which preserves instruction, includes the first setting general-purpose register identification, wherein, The first setting general-purpose register identification specifies register position.Then decode the block identification and preserve instruction.Described in execution Block identification preserves instruction so that the second block identification in the block identification register is read into first setting general-purpose and deposited In the register position that device mark is specified.

When processor switches and performs the first program basic block, that is processor does not perform present procedure basic block, just It is to say that processor is switched to other tasks from present procedure basic block and goes to perform, for saving scene, for the journey of other tasks Sequence basic block can use block identification register, when processor switches back into present procedure basic block and performed, can read and work as The block identification of forerunner's program basic block of preceding program basic block, so to perform block identification sense order, realize the preservation at scene.

In one preferred embodiment of the invention, can also include：Extract block identification and recover instruction, the block identification is extensive Multiple instruction includes the second setting general-purpose register identification, wherein, the second setting general-purpose register identification specifies storage to be directed to The first program basic block the forerunner's program basic block first carried out block identification register position.Decode described piece Identification recovery instructs, and performs the block identification and recover instruction so that specifies the second setting general-purpose register identification Value in register position is written in the block identification register.

Reference picture 2, show that the step of a kind of detection program of the embodiment of the present invention two runs the method for deflection path is flowed Cheng Tu, applied to the processor for having increased block identification register newly, specifically it may include steps of：

Step 201, in the entrance of the present procedure basic block, the newly-increased block identification of addition processor is set to be referred to detection Order.

In embodiments of the present invention, in the entrance of present procedure basic block, addition block identification is set to be instructed with detection, is being compiled When translating block identification setting with detection instruction, at least one first forerunner that acquisition is specified for the present procedure basic block is performed The step of first block identification of program basic block, at least one first block identification can be specifically got by static analysis.

In one preferred embodiment of the invention, first block identification by compiler be stored in the block identification set with The first setting instruction bit field in detection instruction.First setting instruction bit field is that the instruction with detecting instruction is set according to block identification Form determine, particularly as be by the first block identification be written to instruction in by instruction format delimit the position for including some instructions position Domain.

In one preferred embodiment of the invention, the block identification is set with also working as future including described in detection instruction The block identification of sequence basic block, the block identification of the present procedure basic block is stored in the block identification and set by compiler to be referred to detection Second setting instruction bit field in order.Second setting instruction bit field is to be set to determine with the instruction format for detecting instruction according to block identification , particularly as be by the second block identification be written to instruction in by instruction format delimit the bit field for including some instructions position.

Block identification detection instruction is introduced by taking MIPS32 bit processors as an example below.

Block identification as shown in Figure 3 sets the schematic diagram with detection instruction ID TS, and the IDTS instructions of addition use register The coded format of type, 32 0,1 codings, which connect together, represents an instruction, high 6 (31bit of 32 bit instruction codes:26bit) For opcode domains.Wherein SPECIAL2 (command code opcode is 011100) instruction slots are by MIPS regulation can be by user certainly Main definition.The embodiment of the present invention is defined using the value of the SPECIAL2 dead slots retained in existing MIPS instruction set.Followed by The source operand register field of two 5, it is changed to be respectively used to deposit two immediate the first block identification PID1 and PID2, then It is the destination operand register field of 5, is changed to the block identification CID for depositing an immediate present procedure basic block.Connect It is 5 bit opcodes, and due to not using, could be arranged to null value (00000).(command code opcode is the IDTS of last 6 110000) it is function code.By the operation of SPECIAL2 codes and the common determine instruction of IDTS codes.

Step 202, block identification is extracted to set and detection instruction.

In embodiments of the present invention, specific implementation may refer to the description in previous embodiment, not repeat separately herein.

Step 203, the block identification is decoded to set and detection instruction.

Step 204, perform decoded block identification to set and detection instruction so that obtain from the block identification register In the second block identification of the second forerunner's program basic block first carried out, and according to first block identification and the second block identification, Determine that program runs deflection path.

According to the embodiment of the present invention, by the entrance in the present procedure basic block, the newly-increased block mark of addition processor Knowledge is set to be instructed with detecting, and is extracted, is decoded and perform block identification setting and detection instruction so that from the block identification register Obtain in the second block identification of the second forerunner's program basic block first carried out, and marked according to first block identification and second piece Know, determine that program runs deflection path, if the block identification to match with the second block identification is not present in the first block identification, really Recognize program operation deflection path, realize in units of program basic block, held in first instruction of each program basic block Before row, do not performed if checking program basic block according to correct path, confirm program operation deflection path so that The phenomenon of program operation deflection path can be found early, so as to be transferred to error handle, avoid program operation deflection path from leading The critical data of cause, which is deleted, or code segment is wiped free of etc. is difficult to the serious consequence recovered.

Reference picture 4, show that the step of a kind of detection program of the embodiment of the present invention three runs the method for deflection path is flowed Cheng Tu, before starting to perform present procedure basic block, specifically it may include steps of：

Step 301, obtain and be directed at least one first forerunner program basic block that the present procedure basic block is specified First block identification.

Step 302, obtained from register in the second block identification of the second forerunner's program basic block first carried out.

In embodiments of the present invention, the second block identification stores in a register, such as, it is possible to specify a general register For the storage of the second block identification, for example, MIPS (Microprocessor without interlocked piped Stages, the microprocessor of no inner interlocked pipelining-stage) s7 registers in processor, or, increase is special within a processor For the block identification register of the storage of the second block identification, specifically any suitable register can be used to store second piece of mark Know, the embodiment of the present invention is not restricted to this.

During specific implementation, a kind of implementation can not change hardware design, by compiler in present procedure basic block First sentence before inserting instruction sequence, perform the command sequence and read the second block identification from specified general register.Separately A kind of implementation can be modification processor design, increase block identification register, and increase special operational order, and performing should Instruction reads the second block identification from block identification register.

Step 303, according to first block identification and the second block identification, determine that program runs deflection path.

In embodiments of the present invention, the block mark that whether there is in first block identification and the second block identification matches is judged Know, for example, whether each first block identification can be compared identical with the second block identification.If it does not, explanation present procedure base First forerunner's program basic block that this block is specified and in the second forerunner's program basic block first carried out be different, program Do not performed according to correct execution route, then confirming program operation deflection path.

During specific implementation, a kind of implementation can not change hardware design, by compiler in present procedure basic block First sentence before inserting instruction sequence, perform the command sequence judge in first block identification whether there is and second The block identification that block identification matches.Another implementation can be modification processor design, increase block identification register, and increase Add special operational order, perform the instruction to judge to whether there is what is with the second block identification matched in first block identification Block identification.

According to the embodiment of the present invention, by the way that before starting to perform present procedure basic block, acquisition is directed to institute's present procedure base First block identification of at least one first forerunner program basic block that this block is specified, obtained from register in first carried out Second block identification of two forerunner's program basic blocks, according to first block identification and the second block identification, determine that program operation deviates Path, if the block identification to match with the second block identification is not present in the first block identification, confirm program operation deflection path, Realize in units of program basic block, be performed before in first instruction of each program basic block, if checking journey Sequence basic block does not perform according to correct path, then confirms program operation deflection path so that program operation deflection path Phenomenon can be found early, so as to be transferred to error handle, avoid critical data caused by program operation deflection path from being deleted Or code segment such as is wiped free of at the serious consequence for being difficult to recover.

In one preferred embodiment of the invention, can also include：If it is determined that program operation is without departing from path, Huo Zhesuo It is all zero to have the first block identification, then with the second block identification in the block identification renewal register of the present procedure basic block.

First block identification has non-zero, and also promising zero.When the first block identification non-zero, representative is directed to present procedure basic block There is the forerunner's program basic block specified, present procedure basic block is not the journey of first execution in the Program path currently performed Sequence basic block.When the first block identification is zero, the forerunner's program basic block do not specified for present procedure basic block is represented, Present procedure basic block is the program basic block of first execution in the Program path currently performed, it is not necessary in the journey first carried out Sequence basic block.

If the block identification to match with the second block identification in the first block identification be present, illustrate that present procedure basic block is specified First forerunner's program basic block as the second forerunner's program basic block first carried out is, read-me is according to just with True execution route is performing, and runs and flies without generating program.Or all first block identifications are all zero, illustrate the journey currently performed Present procedure basic block is the program basic block of first execution in sequence path, cannot confirm program fleet.Therefore, if there is Or all first block identifications are all zero, then with second piece of mark in the block identification renewal register of the present procedure basic block Know, during specific implementation, if the second block identification is stored in the general register specified, with the block mark of present procedure basic block The second block identification stored in the general register replaced and specified is known, if the second block identification is stored in dedicated for memory block mark The block identification register of knowledge, then with the second piece of mark stored in the block identification replacement block marker register of present procedure basic block Know, the second block identification of forerunner's program basic block during being performed as next program basic block.

In one preferred embodiment of the invention, when register is general register, can also include：Work as described The entrance of preceding program basic block, by compiler inserting instruction sequence, the command sequence specifies a general register to be used to deposit Store up the second block identification.Command sequence is used to perform foregoing detecting step 302 and 303, and step is performed when compiling the command sequence 301。

In a kind of implementation of the present invention, it is not necessary to change hardware design, held in each present procedure basic block During row, by compiler present procedure basic block entrance inserting instruction sequence, execute instruction sequence can realize step 302 and Method described by step 303.

For example, insert following command sequence (MIPS32 instructions) in the basic block entrance of program：

Xori t0, s7, PID1 are instructed, the instruction is to the value (the second block identification) and immediate PID1 in s7 registers (the first block identification) performs XOR (xori) operation, and result is preserved into destination register t0, is all mutually 0, is differed as 1.

Clz t1, t0 are instructed, the instruction is performs leading 0 counting (clz), the right number of value in t0 registers first 1 Before how many 0, result is stored in t1 registers.

Xori t0, s7, PID2 are instructed, the instruction is to the value in s7 registers and immediate PID2 (the first block identification) XOR (xori) operation is performed, result is preserved into destination register t0, is all mutually 0, is differed as 1.

Clz t0, t0 are instructed, the instruction is performs leading 0 counting (clz), the right number of value in t0 registers first 1 Before how many 0, result is stored in t0 registers.

Or t1, t1, t0 are instructed, the instruction is that the value execution in the value in t1 registers and t0 registers or (or) are grasped Make, result is saved in t1 registers.

Srl t1, t1,5 are instructed, the instruction is to the value logic shift right (srl) 5 in t1 registers, and result is saved in In t1 registers.

Teq t1, $ 0 is instructed, the instruction is to carry out test and comparison computing (teq) to the value in t1 registers and arithmetic value 0, Program fleet, triggering TRAP (trap interruption) exception signals are confirmed if the value in t1 registers and arithmetic value 0 are of equal value.

Ori s7, $ 0, CID is instructed, the instruction is logic or instruction (ori), by the value in No. 0 logic register ($ 0) (constant value 0) writes s7 registers after entering line position or computing with immediate CID (block identification of present procedure basic block).

Wherein PID1 or PID2 is the block number of forerunner's program basic block, and CID is the block number of present procedure basic block, is 16 bits.During into program basic block, send out and make an exception if the value in s7 and PID1 or PID2 are unequal, confirm Program runs deflection path.If the equal block number that s7 is then made into present procedure basic block.

When compiling command sequence, at least one first forerunner for obtaining and being specified for the present procedure basic block is performed The step of first block identification of program basic block, at least one first block identification, example can be specifically got by static analysis Such as, immediate PID1 and PID2.And it is compiled into when compiling command sequence in command sequence.

In one preferred embodiment of the invention, before the inserting instruction sequence by compiler, can also include： Judge that the present procedure basic block includes modification setting data manipulation or deletes code segment operation.

Due to not changing hardware design, the instruction of insertion is relatively more, can include judging present procedure basic block When changing setting data or deleting the operation such as code segment, inserting instruction sequence, setting data can be set according to being actually needed Any suitable data, realize in this way present procedure basic block can change key data or delete code segment Etc. big program basic block inserting instruction sequence is had an impact, to avoid the consequence that can not recover caused by program fleet.

Reference picture 5, show that the step of a kind of detection program of the embodiment of the present invention four runs the method for deflection path is flowed Cheng Tu, before starting to perform present procedure basic block, specifically it may include steps of：

Step 401, obtain and be directed at least one first forerunner program basic block that the present procedure basic block is specified First block identification.

Step 402, in the entrance of the present procedure basic block, the newly-increased block identification of addition processor is set to be referred to detection Order.

In embodiments of the present invention, when register is for the newly-increased block identification register of processor, at modification Manage device design, can be processor increase newly block identification set with detection instruct, processor can be directly realized by block identification set with The logic of instruction is detected, is realized without the command sequence by modification front processor, the instruction of insertion is lacked, processor expense It is small.

Block identification register is used to store in the second block identification of the second forerunner's program basic block first carried out, passes through Processor design is changed, for example, increasing block identification register in decoding module, and increases special operational order, can be with Set including block block identification and instructed with detecting.Block identification is set to be used to perform foregoing detecting step 403 and 404 with detection instruction, Compile the block identification and execution step 401 when being instructed with detection is set.

In embodiments of the present invention, in the entrance of present procedure basic block, addition block identification is set to be instructed with detection, is being compiled When translating block identification setting with detection instruction, at least one first forerunner that acquisition is specified for the present procedure basic block is performed The step of first block identification of program basic block, at least one first block identification can be specifically got by static analysis.So Block identification is performed afterwards to set with detecting instruction, can be obtained from register in the second forerunner's program basic block first carried out The second block identification；Then the block identification that whether there is in first block identification and the second block identification matches is judged；If In the presence of or all first block identifications be all zero, then with second in the block identification of present procedure basic block renewal register Block identification；If it does not exist, then confirm program operation deflection path.

In one preferred embodiment of the invention, the block identification setting includes at least one described with detection instruction First block identification, first block identification are stored in the block identification by compiler and set the first setting in being instructed with detection to instruct Bit field.

Specifically, after obtaining the first block identification, when compiling block identification is set and detection instructs, by compiler by first piece Mark deposit block identification is set and the first setting instruction bit field in detection instruction.First setting instruction bit field is according to block identification Set what the instruction format with detection instruction determined, particularly as being that the first block identification is written in instruction to be delimited by instruction format The bit field for including some instructions position.

In one preferred embodiment of the invention, the block identification is set with also working as future including described in detection instruction The block identification of sequence basic block, the block identification of the present procedure basic block is stored in the block identification and set by compiler to be referred to detection The second setting instruction bit field in order.

Specifically, compile block identification to set when instructing with detection, by compiler by the block identification of present procedure basic block Block identification is stored in set and the second setting instruction bit field in detection instruction.Second setting instruction bit field is set according to block identification With detection instruction instruction format determine, particularly as be by the second block identification be written to instruction in by instruction format delimit bag Include the bit field of some instructions position.

Step 403, obtained from register in the second block identification of the second forerunner's program basic block first carried out.

Step 404, according to first block identification and the second block identification, determine that program runs deflection path.

In embodiments of the present invention, specific implementation may refer to the description in previous embodiment, not repeat separately.

The flow chart of concrete implementation may refer to block identification setting as shown in Figure 6 and overhaul flow chart.Respectively according to Logical relation in flow chart to the first block identification PID1 whether and 0 of equal value, block identification register BID in value whether and PID1 Whether whether of equal value, the first block identification PID2 a series of with PID2 progress of equal value with the value in 0 equivalence, block identification register BID Judge, if in the first block identification of non-zero, in the absence of with the second block identification identical block identification, be issued by TRAP exception Signal, confirm program operation deflection path, if there is with the second block identification identical block identification, or all first pieces Mark is all of equal value with 0, then the value in block identification register is arranged to the block identification CID of present procedure basic block.

In a kind of preferred embodiment of the present invention, it is preferable that when register is that the block identification increased newly for processor is deposited During device, it can also include：When the processor switches and performs the first program basic block, perform the newly-increased block identification of processor and protect Instruction is deposited, the block identification preserves instruction and posted for the second block identification in block identification register to be read into the first setting general-purpose Storage.

Designed by changing processor, can be that processor increases block identification preservation instruction newly, processor can be directly realized by Block identification preserves the logic of instruction, and block identification preserves instruction and is used to the second block identification in block identification register reading into first Setting general-purpose register, saving scene when realizing context switching.

In a kind of preferred embodiment of the present invention, the block identification, which preserves instruction, includes the first setting general-purpose deposit The mark of device.The mark that the first setting general-purpose register of the instruction format determination of instruction can be preserved according to block identification is instructing In position, if particularly as being to be included in instruction where the mark of the first setting general-purpose register by what instruction format was delimited The bit field of dry command bits.

Block identification preserves instruction and is used to the value in block identification register reading into the first setting general-purpose register, for example, Block identification as shown in Figure 7 preserves instruction ID RD schematic diagram, and the IDRD instructions of addition use the coded format of register type, SPECIAL2 (command code opcode is 011100) instruction slots can independently be defined by MIPS regulation by user.The present invention Embodiment is defined using the value of the SPECIAL2 dead slots retained in existing MIPS instruction set.Operated followed by the sources of two 5 Number register fields, due to not using, could be arranged to null value (00000), followed by the destination operand register field of 5, It is changed to deposit the first setting general-purpose register identification rd of block identification.Followed by 5 bit opcodes, due to not using, Ke Yishe It is set to null value (00000).The IDRD (command code opcode is 110001) of last 6 is function code.By SPECIAL2 codes and The operation of the common determine instruction of IDRD codes.

In a kind of preferred embodiment of the present invention, it can also include：Perform the newly-increased block identification of processor and recover instruction, institute State block identification and recover instruction and be used to the value in the second setting general-purpose register being written in the block identification register, described the Deposited in two setting general-purpose registers be directed to the first program basic block in the forerunner's program basic block first carried out Block identification.

When processor switches and performs the first program basic block, behind the scene for saving present procedure basic block, it is possible to By being written in the block identification of the forerunner's program basic block first carried out in block identification register for the first program basic block, come extensive The scene of multiple first program basic block.

Designed by changing processor, can be that processor increases block identification recovery instruction newly, processor can be directly realized by Block identification recovers the logic of instruction, and block identification recovers instruction and is used to the value in the second setting general-purpose register being written to described piece In marker register, first carrying out for the first program basic block is directed to due to being deposited in the second setting general-purpose register Forerunner's program basic block block identification, recover the scene of the first program basic block when realizing context switching.

In a kind of preferred embodiment of the present invention, the block identification, which recovers instruction, includes the second setting general-purpose deposit The mark of device.The mark that the second setting general-purpose register of the instruction format determination of instruction can be recovered according to block identification is instructing In position, particularly as be in instruction residing for the mark of the second setting general-purpose register it is some including of delimiting by instruction format The bit field of command bits.

Block identification recovers the second block identification write-in block identification that instruction is used to store in the second setting general-purpose register and posted In storage, for example, block identification as shown in Figure 8 recovers instruction ID WR schematic diagram, the IDWR instructions of addition use register class The coded format of type, SPECIAL2 (command code opcode be 011100) instruction slots are by MIPS regulation can be autonomous by user Definition.The embodiment of the present invention is defined using the value of the SPECIAL2 dead slots retained in existing MIPS instruction set.Followed by one The individual source operand register field of 5, for depositing the second setting general-purpose register identification rs, the source of one 5 then Operand register domain, due to not using, it could be arranged to null value (00000).Followed by the destination operand register of 5 Domain, due to not using, it could be arranged to null value (00000).Followed by 5 bit opcodes, due to not using, could be arranged to Null value (00000).The IDWR (command code opcode is 110010) of last 6 is function code.By SPECIAL2 codes and IDWR codes The operation of determine instruction.

According to the embodiment of the present invention, by the way that before starting to perform present procedure basic block, acquisition is directed to the present procedure First block identification of at least one first forerunner program basic block that basic block is specified, in entering for the present procedure basic block Mouthful, the newly-increased block identification of addition processor is set to be instructed with detection, is obtained from register in the second forerunner's journey first carried out Second block identification of sequence basic block, according to first block identification and the second block identification, determine that program runs deflection path, if The block identification to match with the second block identification is not present in first block identification, then confirms program operation deflection path so that program Operation deflection path phenomenon can be found early, so as to be transferred to error handle, avoid program operation deflection path caused by Critical data is deleted or code segment such as is wiped free of at the serious consequence for being difficult to recover.And processor design is have modified, increase Add block identification register and corresponding special instruction, reduce the expense of detection.

Further, by when the processor switches and performs the first program basic block, performing the newly-increased block mark of processor Know and preserve instruction, the newly-increased block identification of execution processor recovers instruction, preservation and restoring scene when realizing context switching.

It should be noted that for embodiment of the method, in order to be briefly described, therefore it is all expressed as to a series of action group Close, but those skilled in the art should know, the embodiment of the present invention is not limited by described sequence of movement, because according to According to the embodiment of the present invention, some steps can use other orders or carry out simultaneously.Secondly, those skilled in the art also should Know, embodiment described in this description belongs to preferred embodiment, and the involved action not necessarily present invention is implemented Necessary to example.

Reference picture 9, show a kind of device embodiment of detection program operation deflection path of the embodiment of the present invention five Structured flowchart, applied to the processor for having increased block identification register newly, it can specifically include following module：

Detection instruction extraction module 501, instructed for extracting block identification setting with detection, the block identification is set and detection Instruction includes the first block identification of at least one first forerunner program basic block that present procedure basic block is specified；

Instruction decoder module 502 is detected, is set and detection instruction for decoding the block identification；

Detection instruction execution module 503, for performing, decoded block identification is set and detection instructs so that from described piece Obtained in marker register in the second block identification of the second forerunner's program basic block first carried out, and according to described One block identification and the second block identification, determine that program runs deflection path.

In one preferred embodiment of the invention, the detection instruction execution module also includes：

In one preferred embodiment of the invention, described device also includes：

In one preferred embodiment of the invention, first block identification by compiler be stored in the block identification set with The first setting instruction bit field in detection instruction.

In one preferred embodiment of the invention, the block identification is set with also working as future including described in detection instruction The block identification of sequence basic block, the block identification of the present procedure basic block is stored in the block identification and set by compiler to be referred to detection Second setting instruction bit field in order.

In one preferred embodiment of the invention, described device also includes：

Instruction execution module is preserved, preserves instruction for performing the block identification so that by the block identification register The second block identification read into the register position that the first setting general-purpose register identification is specified.

Reference picture 10, show a kind of device embodiment of detection program operation deflection path of the embodiment of the present invention six Structured flowchart, it can specifically include following module：

First block identification acquisition module 601, for before starting to perform present procedure basic block, obtaining for described current First block identification of at least one first forerunner program basic block that program basic block is specified；

Second block identification acquisition module 602, it is basic in the second forerunner's program first carried out for being obtained from register Second block identification of block；

Deviate determining module 603, for according to first block identification and the second block identification, determining that program operation is inclined From path.

In one preferred embodiment of the invention, described device also includes：

Identify update module, for if it is determined that program operation without departing from path, or all first block identifications are all zero, then With the second block identification in the block identification renewal register of the present procedure basic block.

In one preferred embodiment of the invention, when register is general register, described device also includes：

In one preferred embodiment of the invention, described device also includes：

In one preferred embodiment of the invention, when register is for the newly-increased block identification register of processor, Described device also includes：

Add module is instructed, for the entrance in the present procedure basic block, the newly-increased block identification of addition processor is set Put and instructed with detection.

For device embodiment, because it is substantially similar to embodiment of the method, so description is fairly simple, it is related Part illustrates referring to the part of embodiment of the method.

Figure 11 is a kind of electronic equipment for being used to detect program operation deflection path according to an exemplary embodiment 700 structured flowchart.For example, electronic equipment 700 can be mobile phone, computer, digital broadcast terminal, information receiving and transmitting sets It is standby, game console, tablet device, Medical Devices, body-building equipment, personal digital assistant etc..

Reference picture 11, electronic equipment 700 can include following one or more assemblies：Processing component 702, memory 704, Power supply module 706, multimedia groupware 708, audio-frequency assembly 710, the interface 712 of input/output (I/O), sensor cluster 714, And communication component 716.

The integrated operation of the usual control electronics 700 of processing component 702, such as leads to display, call, data The operation that letter, camera operation and record operation are associated.Treatment element 702 can include one or more processors 720 to hold Row instruction, to complete all or part of step of above-mentioned method.In addition, processing component 702 can include one or more moulds Block, the interaction being easy between processing component 702 and other assemblies.For example, processing component 702 can include multi-media module, with Facilitate the interaction between multimedia groupware 708 and processing component 702.

Memory 704 is configured as storing various types of data to support the operation in equipment 700.These data are shown Example includes the instruction of any application program or method for being operated on electronic equipment 700, contact data, telephone directory number According to, message, picture, video etc..Memory 704 can by any kind of volatibility or non-volatile memory device or they Combination realize, as static RAM (SRAM), Electrically Erasable Read Only Memory (EEPROM) are erasable Programmable read only memory (EPROM), programmable read only memory (PROM), read-only storage (ROM), magnetic memory, quick flashing Memory, disk or CD.

Electric power assembly 704 provides electric power for the various assemblies of electronic equipment 700.Electric power assembly 704 can include power supply pipe Reason system, one or more power supplys, and other components associated with generating, managing and distributing electric power for electronic equipment 700.

Multimedia groupware 708 is included in the screen of one output interface of offer between the electronic equipment 700 and user. In certain embodiments, screen can include liquid crystal display (LCD) and touch panel (TP).If screen includes touch surface Plate, screen may be implemented as touch-screen, to receive the input signal from user.Touch panel includes one or more touch Sensor is with the gesture on sensing touch, slip and touch panel.The touch sensor can not only sensing touch or slip The border of action, but also detect the duration and pressure related to the touch or slide.In certain embodiments, Multimedia groupware 708 includes a front camera and/or rear camera.When electronic equipment 700 is in operator scheme, such as clap When taking the photograph pattern or video mode, front camera and/or rear camera can receive outside multi-medium data.It is each preposition Camera and rear camera can be a fixed optical lens system or have focusing and optical zoom capabilities.

Audio-frequency assembly 710 is configured as output and/or input audio signal.For example, audio-frequency assembly 710 includes a Mike Wind (MIC), when electronic equipment 700 is in operator scheme, during such as call model, logging mode and speech recognition mode, microphone It is configured as receiving external audio signal.The audio signal received can be further stored in memory 704 or via logical Letter component 716 is sent.In certain embodiments, audio-frequency assembly 710 also includes a loudspeaker, for exports audio signal.

I/O interfaces 712 provide interface between processing component 702 and peripheral interface module, and above-mentioned peripheral interface module can To be keyboard, click wheel, button etc..These buttons may include but be not limited to：Home button, volume button, start button and lock Determine button.

Sensor cluster 714 includes one or more sensors, for providing the state of various aspects for electronic equipment 700 Assess.For example, sensor cluster 714 can detect opening/closed mode of equipment 700, the relative positioning of component, such as institute The display and keypad that component is electronic equipment 700 are stated, sensor cluster 714 can also detect electronic equipment 700 or electronics The position of 700 1 components of equipment changes, the existence or non-existence that user contacts with electronic equipment 700, the orientation of electronic equipment 700 Or acceleration/deceleration and the temperature change of electronic equipment 700.Sensor cluster 714 can include proximity transducer, be configured to The presence of object nearby is detected in no any physical contact.Sensor cluster 714 can also include optical sensor, such as CMOS or ccd image sensor, for being used in imaging applications.In certain embodiments, the sensor cluster 714 can be with Including acceleration transducer, gyro sensor, Magnetic Sensor, pressure sensor or temperature sensor.

Communication component 716 is configured to facilitate the communication of wired or wireless way between electronic equipment 700 and other equipment. Electronic equipment 700 can access the wireless network based on communication standard, such as WiFi, 2G or 3G, or combinations thereof.Show at one In example property embodiment, communication component 714 receives broadcast singal or broadcast from external broadcasting management system via broadcast channel Relevant information.In one exemplary embodiment, the communication component 714 also includes near-field communication (NFC) module, short to promote Cheng Tongxin.For example, radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra wide band can be based in NFC module (UWB) technology, bluetooth (BT) technology and other technologies are realized.

In the exemplary embodiment, electronic equipment 700 can be by one or more application specific integrated circuits (ASIC), number Word signal processor (DSP), digital signal processing appts (DSPD), PLD (PLD), field programmable gate array (FPGA), controller, microcontroller, microprocessor or other electronic components are realized, for performing the above method.

In the exemplary embodiment, a kind of non-transitorycomputer readable storage medium including instructing, example are additionally provided Such as include the memory 704 of instruction, above-mentioned instruction can be performed to complete the above method by the processor 720 of electronic equipment 700.Example Such as, the non-transitorycomputer readable storage medium can be ROM, it is random access memory (RAM), CD-ROM, tape, soft Disk and optical data storage devices etc..

A kind of non-transitorycomputer readable storage medium, when the instruction in the storage medium is held by the processor of terminal During row so that terminal is able to carry out a kind of detection program operation deflection path method, applied to having increased block identification register newly Processor, methods described include：Extract block identification to set with detecting instruction, the block identification is set to be instructed including current with detection First block identification of at least one first forerunner program basic block that program basic block is specified；

The block identification is decoded to set and detection instruction；

Decode the block identification and preserve instruction；

Alternatively, methods described also includes：

Decode the block identification and recover instruction；

Each embodiment in this specification is described by the way of progressive, what each embodiment stressed be with The difference of other embodiment, between each embodiment identical similar part mutually referring to.

It should be understood by those skilled in the art that, the embodiment of the embodiment of the present invention can be provided as method, apparatus or calculate Machine program product.Therefore, the embodiment of the present invention can use complete hardware embodiment, complete software embodiment or combine software and The form of the embodiment of hardware aspect.Moreover, the embodiment of the present invention can use one or more wherein include computer can With in the computer-usable storage medium (including but is not limited to magnetic disk storage, CD-ROM, optical memory etc.) of program code The form of the computer program product of implementation.

The embodiment of the present invention is with reference to method according to embodiments of the present invention, terminal device (system) and computer program The flow chart and/or block diagram of product describes.It should be understood that can be by computer program instructions implementation process figure and/or block diagram In each flow and/or square frame and the flow in flow chart and/or block diagram and/or the combination of square frame.These can be provided Computer program instructions are set to all-purpose computer, special-purpose computer, Embedded Processor or other programmable data processing terminals Standby processor is to produce a machine so that is held by the processor of computer or other programmable data processing terminal equipments Capable instruction is produced for realizing in one flow of flow chart or multiple flows and/or one square frame of block diagram or multiple square frames The device for the function of specifying.

These computer program instructions, which may be alternatively stored in, can guide computer or other programmable data processing terminal equipments In the computer-readable memory to work in a specific way so that the instruction being stored in the computer-readable memory produces bag The manufacture of command device is included, the command device is realized in one flow of flow chart or multiple flows and/or one side of block diagram The function of being specified in frame or multiple square frames.

These computer program instructions can be also loaded into computer or other programmable data processing terminal equipments so that Series of operation steps is performed on computer or other programmable terminal equipments to produce computer implemented processing, so that The instruction performed on computer or other programmable terminal equipments is provided for realizing in one flow of flow chart or multiple flows And/or specified in one square frame of block diagram or multiple square frames function the step of.

Although having been described for the preferred embodiment of the embodiment of the present invention, those skilled in the art once know base This creative concept, then other change and modification can be made to these embodiments.So appended claims are intended to be construed to Including preferred embodiment and fall into having altered and changing for range of embodiment of the invention.

Finally, it is to be noted that, herein, such as first and second or the like relational terms be used merely to by One entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operation Between any this actual relation or order be present.Moreover, term " comprising ", "comprising" or its any other variant meaning Covering including for nonexcludability, so that process, method, article or terminal device including a series of elements are not only wrapped Those key elements, but also the other element including being not expressly set out are included, or is also included for this process, method, article Or the key element that terminal device is intrinsic.In the absence of more restrictions, wanted by what sentence "including a ..." limited Element, it is not excluded that other identical element in the process including the key element, method, article or terminal device also be present.

A kind of detection program operation deflection path method provided by the present invention, a kind of detection program operation are deviateed above Path device, it is described in detail, specific case used herein is explained the principle and embodiment of the present invention State, the explanation of above example is only intended to help the method and its core concept for understanding the present invention；Meanwhile for this area Those skilled in the art, according to the thought of the present invention, there will be changes in specific embodiments and applications, to sum up institute State, this specification content should not be construed as limiting the invention.

Claims

A kind of 1. method for detecting program operation deflection path, it is characterised in that applied to the place for having increased block identification register newly Device is managed, methods described includes：

Extract block identification to set with detecting instruction, the block identification, which sets to instruct with detection, includes what present procedure basic block was specified First block identification of at least one first forerunner program basic block；

The block identification is decoded to set and detection instruction；

Perform decoded block identification and set and instructed with detection so that obtain from the block identification register and first carrying out Second block identification of second forerunner's program basic block, and according to first block identification and the second block identification, determine that program is run Deflection path.
2. according to the method for claim 1, it is characterised in that the decoded block identification of the execution is set to be instructed with detection Also include：

If it is determined that program is run without departing from path, or all first block identifications are all zero, then with the present procedure basic block Block identification update the second block identification in the block identification register.
3. according to the method for claim 1, it is characterised in that before the extraction block identification sets and detects instruction, Methods described also includes：

In the entrance of the present procedure basic block, the newly-increased block identification of addition processor is set to be instructed with detection, described piece of mark Know to set and obtain first block identification when being compiled with detection instruction.
4. according to the method for claim 3, it is characterised in that first block identification is stored in the block identification by compiler Set and the first setting instruction bit field in detection instruction.
5. method according to claim 1 or 2, it is characterised in that the block identification is set with also including in detection instruction The block identification of the present procedure basic block, the block identification of the present procedure basic block are stored in the block identification by compiler and set Put and the second setting instruction bit field in detection instruction.
6. according to the method described in any one in claim 1-3, it is characterised in that perform first in processor switching During program basic block, methods described also includes：

Extracting block identification and preserve instruction, the block identification, which preserves instruction, includes the first setting general-purpose register identification, wherein, it is described First setting general-purpose register identification specifies register position；

Decode the block identification and preserve instruction；

Perform the block identification and preserve instruction so that the second block identification in the block identification register is read into described first In the register position that setting general-purpose register identification is specified.
7. according to the method for claim 6, it is characterised in that methods described also includes：

Extracting block identification and recover instruction, the block identification, which recovers instruction, includes the second setting general-purpose register identification, wherein, it is described Second setting general-purpose register identification specifies storage for the first program basic block in the forerunner's program base first carried out The register position of the block identification of this block.

Decode the block identification and recover instruction；

Perform the block identification and recover instruction so that in the register position for specifying the second setting general-purpose register identification Value be written in the block identification register.
A kind of 8. method for detecting program operation deflection path, it is characterised in that before starting to perform present procedure basic block, bag Include：

Obtain the first block identification of at least one first forerunner program basic block specified for the present procedure basic block；

Obtained from register in the second block identification of the second forerunner's program basic block first carried out；

According to first block identification and the second block identification, determine that program runs deflection path.
9. according to the method for claim 8, it is characterised in that methods described also includes：

If it is determined that program is run without departing from path, or all first block identifications are all zero, then with the present procedure basic block Block identification renewal register in the second block identification.
10. method according to claim 8 or claim 9, it is characterised in that when register is general register, methods described Also include：

In the entrance of the present procedure basic block, by compiler inserting instruction sequence, specified one of the command sequence is general Register is used to store the second block identification.
11. according to the method for claim 10, it is characterised in that before the inserting instruction sequence by compiler, institute Stating method also includes：

Judge that the present procedure basic block includes modification setting data manipulation or deletes code segment operation.
12. a kind of device for detecting program operation deflection path, it is characterised in that applied to the place for having increased block identification register newly Device is managed, described device includes：

Detection instruction extraction module, instructed for extracting block identification setting with detection, the block identification is set and detection instruction bag Include the first block identification of at least one first forerunner program basic block that present procedure basic block is specified；

Instruction decoder module is detected, is set and detection instruction for decoding the block identification；

Detection instruction execution module, for performing, decoded block identification is set and detection instructs so that is posted from the block identification Obtained in storage in the second block identification of the second forerunner's program basic block first carried out, and according to described first piece mark Knowledge and the second block identification, determine that program runs deflection path.
13. device according to claim 12, it is characterised in that the detection instruction execution module also includes：

Mark renewal submodule, for if it is determined that program operation without departing from path, or all first block identifications are all zero, then with The block identification of the present procedure basic block updates the second block identification in the block identification register.
14. device according to claim 12, it is characterised in that described device also includes：

Instruct add module, for it is described extraction block identification set with detection instruction before, in the present procedure basic block Entrance, the newly-increased block identification of addition processor is set to be instructed with detection, and the block identification is set when being compiled with detection instruction Obtain first block identification.
15. according to the device described in any one in claim 12-14, it is characterised in that described device also includes：

Instruction extraction module is preserved, for when the processor switches and performs the first program basic block, extraction block identification to preserve Instruction, the block identification, which preserves instruction, includes the first setting general-purpose register identification, wherein, the first setting general-purpose register Mark specifies register position；

Instruction decoder module is preserved, instruction is preserved for decoding the block identification；

Instruction execution module is preserved, instruction is preserved for performing the block identification so that by the in the block identification register Two block identifications are read into the register position that the first setting general-purpose register identification is specified；

Recover instruction extraction module, recover instruction for extracting block identification, it is logical that the block identification recovery instruction includes the second setting With register identification, wherein, the second setting general-purpose register identification specifies storage for the first program basic block The forerunner's program basic block first carried out block identification register position；

Recover instruction decoder module, recover instruction for decoding the block identification；

Recover instruction execution module, recover instruction for performing the block identification so that by the second setting general-purpose register The value identified in the register position specified is written in the block identification register.
A kind of 16. device for detecting program operation deflection path, it is characterised in that including：

First block identification acquisition module, for before starting to perform present procedure basic block, acquisition to be directed to the present procedure base First block identification of at least one first forerunner program basic block that this block is specified；

Second block identification acquisition module, for being obtained from register the second of the second forerunner's program basic block first carried out Block identification；

Deviate determining module, for according to first block identification and the second block identification, determining that program runs deflection path.
17. device according to claim 16, it is characterised in that when register is general register, described device is also Including：

Sequence inserts module, for the entrance in the present procedure basic block, by compiler inserting instruction sequence, the instruction Sequence specifies a general register to be used to store the second block identification.
18. device according to claim 16, it is characterised in that described device also includes：

Determination module is operated, for before the inserting instruction sequence by compiler, judging the present procedure basic block bag Include modification setting data manipulation or delete code segment operation.
19. a kind of readable storage medium storing program for executing, it is characterised in that when the instruction in the storage medium is held by the processor of electronic equipment During row so that the detection program operation that electronic equipment is able to carry out as described in one or more in claim to a method 1-11 deviates The method in path.