CN107643907A - Timing, delay and timing cycle method and system based on timer count pattern - Google Patents
Timing, delay and timing cycle method and system based on timer count pattern Download PDFInfo
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Abstract
The invention discloses a kind of timing based on timer count pattern, delay and timing cycle method and system, timer is continuous counter pattern, and the clocking method carries out timing according to equation below:Judge whether (c+k* (2^16))/n is more than or equal to m, if so, then timing time reaches, if it is not, continuing to count;Wherein, n is the operation clock frequency of timer;C is the count value of counter, and its initial value is 0;K is to overflow the number interrupted, initial value 0, when counter overflows every time, is then interrupted into the counter overflow of timer, k adds 1;M is the timing time pre-set.A kind of clocking method based on timer count pattern according to embodiments of the present invention, not only makes precision can reach microsecond rank, and do not interfere with the execution of non-interrupted program.
Description
Technical Field
The invention relates to the technical field of timers, in particular to a timing, delay and timing cycle method and system based on a counting mode of a timer.
Background
The single chip microcomputer is an integrated circuit chip, has a central controller with data processing capacity, a random access memory, a read only memory, various I/O ports and interrupt systems, a timer/counter and the like, and is widely applied to industries such as industrial control, consumer electronics and the like. From the 80 s of the last century, the current high-speed single chip microcomputer of 300MHz is developed by 4-bit and 8-bit single chip microcomputers.
At present, the timer is used for interrupting and timing, the timer of the singlechip can be used for generating interruption at fixed time and entering an interruption function, a time base is made, and the timing function can be realized by recording the interruption times entering the timer. In a single chip microcomputer system, a timer is adopted to interrupt timing, so that the problems exist, the real-time performance is high, the flexibility is not high, and after the timing precision reaches a microsecond level, the frequency of an interrupt function reaches a megahertz level, so that a normal program cannot be rapidly executed.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the above-mentioned problems in the prior art.
In view of the above, the present invention provides a timing, delay and timing cycle method and system based on timer counting mode, which aims to improve timing accuracy and have no influence on normal program execution.
In a first aspect, the present invention provides a timing method based on a counting mode of a timer, wherein the timer is in a continuous counting mode, and the method performs timing according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
Further, the timer is a timer of the single chip microcomputer.
Further, the counter of the timer is 16 bits.
In a second aspect, the present invention provides a time delay method based on a timer counting mode, including the following steps:
and judging whether the timer of the timer runs to a set time point, if so, executing the timing method based on the counting mode of the timer.
In a third aspect, the present invention provides a timer cycle method based on a timer counting mode, including the following steps:
starting a timer while executing the instructions in the loop block diagram, and executing the timing method based on the timer counting mode;
judging whether a preset timing time is reached, if so, executing an instruction behind the loop diagram; if not, continuing to execute the instructions in the block diagram.
In a fourth aspect, the present invention provides a timing system based on a counting mode of a timer, wherein the timer is in a continuous counting mode, and the system counts time according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
Further, the timer is a timer of the single chip microcomputer.
Further, the counter of the timer is 16 bits.
In a fifth aspect, the present invention provides a delay system based on a timer counting mode, including:
the judging module is used for judging whether the timer of the timer runs to a set time point or not;
the time delay module is used for timing time delay according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
In a sixth aspect, the present invention provides a timer circulation system based on timer counting mode, comprising:
the timing module is used for starting a timer while executing the instructions in the cyclic block diagram, and timing according to the following method:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count; wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; m is preset timing time;
the judging module is used for judging whether the preset timing time is reached, and if so, executing the instruction behind the cycle block diagram; if not, continuing to execute the instructions in the block diagram.
The invention has the technical effects that: according to the method and the system for timing, delaying and timing circulation based on the counting mode of the timer, the clock frequency of the timer is in the megahertz level, namely the period is in the microsecond level, if the timer is timed in an interrupt mode, the execution efficiency of a non-interrupt function is influenced because the frequency of entering the interrupt function is too high; and the overflow counting is carried out through the overflow of the timer counter by adopting a timing method based on a timer technical mode, so that an interrupt function can not be entered, namely, the influence of an interrupt program is avoided. Therefore, the invention not only can enable the timing precision to reach microsecond level, but also can not influence the execution of normal programs.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an embodiment of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic diagram illustrating steps of a timing method based on a timer counting mode according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating steps of a timer counting mode-based delay method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating steps of a timing method based on a timer counting mode according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a timer counting mode-based delay system according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a timing cycle system based on a timer counting mode according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
Fig. 1 is a schematic diagram illustrating steps of a timing method based on a timer counting mode according to an embodiment of the present invention. Referring to fig. 1, according to an embodiment of the present invention, a timing method based on a timer counting mode, wherein the timer is in a continuous counting mode, the method performs timing according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
Specifically, the timer is a timer of the single chip microcomputer. The counter of the timer is 16 bits. The timing method based on the counting mode of the timer comprises the following specific steps: setting the running clock of the timer to be n MHz, configuring the running clock to be a continuous counting mode, starting the overflow interruption of the counter, and starting the timer, wherein the time required by adding one to the counter of the timer is 1/n microsecond; assume that the required timing time is m microseconds and the counter has a value of c. In addition, each time the counter overflows, the counter overflow interruption of the timer is entered, and k is added by 1; let k equal to 0, zero the counter (c equal to 0); and detecting whether (c + k) 216)/n is larger than or equal to m, and if the condition is true, timing time reaches m microseconds. Wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
Fig. 2 is a schematic diagram illustrating steps of a timer counting mode-based delay method according to an embodiment of the present invention. Referring to fig. 2, a method for delaying based on a timer counting mode according to an embodiment of the present invention includes the following steps:
and judging whether the timer of the timer runs to a set time point, if so, executing the timing method based on the counting mode of the timer.
Specifically, the delayed waiting function of the counter in the programming mode of the mijie building block robot is to wait for the timer to run for a set time before executing the following instructions. That is, after the execution of event one is completed, event two is executed after delaying for m microseconds.
It will be appreciated that event one is performed. Setting the running clock of the timer to be n MHz, configuring the running clock to be a continuous counting mode, starting the overflow interruption of the counter, and starting the timer, wherein the time required by adding one to the counter of the timer is 1/n microsecond. Assume that the required timing time is m microseconds and the counter has a value of c. Let k equal 0, clear the counter (c equal 0). And judging whether the counter overflows or not, entering a counter overflow interrupt of a timer when the counter overflows each time, and adding 1 to k. When the counter does not overflow, proceed. And detecting whether (c + k) 216)/n is larger than or equal to m, and if the condition is true, timing time reaches m microseconds. And then event two is executed.
Fig. 3 is a schematic diagram illustrating steps of a timing method based on a timer counting mode according to an embodiment of the present invention. Referring to fig. 3, a method for timing cycle based on timer counting mode according to an embodiment of the present invention includes the following steps:
starting a timer while executing the instructions in the loop block diagram, and executing the timing method based on the timer counting mode;
judging whether a preset timing time is reached, if so, executing an instruction behind the loop diagram; if not, continuing to execute the instructions in the block diagram.
Specifically, the timing cycle function of the counter in the programming mode of the mijie building block robot is used for executing the instructions in the cycle flow and simultaneously detecting whether the timer runs for the set time, if so, executing the following instructions, otherwise, executing the instructions in the cycle flow. That is, the event one and event two cycles are performed for m microseconds.
It will be appreciated that in the continuous counting mode, the counter overflow interrupt is started, the timer is started, and the time required for the counter of the timer to be incremented by one is 1/n microsecond. Assume that the required timing time is m microseconds and the counter has a value of c. Let k equal 0, clear the counter (c equal 0). Event one is executed. And then event two is executed. And judging whether the counter overflows or not, entering a counter overflow interrupt of a timer when the counter overflows each time, and adding 1 to k. When the counter does not overflow, proceed. And detecting whether (c + k) 216)/n is larger than or equal to m, and if the condition is true, timing time reaches m microseconds. If the condition is false, a jump is made to execute event one.
According to the timing system based on the counting mode of the timer, the timer is in the continuous counting mode, and the system counts time according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
Specifically, the timer is a timer of the single chip microcomputer. The counter of the timer is 16 bits. The timing method based on the counting mode of the timer comprises the following specific steps: setting the running clock of the timer to be n MHz, configuring the running clock to be a continuous counting mode, starting the overflow interruption of the counter, and starting the timer, wherein the time required by adding one to the counter of the timer is 1/n microsecond; assume that the required timing time is m microseconds and the counter has a value of c. In addition, each time the counter overflows, the counter overflow interruption of the timer is entered, and k is added by 1; let k equal to 0, zero the counter (c equal to 0); and detecting whether (c + k) 216)/n is larger than or equal to m, and if the condition is true, timing time reaches m microseconds. Wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
Fig. 4 is a schematic structural diagram of a timer counting mode-based delay system according to an embodiment of the present invention. Referring to fig. 4, a delay system based on timer counting mode according to an embodiment of the present invention includes: a decision block 40 and a delay block 42.
Specifically, the determining module 40 is configured to determine whether a timer of the timer runs to a set time point. A delay module 42, configured to perform timing of the delay according to the following formula: and judging whether (c + k (2^16))/n is larger than or equal to m, if so, reaching the timing time, and if not, continuing to count. Wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time.
Fig. 5 is a schematic structural diagram of a timing cycle system based on a timer counting mode according to an embodiment of the present invention. Referring to fig. 5, a timing loop system based on timer counting mode according to an embodiment of the present invention is provided, including: a timing module 50 and a decision module 52.
Specifically, the timing module 50 is configured to start a timer while executing the instructions in the loop diagram, and perform timing according to the following method: judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count; wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; and m is preset timing time. The judging module 52 judges whether the preset timing time is reached, if so, the instruction behind the loop diagram is executed; if not, continuing to execute the instructions in the block diagram.
According to the method and the system for timing, delaying and timing circulation based on the counting mode of the timer, the clock frequency of the timer is in the megahertz level, namely the period is in the microsecond level, if the timer is timed in an interrupt mode, the execution efficiency of a non-interrupt function is influenced because the frequency of entering the interrupt function is too high; and the overflow counting is carried out through the overflow of the timer counter by adopting a timing method based on a timer technical mode, so that an interrupt function can not be entered, namely, the influence of an interrupt program is avoided. Therefore, the invention not only can enable the timing precision to reach microsecond level, but also can not influence the execution of normal programs.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A timing method based on a counting mode of a timer is characterized in that the timer is in a continuous counting mode, and the method counts time according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein,
n is the running clock frequency of the timer;
c is the counting value of the counter, and the initial value is 0;
k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1;
and m is preset timing time.
2. The timing method based on the counting mode of the timer according to claim 1, wherein the timer is a timer of a single chip microcomputer.
3. The timer-based counting mode timing method according to claim 2, wherein the counter of the timer is 16 bits.
4. A time delay method based on a counting mode of a timer is characterized by comprising the following steps:
judging whether the timer of the timer runs to a set time point, if so, executing the timing method according to claim 1.
5. A timing cycle method based on a timer counting mode is characterized by comprising the following steps:
starting a timer to execute the timing method according to claim 1 while executing the instructions in the loop diagram;
judging whether a preset timing time is reached, if so, executing an instruction behind the loop diagram; if not, continuing to execute the instructions in the block diagram.
6. A timer system based on timer counting mode, wherein the timer is in continuous counting mode, and the system counts time according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein,
n is the running clock frequency of the timer;
c is the counting value of the counter, and the initial value is 0;
k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1;
and m is preset timing time.
7. The timer-based counting mode timing system of claim 6, wherein the timer is a timer of a single chip microcomputer.
8. A timer-based counting mode timing system according to claim 7, wherein the counter of said timer is 16 bits.
9. A timer counting mode based delay system, comprising:
the judging module is used for judging whether the timer of the timer runs to a set time point or not;
the time delay module is used for timing time delay according to the following formula:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count;
wherein,
n is the running clock frequency of the timer;
c is the counting value of the counter, and the initial value is 0;
k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1;
and m is preset timing time.
10. A timer-counting-mode-based timing cycle system, comprising:
the timing module is used for starting a timer while executing the instructions in the cyclic block diagram, and timing according to the following method:
judging whether (c + k (2^16))/n is greater than or equal to m, if so, reaching the timing time, and if not, continuing to count; wherein n is the running clock frequency of the timer; c is the counting value of the counter, and the initial value is 0; k is the number of overflow interruption, the initial value is 0, when the counter overflows each time, the counter entering the timer overflows and interrupts, and k is added with 1; m is preset timing time;
the judging module is used for judging whether the preset timing time is reached, and if so, executing the instruction behind the cycle block diagram; if not, continuing to execute the instructions in the block diagram.
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CN108647163A (en) * | 2018-03-22 | 2018-10-12 | 上海机电工程研究所 | A kind of missile-borne clocking method interrupted based on external cycles |
CN108734805A (en) * | 2018-05-30 | 2018-11-02 | 南通理工学院 | Clothing enterprise piece counting device based on single chip microcomputer |
CN109471663A (en) * | 2018-10-30 | 2019-03-15 | 珠海格力智能装备有限公司 | Method and device for executing single chip microcomputer program |
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