CN107621938A - A kind of PHY network adapter upgrade method and system - Google Patents
A kind of PHY network adapter upgrade method and system Download PDFInfo
- Publication number
- CN107621938A CN107621938A CN201710823392.5A CN201710823392A CN107621938A CN 107621938 A CN107621938 A CN 107621938A CN 201710823392 A CN201710823392 A CN 201710823392A CN 107621938 A CN107621938 A CN 107621938A
- Authority
- CN
- China
- Prior art keywords
- mac address
- data block
- bios
- read
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stored Programmes (AREA)
Abstract
This application discloses a kind of PHY network adapter upgrade method and system, applied to Purley servers, this method includes：Legacy version BIOS is accessed, reads the first MAC Address；Redaction BIOS is accessed, reads the second MAC Address；ROM the first data block is wiped, reads redaction BIOS the second data block, and judges whether the second data block includes the second MAC Address；If the second data block includes the second MAC Address, the second MAC Address is replaced with into the first MAC Address, and current second data block is write in the position of the first data block.The present invention solves Purley servers in BIOS escalation process by the way that in BIOS escalation process, legacy version MAC Address is retained, and MAC Address is lost, network can not normal use the problem of.
Description
Technical field
The present invention relates to computer software fields, more particularly to a kind of PHY network adapter upgrade method and system.
Background technology
With cloud computing, big data every profession and trade field extensive use, to high-performance, intelligentized calculating platform propose
Higher requirement, and Purley servers have stronger performance, more preferable Energy Efficiency Ratio, higher cost performance with it, and it is wide
General is applied among various new networks.
And special network equipment PHY (Physical Layer, a network link are added in Purley servers
In physical layer) card, contains only the physical layer block PHY of standard network adaptor on this PHY card, composition standard network
Other modules of adapter are all integrated in south bridge PCH.And the network adapter MAC (Media Access Control,
Medium access control sublayer agreement) address is not stored on PHY cards, it is stored in BIOS (Basic Input/Output
System, basic input output system) mirror image ME parts among.And a complete BIOS mirror image is by ME parts and BIOS
Part is dimerous, so during upgrading is updated to BIOS mirror images, MAC Address is as a network with suitable
The part that device must have, it should lose in no instance, but currently during with outer upgrading BIOS, to whole ME
Part wipe and has re-write operation, causes the MAC Address in the PHY cards after renewal to be lost, has had a strong impact on network
Normal use.Therefore, how both can be with outer normal renewal BIOS, and do not influence the normal use of network, it is this area skill
An art personnel problem urgently to be resolved hurrily.
The content of the invention
In view of this, it is outer to solve band it is an object of the invention to provide a kind of network adapter upgrade method and system
The problem of Mac addresses are lost during upgrading BIOS.Its concrete scheme is as follows：
A kind of PHY network adapter upgrade method, applied to Purley servers, including：
Legacy version BIOS is accessed, reads the first MAC Address；
Redaction BIOS is accessed, reads the second MAC Address；
ROM the first data block is wiped, reads the second data block of the redaction BIOS, and judge second data
Whether block includes second MAC Address；
If second data block includes second MAC Address, second MAC Address is replaced with described first
MAC Address, and current second data block is write in the position of first data block.
Preferably, the access legacy version BIOS, the process of the first MAC Address is read, including：
The legacy version BIOS is accessed, calculates the first storage location of first MAC Address, and store from described first
First MAC Address is read in position.
Preferably, the access redaction BIOS, the process of the second MAC Address is read, including：
The redaction BIOS is accessed, calculates the second storage location of second MAC Address, and store from described second
Second MAC Address is read in position.
Preferably, in addition to：
First MAC Address and second MAC Address are stored in caching.
Preferably, in addition to：
If second data block does not include second MAC Address, second data block is write described first
In the position of data block.
Accordingly, the invention also discloses a kind of PHY network adapter upgrade-system, applied to Purley servers, bag
Include：
First address read module, for accessing legacy version BIOS, read the first MAC Address；
Second address read module, for accessing redaction BIOS, read the second MAC Address；
First data processing module, for wiping ROM the first data block, read the second data of the redaction BIOS
Block, and judge whether second data block includes second MAC Address；
Second data processing module, for including second MAC Address when second data block, then by described second
MAC Address replaces with first MAC Address, and current second data block is write in the position of first data block.
Preferably, first address read module, including：
First address processing unit, for accessing the legacy version BIOS, calculate the first storage of first MAC Address
Position, and first MAC Address is read from first storage location.
Preferably, second address read module, including：
Second address processing unit, for accessing the redaction BIOS, calculate the second storage of second MAC Address
Position, and second MAC Address is read from second storage location.
Preferably, in addition to：
Data storage cell, for first MAC Address and second MAC Address to be stored in caching.
Preferably, in addition to：
Second data block writing module, for not including second MAC Address when second data block, then by described in
Second data block is write in the position of first data block.
In the present invention, a kind of PHY network adapter upgrade method, applied to Purley servers, including：Access old edition
This BIOS, read the first MAC Address；Redaction BIOS is accessed, reads the second MAC Address；ROM the first data block is wiped, is read
Redaction BIOS the second data block is taken, and judges whether the second data block includes the second MAC Address；If the second data block includes
Second MAC Address, then the second MAC Address is replaced with into the first MAC Address, and current second data block is write into the first data block
Position in.It can be seen that in this application, the first MAC Address in legacy version BIOS is retained first, in BIOS upgradings
During, ROM the first data block is wiped, and if including the second MAC Address in redaction BIOS the second data block,
The second MAC Address in second data block is then replaced with to the MAC Address of legacy version, namely the first MAC Address, then by after replacement
The second data block write-in ROM among, so that the MAC Address of legacy version be remained, by such mode, ensure that old
The MAC Address of version is not lost, it is ensured that the normal use of network.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is a kind of PHY network adapter upgrade method flow chart disclosed in the embodiment of the present invention one；
Fig. 2 is a kind of PHY network adapter upgrade method flow chart disclosed in the embodiment of the present invention two；
Fig. 3 is a kind of PHY network adapter upgrade-system structure chart disclosed in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
The embodiment of the present invention one discloses a kind of PHY network adapter upgrade method, shown in Figure 1, this method, bag
Include：
Step S11：Legacy version BIOS is accessed, reads the first MAC Address；
Step S12：Redaction BIOS is accessed, reads the second MAC Address；
In the present embodiment, if the MAC Address of redaction has renewal, start to perform following steps, be to obtain first
The MAC Address of BIOS before upgrading, i.e. the first MAC Address, then obtain the MAC Address after BIOS upgradings, i.e. the 2nd MAC
Location, in the present embodiment, the first MAC Address and the second MAC Address can be stored in caching or in storage system
Other positions among, so as to program next step operation, it is necessary to explanation, update BIOS when, when ME part need not be more
Newly, then the MAC Address of legacy version need not be handled, illustrated herein.
Step S13：ROM the first data block is wiped, reads redaction BIOS the second data block, and judges the second data
Whether block includes the second MAC Address；
In the present embodiment, during upgrading to BIOS, it is necessary to wipe the information on rom chip,
It is to be wiped the first data block on rom chip so among this step, and reads among redaction BIOS
Two data blocks, and judge the second MAC Address whether is included in the second data block, the step for purpose be judge whether to need by
MAC Address is replaced in second data block.
Step S14：If the second data block includes the second MAC Address, the second MAC Address is replaced with into the first MAC Address,
And current second data block is write in the position of the first data block.
It is understood that among this step, if the second data block includes the second MAC Address, by the second data
The second MAC Address replaces with the first MAC Address in block, BIOS is so ensured that during upgrading, among legacy version
MAC Address remain, thereby may be ensured that the normal use of network.
It can be seen that in this application, the first MAC Address in legacy version BIOS is retained first, in BIOS upgradings
During, ROM the first data block is wiped, and if including the second MAC Address in redaction BIOS the second data block,
The second MAC Address in second data block is then replaced with to the MAC Address of legacy version, namely the first MAC Address, then by after replacement
The second data block write-in ROM among, so that the MAC Address of legacy version be remained, by such mode, ensure that old
The MAC Address of version is not lost, it is ensured that the normal use of network.
The present invention implements two and discloses a kind of specific PHY network adapter upgrade methods, shown in Figure 2, relatively
In a upper embodiment, the present embodiment has made further instruction and optimization to technical scheme.Specifically, this method includes：
Step S21：Legacy version BIOS is accessed, reads the first MAC Address；
Specifically, step S21 includes：Access legacy version BIOS, the first storage location of the first MAC Address of calculating, and from
The first MAC Address is read in first storage location.
Step S22：Redaction BIOS is accessed, reads the second MAC Address；
Specifically, step S22 includes：Access redaction BIOS, the second storage location of the second MAC Address of calculating, and from
The second MAC Address is read in second storage location.
Preferably, the first MAC Address and the second MAC Address are stored in caching.
It is understood that the first MAC Address read and the second MAC Address are stored among caching, with convenient
The execution of next step, certainly, the storage location of the first MAC Address and the second MAC Address can also be other storage locations
It is central, it is not construed as limiting herein.
Step S23：ROM the first data block is wiped, reads redaction BIOS the second data block, and judges the second data
Whether block includes the second MAC Address；
In this present embodiment, it is necessary to wipe the information on rom chip during upgrading to BIOS,
It is to be wiped the first data block on rom chip so among this step, and reads among redaction BIOS
Two data blocks, and judge the second MAC Address whether is included in the second data block, the step for purpose be judge whether to need by
MAC Address is replaced in second data block.
Step S24：If the second data block includes the second MAC Address, the second MAC Address is replaced with into the first MAC Address,
And current second data block is write in the position of the first data block.
It is understood that among this step, if the second data block includes the second MAC Address, by the second data
The second MAC Address replaces with the first MAC Address in block, BIOS is so ensured that during upgrading, among legacy version
MAC Address remain, thereby may be ensured that the normal use of network.
Step S25：If the second data block does not include the second MAC Address, the second data block is write into the first data block
In position.
In the present embodiment, if the second data block does not include the second MAC Address, by the number of the second data block write-in first
According in the position of block, and then judge whether this BIOS completes to upgrade, continue if not the replacement of data block with
Write-in, if completing upgrading, terminate to run.By such method, to ensure BIOS successful upgrading.
Accordingly, it is shown in Figure 3 the invention also discloses a kind of PHY network adapter upgrade-system, specifically, should
System includes：
First address read module 31, for accessing legacy version BIOS, read the first MAC Address；
Second address read module 32, for accessing redaction BIOS, read the second MAC Address；
First data processing module 33, for wiping ROM the first data block, read redaction BIOS the second data
Block, and judge whether the second data block includes the second MAC Address；
Second data processing module 34, for including the second MAC Address when the second data block, then the second MAC Address is replaced
The first MAC Address is changed to, and current second data block is write in the position of the first data block.
Specifically, the first address read module, including：
First address processing unit, for accessing legacy version BIOS, the first storage location of the first MAC Address is calculated, and
The first MAC Address is read from the first storage location.
Specifically, the second address read module, including：
Second address processing unit, for accessing redaction BIOS, the second storage location of the second MAC Address is calculated, and
The second MAC Address is read from the second storage location.
Specifically, the PHY network adapter upgrade-systems also include：
Data storage cell, for the first MAC Address and the second MAC Address to be stored in caching.
Specifically, the PHY network adapter upgrade-systems also include：
Second data block writing module, for not including the second MAC Address when the second data block, then the second data block is write
In the position for entering the first data block.
Finally, it is to be noted that, herein, such as first and second or the like relational terms be used merely to by
One entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operation
Between any this actual relation or order be present.Moreover, term " comprising ", "comprising" or its any other variant meaning
Covering including for nonexcludability, so that process, method, article or equipment including a series of elements not only include that
A little key elements, but also the other element including being not expressly set out, or also include for this process, method, article or
The intrinsic key element of equipment.In the absence of more restrictions, the key element limited by sentence "including a ...", is not arranged
Except other identical element in the process including the key element, method, article or equipment being also present.
A kind of PHY network adapter upgrade method provided by the present invention and system are described in detail above, this
Apply specific case in text to be set forth the principle and embodiment of the present invention, the explanation of above example is only intended to
Help to understand method and its core concept of the invention；Meanwhile for those of ordinary skill in the art, the think of according to the present invention
Think, in specific embodiments and applications there will be changes, in summary, this specification content should not be construed as pair
The limitation of the present invention.
Claims (10)
- A kind of 1. PHY network adapter upgrade method, it is characterised in that applied to Purley servers, including：Legacy version BIOS is accessed, reads the first MAC Address；Redaction BIOS is accessed, reads the second MAC Address；ROM the first data block is wiped, reads the second data block of the redaction BIOS, and judge that second data block is It is no to include second MAC Address；If second data block includes second MAC Address, second MAC Address is replaced with into the first MAC Address, and current second data block is write in the position of first data block.
- 2. according to the method for claim 1, it is characterised in that the access legacy version BIOS, read the first MAC Address Process, including：Access the legacy version BIOS, calculate the first storage location of first MAC Address, and from first storage location It is middle to read first MAC Address.
- 3. according to the method for claim 1, it is characterised in that the access redaction BIOS, read the second MAC Address Process, including：Access the redaction BIOS, calculate the second storage location of second MAC Address, and from second storage location It is middle to read second MAC Address.
- 4. according to the method for claim 1, it is characterised in that also include：First MAC Address and second MAC Address are stored in caching.
- 5. method according to any one of claims 1 to 4, it is characterised in that also include：If second data block does not include second MAC Address, second data block is write into first data In the position of block.
- A kind of 6. PHY network adapter upgrade-system, it is characterised in that applied to Purley servers, including：First address read module, for accessing legacy version BIOS, read the first MAC Address；Second address read module, for accessing redaction BIOS, read the second MAC Address；First data processing module, for wiping ROM the first data block, the second data block of the redaction BIOS is read, And judge whether second data block includes second MAC Address；Second data processing module, for including second MAC Address when second data block, then by the 2nd MAC Address replaces with first MAC Address, and current second data block is write in the position of first data block.
- 7. system according to claim 6, it is characterised in that first address read module, including：First address processing unit, for accessing the legacy version BIOS, calculate the first storage position of first MAC Address Put, and first MAC Address is read from first storage location.
- 8. system according to claim 6, it is characterised in that second address read module, including：Second address processing unit, for accessing the redaction BIOS, calculate the second storage position of second MAC Address Put, and second MAC Address is read from second storage location.
- 9. system according to claim 6, it is characterised in that also include：Data storage cell, for first MAC Address and second MAC Address to be stored in caching.
- 10. according to any described system of claim 6 to 9, it is characterised in that also include：Second data block writing module, for not including second MAC Address when second data block, then by described second Data block is write in the position of first data block.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710823392.5A CN107621938A (en) | 2017-09-13 | 2017-09-13 | A kind of PHY network adapter upgrade method and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710823392.5A CN107621938A (en) | 2017-09-13 | 2017-09-13 | A kind of PHY network adapter upgrade method and system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107621938A true CN107621938A (en) | 2018-01-23 |
Family
ID=61089606
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710823392.5A Pending CN107621938A (en) | 2017-09-13 | 2017-09-13 | A kind of PHY network adapter upgrade method and system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107621938A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115567487A (en) * | 2021-07-01 | 2023-01-03 | 昆达电脑科技(昆山)有限公司 | Server |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1455343A (en) * | 2003-05-30 | 2003-11-12 | 威盛电子股份有限公司 | Method of preventing overwrite of MAC address of peripheral terminal in DMI data |
| US20100223397A1 (en) * | 2009-02-27 | 2010-09-02 | Uri Elzur | Method and system for virtual machine networking |
| CN106027691A (en) * | 2016-05-13 | 2016-10-12 | 深圳市国鑫恒宇科技有限公司 | Checking and correcting method for network card MAC (Media Access Control) address |
| CN106878486A (en) * | 2017-03-06 | 2017-06-20 | 郑州云海信息技术有限公司 | A kind of method and system for preventing Onboard NIC MAC Address from being changed |
-
2017
- 2017-09-13 CN CN201710823392.5A patent/CN107621938A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1455343A (en) * | 2003-05-30 | 2003-11-12 | 威盛电子股份有限公司 | Method of preventing overwrite of MAC address of peripheral terminal in DMI data |
| US20100223397A1 (en) * | 2009-02-27 | 2010-09-02 | Uri Elzur | Method and system for virtual machine networking |
| CN106027691A (en) * | 2016-05-13 | 2016-10-12 | 深圳市国鑫恒宇科技有限公司 | Checking and correcting method for network card MAC (Media Access Control) address |
| CN106878486A (en) * | 2017-03-06 | 2017-06-20 | 郑州云海信息技术有限公司 | A kind of method and system for preventing Onboard NIC MAC Address from being changed |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115567487A (en) * | 2021-07-01 | 2023-01-03 | 昆达电脑科技(昆山)有限公司 | Server |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7114012B2 (en) | Computer system and method for migrating from one storage system to another | |
| CN102622279B (en) | Redundancy control system, method and Management Controller | |
| CN100543709C (en) | The method and apparatus of migrating data pages | |
| CN103502954B (en) | Technology and mechanism for page that real-time migration is DMA | |
| US20140189278A1 (en) | Method and apparatus for allocating memory space with write-combine attribute | |
| US20100049926A1 (en) | Enhancement of data mirroring to provide parallel processing of overlapping writes | |
| CN104040516A (en) | Method, apparatus and system for data deduplication | |
| CN101281493A (en) | And non flash memory device and management method thereof | |
| CN102096639A (en) | Method for trimming data on non-volatile flash media | |
| CN111625181B (en) | Data processing method, redundant array controller of independent hard disk and data storage system | |
| CN108733309B (en) | Storage management method, apparatus and computer readable medium | |
| CN1945537A (en) | Method for realizing high speed solid storage device based on storage region network | |
| CN103412824B (en) | Copy on write Snapshot Method and device | |
| CN105740330A (en) | Data paging display method and apparatus | |
| CN108090000A (en) | A kind of method and system for obtaining CPU register informations | |
| CN104731635A (en) | Virtual machine access control method and virtual machine access control system | |
| CN103019847B (en) | To the method and system that virtual-machine data is moved | |
| CN107621938A (en) | A kind of PHY network adapter upgrade method and system | |
| CN107391672A (en) | The reading/writing method of data and the distributed file system of message | |
| CN105786732A (en) | Data access method and apparatus | |
| US10282116B2 (en) | Method and system for hardware accelerated cache flush | |
| KR20180041037A (en) | Method for shared distributed memory management in multi-core solid state driver | |
| CN110209605A (en) | The register reading/writing method and calculating equipment of PCIE Cardbus NIC Cardbus | |
| CN109815059A (en) | A kind of data back up method, system and board and storage medium | |
| CN108200038A (en) | A kind of secure virtual machine means of defence, device, readable medium and storage control |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180123 |
|
| RJ01 | Rejection of invention patent application after publication |