CN107610637B - Display panel, display method thereof and electronic equipment - Google Patents
Display panel, display method thereof and electronic equipment Download PDFInfo
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Abstract
The embodiment of the invention discloses a display panel, a display method thereof and electronic equipment, wherein the display panel comprises: 2n scanning lines; the n-stage cascade first shift register is positioned on the first side of the 2n scanning lines, and the n-stage cascade second shift register is positioned on the second side of the 2n scanning lines; under a normal display mode, scanning 2n scanning lines by the n-stage cascaded first shift register and the n-stage cascaded second shift register line by line along a first direction or a second direction; in a VR display mode, n stages of cascaded first shift registers shift and scan corresponding n scanning lines along a first direction, n stages of cascaded second shift registers shift and scan corresponding n scanning lines along a second direction, and the n stages of cascaded first shift registers and the n stages of cascaded second shift registers alternately scan 2n scanning lines. The refreshing time of the left half screen and the refreshing time of the right half screen of the display panel are different by one line, so that the content synchronism of the left eye and the right eye is improved, and the VR visual experience is improved.
Description
Technical Field
Embodiments of the present invention relate to display technologies, and in particular, to a display panel, a display method thereof, and an electronic device.
Background
Virtual reality head-mounted display equipment, namely VR head display/VR glasses, is a product which integrates a plurality of technologies such as simulation technology, computer graphics, human-computer interface technology, multimedia technology, sensing technology, network technology and the like, and is a brand-new human-computer interaction means created by means of computers and latest sensor technology. The rich sensory capabilities and 3D display environment make VR head displays an ideal video game tool.
However, when the existing VR display device performs VR display, the refresh time of the left half-screen display panel and the refresh time of the right half-screen display panel differ by half frame time, and the content corresponding to the left and right eyes in the VR display device needs high synchronization to have a good visual experience effect, so that the content of the left and right eyes in the existing VR display device is not synchronized, which causes bad visual experience. Particularly, in an animation interface, poor visual perception caused by the difference is more obvious.
Disclosure of Invention
The embodiment of the invention provides a display panel, a display method thereof and electronic equipment, which are used for improving the synchronization of left and right eyes.
In a first aspect, an embodiment of the present invention provides a display panel, including:
2n scanning lines, wherein the 2n scanning lines are provided with a first side and a second side which are opposite in the extending direction of the scanning lines, and n is a positive integer;
the n-stage cascade connection first shift register is positioned on the first side of the 2n scanning lines, the n-stage cascade connection first shift register and the n scanning lines are respectively correspondingly arranged and electrically connected, the n-stage cascade connection second shift register is positioned on the second side of the 2n scanning lines, and the n-stage cascade connection second shift register and the rest n scanning lines in the 2n scanning lines are respectively correspondingly arranged and electrically connected;
under a normal display mode, scanning 2n scanning lines by the n-stage cascaded first shift register and the n-stage cascaded second shift register line by line along a first direction or a second direction;
in a VR display mode, the first shift registers of the n-level cascade are sequentially arranged in series along a first direction and shift and scan the corresponding n scanning lines, the second shift registers of the n-level cascade are sequentially arranged in series along a second direction and shift and scan the corresponding n scanning lines, and the first shift registers of the n-level cascade and the second shift registers of the n-level cascade alternately scan 2n scanning lines;
wherein the first direction is parallel to and opposite to the second direction.
In a second aspect, an embodiment of the present invention further provides a display method of a display panel, where the display panel is the display panel described above, and the display method includes:
controlling n cascaded first shift registers at the first side of the 2n scanning lines to sequentially shift along a first direction and scan the corresponding n scanning lines by adopting an opposite alternating scanning mode, wherein the ith cascaded first shift register scans the 2i-1 th scanning line;
and controlling n cascaded second shift registers at the second side of the 2n scanning lines to sequentially shift and scan the corresponding n scanning lines along the second direction, wherein the ith cascaded second shift register scans the 2n-2i +2 th scanning line.
In a third aspect, an embodiment of the present invention further provides a display method of a display panel, where the display panel is the display panel described above, and the display method includes:
controlling n cascaded first shift registers on the first side of 2n scanning lines to sequentially shift along a first direction and scan the corresponding n scanning lines by adopting an opposite alternating scanning mode, wherein the ith scanning line is scanned by the ith first shift register;
and controlling n cascaded second shift registers at the second side of the 2n scanning lines to sequentially shift and scan the corresponding n scanning lines along a second direction, wherein the ith cascaded second shift register scans the 2n-i +1 th scanning line.
In a fourth aspect, an embodiment of the present invention further provides an electronic device, which includes the display panel described above.
When the display panel provided by the embodiment of the invention scans 2n scanning lines in an opposite alternating scanning manner, n stages of first shift registers sequentially shift and scan the n scanning lines along a first direction, and n stages of second shift registers sequentially shift and scan the remaining n scanning lines in the 2n scanning lines along a second direction. The refresh time of the left half screen of the display panel only differs from the refresh time of the right half screen by one line of scanning time, and compared with the refresh time of the left half screen and the right half screen of the prior art which differs by half frame time, the content synchronism of the left eye and the right eye is greatly improved, and the VR visual experience is effectively improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 7 is a diagram of a display panel according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a display panel according to an embodiment of the present invention;
FIG. 9 is a diagram of a display panel according to an embodiment of the present invention;
fig. 10 is a schematic diagram of a display panel according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described through embodiments with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Embodiments of the present invention provide a display panel, which may be optionally applied in a VR (Virtual Reality) display device, for example, a VR head-mounted display device. The display panel provided by the embodiment of the invention comprises: 2n scanning lines, wherein the 2n scanning lines are provided with a first side and a second side which are opposite in the extending direction of the scanning lines, and n is a positive integer; the n-stage cascade connection first shift register is positioned on the first side of the 2n scanning lines, the n-stage cascade connection first shift register and the n scanning lines are respectively correspondingly arranged and electrically connected, the n-stage cascade connection second shift register is positioned on the second side of the 2n scanning lines, and the n-stage cascade connection second shift register and the rest n scanning lines in the 2n scanning lines are respectively correspondingly arranged and electrically connected; under a normal display mode, scanning 2n scanning lines by the n-stage cascaded first shift register and the n-stage cascaded second shift register line by line along a first direction or a second direction; in a VR display mode, the first shift registers of the n-level cascade are sequentially arranged in series along a first direction and shift and scan the corresponding n scanning lines, the second shift registers of the n-level cascade are sequentially arranged in series along a second direction and shift and scan the corresponding n scanning lines, and the first shift registers of the n-level cascade and the second shift registers of the n-level cascade alternately scan 2n scanning lines; wherein the first direction is parallel to and opposite to the second direction.
In the display panel provided in the embodiment of the present invention, the n-stage cascaded first shift register and the n scan lines of the 2n scan lines are respectively disposed and electrically connected correspondingly, and the n-stage cascaded second shift register and the remaining n scan lines of the 2n scan lines are respectively disposed and electrically connected correspondingly. The 2n shift registers respectively scan 2n scan lines, the 2n shift registers include n cascaded first shift registers and n cascaded second shift registers, and the n cascaded first shift registers and the n cascaded second shift registers scan 2n scan lines.
The display panel provided by the embodiment of the invention has a normal display mode and a VR display mode, and can be switched to the normal display mode and also to the VR display mode.
Given that the n-stage cascaded first shift register and the n-stage cascaded second shift register scan 2n scan lines, in the normal display mode, the n-stage cascaded first shift register and the n-stage cascaded second shift register may scan 2n scan lines line by line along a first direction, or the n-stage cascaded first shift register and the n-stage cascaded second shift register may scan 2n scan lines by line along a second direction, thereby implementing the line by line scanning of the 2n scan lines of the display panel, where the first direction is parallel to and opposite to the second direction.
In the VR display mode, the first shift registers of the n-level cascade are sequentially connected in series along a first direction and shift and scan the corresponding n scanning lines, the second shift registers of the n-level cascade are sequentially connected in series along a second direction and shift and scan the corresponding n scanning lines, and the first shift registers of the n-level cascade and the second shift registers of the n-level cascade alternately scan 2n scanning lines. Or, in the VR display mode, the n-stage cascade first shift registers are sequentially connected in series along the second direction and shift-scan the corresponding n scan lines, the n-stage cascade second shift registers are sequentially connected in series along the first direction and shift-scan the corresponding n scan lines, and the n-stage cascade first shift registers and the n-stage cascade second shift registers alternately scan 2n scan lines. Wherein the first direction is parallel to and opposite to the second direction.
The existing VR display equipment adopts a progressive scanning display mode to display, the refresh time of a left half-screen display panel and the refresh time of a right half-screen display panel are different by half frame time, and the content corresponding to the left eye and the right eye in the VR display equipment needs high synchronism to have a good visual experience effect, so that the left eye and the right eye of the existing VR display equipment are asynchronous, and bad visual experience is caused. Particularly, in an animation interface, poor visual perception caused by the difference is more obvious.
Compared with the prior art, in the display panel provided in the embodiment of the present invention, in the VR display mode, the n-stage cascaded first shift register shifts and scans the corresponding n scan lines from the first direction, the n-stage cascaded second shift register shifts and scans the corresponding n scan lines from the second direction, and the n-stage cascaded first shift register and the n-stage cascaded second shift register alternately scan 2n scan lines, that is, the two shift registers of the display panel are in an opposite cross scanning state. The refreshing time of the left half-screen display panel and the refreshing time of the right half-screen display panel are separated by one line, so that the content synchronism of the left eye and the right eye is greatly improved, and the VR visual experience is greatly improved.
The above technical solution is a core idea of the present invention, and based on the above technical solution, the embodiments of the present invention provide a plurality of embodiments as described below. One skilled in the art can, based on any one of the embodiments of the above technical solutions, fall into the scope of the present invention, and the following embodiments are only a plurality of optional examples of the technical solutions of the present invention, and the embodiments of the present invention are not limited thereto.
Fig. 1 is a schematic view of a display panel according to an embodiment of the present invention. The display panel provided by the embodiment comprises: 2n scanning lines 10, 2n scanning lines 10 having a first side C1 and a second side C2 opposite in an extending direction X along the scanning lines 10, n being a positive integer; the n-level cascaded first shift register 20 is positioned at the C1 on the first side of the 2n scanning lines 10, the n-level cascaded first shift register 20 and the n scanning lines 10 are respectively correspondingly arranged and electrically connected, the n-level cascaded second shift register 30 is positioned at the C2 on the second side of the 2n scanning lines 10, and the n-level cascaded second shift register 30 and the rest n scanning lines 10 in the 2n scanning lines are respectively correspondingly arranged and electrically connected; in the normal display mode, the n-stage cascade first shift register 20 and the n-stage cascade second shift register 30 scan 2n scan lines 10 row by row in the first direction Y1 or the second direction Y2; in the VR display mode, the n-level cascaded first shift registers 20 are sequentially cascaded and shift-scanned along a first direction Y1 for corresponding n scan lines 10, the n-level cascaded second shift registers 30 are sequentially cascaded and shift-scanned along a second direction Y2 for corresponding n scan lines 10, and the n-level cascaded first shift registers 20 and the n-level cascaded second shift registers 30 alternately scan 2n scan lines 10; the first direction Y1 is parallel to and opposite to the second direction Y2. Alternatively, the 2n scan lines 10 include 1 st to 2n scan lines G (1) to G (2n) arranged in sequence along the first direction Y1, the i-th stage first shift register SR1(i) is electrically connected to the 2i-1 st scan line G (2i-1), and the i-th stage second shift register SR2(i) is electrically connected to the 2n-2i +2 nd scan line G (2n-2i +2), where i is 1,2, …, n.
In this embodiment, the n-stage cascaded first shift register 20 is sequentially labeled as SR1(1), SR1(2), SR1(3), …, and SR1(n) along the first direction Y1. The ith stage first shift register SR1(i) is electrically connected to the 2i-1 th scan line G (2i-1), that is, the 1 st stage first shift register SR1(1) is electrically connected to the 1 st scan line G (1), the 2 nd stage first shift register SR1(2) is electrically connected to the 3 rd scan line G (3), the 3 rd stage first shift register SR1(3) is electrically connected to the 5 th scan line G (5), the 4 th stage first shift register SR1(4) is electrically connected to the 7 th scan line G (7), the 5 th stage first shift register SR1(5) is electrically connected to the 9 th scan line G (9), and so on, the nth stage first shift register SR1(n) is electrically connected to the 2n-1 st scan line G (2 n-1).
In this embodiment, the n cascaded second shift registers 30 are sequentially labeled as SR2(1), SR2(2), SR2(3), …, and SR2(n) along the second direction Y2. The ith-stage second shift register SR2(i) is electrically connected to the 2n-2i +2 nd scan line G (2n-2i +2), that is, the 1 st stage second shift register SR2(1) is electrically connected to the 2 n-th scan line G (2n), the 2 nd stage second shift register SR2(2) is electrically connected to the 2n-2 nd scan line G (2n-2), the 3 rd stage second shift register SR2(3) is electrically connected to the 2n-4 th scan line G (2n-4), the 4 th stage second shift register SR2(4) is electrically connected to the 2n-6 th scan line G (2n-6), the 5 th stage second shift register SR2(5) is electrically connected to the 2n-8 th scan line G (2n-8), by analogy, the nth stage second shift register SR2(n) is electrically connected to the 2 nd scan line G (2).
In this embodiment, in the VR display mode, the n-cascaded first shift registers 20 are sequentially cascaded and shifted to scan the corresponding n scan lines 10 along the first direction Y1, the n-cascaded second shift registers 30 are sequentially cascaded and shifted to scan the corresponding n scan lines 10 along the second direction Y2, and the n-cascaded first shift registers 20 and the n-cascaded second shift registers 30 alternately scan 2n scan lines 10, wherein the first direction Y1 is parallel to and opposite to the second direction Y2. Obviously, in the VR display mode, the n-stage first shift register 20 and the n-stage second shift register 30 of the display panel scan 2n scan lines in an opposite alternating scan manner.
Specifically, the scanning manner of 2n scanning lines is as follows: the 1 st scan line G (1) is scanned by the 1 st stage first shift register SR1(1), and in turn, the 2 nth scan line G (2n) is scanned by the 1 st stage second shift register SR2 (1); sequentially, the 2 nd stage first shift register SR1(2) scans the 3 rd scan line G (3), and sequentially, the 2 nd stage second shift register SR2(2) scans the 2n-2 nd scan line G (2 n-2); sequentially, the 3 rd stage first shift register SR1(3) scans the 5 th scan line G (5), and sequentially, the 3 rd stage second shift register SR2(3) scans the 2n-4 th scan line G (2 n-4); the 4 th stage first shift register SR1(4) sequentially scans the 7 th scan line G (7), and the 4 th stage second shift register SR2(4) sequentially scans the 2n-6 th scan line G (2 n-6); sequentially, the 5 th stage first shift register SR1(5) scans the 9 th scan line G (9), and sequentially, the 5 th stage second shift register SR2(5) scans the 2n-8 th scan line G (2 n-8); by analogy, the nth stage first shift register SR1(n) scans the 2n-1 th scan line G (2n-1), and in turn, the nth stage second shift register SR2(n) scans the 2 nd scan line G (2).
The display panel of the prior VR display device adopts a mode of progressive scanning in a single direction, and the polarities of data signals of two adjacent frames of pictures are opposite. Taking the nth frame as a negative polarity and the N +1 th frame as a positive polarity as an example, after the nth frame is scanned, the display panel shows the negative polarity, at this time, the (N +1) th frame starts scanning, and when the (m) th scan line is scanned, the display area above the scan line is a positive polarity area, and the display area below the scan line is a negative polarity area.
When the voltage of each polarity region is pulled in the positive voltage direction by the existence of the pixel leakage current in the display panel, the positive polarity voltage of the positive polarity region above the m-th row of scanning lines is increased, and the negative polarity voltage of the negative polarity region below the m-th row of scanning lines is decreased, so that the display panel shows the phenomenon of being bright at the top and dark at the bottom.
In the display panel provided in this embodiment, for example, the nth frame is a negative polarity, and the (N +1) th frame is a positive polarity, after the scanning of the nth frame is completed, the display panel exhibits the negative polarity, and at this time, the scanning of the (N +1) th frame is started. In the process of the opposite direction alternate scanning of the embodiment, the left half screen and the right half screen of the display panel are alternately refreshed, the shift register on the left side of the display panel is scanned from top to bottom, the voltage of each polarity region is pulled towards the positive voltage direction due to the existence of pixel leakage current, and the leakage current causes the upper brightness and the lower darkness; the shift register on the right side of the display panel scans from bottom to top, the voltage of each polarity region is pulled towards the positive voltage direction due to the existence of pixel leakage current, and the leakage current causes brightness in the lower part and darkness in the upper part. Therefore, the pixel crosstalk is neutralized, thereby improving the crosstalk phenomenon and improving the display effect.
Note that, a display panel applied to a VR display device has a long side direction generally parallel to a transverse direction, and thus the display panel is divided into a left half screen and a right half screen. In this embodiment and the following embodiments, for convenience of illustrating the structures of the first shift register, the second shift register, and the like, the display panel is shown to have the long side direction parallel to the longitudinal direction, so that the left half of the display panel is the upper half of the display panel, and the right half of the display panel is the lower half of the display panel.
When 2n scanning lines are scanned by adopting the opposite direction alternative scanning mode, the n-stage first shift register sequentially shifts and scans n odd-numbered scanning lines along the first direction, and the n-stage second shift register sequentially shifts and scans n even-numbered scanning lines along the second direction. The refresh time of the left half screen of the display panel only differs from the refresh time of the right half screen by one line of scanning time, and compared with the refresh time of the left half screen and the right half screen of the prior art which differs by half frame time, the content synchronism of the left eye and the right eye is greatly improved, and the VR visual experience is effectively improved.
The embodiment of the invention also provides a display method of a display panel, wherein the display panel is the display panel shown in fig. 1, and the display method comprises the following steps:
controlling n cascaded first shift registers at the first side of the 2n scanning lines to sequentially shift along a first direction and scan the corresponding n scanning lines by adopting an opposite alternating scanning mode, wherein the ith cascaded first shift register scans the 2i-1 th scanning line;
and controlling n cascaded second shift registers at the second side of the 2n scanning lines to sequentially shift and scan the corresponding n scanning lines along the second direction, wherein the ith cascaded second shift register scans the 2n-2i + 2 th scanning line.
In the display method provided in this embodiment, in the VR display mode, the n-stage cascaded first shift registers are serially connected in parallel along a first direction and shift-scan the corresponding n odd-numbered scan lines, the n-stage cascaded second shift registers are serially connected in parallel along a second direction and shift-scan the corresponding n even-numbered scan lines, and the n-stage cascaded first shift registers and the n-stage cascaded second shift registers alternately scan 2n scan lines. Adopt above-mentioned subtend scanning mode in turn to scan 2n scanning lines, can make the refresh time of the left half-screen of display panel only differ one line scanning time with the refresh time of the right half-screen, compare with the refresh time difference half-frame time of the left half-screen and the right half-screen of prior art, improved left and right eye content synchronism greatly, effectively improved VR vision experience.
In addition, in the opposite direction alternate scanning process, the left half screen and the right half screen of the display panel are alternately refreshed, the shift register on the left side of the display panel is scanned from top to bottom, the voltage of each polarity region is pulled towards the positive voltage direction due to the existence of pixel leakage current, and the leakage current causes the upper brightness and the lower darkness; the shift register on the right side of the display panel scans from bottom to top, the voltage of each polarity region is pulled towards the positive voltage direction due to the existence of pixel leakage current, and the leakage current causes brightness in the lower part and darkness in the upper part. Therefore, the pixel crosstalk is neutralized, thereby improving the crosstalk phenomenon and improving the display effect.
Fig. 2 is a schematic view of a display panel according to an embodiment of the present invention. The display panel provided by the embodiment comprises: 2n scanning lines 10, 2n scanning lines 10 having a first side C1 and a second side C2 opposite in an extending direction X along the scanning lines 10, n being a positive integer; the n-level cascaded first shift register 20 is positioned at the C1 on the first side of the 2n scanning lines 10, the n-level cascaded first shift register 20 and the n scanning lines 10 are respectively correspondingly arranged and electrically connected, the n-level cascaded second shift register 30 is positioned at the C2 on the second side of the 2n scanning lines 10, and the n-level cascaded second shift register 30 and the rest n scanning lines 10 in the 2n scanning lines are respectively correspondingly arranged and electrically connected; in the normal display mode, the n-stage cascade first shift register 20 and the n-stage cascade second shift register 30 scan 2n scan lines 10 row by row in the first direction Y1 or the second direction Y2; in the VR display mode, the n-level cascaded first shift registers 20 are sequentially cascaded and shift-scanned along a first direction Y1 for corresponding n scan lines 10, the n-level cascaded second shift registers 30 are sequentially cascaded and shift-scanned along a second direction Y2 for corresponding n scan lines 10, and the n-level cascaded first shift registers 20 and the n-level cascaded second shift registers 30 alternately scan 2n scan lines 10; the first direction Y1 is parallel to and opposite to the second direction Y2. Alternatively, the 2n scan lines 10 include 1 st scan line G (1) to 2n scan lines G (2n) sequentially arranged along the first direction Y1, the i-th stage first shift register SR1(i) is electrically connected to the i-th scan line G (i), and the i-th stage second shift register SR2(i) is electrically connected to the 2n-i +1 th scan line G (2n-i +1), where i is 1,2, …, n.
In this embodiment, the n-stage cascaded first shift register 20 is sequentially labeled as SR1(1), SR1(2), SR1(3), …, and SR1(n) along the first direction Y1. The ith stage first shift register SR1(i) is electrically connected to the ith scan line G (i), that is, the 1 st stage first shift register SR1(1) is electrically connected to the 1 st scan line G (1), the 2 nd stage first shift register SR1(2) is electrically connected to the 2 nd scan line G (2), the 3 rd stage first shift register SR1(3) is electrically connected to the 3 rd scan line G (3), the 4 th stage first shift register SR1(4) is electrically connected to the 4 th scan line G (4), the 5 th stage first shift register SR1(5) is electrically connected to the 5 th scan line G (5), and so on, the nth stage first shift register SR1(n) is electrically connected to the nth scan line G (n).
In this embodiment, the n cascaded second shift registers 30 are sequentially labeled as SR2(1), SR2(2), SR2(3), …, and SR2(n) along the second direction Y2. The ith-stage second shift register SR2(i) is electrically connected to the 2n-i +1 th scan line G (2n-i +1), that is, the 1 st stage second shift register SR2(1) is electrically connected to the 2 n-th scan line G (2n), the 2 nd stage second shift register SR2(2) is electrically connected to the 2n-1 st scan line G (2n-1), the 3 rd stage second shift register SR2(3) is electrically connected to the 2n-2 nd scan line G (2n-2), the 4 th stage second shift register SR2(4) is electrically connected to the 2n-3 th scan line G (2n-3), the 5 th stage second shift register SR2(5) is electrically connected to the 2n-4 th scan line G (2n-4), by analogy, the nth stage second shift register SR2(n) is electrically connected to the (n +1) th scan line G (n + 1).
In this embodiment, in the VR display mode, the n-cascaded first shift registers 20 are sequentially cascaded and shifted to scan the corresponding n scan lines 10 along the first direction Y1, the n-cascaded second shift registers 30 are sequentially cascaded and shifted to scan the corresponding n scan lines 10 along the second direction Y2, and the n-cascaded first shift registers 20 and the n-cascaded second shift registers 30 alternately scan 2n scan lines 10, wherein the first direction Y1 is parallel to and opposite to the second direction Y2. Obviously, in the VR display mode, the n-stage first shift register 20 and the n-stage second shift register 30 of the display panel scan 2n scan lines in an opposite alternating scan manner.
Specifically, the scanning manner of 2n scanning lines is as follows: the 1 st scan line G (1) is scanned by the 1 st stage first shift register SR1(1), and in turn, the 2 nth scan line G (2n) is scanned by the 1 st stage second shift register SR2 (1); sequentially, the 2 nd scan line G (2) is scanned by the 2 nd stage first shift register SR1(2), and sequentially, the 2 nd scan line G (2n-1) is scanned by the 2 nd stage second shift register SR2 (2); sequentially, the 3 rd scan line G (3) is scanned by the 3 rd stage first shift register SR1(3), and sequentially, the 2n-2 th scan line G (2n-2) is scanned by the 3 rd stage second shift register SR2 (3); the 4 th scan line G (4) is scanned by the 4 th stage first shift register SR1(4), and the 2n-3 th scan line G (2n-3) is scanned by the 4 th stage second shift register SR2 (4); sequentially, the 5 th scan line G (5) is scanned by the 5 th stage first shift register SR1(5), and sequentially, the 2n-4 th scan line G (2n-4) is scanned by the 5 th stage second shift register SR2 (5); by analogy, the nth stage first shift register SR1(n) scans the nth scan line G (n), and in turn, the nth stage second shift register SR2(n) scans the (n +1) th scan line G (n + 1).
When 2n scanning lines are scanned by adopting the opposite direction alternative scanning mode, the n-stage first shift register sequentially shifts and scans the 1 st to nth scanning lines of the left half screen along the first direction, and the n-stage second shift register sequentially shifts and scans the 2 nth to n +1 th scanning lines of the right half screen along the second direction. The refresh time of the left half screen of the display panel only differs from the refresh time of the right half screen by one line of scanning time, and compared with the refresh time of the left half screen and the right half screen of the prior art which differs by half frame time, the content synchronism of the left eye and the right eye is greatly improved, and the VR visual experience is effectively improved.
The embodiment of the invention also provides a display method of a display panel, wherein the display panel is the display panel shown in fig. 2, and the display method comprises the following steps:
controlling n cascaded first shift registers on the first side of 2n scanning lines to sequentially shift along a first direction and scan the corresponding n scanning lines by adopting an opposite alternating scanning mode, wherein the ith scanning line is scanned by the ith first shift register;
and controlling n cascaded second shift registers at the second side of the 2n scanning lines to sequentially shift and scan the corresponding n scanning lines along a second direction, wherein the ith cascaded second shift register scans the 2n-i +1 th scanning line.
In the display method provided in this embodiment, in the VR display mode, the n cascaded first shift registers are serially connected in parallel along the first direction and shift-scan the corresponding n scan lines, the n cascaded second shift registers are serially connected in parallel along the second direction and shift-scan the corresponding n scan lines, and the n cascaded first shift registers and the n cascaded second shift registers alternately scan 2n scan lines. Adopt above-mentioned subtend scanning mode in turn to scan 2n scanning lines, can make the refresh time of the left half-screen of display panel only differ one line scanning time with the refresh time of the right half-screen, compare with the refresh time difference half-frame time of the left half-screen and the right half-screen of prior art, improved left and right eye content synchronism greatly, effectively improved VR vision experience.
Illustratively, on the basis of any of the above embodiments, the display panel further includes: a first control circuit and a second control circuit; the input end of the first control circuit receives a first shift control signal, the first output end of the first control circuit is electrically connected with the shift trigger end of the 1 st-stage first shift register, and the second output end of the first control circuit is electrically connected with the shift trigger end of the nth-stage first shift register; the input end of the second control circuit receives a second shift control signal, the first output end of the second control circuit is electrically connected with the shift trigger end of the 1 st-stage second shift register, and the second output end of the second control circuit is electrically connected with the shift trigger end of the nth-stage second shift register; in the VR display mode, the first control circuit is used for controlling the first shift registers of the n-stage cascade to sequentially shift along a first direction and scan the corresponding n scanning lines, and the second control circuit is used for controlling the second shift registers of the n-stage cascade to sequentially shift along a second direction and scan the corresponding n scanning lines.
It should be noted that, the 1 st to nth first shift registers are not shift sequences, but are only sorting sequences of the n cascaded first shift registers, and specifically, the n cascaded first shift registers may be sequentially sorted along the first direction into the 1 st to nth first shift registers. The 1 st to nth second shift registers are not in shift order, but only in sorting order of the n cascaded second shift registers, and here, the n cascaded second shift registers are specifically selected to be sequentially sorted along the second direction into the 1 st to nth second shift registers.
The first control circuit is a multiplexer for outputting the first shift control signal received by the input terminal through the first output terminal, or outputting the first shift control signal received by the input terminal through the second output terminal. The second control circuit is a multiplexer for outputting the second shift control signal received by the input terminal through the first output terminal, or outputting the second shift control signal received by the input terminal through the second output terminal.
In the VR display mode, in order to reduce the time difference between the refresh time of the left half screen and the refresh time of the right half screen of the display panel, the selectable first control circuit controls the first shift control signal received by the input end to be output through the first output end, and then the n cascaded first shift registers sequentially shift and scan the corresponding n scanning lines from the 1 st stage first shift register to the n th stage first shift register along the first direction; and the second control circuit controls a second shift control signal received by the input end to be output through the first output end, so that the n-stage cascaded second shift registers sequentially shift and scan the corresponding n scanning lines from the 1 st-stage second shift register to the n-th-stage first shift register along the second direction.
In other embodiments, in a VR display mode, the first control circuit controls the first shift control signal received by the input terminal to be output through the second output terminal, and then the n cascaded first shift registers sequentially shift and scan the corresponding n scan lines from the nth first shift register to the 1 st first shift register along the second direction; the second control circuit controls the second shift control signal received by the input end to be output through the second output end, and the n-stage cascaded second shift registers sequentially shift and scan the corresponding n scanning lines from the nth-stage second shift register to the 1 st-stage second shift register along the first direction.
On the basis of the display panel shown in fig. 1, the display panel shown in fig. 3 may further include: a first control circuit 40 and a second control circuit 50; an input end of the first control circuit 40 receives the first shift control signal STV1, a first output end OUT11 of the first control circuit 40 is electrically connected with the shift trigger terminal in of the 1 st stage first shift register SR1(1), and a second output end OUT12 of the first control circuit 40 is electrically connected with the shift trigger terminal in of the nth stage first shift register SR1 (n); the input terminal of the second control circuit 50 receives the second shift control signal STV2, the first output terminal OUT21 of the second control circuit 50 is electrically connected to the shift trigger terminal in of the 1 st stage second shift register SR2(1), and the second output terminal OUT22 of the second control circuit 50 is electrically connected to the shift trigger terminal in of the nth stage second shift register SR2 (n); in the VR display mode, the first control circuit 40 is configured to control the n cascaded first shift registers 20 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1, and the second control circuit 50 is configured to control the n cascaded second shift registers 30 to sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2.
The display panel has two VR display modes. As shown in fig. 4, in the first VR display mode, the first control circuit 40 controls the transmission path between the input terminal and the first output terminal OUT11 to be on, and controls the transmission path between the input terminal and the second output terminal OUT12 to be off, so that the first shift register signal STV1 received by the input terminal of the first control circuit 40 is transmitted to the 1 st-stage first shift register SR1(1) through the first output terminal OUT11, at this time, the 1 st-stage first shift register SR1(1) is triggered to shift as the first-stage first shift register in the n-stage cascaded first shift registers 20, and then the n-stage cascaded first shift registers 20 sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1. The second control circuit 50 controls the transmission paths of the input terminal and the first output terminal OUT21 to be turned on and the transmission paths of the input terminal and the second output terminal OUT22 to be turned off, so that the second shift register signal STV2 received by the input terminal of the second control circuit 50 is transmitted to the 1 st-stage second shift register SR2(1) through the first output terminal OUT21, at this time, the 1 st-stage second shift register SR2(1) is triggered to shift as the first-stage second shift register in the n-stage cascaded second shift registers 30, and then the n-stage cascaded second shift registers 30 sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2.
In other embodiments, as shown in fig. 5, in the second VR display mode, the first control circuit 40 controls the transmission paths of the input terminal and the first output terminal OUT11 to be disconnected, and controls the transmission paths of the input terminal and the second output terminal OUT12 to be connected, so that the first control circuit 40 controls the n cascaded shift registers 20 to sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2; the second control circuit 50 controls the transmission paths of the input terminal and the first output terminal OUT21 to be disconnected, and controls the transmission paths of the input terminal and the second output terminal OUT22 to be connected, so that the second control circuit 50 controls the n cascaded second shift registers 30 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1.
Above-mentioned display panel, in VR display mode, first control circuit and second control circuit control n cascade's cascaded first shift register and n cascade's cascaded second shift register adopt the alternative scanning mode of subtend to scan 2n scanning lines, then the refresh time of the left half-screen of display panel only differs a line scanning time with the refresh time of the right half-screen, compare with the refresh time difference half-frame time of the left half-screen and the right half-screen of prior art, improved left and right eye content synchronism greatly, effectively improved VR visual experience.
On the basis of the display panel shown in fig. 2, the display panel shown in fig. 6 may further include: a first control circuit 40 and a second control circuit 50; an input end of the first control circuit 40 receives the first shift control signal STV1, a first output end OUT11 of the first control circuit 40 is electrically connected with the shift trigger terminal in of the 1 st stage first shift register SR1(1), and a second output end OUT12 of the first control circuit 40 is electrically connected with the shift trigger terminal in of the nth stage first shift register SR1 (n); the input terminal of the second control circuit 50 receives the second shift control signal STV2, the first output terminal OUT21 of the second control circuit 50 is electrically connected to the shift trigger terminal in of the 1 st stage second shift register SR2(1), and the second output terminal OUT22 of the second control circuit 50 is electrically connected to the shift trigger terminal in of the nth stage second shift register SR2 (n); in the VR display mode, the first control circuit 40 is configured to control the n cascaded first shift registers 20 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1, and the second control circuit 50 is configured to control the n cascaded second shift registers 30 to sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2.
The display panel has two VR display modes. As shown in fig. 7, in the first VR display mode, the first control circuit 40 controls the transmission path between the input terminal and the first output terminal OUT11 to be on, and controls the transmission path between the input terminal and the second output terminal OUT12 to be off, so that the first shift register signal STV1 received by the input terminal of the first control circuit 40 is transmitted to the 1 st-stage first shift register SR1(1) through the first output terminal OUT11, at this time, the 1 st-stage first shift register SR1(1) is triggered to shift as the first-stage first shift register in the n-stage cascaded first shift registers 20, and then the n-stage cascaded first shift registers 20 sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1. The second control circuit 50 controls the transmission paths of the input terminal and the first output terminal OUT21 to be turned on and the transmission paths of the input terminal and the second output terminal OUT22 to be turned off, so that the second shift register signal STV2 received by the input terminal of the second control circuit 50 is transmitted to the 1 st-stage second shift register SR2(1) through the first output terminal OUT21, at this time, the 1 st-stage second shift register SR2(1) is triggered to shift as the first-stage second shift register in the n-stage cascaded second shift registers 30, and then the n-stage cascaded second shift registers 30 sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2.
In other embodiments, as shown in fig. 8, in the second VR display mode, the first control circuit 40 controls the transmission paths of the input terminal and the first output terminal OUT11 to be disconnected, and controls the transmission paths of the input terminal and the second output terminal OUT12 to be connected, so that the first control circuit 40 controls the n cascaded shift registers 20 to sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2; the second control circuit 50 controls the transmission paths of the input terminal and the first output terminal OUT21 to be disconnected, and controls the transmission paths of the input terminal and the second output terminal OUT22 to be connected, so that the second control circuit 50 controls the n cascaded second shift registers 30 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1.
Above-mentioned display panel, in VR display mode, when adopting the alternative scanning mode of subtend to scan 2n scanning lines, then the refresh time of the left half-screen of display panel only differs a line of scanning time with the refresh time of the right half-screen, has improved left and right eyes content synchronism greatly, has effectively improved VR visual experience.
Alternatively, as shown in fig. 9, the first control circuit 40 includes: a first transmission gate 41, the first transmission gate 41 including a first switching transistor T1 and a second switching transistor T2, an input terminal of the first switching transistor T1 and an input terminal of the second switching transistor T2 being electrically connected and receiving a first shift control signal STV1, an output terminal of the first switching transistor T1 and an output terminal of the second switching transistor T2 being electrically connected and being electrically connected with a shift trigger terminal in of the 1 st stage first shift register SR1(1), a control terminal of the first switching transistor T1 receiving a first control signal CLK1, and a control terminal of the second switching transistor T2 receiving a second control signal CLK2, the first switching transistor T1 being an NMOS, the second switching transistor T2 being a PMOS; the first control circuit 40 further includes: a third transmission gate 42, the third transmission gate 42 including a fifth switching transistor T5 and a sixth switching transistor T6, an input terminal of the fifth switching transistor T5 and an input terminal of the sixth switching transistor T6 being electrically connected and receiving the first shift control signal STV1, an output terminal of the fifth switching transistor T5 and an output terminal of the sixth switching transistor T6 being electrically connected and being electrically connected with a shift trigger terminal in of the nth-stage first shift register SR1(n), a control terminal of the fifth switching transistor T5 receiving the first control signal CLK1, and a control terminal of the sixth switching transistor T6 receiving the second control signal CLK2, the fifth switching transistor T5 being a PMOS, the sixth switching transistor T6 being an NMOS;
the second control circuit 50 includes: a second transmission gate 51, the second transmission gate 51 including a third switching transistor T3 and a fourth switching transistor T4, an input terminal of the third switching transistor T3 and an input terminal of the fourth switching transistor T4 being electrically connected and receiving the second shift control signal STV2, an output terminal of the third switching transistor T3 and an output terminal of the fourth switching transistor T4 being electrically connected and being electrically connected with a shift trigger terminal in of the 1 st stage second shift register SR2(1), a control terminal of the third switching transistor T3 receiving the third control signal CLK3, and a control terminal of the fourth switching transistor T4 receiving the fourth control signal CLK4, the third switching transistor T3 being NMOS, the fourth switching transistor T4 being PMOS; the second control circuit 50 includes: a fourth transmission gate 52, the fourth transmission gate 52 includes a seventh switching transistor T7 and an eighth switching transistor T8, an input terminal of the seventh switching transistor T7 and an input terminal of the eighth switching transistor T8 are electrically connected and receive the second shift control signal STV2, an output terminal of the seventh switching transistor T7 and an output terminal of the eighth switching transistor T8 are electrically connected and electrically connected to a shift trigger terminal in of the nth stage second shift register SR2(n), a control terminal of the seventh switching transistor T7 receives the third control signal CLK3, and a control terminal of the eighth switching transistor T8 receives the fourth control signal CLK4, the seventh switching transistor T7 is a PMOS, and the eighth switching transistor T8 is an NMOS.
Alternatively, in the VR display mode, the first control signal CLK1 and the third control signal CLK3 are both high, and the second control signal CLK2 and the fourth control signal CLK4 are both low; alternatively, in the VR display mode, the first control signal CLK1 and the third control signal CLK3 are both low, and the second control signal CLK2 and the fourth control signal CLK4 are both high.
When the control circuit is adopted for display control, the display panel has two VR display modes.
In the first VR display mode, both CLK1 and CLK3 are at a high level, both CLK2 and CLK4 are at a low level, the first transmission gate 41 is turned on, and the third transmission gate 42 is turned off, so that the first control circuit 40 controls the n cascaded first shift registers 20 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1; when the second transmission gate 51 is turned on and the fourth transmission gate 52 is turned off, the second control circuit 50 controls the n-stage cascade of the second shift registers 30 to sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2.
In the second VR display mode, both CLK1 and CLK3 are at a low level, both CLK2 and CLK4 are at a high level, the first transmission gate 41 is turned off, and the third transmission gate 42 is turned on, so that the first control circuit 40 controls the n cascaded first shift registers 20 to sequentially shift and scan the corresponding n scan lines 10 along the second direction Y2; when the second transmission gate 51 is turned off and the fourth transmission gate 52 is turned on, the second control circuit 50 controls the n-stage cascade of the second shift registers 30 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1.
When the control circuit is used for display control, the display panel can be switched to a normal display mode. In the selectable normal display mode, the first control signal CLK1 and the fourth control signal CLK4 are both high, and the second control signal CLK2 and the third control signal CLK3 are both low, so that the n-stage cascade first shift register 20 and the n-stage cascade second shift register 30 scan the 2n scan lines 10 row by row in the first direction Y1; alternatively, in the normal display mode, the first control signal CLK1 and the fourth control signal CLK4 are both low level, and the second control signal CLK2 and the third control signal CLK3 are both high level, so that the n-stage cascade first shift register 20 and the n-stage cascade second shift register 30 scan 2n scan lines row by row in the second direction Y2.
In the normal display mode, both CLK1 and CLK4 are at a high level, both CLK2 and CLK3 are at a low level, the first transmission gate 41 is turned on, and the third transmission gate 42 is turned off, so that the first control circuit 40 controls the n cascaded first shift registers 20 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1; when the second transmission gate 51 is turned off and the fourth transmission gate 52 is turned on, the second control circuit 50 controls the n-stage cascade of the second shift registers 30 to sequentially shift and scan the corresponding n scan lines 10 along the first direction Y1. And the n-stage cascade of the first shift register 20 and the n-stage cascade of the second shift register 30 are alternately scanned, whereby progressive scanning of the display panel can be realized.
It should be noted that, if the display panel is only used in the VR display device and normal display is not performed, it is optional that the first control signal CLK1 and the third control signal CLK3 share one timing signal line, and the second control signal CLK2 and the fourth control signal CLK4 share one timing transmission line as shown in fig. 10.
The display panel shown in fig. 9 and 10 is a display panel in which the configurations of the first control circuit 40 and the second control circuit 50 are described in detail only with reference to fig. 1, and the configurations of the first control circuit and the second control circuit are also applicable to the display panels shown in fig. 2 to 8, and are not illustrated here. On the other hand, the structures of the first control circuit and the second control circuit include, but are not limited to, those shown in fig. 9 and fig. 10, in other embodiments, the first control circuit may further include an NMOS and a PMOS, or further include other circuit structures, the structures of the first control circuit and the second control circuit are not specifically limited in the present invention, and any control circuit capable of implementing the functions of the first control circuit and the second control circuit falls within the protection scope of the present invention.
An embodiment of the present invention further provides an electronic device, which includes the display panel according to any of the above embodiments. The display panel is an organic light emitting display panel or a liquid crystal display panel. This electronic equipment wears display device for virtual reality and is VR display device. The electronic equipment adopts the display panel of any embodiment, so that the synchronism of the left eye and the right eye can be greatly improved, the problem that the left eye and the right eye of a user receive screen display images asynchronously is solved, the visual experience of the user is improved, and the display effect is improved.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (12)
1. A display panel, comprising:
the scanning line structure comprises 2n scanning lines, wherein the 2n scanning lines are provided with a first side and a second side which are opposite in the extending direction of the scanning lines, and n is a positive integer;
the n-stage cascaded first shift register is positioned on the first side of the 2n scanning lines, the n-stage cascaded first shift register and the n scanning lines are respectively correspondingly arranged and electrically connected, and the n-stage cascaded second shift register is positioned on the second side of the 2n scanning lines, and the n-stage cascaded second shift register and the rest n scanning lines in the 2n scanning lines are respectively correspondingly arranged and electrically connected;
under a normal display mode, the n-stage cascaded first shift register and the n-stage cascaded second shift register scan the 2n scanning lines line by line along a first direction or a second direction;
in a VR display mode, the n cascaded first shift registers are sequentially cascaded in parallel along the first direction and shift-scan the corresponding n scan lines, the n cascaded second shift registers are sequentially cascaded in parallel along the second direction and shift-scan the corresponding n scan lines, and the n cascaded first shift registers and the n cascaded second shift registers alternately scan the 2n scan lines;
the first direction is parallel to and opposite to the second direction, and the first direction and the second direction are parallel to the arrangement direction of the 2n scanning lines and intersect with the transmission direction of the scanning signals in the 2n scanning lines.
2. The display panel according to claim 1, wherein the 2n scan lines include 1 st to 2 nth scan lines arranged in sequence along the first direction, wherein the ith stage of the first shift register is electrically connected to the 2i-1 st scan line, and the ith stage of the second shift register is electrically connected to the 2n-2i +2 th scan line, where i is 1,2, …, n.
3. The display panel according to claim 1, wherein the 2n scan lines include 1 st to 2 nth scan lines arranged in sequence along the first direction, wherein the ith stage of the first shift register is electrically connected to the ith scan line, and the ith stage of the second shift register is electrically connected to the 2n-i +1 th scan line, where i is 1,2, …, n.
4. The display panel according to claim 1, further comprising: a first control circuit and a second control circuit;
an input end of the first control circuit receives a first shift control signal, a first output end of the first control circuit is electrically connected with a shift trigger end of the 1 st-stage first shift register, and a second output end of the first control circuit is electrically connected with a shift trigger end of the nth-stage first shift register;
an input end of the second control circuit receives a second shift control signal, a first output end of the second control circuit is electrically connected with a shift trigger end of the 1 st-stage second shift register, and a second output end of the second control circuit is electrically connected with a shift trigger end of the nth-stage second shift register;
under VR display mode, first control circuit is used for controlling n cascaded first shift register along first direction shifts in proper order and scans corresponding n the scanning line, second control circuit is used for controlling n cascaded second shift register along the second direction shifts in proper order and scans corresponding n the scanning line.
5. The display panel according to claim 4,
the first control circuit includes: a first transmission gate, which includes a first switch transistor and a second switch transistor, wherein an input terminal of the first switch transistor and an input terminal of the second switch transistor are electrically connected and receive the first shift control signal, an output terminal of the first switch transistor and an output terminal of the second switch transistor are electrically connected and electrically connected to a shift trigger terminal of the first shift register of level 1, a control terminal of the first switch transistor receives the first control signal, and a control terminal of the second switch transistor receives the second control signal, the first switch transistor is an NMOS, and the second switch transistor is a PMOS;
the first control circuit further comprises: a third transmission gate, where the third transmission gate includes a fifth switching transistor and a sixth switching transistor, an input end of the fifth switching transistor and an input end of the sixth switching transistor are electrically connected to receive the first shift control signal, an output end of the fifth switching transistor and an output end of the sixth switching transistor are electrically connected to each other and to a shift trigger end of the nth shift register, a control end of the fifth switching transistor receives the first control signal, and a control end of the sixth switching transistor receives the second control signal, the fifth switching transistor is a PMOS, and the sixth switching transistor is an NMOS;
the second control circuit includes: the second transmission gate comprises a third switching transistor and a fourth switching transistor, the input end of the third switching transistor and the input end of the fourth switching transistor are electrically connected and receive the second shift control signal, the output end of the third switching transistor and the output end of the fourth switching transistor are electrically connected and electrically connected with the shift trigger end of the second shift register of the 1 st stage, the control end of the third switching transistor receives the third control signal, the control end of the fourth switching transistor receives the fourth control signal, the third switching transistor is an NMOS, and the fourth switching transistor is a PMOS;
the second control circuit includes: a fourth transmission gate, where the fourth transmission gate includes a seventh switching transistor and an eighth switching transistor, an input end of the seventh switching transistor is electrically connected to an input end of the eighth switching transistor and receives the second shift control signal, an output end of the seventh switching transistor is electrically connected to an output end of the eighth switching transistor and electrically connected to a shift trigger end of the second shift register of the nth stage, a control end of the seventh switching transistor receives the third control signal, and a control end of the eighth switching transistor receives the fourth control signal, where the seventh switching transistor is a PMOS, and the eighth switching transistor is an NMOS.
6. The display panel according to claim 5,
in a VR display mode, the first control signal and the third control signal are both high, and the second control signal and the fourth control signal are both low; alternatively, the first and second electrodes may be,
in a VR display mode, the first control signal and the third control signal are both low, and the second control signal and the fourth control signal are both high.
7. The display panel according to claim 5,
in a normal display mode, the first control signal and the fourth control signal are both at a high level, and the second control signal and the third control signal are both at a low level, so that the n-stage cascaded first shift register and the n-stage cascaded second shift register scan the 2n scanning lines line by line along the first direction; alternatively, the first and second electrodes may be,
in a normal display mode, the first control signal and the fourth control signal are both at a low level, and the second control signal and the third control signal are both at a high level, so that the n-stage cascaded first shift register and the n-stage cascaded second shift register scan the 2n scanning lines line by line along the second direction.
8. A display method of a display panel according to claim 2, the display method comprising:
controlling n cascaded first shift registers on the first side of 2n scanning lines to sequentially shift along a first direction and scan the corresponding n scanning lines by adopting an opposite alternating scanning mode, wherein the ith cascaded first shift register scans the 2i-1 th scanning line;
controlling n cascaded second shift registers at a second side of the 2n scanning lines to sequentially shift along a second direction and scan the corresponding n scanning lines, wherein the ith cascaded second shift register scans the 2n-2i +2 th scanning line;
the first direction is parallel to and opposite to the second direction, and the first direction and the second direction are parallel to the arrangement direction of the 2n scanning lines and intersect with the transmission direction of the scanning signals in the 2n scanning lines.
9. A display method of a display panel according to claim 3, the display method comprising:
controlling n cascaded first shift registers on the first side of 2n scanning lines to sequentially shift along a first direction and scan the corresponding n scanning lines in an opposite alternating scanning mode, wherein the ith scanning line is scanned by the ith cascaded first shift register;
controlling n cascaded second shift registers at a second side of the 2n scanning lines to sequentially shift along a second direction and scan the corresponding n scanning lines, wherein the ith cascaded second shift register scans the 2n-i +1 th scanning line;
the first direction is parallel to and opposite to the second direction, and the first direction and the second direction are parallel to the arrangement direction of the 2n scanning lines and intersect with the transmission direction of the scanning signals in the 2n scanning lines.
10. An electronic device characterized by comprising the display panel according to any one of claims 1 to 7.
11. The electronic device according to claim 10, wherein the display panel is an organic light-emitting display panel or a liquid crystal display panel.
12. The electronic device of claim 10, wherein the electronic device is a virtual reality head mounted display device.
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| CN108831369B (en) * | 2018-06-29 | 2021-11-02 | 厦门天马微电子有限公司 | Display panel and driving method |
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