CN107591320B - A kind of metal gates and preparation method thereof of 3D nand memories part - Google Patents
A kind of metal gates and preparation method thereof of 3D nand memories part Download PDFInfo
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- CN107591320B CN107591320B CN201710774295.1A CN201710774295A CN107591320B CN 107591320 B CN107591320 B CN 107591320B CN 201710774295 A CN201710774295 A CN 201710774295A CN 107591320 B CN107591320 B CN 107591320B
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Abstract
The embodiment of the present application provides a kind of metal gates preparation method of 3D nand memories part comprising：Substrate is provided, silicon oxide/nitride layer alternatively layered structure and the grid line gap through the stepped construction are formed on the substrate；Partial silicon nitride in stepped construction and the partial oxidation silicon with the partial silicon nitride direct neighbor are etched using the first etching solution, until etching into predeterminated position；The predeterminated position is the position between silicon nitride layer both ends of the surface in stepped construction；Remaining silicon nitride in stepped construction is etched using the second etching solution；Metal medium is filled to the void region of the stepped construction after etching, forms metal gates.The preparation method can reduce the gap inside metal gates, be conducive to improve device performance.In addition, the embodiment of the present application also provides a kind of metal gates of 3D nand memories part.
Description
Technical field
This application involves the metal gates of semiconductor processing technology field more particularly to a kind of 3D nand memories part and
Preparation method.
Background technology
The vertical storage structure of existing 3D nand memories part is stacked by dielectric multi-layer optical thin film to be formed, preparation process
In, it needs, by the silicon nitride removal in silica/silicon nitride alternatively layered structure, metal medium therefrom to be filled, to form gold
Belong to grid.
The silicon nitride in silicon/silicon nitride alternatively layered structure is gone generally to be completed by wet-etching technology at present.
Wet etching solution is gradually diffused into inside stepped construction out of grid line gap (gate line slit, GLS), to gradually go
Except the silicon nitride in stepped construction.
However, using it is existing go the wet-etching technology of silicon nitride to remove silicon nitride after, the engraved structure of formation is
The uniform structure of interior outward opening, and due to the thinner thickness of the silicon nitride in stepped construction, so, after silicon nitride removal, need
Metal is filled to being open in smaller hole.Because being easy to form gap in the filling process when the smaller hole of filling opening, so,
When filling metal medium at the silicon nitride position to stepped construction, it is easy to cause and generates in big metal gates that there are gaps, most
The performance of memory device is influenced eventually.
Invention content
In view of this, in order to reduce the gap in metal gates, this application provides a kind of gold of 3D nand memories part
Belong to grid and preparation method thereof.
In order to solve the above-mentioned technical problem, the application uses following technical solution：
A kind of metal gates preparation method of 3D nand memories part, including：
Substrate is provided, silicon oxide/nitride layer alternatively layered structure is formed on the substrate and runs through the stacking
The grid line gap of structure；
The partial nitridation of every layer of silicon nitride layer in stepped construction is etched by the grid line gap using the first etching solution
Silicon and partial oxidation silicon with the partial silicon nitride direct neighbor, until etching into predeterminated position；The predeterminated position is
Position in stepped construction between silicon nitride layer both ends of the surface；
The remaining silicon nitride of every layer of silicon nitride layer in stepped construction is etched using the second etching solution；
Metal medium is filled to the void region of the stepped construction after etching, forms metal gates.
Optionally, first etching solution is the first phosphoric acid solution, and second etching solution is the second phosphoric acid solution,
The silicon nitride of first phosphoric acid solution is to the selection of silica than the silicon nitride less than second phosphoric acid solution to silica
Selection ratio.
Optionally, the silicon nitride of first phosphoric acid solution to silica to select to compare be 10：1 to 100:Ratio between 1
Example, the silicon nitride of second phosphoric acid solution compare more than 300 the selection of silica.
Optionally, it is described using the second etching solution etching stepped construction in the remaining silicon nitride of every layer of silicon nitride layer it
Afterwards, described to fill metal medium to the void region of the stepped construction after etching, it is formed before metal gates, further includes：
The by-product silica generated in removal silicon nitride layer etching process.
Optionally, the by-product silica generated in the removal silicon nitride layer etching process, specifically includes：
The by-product silica generated in silicon nitride layer etching process is removed using wet-etching technology.
Optionally, the etching solution that the wet-etching technology uses is hydrofluoric acid solution.
Optionally, described to fill metal medium to the void region of the stepped construction after etching, metal gates are formed, specifically
Including：
Metal medium is filled to the void region of the stepped construction after etching by way of atomic layer deposition, forms metal
Grid.
Optionally, the metal medium is tungsten.
A kind of metal gates of 3D nand memories part, including：
Substrate is formed with the metal gates that multilayer is layered on top of each other and the grid line through the metal gates on the substrate
Gap；
Every layer of metal gates include connection first part's metal gates and second part metal gates, described first
Part of grid pole is located at close to the position in grid line gap, and the second part metal gates are located remotely from the position in the grid line gap
It sets；The width of first part's metal gates is more than the width of the second part metal gates.
Optionally, the metal gates are made of tungsten.
Compared to the prior art, the application has the advantages that：
As seen through the above technical solutions, in the metal gates preparation method of 3D nand memories provided by the present application, lead to
The silicon nitride layer in two step etching processes completion stepped construction is crossed, in first step etching process, not by every layer of silicon nitride layer
It all etches away, but only etches away at a distance of the closer silicon nitride in grid line gap, and in first step etching process, also simultaneously
Etch away and be etched the partial oxidation silicon layer of silicon nitride direct neighbor, is opened in this way, can form one near grid line gap
The wide opening of boring ratio silicon nitride layer thickness, and in second step etching process, remaining silicon nitride is only etched away, without etching
Fall silica adjacent thereto, so just form the opening equal with silicon nitride layer thickness that be open far from grid line gap area,
The close grid line gap opening so just formed in stepped construction is big, far from the small void region of grid line gap opening.Because to
Void region filling metal medium is completed by grid line gap, is so formed that outer end opening is big, and inner opening is small
Fill hole.Metal medium is filled in the filling hole small to the big internal orifice of this collar extension compared to an equal amount of filling of inside outward opening
Metal medium is filled in hole, can reduce the gap generated in filling process, therefore, 3D nand memories provided by the present application
Metal gates preparation method can reduce the gap inside metal gates, be conducive to improve device performance.
Description of the drawings
In order to which the specific implementation mode of the application is expressly understood, below in conjunction with the specific embodiment party of attached drawing most the application
Formula is described in detail.
Fig. 1 is the metal gates preparation method flow diagram of 3D nand memories part provided by the embodiments of the present application；
Fig. 2A to Fig. 2 D is that the metal gates preparation method of 3D nand memories part provided by the embodiments of the present application is a series of
The corresponding structural schematic diagram of processing procedure.
Specific implementation mode
In the metal gates preparation method of existing 3D nand memories part, filling metal medium region is opened for both ends
The equal-sized filling region of mouth.In the packing material into the both ends open equal-sized filling region, it is easy filling
Gap is formed inside region, damages the electrical property of device.
In order to solve the technical problem, the metal gates preparation method of 3D nand memories part provided by the present application is tried
Big, the small filling hole of interior end opening by the region formation outer end opening for filling metal medium.In this way, filling hole bottom section compared with
It is small, and top area is larger, so, it is possible to reduce the possibility that filling process void generates, and is conducive to improve what filling was formed
The performance of metal gates, and then improve the performance of device.
The specific implementation mode of the application is described in detail below in conjunction with the accompanying drawings.
It please refers to Fig.1 to Fig. 2 D.Fig. 1 is prepared by the metal gates of 3D nand memories part provided by the embodiments of the present application
Method flow schematic diagram.Fig. 2A to Fig. 2 D is the metal gates preparation side of 3D nand memories part provided by the embodiments of the present application
A series of corresponding structural schematic diagram of processing procedures of method.
As shown in Figure 1, the preparation method includes the following steps：
S101：Substrate 201 is provided, forms 202/ silicon nitride layer of silica, 203 alternatively layered structure on the substrate 201
And through the grid line gap 204 of the stepped construction.
As shown in Figure 2 A, substrate 201 is provided, it is alternately laminated to form 203 layers of 202/ silicon nitride of silica on the substrate 201
Structure and grid line gap 204 through the stepped construction.
After getting rid of silicon nitride layer 203, connection 3D can be made in grid line gap (gate line slit, GLS) 204
The source electrode gate tube of nand memory and the interface channel of source electrode, in this way, in grid line gap 204 after metal gates can be formed
Side wall form one layer of dielectric, it is then internal to fill metal medium.
S102：The part of every layer of silicon nitride layer in stepped construction is etched by grid line gap 204 using the first etching solution
Silicon nitride and partial oxidation silicon with the partial silicon nitride direct neighbor, until etching into predeterminated position；The default position
It is set to the position between silicon nitride layer both ends of the surface in stepped construction.
In the preparation process of 3D nand memories, the nitridation in 202/ silicon nitride layer of silica, 203 alternatively layered structure
Silicon layer 203 is sacrificial layer, needs to remove silicon nitride layer 203, then fills metal medium in 203 position of silicon nitride layer, to
In the grid with stepped construction for forming 3D nand memories.
Because silicon nitride layer 203 to be etched is located in 202/ silicon nitride layer of silica, 203 alternatively layered structure, it is clipped in oxidation
Between silicon 202, it is difficult to be removed it by dry etch process, generally use wet-etching technology removes it.
When using wet etching solution etches silicon nitride layer 203, need that 202/ silicon nitride layer 203 of silica will be formed
The substrate of alternatively layered structure is immersed in etching solution, and etching solution can be full of entire grid line gap, in this way, grid line gap
Silicon nitride 203 on 204 side walls can touch etching solution, and such etching solution is from 204 side wall of grid line gap gradually to stacking
The inside etch silicon nitride of structure.During wet etching silicon nitride 203, the silica 202 in stepped construction can also connect
Contact etching solution, therefore, in order to avoid etching solution etches away silica 202, so, it is general to select silicon nitride to silica
Selection than more than 1 etching solution.
In the embodiment of the present application, it is open the filling hole that big internal orifice is open small to form collar extension, the embodiment of the present application is logical
Cross two step etching technics removal silicon nitride layer 203.First step etching technics is using in the first etching solution etching stepped construction
Partial silicon nitride 203 and partial oxidation silicon 202 with 203 direct neighbor of the partial silicon nitride, until etching into default position
It sets；The predeterminated position is the position between silicon nitride layer both ends of the surface in stepped construction.After the step, the nitrogen that is etched away
SiClx 203 and silica 202 form the metal medium entrance in metal medium filling hole, and the width of the metal medium entrance is big
In the thickness of silicon nitride layer 203.After having executed the step, corresponding cross-sectional view is as shown in Figure 2 B.
As an example, the first etching solution that the step is selected can be phosphoric acid solution, in order to be adopted with subsequent etching processes
Etching solution distinguishes, and the phosphoric acid solution which selects is known as the first phosphoric acid solution.The nitridation of first phosphoric acid solution
Silicon is not to the selection of silica than being very high, and thus, the first phosphoric acid solution can also etch simultaneously during etch silicon nitride
Fall a small amount of silica.As an example, the silicon nitride of the first phosphoric acid solution can be 10 to the ratio that selects of silica：1 to 100：1
Between ratio.
In addition, predeterminated position can be set according to the needs that subsequent metal is filled.It, can be in addition, in etching process
By controlling etch period predeterminated position is etched into control.Specifically, between calculating from grid line slot sidewall to predeterminated position
Distance, then utilize the distance divided by etch rate, obtained result of calculation is the time to be undergone of step etching technics.
S103：The remaining silicon nitride of every layer of silicon nitride layer 203 in stepped construction is etched using the second etching solution.
The second step that silicon nitride 203 etches is to etch remaining silicon nitride 203 in stepped construction using the second etching solution.
It is as shown in Figure 2 C that the step has executed corresponding section result schematic diagram.
In this step, the second etching solution of selection may be phosphoric acid solution, in order to be different from step S102
Etching solution, the phosphoric acid solution that step S103 is selected are known as the second phosphoric acid solution.
Because of the bottom that the void region formed after the step etch silicon nitride is metal-filled holes, in order to reduce filling process
The opening in the gap of middle generation, the void region can be the smaller opening that is open formed compared to step S102.Therefore, exist
In the step, compared to the first phosphoric acid solution, the second phosphoric acid solution can have selection ratio of the higher silicon nitride to silica,
Make the second phosphoric acid solution during etch silicon nitride, as few as possible etching oxidation silicon.As an example, the second phosphoric acid is molten
The silicon nitride of liquid can be more than 300 to the selection ratio of silica.
S104：Metal medium is filled to the void region of the stepped construction after etching, forms metal gates 205.
It, can be by way of atomic layer deposition to the stepped construction after etching in order to improve the filling rate of metal medium
Void region (i.e. the silicon nitride layer position of stepped construction) fill metal medium, formed metal gates 205.
In the embodiment of the present application, metal medium is tungsten.
After executing the step S104, corresponding cross-sectional view is as shown in Figure 2 D.
In addition, during using phosphoric acid solution etch silicon nitride, by-product silica is will produce, because being stitched in grid line
Near gap, the contact area of silicon nitride and etching solution is larger, so, etch by-products silica is easily accumulated on stacking
The side area of structure.In this way, the silica in stepped construction has been formed about the structure of similar " match end " in grid line gap.
Similar " match end " structure of the formation, causes the opening for being subsequently formed metal gates to reduce, and then result in
Metal gates inside there are gaps.Therefore, in order to reduce metal gates internal voids, metal gates performance is improved, is being filled
Before metal medium, preparation method provided by the embodiments of the present application can also include：It is produced in removal 203 etching process of silicon nitride layer
Raw by-product silica.
As the example of the application, it may be used and produced in wet etching method removal 203 etching process of silicon nitride layer
Raw by-product silica.
Because the consistency of by-product silica is relatively low, the side of stepped construction is gathered in more open state
Region, the extremely dilute HF solution of concentration, which may be used, to be removed it, and the consistency of the silica 202 in stepped construction compared with
Height needs the HF of higher concentration that can just remove it.Based on this, during removing by-product silica, in order to reduce
The extremely dilute hydrofluoric acid solution of concentration may be used as etching solution in the removal amount of silica 202 in stepped construction.
In addition, because by-product silica aggregate is in stepped construction side area, i.e., close to grid line gap area, and because dry
There is method etching excellent anisotropy therefore as another example of the application, dry etching method may be used and go to denitrogenate
The by-product silica generated in 203 etching process of SiClx layer.
When the by-product silica generated in using dry etching method removal 203 etching process of silicon nitride layer, tool
Body may comprise steps of：
Photoresist is coated above the stepped construction, and carries out mask patterning, in grid line gap 204 and by-product
Etching window is formed above silica；
Along grid line gap, vertical direction carries out downwards dry etching, and removal is gathered in the by-product two on grid line slot sidewall
Silica.
It is the specific embodiment party of the metal gates preparation method of 3D nand memories provided by the embodiments of the present application above
Formula.In this specific embodiment, the silicon nitride layer in stepped construction is completed by two step etching processes, it is etched in the first step
Cheng Zhong does not etch away every layer of silicon nitride layer all, but only etches away at a distance of the closer silicon nitride in grid line gap, and
In first step etching process, also and meanwhile the silicon nitride direct neighbor that etches away and be etched partial oxidation silicon layer, in this way, in grid line
Gap nearby can form the trepanning opening wider than silicon nitride layer thickness, and in second step etching process, only etch away
Remaining silicon nitride, without etching away silica adjacent thereto, so just far from grid line gap area formed opening and
The equal opening of silicon nitride layer thickness, the close grid line gap opening so just formed in stepped construction is big, is stitched far from grid line
Gap is open small void region.Because being completed to void region filling metal medium by grid line gap, so it is formed
Outer end opening is big, the small filling hole of inner opening.In the filling hole small to the big internal orifice of this collar extension fill metal medium compared to
Metal medium is filled in the inside an equal amount of filling hole of outward opening, the gap generated in filling process can be reduced, therefore, this
Apply for that the metal gates preparation method of the 3D nand memories provided can reduce the gap inside metal gates, is conducive to carry
High device performance.
The specific implementation mode of metal gates preparation method based on above-mentioned 3D nand memories, the embodiment of the present application is also
Provide a kind of metal gates of 3D nand memories part.The cross-section structure of the metal gates of the 3D nand memory parts is as schemed
Shown in 2D comprising：
Substrate 201 is formed with metal gates 205 and run through the metal that multilayer is layered on top of each other on the substrate 201
The grid line gap 204 of grid；
Every layer of metal gates 205 include the first part's metal gates 2051 and second part metal gates of connection
2052, first part's grid 2051 is located at the position close to grid line gap 204, and second part metal gates 2052 are located at remote
Position from grid line gap 204, first part's grid 2051 and second part grid 2052 connect, first part's gold
The width for belonging to grid 2051 is more than the width of the second part metal gates 2052.
In the embodiment of the present application, when the side wall in grid line gap 204 forms one layer of insulating medium layer and inside it
After filling metal medium, the source electrode choosing of connection 3DNAND memories should just be made filled with the grid line gap 204 of metal medium
The interface channel of siphunculus and source electrode.
As the alternative embodiment of the application, the metal gates are made of tungsten.
It is the specific implementation mode of the application above.
Claims (8)
1. a kind of metal gates preparation method of 3D nand memories part, which is characterized in that including：
Substrate is provided, silicon oxide/nitride layer alternatively layered structure is formed on the substrate and runs through the stepped construction
Grid line gap；
Use the first etching solution by the grid line gap etch stepped construction in every layer of silicon nitride layer partial silicon nitride with
And the partial oxidation silicon with the partial silicon nitride direct neighbor, until etching into predeterminated position；The predeterminated position is stacking
There is in silicon nitride layer with the side wall in the grid line gap position of pre-determined distance in structure；
The remaining silicon nitride of every layer of silicon nitride layer in stepped construction is etched using the second etching solution；
Metal medium is filled to the void region of the stepped construction after etching, forms metal gates.
2. preparation method according to claim 1, which is characterized in that first etching solution is the first phosphoric acid solution,
Second etching solution is the second phosphoric acid solution, and the silicon nitride of first phosphoric acid solution compares less than institute the selection of silica
State selection ratio of the silicon nitride to silica of the second phosphoric acid solution.
3. preparation method according to claim 2, which is characterized in that the silicon nitride of first phosphoric acid solution is to silica
To select to compare be 10：1 to 100:Ratio between 1, the silicon nitride of second phosphoric acid solution, which compares the selection of silica, to be more than
300。
4. preparation method according to claim 2, which is characterized in that described to etch stepped construction using the second etching solution
In after the remaining silicon nitride of every layer of silicon nitride layer, it is described to fill metal medium to the void region of the stepped construction after etching,
It is formed before metal gates, further includes：
The by-product silica generated in removal silicon nitride layer etching process.
5. preparation method according to claim 4, which is characterized in that generated in the removal silicon nitride layer etching process
By-product silica, specifically includes：
The by-product silica generated in silicon nitride layer etching process is removed using wet-etching technology.
6. preparation method according to claim 5, which is characterized in that the etching solution that the wet-etching technology uses for
Hydrofluoric acid solution.
7. according to claim 1-6 any one of them preparation methods, which is characterized in that the stepped construction to after etching
Metal medium is filled in void region, forms metal gates, specifically includes：
Metal medium is filled to the void region of the stepped construction after etching by way of atomic layer deposition, forms metal gate
Pole.
8. preparation method according to claim 7, which is characterized in that the metal medium is tungsten.
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| WO2020034147A1 (en) * | 2018-08-16 | 2020-02-20 | Yangtze Memory Technologies Co., Ltd. | Methods for forming structurally-reinforced semiconductor plug in three-dimensional memory device |
| CN109148458B (en) * | 2018-08-28 | 2020-07-24 | 长江存储科技有限责任公司 | 3D NAND memory device and metal gate preparation method thereof |
| CN110797255B (en) * | 2019-10-14 | 2022-10-28 | 长江存储科技有限责任公司 | Thin film stack structure, three-dimensional memory and preparation method thereof |
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| US9870945B2 (en) * | 2015-03-10 | 2018-01-16 | Sandisk Technologies Llc | Crystalline layer stack for forming conductive layers in a three-dimensional memory structure |
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