CN107562433B - Automatic multiprocessor program updating system and program updating method - Google Patents

Abstract

The invention discloses an automatic multiprocessor program updating system, which comprises a first-stage board card and at least one second-stage board card connected with the first-stage board card, wherein each stage of board card comprises at least one processor; when a primary processor monitors that a port connected with an external device is provided with the external device, the primary processor enters a waiting state, the secondary processor is in the waiting state, and whether the name of a target file stored in the external device is the same as the name of a program in each processor or not and the processor to which the program with the same name belongs are identified; acquiring a target file with the same name from the peripheral equipment, and updating and replacing a program with the same name in the processor; after all the programs with the same name are updated and replaced, the processors of each stage recover the working state, and a prompt signal is sent out by the first-stage board card. The invention also discloses an automatic multiprocessor program updating method. The technical scheme of the invention can avoid the problems of complicated work, low efficiency, easy error and the like in the working process of manually updating different programs to the multiprocessor.

Description

Automatic multiprocessor program updating system and program updating method

Technical Field

The invention relates to a multiprocessor program updating system and a program updating method in a train overspeed protection system in a railway and urban rail transit operation control system, in particular to an automatic multiprocessor program updating system and a program updating method.

Background

The atp (automatic Train protection) is one of the components of the operation control system for high-speed railway, subway and urban rail transit, and is mainly used to provide speed limit information to maintain the safety interval between trains, so that the trains can operate under the standard of speed limit. The train overspeed protection vehicle-mounted equipment is an important component of a train overspeed protection system, and is safety guarantee equipment for monitoring the speed of a train in real time according to a train operation control command received from train overspeed protection ground equipment.

At present, a set of complete train overspeed protection equipment is complex and generally consists of a plurality of board cards, such as a host board card, a communication board card, an output board card, an input board card, an acquisition board card and the like; each board card is provided with at least one processor. And a hierarchical relationship is formed among the plurality of board cards. In the process of repairing and testing the software BUG, modifying codes and burning different programs into corresponding processors on the multi-layer multi-level board card are very frequent work; in the operation and maintenance stage of the equipment, if codes need to be upgraded, workers usually perform manual burning operation on different processors on each board card of each set of equipment, and the equipment is complex in work, large in workload, low in efficiency and prone to errors.

In a conventional program burning method, a computer host burns corresponding programs to respective processors on a multi-level board card through corresponding burning software and peripheral hardware devices such as a power supply, an emulator and the like. When the equipment program is updated on a large scale, the workload is heavy, the efficiency is low, the possibility of errors caused by human factors is high because the programs required to be burnt by all the processors are different, and no effective means is provided for monitoring the errors caused by the human factors in the burning process, so that potential safety hazards are caused; meanwhile, due to the need of peripheral equipment, frequent plugging and unplugging operations have a great adverse effect on the service life of the board card hardware.

There is a need for a simple, highly automated multiprocessor program update system and method that does not rely on human labor.

Disclosure of Invention

In order to solve the problems of complexity, low efficiency and potential safety hazard in the process of updating different programs on a multiprocessor, the invention provides an automatic multiprocessor program updating system and a program updating method, which can update different target programs of a plurality of processors at the same time.

An automatic multiprocessor program updating system comprises a first-stage board card and at least one second-stage board card connected with the first-stage board card; the rear-stage board card directly connected with the first-stage board card is a second-stage board card, and each stage of board card comprises at least one processor and a storage unit; the primary processor on the primary board card is connected with an external device for storing the target file; a secondary processor on the secondary board card is connected with a primary processor on the primary board card;

the primary processor monitors a port of the primary processor, which is connected with an external device, and when the primary processor monitors that the external device is connected with the primary processor, the primary processor enters a waiting state, sends a waiting instruction to the secondary processor to enable the secondary processor to be in the waiting state, and identifies whether the name of a target file stored in the external device is the same as the name of a program of the primary processor and the name of the program in the secondary processor, and the processors to which the programs with the same name belong; acquiring a target file with the same name from an external device, sending the target file to a processor on a board card where a program with the same name as the target file is located, and updating and replacing the program with the same name; after all the programs with the same name are updated and replaced, the processors of each stage recover the working state, and a prompt signal is sent out by the first-stage board card.

Preferably, if the post-processor is the last processor, the post-processor enters a wait state after receiving a wait instruction sent by the first processor; the post processor receives the target file sent by the pre processor, compares the name of the target file with the name of the program in the post processor, if the names of the target file and the program are the same, the target file with the same name in the peripheral is updated to replace the program with the same name, and after the update is finished, an update finishing instruction is sent to the first processor and a signal is sent to the outside to indicate that the program is finished; and/or after the first-stage processor identifies the post-stage processor to which the program with the same name belongs, directly sending a non-update file instruction to other post-stage processors without the program with the same name, and sending a non-update signal to the outside by the post-stage processors without the program with the same name;

if the post processor is not the last processor, the post processor enters a waiting state after receiving a waiting instruction sent by the first processor, and sends the waiting instruction to the post processor; the post processor and/or the post processor receives the target file sent by the pre processor, compares the name of the target file with the program names of the interior and the post processor, and if the names of the target file and the program with the same name belong to the post processor, the program with the same name is updated and replaced by the target file with the same name; after all the programs with the same name are updated and replaced, an updating completion instruction is sent to a primary processor of the same, and a signal is sent outwards to indicate that the updating of the programs is completed; and/or after the first-stage processor identifies the post-stage processor to which the program with the same name belongs, directly sending a non-update file instruction to other post-stage processors without the program with the same name, and sending a non-update signal to the outside by the post-stage processors without the program with the same name;

after receiving the update finishing instructions sent by all the post processors needing program updating, the primary processor recovers the working state and sends recovery instructions to all the post processors; and the post-stage processor restores to a normal working state after receiving a restoring instruction sent by the primary processor.

Preferably, the primary processor on the primary board card is wirelessly connected with the peripheral through a wireless receiving unit.

Preferably, after acquiring the target file with the same name from an external device, the primary processor caches the target file with the same name in a storage unit of the primary board card and checks the target file, and if the target file with the same name passes the check, the primary processor sends the target file to the secondary processor of the related secondary board card; and if the verification fails, the primary processor of the primary board card requires the peripheral to resend the target file with the same name.

Preferably, after the primary processor acquires a target file with the same name from an external device and sends the target file to a back-stage board card where a program with the same name as the target file is located, the back-stage processor on the back-stage board card caches the target file with the same name to a storage unit of the back-stage board card for verification, and if the target file with the same name passes the verification, the target file is updated to replace the program with the same name; and if the verification is not passed, the post-stage processor sends a request to the primary processor to resend the target file with the same name.

Preferably, a program name index table is stored in the primary processor, and the program name index table completely records and updates the names of all programs of the primary processor and the secondary processor in real time; the first-stage processor 'identifies whether the target file name stored in the peripheral equipment is the same as the program name of the first-stage processor and the program name of the subsequent-stage processor' is to sequentially compare the target file name with the program name in the program name index table and search for the program with the same name; or after detecting the peripheral equipment, the primary processor sends a command for asking for the name to each post processor, and each post processor returns all program names to the primary processor after receiving the command; the first-stage processor 'identifies whether the target file name stored in the peripheral is the same as the program name of the first-stage processor and the program name of the later-stage processor' is to sequentially compare the target file name with all the program names returned by the later-stage processors to find the program with the same name.

Preferably, the first-level board card is provided with at least two processors, and data transmission is performed between the at least two processors; at least one processor on the primary board card is connected with the peripheral; each processor on the first-stage board card is connected with the corresponding rear-stage board card; monitoring a port of a connection line between a first-stage board card and an external device by at least one processor connected with the external device, when the connection between the external device and the first-stage board card is monitored, sending a waiting instruction to respective post-stage processors to enable the post-stage processors to be in a waiting state, respectively identifying whether a target file name stored in the external device is the same as a program name of the first-stage processor and a program name in the post-stage processors, acquiring a target file with the same name from the external device, sending the target file to a processor where a program with the same name as the target file is located, and updating and replacing the program with the same name; after each processor of the first-level board card updates and replaces the homonym programs in the processor and the respective post processor thereof, after confirming that the processors and the post processors thereof update the homonym programs through data transmission among the processors on the first-level board card, the processors recover the working state, and the first-level board card sends out prompt signals.

Preferably, the first-level board card is provided with at least two same first-level processors, and each same first-level processor on the first-level board card is connected with the peripheral respectively; monitoring a port of a connection line between the primary board card and the peripheral by at least one primary processor connected with the peripheral; after the primary processors identify that the names of target files stored in the peripheral equipment are the same as the names of programs in the post-stage processors of the primary processors, the primary processors on the primary board card respectively collect the same target files sent by the peripheral equipment, the primary processors carry out data interaction comparison on the target files pairwise, and if the data interaction comparison is correct, one primary processor sends the target files to the post-stage processor where the program with the same name as the target file is located and updates and replaces the program with the same name; and if the data interaction is wrong, the primary processor acquires the target file of the peripheral equipment again.

Preferably, the first-stage processor simultaneously transmits the target file to the post-stage processor and the other first-stage processor; after receiving the target file, the other primary processor compares the target file with a target file acquired from an external device, and if the data comparison results are different, sends a signal that the data is wrong to the primary processor; and after receiving the signal that the data is wrong, the first-stage processor retransmits the target file to the later-stage processor and the other first-stage processor simultaneously.

A program updating method applying the automatic multiprocessor program updating system comprises the following steps:

s100: the peripheral establishes communication with the primary board card;

s110: the primary processor enters a waiting state; the first processor sends a wait instruction to the second processor to place the second processor in a wait state,

s120: the primary processor identifies the name of each target file stored by the peripheral equipment;

s130: if the first-level processor identifies that the name of a certain target file stored in the peripheral is the same as the name of a certain program of a certain processor of a certain board card, the first-level processor stores the target file of the peripheral in an external memory; otherwise, go to step S150;

s140: after the names of all programs of all processors of all board cards are identified and the programs with the same name are updated, the primary processor obtains a feedback signal, and all processors and board cards recover to work;

s150: and the processor updating the program and the processor not updated all send out corresponding prompt signals.

Preferably, after step S130, the following steps are also included:

s131: at least two identical primary processors on the primary board card are respectively called a first primary processor and a second primary processor, the first primary processor and the second primary processor perform data interaction comparison after receiving the target file respectively, and if the comparison is passed, the first primary processor and the second primary processor send the target file to the processor where the same-name program is located, and the same-name program is updated and replaced; otherwise, go to step S130;

s132: when the first primary processor sends a target file to the secondary board card, the second primary processor realizes a detection function, and if the data sent by the first primary processor is detected to be inconsistent with the data stored by the second primary processor, the second primary processor informs the first primary processor to resend the data;

s133: after receiving the target file, the processor where the program with the same name is located stores the target file in a corresponding storage unit; before updating the processor program, checking the non-check bit of the target file in the storage unit; if the calculated check value is consistent with the check value stored in the target file, the check is considered to be passed, and the processor is replaced and updated with the same-name program; otherwise, the target file with the same name is required to be sent again to an upper-level processor or an external device;

the invention has the beneficial effects that: in the process of repairing and testing the software BUG and the process of upgrading the equipment software in the operation and maintenance stage, the technical scheme of the invention can burn different programs into corresponding processors which are required to be upgraded on each board card, thereby avoiding the problems of complicated work, large workload, low efficiency, easy error and the like caused by that workers manually burn different processors on each board card on each set of equipment one by one independently, and simultaneously eliminating the potential safety hazard caused by errors generated by manual operation; and the adverse effect of frequent plugging operation on the service life of the board card hardware is also avoided.

Drawings

The invention is described in further detail below with reference to the following figures and embodiments:

FIG. 1a is a schematic diagram of an automated multiprocessor program update system in accordance with one embodiment of the present invention.

FIG. 1b is a schematic diagram of an automated multiprocessor program update system of one embodiment of the present invention.

FIG. 2 is a schematic diagram of an automated multiprocessor program update system, in accordance with one embodiment of the present invention.

FIG. 3a is a schematic diagram of an automated multiprocessor program update system in accordance with an embodiment of the present invention.

FIG. 3b is a schematic diagram of an automated multiprocessor program update system, in accordance with one embodiment of the present invention.

FIG. 4 is a flowchart illustrating an automated multiprocessor program update method according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer and clearer, the technical solutions in the embodiments of the present invention are described in further detail below with reference to the embodiments and the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. The exemplary embodiments and descriptions of the present invention are provided mainly for explaining the present invention, but not for limiting the present invention.

At present, a set of complete train overspeed protection equipment is complex and generally consists of a plurality of board cards, such as a host board card, a communication board card, an output board card, an input board card and the like; each board has at least one processor (also referred to herein as a CPU). A hierarchical relationship is formed among a plurality of board cards, wherein a 'primary board card' is defined as a board card which can be directly connected with external equipment (peripheral equipment for short in the invention, and can be portable storage equipment such as a U disk, a TF card, a mobile hard disk and the like) for storing data to be burned, and a corresponding processor is arranged on the board card and is called as a 'primary processor'; defining a second-level board card as a board card which can directly communicate with the first-level board card at most and does not directly communicate with the peripheral (including board cards which can communicate with the first-level board card and other second-level board cards), wherein the second-level board card is provided with a corresponding processor which is called a second-level processor; by analogy, the system can also comprise a 'third-level board card' (i.e. a board card which can be communicated with the second-level board card at the highest level and is not communicated with the first-level board card or peripheral equipment directly, and also comprises a board card which can be communicated with the second-level board card and other 'third-level board cards'), a 'fourth-level board card' (i.e. a board card which can be communicated with the third-level board card at the highest level and is not communicated with the second-level board card, the first-level board card or peripheral equipment directly, and also comprises a board card which can be communicated with the 'third-level board card' and other 'fourth-level board cards'), and the like, wherein; the data lines connect the first-level board card with the peripheral equipment, and the data buses connect the board cards of all levels.

For convenience of description, the second-level board card/processor, the third-level board card/processor, the fourth-level board card/processor and the like are called as the rear-level board card/processor of the first-level board card/processor, and similarly, the third-level board card/processor and the fourth-level board card/processor are called as the rear-level board card/processor of the first-level board card/processor and the rear-level board card/processor of the second-level board card/processor; the first-stage board/processor is referred to as a second-stage board/processor, a third-stage board/processor, a fourth-stage board/processor, and so on.

The invention provides an automatic multiprocessor program updating system, which comprises a first-stage board card and at least one second-stage board card connected with the first-stage board card; the rear-stage board card directly communicating with the first-stage board card is a second-stage board card (similarly, the second-stage rear-stage board card communicating with the first-stage board card is a third-stage board card of the first-stage board card, and so on), and each stage of board card includes at least one processor (each stage of processor may be a DSP, an FPGA, an ARM, and so on, and a DSP (digital signal processor) is used as the processor, a CAN bus of a serial bus is used as a connection mode, and a usb disk is used as an external example to explain the present embodiment) and a storage unit (as shown in fig. 1a and 1 b). The primary processor on the primary board card is connected to an external device (which may be one or more, and in fig. 1a and 1b, the present embodiment is described by taking a usb disk as an example) for storing a target file (i.e., a file to be burned, a program, and the like) through a port of the primary board card; and the secondary processor on the secondary board card is connected with the primary processor on the primary board card through a port of the primary board card. The primary processor monitors a port of the primary processor connected with the peripheral, enters a waiting state when the primary processor is monitored to be connected with the peripheral, and sends a waiting instruction to the secondary processor to enable the secondary processor to be in the waiting state, and identifies whether the name of the target file stored in the peripheral is the same as the name of the program of the primary processor and the name of the program in the secondary processor, and the processor to which the program with the same name belongs (because the peripheral of the invention is used for providing an updated program for the board card processor, the target file stored in the peripheral is usually the program which needs to be updated to the board card processor). Acquiring a target file with the same name (the version number can be not considered or different version numbers can be searched at the same time) from an external device, sending the target file to a processor on a board where a program with the same name as the target file is located, and updating and replacing the program with the same name (the program with the same name here can be a program on a first-level processor or a program on a later-level processor of the first-level processor); after all the homonymous programs are updated and replaced, the working state of each stage of processor is recovered (the stage of processor includes both the processors with the homonymous programs and the processors without the homonymous programs, as long as one processor performs the update and replacement of the homonymous programs, all the processors are in a waiting state, and the working state is not recovered uniformly until the homonymous programs on all the processors are updated, so that the problem that some processors perform program update in the waiting state and other processors possibly generate data processing errors in the working state is avoided), and a prompt signal is sent out by the primary board card. The prompt signal may be at least one of lighting a corresponding indicator light (for example, the working state is a green light, the waiting state is a red light, etc.), or emitting a corresponding sound signal (for example, the working state is not sounded, the waiting state emits a buzzer sound or an intermittent "beep, beep" sound), or displaying a text message (for example, the working state displays "working", and the waiting state displays "waiting"). As a preferred embodiment, in the case that a plurality of target file names stored in the peripheral device correspond to a plurality of program names in the front-stage processor and the back-stage processor respectively, the same-name program in the front-stage processor is updated and replaced, and then the same-name program is sent to the related back-stage processor and updated and replaced, thereby avoiding the conflict of program execution caused in the case that the program is not updated by the front-stage processor and the program is updated by the back-stage processor.

The storage unit on the board card may be a memory of the processor itself, or may be an external storage that is on the same board card as the processor and is connected to the processor. As a preferred embodiment, the storage unit of the processor includes both a memory and an external memory, the external memory stores an object file obtained from an external device, and after the object file is checked (for example, by methods such as CRC cyclic redundancy check, parity check, hamming check, and the like) to be correct, the object file in the external memory is updated to the memory of the relevant processor, and the same-name program of the replacement processor is updated.

The connection mode of the primary board card and the peripheral can be various data transmission modes in the prior art, such as a USB connection mode, a serial bus mode, a parallel bus mode or a wireless connection mode, and the like, and only a protocol or an addressing mode corresponding to the connection mode needs to be set in the primary processor. For example, the USB connection mode is suitable for a case where a storage device with a USB interface is externally provided and only one primary board card is provided, that is, data is transmitted point-to-point; the peripheral CAN also be connected with the primary board card through a serial bus such as a CAN bus, and at this time, the primary processor must embed a CAN controller (such as a DSP, an ARM, or a single chip of a part of the embedded CAN controller) so as to be able to identify a message identifier attached to the CAN bus (the message identifier is colloquially called a frame ID, and each processor is used to identify whether data transmitted on the CAN bus belongs to the processor or not by means of the frame ID); instead of using the CAN bus, it is still possible to use another bus, such as a parallel bus, instead of the CAN bus, and set a corresponding protocol or addressing mode in the processor to implement data transmission from the peripheral to the primary processor of the primary board, and therefore the data transmission mode of the CAN bus or other data transmission modes in the above-mentioned prior art should not be taken as a limitation to the present invention.

For example, the peripheral device may also transmit data with the primary board card in a wireless manner, as shown in fig. 2, at this time, the primary processor of the primary board card of the automated multiprocessor program updating system of the present invention is wirelessly connected (for example, in a WiFi, bluetooth, or the like) with the peripheral device through the wireless receiving unit, so as to receive data sent by the peripheral device in a wireless manner, and then transmit the data in the peripheral device to the corresponding processor according to the addressing manner of each processor.

The connection mode of the secondary processor of the secondary board card and the primary processor of the primary board card can be a data transmission mode in the prior art such as a serial bus, a parallel bus and the like, and only a protocol or an addressing mode corresponding to the connection mode needs to be set in the primary processor; the data transmission mode of the CAN bus in the serial bus is similar to the data transmission mode of the peripheral equipment between the CAN bus and the primary board card, and is not described herein; if a serial CAN bus is not used, other buses such as a parallel bus CAN still be used to connect the first-stage board card and the second-stage board card, communication between the two-stage board cards CAN be realized as long as a corresponding protocol or addressing mode is set in the processor to realize data transmission from the first-stage processor of the first-stage board card to the second-stage processor of the second-stage board card, and data transmission between other board cards is similar to that, and is not described herein; the data transmission via the CAN bus or other data transmission means in the prior art described above should therefore not be taken as a limitation of the invention.

In a preferred embodiment of the automated multiprocessor program update system of the present invention, based on the above-mentioned embodiment, if the post-processor is the last-stage processor (taking the case of the three-stage CPU in fig. 1b as an example), the post-processors (such as the third-stage CPU and the fourth-stage CPU) enter a wait state after receiving the wait instruction issued by the second-stage processor (such as the second-stage CPU, provided that the second-stage CPU has received the wait instruction from the first-stage CPU, that is, the wait instruction received by the post-processor such as the third-stage CPU is transmitted by the first-stage processor (such as the first-stage CPU) via the second-stage CPU); the post-processor receives the target file sent by the pre-processor, compares the name of the target file with the name of the program in the post-processor, and if the names of the target file and the program are the same (for example, the third-level CPU has the program with the same name and needs to be updated), the method includes the steps of replacing the program with the target file with the same name in the peripheral, sending an update completion instruction to a first-level processor after the update is completed (as shown in fig. 1b, after the third-level CPU program is updated, sending the update completion instruction to a first-level CPU through a second-level CPU), and sending a signal to the outside to indicate that the update program is completed (the light signal can be sent out by the second-level CPU, namely the third-level CPU, directly on the third-level board card or on the case, or the signal is sent out to the first-level CPU, namely the first-level CPU, and the signal is sent out by the first-level CPU uniformly to indicate that the update program is completed).

After the first-level processor identifies the post-level processor to which the program with the same name belongs (i.e., the post-level processor needing to update the program), the first-level processor directly sends a no-update file instruction to other post-level processors without the program with the same name (e.g., the fourth-level CPU does not have the program with the same name that needs to be updated) (the first-level CPU sends the no-update file instruction to the fourth-level CPU through the second-level CPU), and the processor without the update replacement program (i.e., the post-level processor without the program with the same name) sends an no-update signal to the outside to indicate the program without being updated (the no-update signal may be corresponding indicator light flashing, voice, etc., and may be sent by the post-level processor without the program with the same name itself, or the no-update signal is sent to the first-level processor and sent by the first-level processor in a. There may be two reasons for a processor not being updated: 1) the target file in the peripheral which is not updated to the processor is not needed to be updated; 2) the target file name in the peripheral is wrong, so that the program which needs to be updated in the processor cannot be updated. The "non-update signal" is sent out externally, so that the condition that the program which is supposed to be updated by the processor is not updated due to the error of the target file name in the peripheral can be eliminated, and the condition that the program which is not updated is mistakenly considered to be updated due to the communication error between the processors is prevented.

If the post-processor is not the last-stage processor (taking the case of the second-stage CPU in fig. 1b as an example), the post-processor enters a wait state after receiving the wait instruction sent by the first-stage processor (the first-stage CPU in fig. 1b), and sends a wait instruction to the post-processor (the third-stage CPU and the fourth-stage CPU in fig. 1 b); the method comprises the steps that a post-stage processor (for example, a second secondary CPU has a program with the same name and needs to be updated) and/or a post-stage processor (for example, a third-stage CPU has a program with the same name and needs to be updated) receives a target file sent by a front-stage processor (for example, a first-stage CPU), compares the name of the target file with the names of programs in the post-stage processor (for example, the second secondary CPU) and the third-stage CPU), and replaces the program with the target file with the same name with the update if the names of the programs are the same and the programs with the same name belong to the post-stage processor; updating and replacing all the homonymous programs and then sending an update finishing instruction to a first-stage CPU (namely, if the second-stage CPU and the third-stage CPU have homonymous programs to be updated, after the update finishing, the second-stage CPU sends an update finishing instruction to the first-stage CPU, generally, under the condition that the second-stage CPU and the rear-stage CPU need to update homonymous programs, the homonymous program of the second-stage CPU of the rear-stage processor is updated first, then the homonymous program of the third-stage CPU of the rear-stage processor is updated, after the third-stage CPU of the rear-stage processor finishes updating the programs, the update finishing instruction is sent to the second-stage CPU of the rear-stage processor, and the second-stage CPU of the rear-stage processor checks whether the homonymous program is updated or not, and if the update finishing instruction is also finished, the update finishing instruction is sent to the first-stage CPU), and sends out a signal to the outside to indicate that the updating process is finished.

After the first-level processor (such as the first primary CPU) identifies the post-level processor to which the program with the same name belongs (i.e., the post-level processor which needs to update the program), the first-level processor directly sends an update-free file instruction to other post-level processors (the second-level CPU) without the program with the same name and/or the post-level processors (the third-level CPU and the fourth-level CPU) without the program with the same name, and the processor which does not update the replacement program (i.e., the post-level processor which does not have the program with the same name) sends an update-free signal to the outside to prompt the non-updated program.

After the first-stage processor (taking the first-stage CPU in fig. 1b as an example) receives the update-completed instructions sent by all the post-stage processors (such as the second-stage CPU and/or the third-stage CPU in fig. 1b) that need to update the programs, the first-stage processor restores the working state and sends the restoration instructions to all the post-stage processors (that is, each CPU that needs to update the replacement program after the first-stage CPU sends an instruction back to the first-stage processor, and only after the first-stage processor receives the instructions sent back by all the post-stage processors that need to update the programs, the first-stage processor restores the working state and sends the restoration instructions to all the post-stage processors); and the post-stage processor restores to a normal working state after receiving a restoring instruction sent by the primary processor.

One embodiment of the automated multiprocessor program update system of the present invention, as illustrated in FIG. 1b, on the basis of the above embodiments, in the case that a certain post processor (for example, the first secondary CPU of the first secondary board and the first tertiary CPU of the first tertiary board) on which a certain post board is recognized by the first processor has a program with the same name as a certain target file of an external device (i.e. a usb disk), after acquiring the target files with the same name from the peripheral equipment, the primary processor caches the target files with the same name to a storage unit of a primary board card (a first primary board card) and checks the target files, and if the target files with the same name pass the check, the target files are sent to a secondary processor of a related secondary board card (the first secondary CPU of the first secondary board card is sent first, and the first secondary CPU checks two target files and then sends the two target files to a first tertiary CPU of the first tertiary board card), and the program with the same name is updated and replaced; and if the verification fails, the primary processor of the primary board card (the first primary CPU of the first primary board card) requires the peripheral to resend the target file with the same name. The check referred by the invention can be CRC (cyclic redundancy check) and can also be other check methods for verifying the accuracy of data, such as parity check, Hamming check and the like. In this embodiment, the target file can be verified after the primary board card obtains the target file of the peripheral, so that a data transmission error which may occur in the process that the target file is sent to the primary board card by the peripheral in a wired (fig. 1b) or wireless (fig. 2) manner can be avoided, and the safety and efficiency of program updating are improved.

Still taking fig. 1b as an example, in an embodiment of the automated multiprocessor program updating system of the present invention, based on the above embodiments, when a first-level processor recognizes that a program with the same name as a certain target file of an external device (i.e., a usb disk) is provided on a certain post-level processor of a certain post-level board (or a first-level CPU of a first-level board and a first-level CPU of a first-level board in the above example), the first-level processor obtains the target file with the same name from the external device and sends the target file to a post-level board (i.e., a first-level board) where the program with the same name as the target file is located, the post-level processor (a first-level CPU) on the post-level board caches the target file with the same name in a storage unit of the post-level board (a first-level board) and checks the target file with the same name, and updates and replaces the program with the target file with the same name if the target file with the same name passes the check (i.e., updates and replaces the program with the same name in the first-, and sends the target file to the first three-level CPU; and if the verification is not passed, the post-stage processor (the first secondary CPU) sends a request to the previous-stage processor (the first primary CPU) to resend the target file with the same name. After a post-processor (a first three-level CPU) of the second-level processor receives a target file, caching the target file into a storage unit of a post-level board card (a first three-level board card) and verifying the target file, and if the same-name target file passes the verification, updating and replacing the same-name program (namely updating and replacing the same-name program in the first three-level CPU); and if the verification is not passed, the post-stage processor (the first three-stage CPU) sends a request to the previous-stage processor (the first two-stage CPU) to renew the target file with the same name. According to the embodiment, before the post processor checks the target file, the primary processor checks each target file, so that if the post processor fails to check, the post processor indicates that an error occurs in the transmission process from the primary processor to the post processor, the post processor only needs to send the target file once again from the primary processor to the post processor, and the target file does not need to be taken out from an external device again. The check referred by the present invention is similar to the above embodiments, and may be a CRC cyclic redundancy check, or other check methods for verifying the accuracy of data, such as parity check, hamming check, and the like. The value of this embodiment is that, on the board card and the processor thereof that need to update the program, the target file sent by the peripheral device is verified before the program is updated, which can avoid the data transmission error that may occur during the transmission of the target file in the automatic multiprocessor program updating system of the present invention, and improve the safety and reliability of the program updating.

In an embodiment of the automated multiprocessor program updating system according to the present invention, based on the above embodiments, a program name index table may be further stored in the first-stage processor, and the program name index table completely records and updates all program names of the first-stage processor and the subsequent-stage processor in real time. The real-time update means that the program name index table is adjusted correspondingly no matter whether a back-stage board card and/or a back-stage processor is added/removed and/or a program on the back-stage processor is added/removed/modified, so as to ensure that the program name index table corresponds to the back-stage board card and the program in the back-stage processor. The aforementioned primary processor "identifies whether the target file name stored in the peripheral is the same as the program name of the primary processor and the program name of the secondary processor" in this embodiment, the target file name and the program name in the program name index table are sequentially compared to find a program with the same name. Of course, besides the program name index table described in this embodiment, other manners may be used to identify whether the target file name in the peripheral device is the same as the program name in each processor, for example, after the first-stage processor detects the peripheral device, a request name instruction (which may also be included in the wait instruction) may be sent to each subsequent processor, each subsequent processor returns all the program names to the first-stage processor after receiving the instruction, and then the first-stage CPU receives the program names corresponding to all the subsequent CPUs; in this case, the primary processor "recognizes whether the target file name stored in the peripheral is the same as the program name of the primary processor and the program name of the secondary processor" is a program that sequentially compares the target file name with all the program names returned by the respective secondary processors to find the same name. Therefore, those skilled in the art should understand that the target file name in the peripheral device and the program name in each processor can be identified in various ways inspired by the above-mentioned ways, and should not be taken as a limitation to the scope of the present invention.

In an embodiment of the automatic multiprocessor program updating system of the present invention, as shown in fig. 3a, based on the above embodiments, the primary board has at least two processors (in fig. 3a, for example, the primary board has 2 processors), and data transmission is performed between the at least two processors. At least one processor on the primary board card is connected with the peripheral; each processor on the first-stage board card is connected to its own rear-stage board card (as shown in fig. 3a, the first-stage CPU is connected to the first second-stage board card, and the second-stage CPU is connected to the second-stage board card). Monitoring a port of a first-level board card connected with the peripheral by at least one processor (in the embodiment, two processors on the first-level board card monitor the ports of the first-level board card connected with the peripheral), when the condition that the peripheral is connected with the first-level board card is monitored, enabling the first-level processor to enter a waiting state, sending a waiting instruction to a respective post-level processor to enable the post-level processor to be in the waiting state, respectively identifying whether a target file name stored in the peripheral is the same as a program name of the first-level processor and a program name in the post-level processor, acquiring a target file with the same name from the peripheral, sending the target file to a processor on the board card where the program with the same name as the target file is located, and replacing the program with the same name; after each processor of the first-level board card updates and replaces the homonym programs in the processor and the respective post processor thereof, after confirming that the processors and the post processors thereof update the homonym programs through data transmission among the processors on the first-level board card, the processors recover the working state, and the first-level board card sends out prompt signals.

In combination with other embodiments (i.e., excluding the embodiment of fig. 3a, but based on other embodiments) other than the above embodiments, a specific embodiment of the automated multiprocessor program updating system of the present invention is, as shown in fig. 3b, that the primary board has at least two identical primary processors (e.g., the first primary CPU and the second primary CPU of the first primary board in fig. 3b are identical CPUs), and each identical primary processor on the primary board is connected to the peripheral device; and at least one primary processor connected with the peripheral monitors a port of a connection line between the primary board card and the peripheral. After the primary processors identify that the names of target files stored in the peripheral equipment are the same as the names of programs in the post-stage processors of the primary processors, the primary processors on the primary board card respectively collect the same target files sent by the peripheral equipment, the primary processors perform data interaction comparison between every two primary processors (namely the data interaction comparison between the first-stage CPU and the second-stage CPU in fig. 3 b), and if the data interaction comparison is correct, one primary processor sends the target files to the post-stage processor where the program with the same name as the target file is located and updates and replaces the program with the same name; and if the data interaction is wrong, the primary processor acquires the target file of the peripheral equipment again. The embodiment has the advantages that the target file data in the primary board card are ensured to be correct through data interaction and comparison among a plurality of identical primary processors, and therefore the safety of the target file in the transmission process is improved.

On the basis of the above embodiment, a more preferable embodiment may also be that the first-stage processor (the first-stage CPU in fig. 3 b) simultaneously transmits the target file to the subsequent-stage processor (the first-stage CPU, the second-stage CPU, and the like) and the other one-stage processor (the second-stage CPU); after receiving the target file, the other primary processor (second primary CPU) compares the target file with a target file acquired from an external device, and if the data comparison results are different, sends a signal that the data is wrong to the primary processor (first primary CPU); and after receiving the signal that the data is wrong, the first-stage CPU (the first primary CPU) retransmits the target file to a later-stage processor (a first second-stage CPU, a second-stage CPU and the like) and another first-stage processor (a second first-stage CPU). The method and the device have the advantages that when the primary processor outputs the target file, the accuracy of the target file is checked, errors caused when the target file is processed and transmitted in the primary board card can be avoided, the target file output from the primary board card is guaranteed to be accurate, and therefore the safety and the reliability of the target file in the transmission process in the system are improved.

The present invention also provides an embodiment of a program updating method using the above-mentioned automated multiprocessor program updating system, as shown in fig. 4, including the following steps:

s100: the peripheral establishes communication with the primary board card through a USB cable (of course, other data transmission modes such as serial bus, parallel bus, wireless, etc. may also be used).

S110: the primary processor enters a waiting state; the first processor sends a wait instruction to the later processor to place the later processor in a wait state. If there are multiple post-processors (as in the case of fig. 1a, 1b, 2, 3a, 3 b), then multiple post-processors are all in wait state; of course, there may be only one post-processor, and the one post-processor is in the wait state.

S120: the first-stage processor identifies the names of all target files stored in the peripheral, namely the names of all target files stored in the peripheral are compared with the program names of the first-stage CPU and the subsequent CPU, and can adopt various modes, such as storing a program name index table in the first-stage CPU, completely recording and updating the names of all programs of the first-stage processor and the subsequent processor in real time by the program name index table, and sequentially comparing the target file names with the program names in the program name index table to find the programs with the same name and the processors where the programs with the same name are located, so as to identify whether the target file names in the peripheral are the same as the program names in all the processors; or after the first-level CPU sends a waiting instruction to the second-level CPUs, each second-level CPU returns the own program name to the first-level CPU and sends the waiting instruction to the third-level CPUs, each third-level CPU sends the program name to the first-level CPU through the second-level CPUs after receiving the waiting instruction, and by analogy, the first-level CPUs finally obtain the program names of all the processors and sequentially compare the program names with each target file name stored in the peripheral equipment, so that whether the target file name in the peripheral equipment is the same as the program name in each processor is identified. Other means known in the art may of course be used and the invention should not be limited in this way.

S130: if the first-level processor identifies that the name of a certain target file stored in the peripheral is the same as the name of a certain program of a certain processor of a certain board card, the first-level processor stores the target file of the peripheral in an external memory; otherwise, go to step S150;

s131: for a safety redundancy system (at least two CPUs performing the same function on the same board are respectively called a first primary processor and a second primary processor), as shown in fig. 3b, after receiving a target file, the first primary CPU (i.e., the first primary processor) and the second primary CPU (i.e., the second primary processor) perform data interaction comparison, and if the comparison is passed, the first primary CPU and the second primary CPU transmit data to a processor where a program with the same name is located, and update and replace the program with the same name; otherwise, go to step S130;

s132: when the first-level CPU sends a target file to the second-level board card, the second-level CPU realizes a detection function, and if the data sent by the first-level CPU is detected to be inconsistent with the data stored in the second-level CPU, the second-level CPU informs the first-level CPU to resend the data.

S133: and after receiving the target file, the processor where the program with the same name is located stores the target file in the corresponding storage unit. The non-check bits of the target file in the memory location are checked, such as a CRC cyclic redundancy check, before the processor program is updated. The calculated check value is consistent with the check value stored in the target file, namely the check is passed, and the processor is replaced and updated with the same-name program; otherwise, the target file with the same name is required to be sent again to an upper-level processor or an external device;

s140: after the names of all programs of all processors of all board cards are identified and the programs with the same name are updated, the primary processor obtains a feedback signal, and all processors and board cards recover to work;

s150: the processor which updates the program and the processor which does not update the program send out corresponding prompt signals.

The technical scheme of the invention has the beneficial effects that: in the process of repairing and testing the software BUG and the process of upgrading the equipment software in the operation and maintenance stage, the technical scheme of the invention can burn different programs into corresponding processors which are required to be upgraded on each board card, thereby avoiding the problems of complicated work, large workload, low efficiency, easy error and the like caused by that workers manually burn different processors on each board card on each set of equipment one by one independently, and simultaneously eliminating the potential safety hazard caused by errors generated by manual operation; and the adverse effect of frequent plugging operation on the service life of the board card hardware is also avoided.

In short, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. An automatic multi-processor program updating system is used for train overspeed protection equipment consisting of a plurality of board cards, wherein the plurality of board cards form a hierarchical relationship and comprise a first-stage board card and at least one second-stage board card connected with the first-stage board card; the rear-stage board card directly connected with the first-stage board card is a second-stage board card, and each stage of board card comprises at least one processor and a storage unit; the primary processor on the primary board card is connected with an external device for storing the target file; a secondary processor on the secondary board card is connected with a primary processor on the primary board card; storing a program name index table in a primary processor, wherein the program name index table completely records and updates all program names of the primary processor and a secondary processor thereof in real time;

the primary processor monitors a port of the primary processor, which is connected with an external device, and when the primary processor monitors that the external device is connected with the primary processor, the primary processor enters a waiting state, sends a waiting instruction to the secondary processor to enable the secondary processor to be in the waiting state, and identifies whether the name of a target file stored in the external device is the same as the name of a program of the primary processor and the name of the program in the secondary processor, and the processors to which the programs with the same name belong; acquiring a target file with the same name from an external device, sending the target file to a processor on a board card where a program with the same name as the target file is located, and updating and replacing the program with the same name; after all the programs with the same name are updated and replaced, the processors of each stage recover the working state, and a prompt signal is sent out by the first-stage board card.

2. The automated multiprocessor program update system of claim 1, wherein if the post processor is a last post processor, the post processor enters a wait state after receiving a wait instruction from the first post processor; the post processor receives the target file sent by the pre processor, compares the name of the target file with the name of the program in the post processor, if the names of the target file and the program are the same, the target file with the same name in the peripheral is updated to replace the program with the same name, and after the update is finished, an update finishing instruction is sent to the first processor and a signal is sent to the outside to indicate that the program is finished; after identifying the post processor to which the program with the same name belongs, the first-stage processor directly sends a non-update file instruction to other post processors without programs with the same name, and the post processors without programs with the same name send out non-update signals to the outside;

if the post processor is not the last processor, the post processor enters a waiting state after receiving a waiting instruction sent by the first processor, and sends the waiting instruction to the post processor; the post processor and the post processor receive the target file sent by the pre processor, the name of the target file is compared with the program names of the post processor and the post processor, and if the program with the same name belongs to the post processor and the post processor, the program with the same name is updated and replaced by the target file with the same name; after all the programs with the same name are updated and replaced, an updating completion instruction is sent to a primary processor of the same, and a signal is sent outwards to indicate that the updating of the programs is completed; after identifying the post processor to which the program with the same name belongs, the first-stage processor directly sends a non-update file instruction to other post processors without programs with the same name, and the post processors without programs with the same name send out non-update signals to the outside;

after receiving the update finishing instructions sent by all the post processors needing program updating, the primary processor recovers the working state and sends recovery instructions to all the post processors; and the post-stage processor restores to a normal working state after receiving a restoring instruction sent by the primary processor.

3. The automated multiprocessor program update system of claim 1, wherein the primary processor on the primary board is wirelessly connected to the peripheral device via a wireless receiving unit.

4. The automated multiprocessor program updating system of any one of claims 1 to 3, wherein after the primary processor obtains a target file with the same name from an external device, the target file with the same name is cached in a storage unit of the primary board card and checked, and if the target file with the same name passes the check, the target file with the same name is sent to a secondary processor of a related secondary board card; and if the verification fails, the primary processor of the primary board card requires the peripheral to resend the target file with the same name.

5. The automated multiprocessor program updating system of claim 4, wherein the primary processor acquires a target file with the same name from an external device and sends the target file to a back-level board card where a program with the same name as the target file is located, the back-level processor on the back-level board card caches the target file with the same name to a storage unit of the back-level board card and checks the target file with the same name, and if the target file with the same name passes the check, the target file is updated to replace the program with the same name; and if the verification is not passed, the post-stage processor sends a request to the primary processor to resend the target file with the same name.

6. The automated multiprocessor program update system of claim 5, wherein the primary processor "recognizing whether the target file name stored in the peripheral is the same as the program name of the primary processor and the program name of the subsequent processor" is a program that sequentially compares the target file name with the program names in the program name index table to find the same name;

or after detecting the peripheral equipment, the primary processor sends a command for asking for the name to each post processor, and each post processor returns all program names to the primary processor after receiving the command; the first-stage processor 'identifies whether the target file name stored in the peripheral is the same as the program name of the first-stage processor and the program name of the later-stage processor' is to sequentially compare the target file name with all the program names returned by the later-stage processors to find the program with the same name.

7. The automated multiprocessor program update system of claim 6, wherein the primary board has at least two processors thereon, and data transmission is performed between the at least two processors;

at least one processor on the primary board card is connected with the peripheral; each processor on the first-stage board card is connected with the corresponding rear-stage board card;

monitoring a port of a connection line between a first-stage board card and an external device by at least one processor connected with the external device, when the connection between the external device and the first-stage board card is monitored, sending a waiting instruction to respective post-stage processors to enable the post-stage processors to be in a waiting state, respectively identifying whether a target file name stored in the external device is the same as a program name of the first-stage processor and a program name in the post-stage processors, acquiring a target file with the same name from the external device, sending the target file to a processor where a program with the same name as the target file is located, and updating and replacing the program with the same name; after each processor of the first-level board card updates and replaces the homonym programs in the processor and the respective post processor thereof, after confirming that the processors and the post processors thereof update the homonym programs through data transmission among the processors on the first-level board card, the processors recover the working state, and the first-level board card sends out prompt signals.

8. The automated multiprocessor program update system of claim 6,

the primary board card is provided with at least two identical primary processors, and each identical primary processor on the primary board card is connected with the peripheral; monitoring a port of a connection line between the primary board card and the peripheral by at least one primary processor connected with the peripheral;

after the primary processors identify that the names of target files stored in the peripheral equipment are the same as the names of programs in the post-stage processors of the primary processors, the primary processors on the primary board card respectively collect the same target files sent by the peripheral equipment, the primary processors carry out data interaction comparison on the target files pairwise, and if the data interaction comparison is correct, one primary processor sends the target files to the post-stage processor where the program with the same name as the target file is located and updates and replaces the program with the same name; and if the data interaction is wrong, the primary processor acquires the target file of the peripheral equipment again.

9. The automated multiprocessor program update system of claim 8,

the first-stage processor simultaneously sends a target file to the later-stage processor and the other first-stage processor; after receiving the target file, the other primary processor compares the target file with a target file acquired from an external device, and if the data comparison results are different, sends a signal that the data is wrong to the primary processor; and after receiving the signal that the data is wrong, the first-stage processor retransmits the target file to the later-stage processor and the other first-stage processor simultaneously.

10. A program update method applying the automated multiprocessor program update system of claim 8 or 9, comprising the steps of:

s100: the peripheral establishes communication with the primary board card;

s110: the primary processor enters a waiting state; the first processor sends a wait instruction to the second processor to place the second processor in a wait state,

s120: the primary processor identifies the name of each target file stored by the peripheral equipment;

s130: if the first-level processor identifies that the name of a certain target file stored in the peripheral is the same as the name of a certain program of a certain processor of a certain board card, the first-level processor stores the target file of the peripheral in an external memory; otherwise, go to step S150;

s131: at least two identical primary processors on the primary board card are respectively called a first primary processor and a second primary processor, the first primary processor and the second primary processor perform data interaction comparison after receiving the target file respectively, and if the comparison is passed, the first primary processor and the second primary processor send the target file to the processor where the same-name program is located, and the same-name program is updated and replaced; otherwise, go to step S130;

s132: when the first primary processor sends a target file to the secondary board card, the second primary processor realizes a detection function, and if the data sent by the first primary processor is detected to be inconsistent with the data stored by the second primary processor, the second primary processor informs the first primary processor to resend the data;

s133: after receiving the target file, the processor where the program with the same name is located stores the target file in a corresponding storage unit; before updating the processor program, checking the non-check bit of the target file in the storage unit; if the calculated check value is consistent with the check value stored in the target file, the check is considered to be passed, and the processor is replaced and updated with the same-name program; otherwise, the target file with the same name is required to be sent again to an upper-level processor or an external device;

s140: after the names of all programs of all processors of all board cards are identified and the programs with the same name are updated, the primary processor obtains a feedback signal, and all processors and board cards recover to work;

s150: and the processor updating the program and the processor not updated all send out corresponding prompt signals.

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