CN107547068B - Square wave signal generating circuit - Google Patents
Square wave signal generating circuit Download PDFInfo
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- CN107547068B CN107547068B CN201610490296.9A CN201610490296A CN107547068B CN 107547068 B CN107547068 B CN 107547068B CN 201610490296 A CN201610490296 A CN 201610490296A CN 107547068 B CN107547068 B CN 107547068B
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Abstract
The invention provides a square wave signal generating circuit, which comprises: the circuit comprises a current source, two capacitors, a plurality of switches, a two-way selector, a comparator and a D trigger, wherein the input of the two-way selector is connected to the current source and the capacitors based on the switching states of the switches, the output of the two-way selector is connected to the input of the comparator, and the output of the comparator is connected to the input of the D trigger. The square wave signal generating circuit provided by the invention uses double-capacitor matching to replace double-current-source matching of the traditional square wave signal generating circuit, thereby avoiding the problem that double current sources are difficult to match; in addition, because a single comparator is used in the circuit, the problem of overhigh power consumption caused by using double comparators in the traditional square wave signal generating circuit is well solved.
Description
Technical Field
The invention relates to the technical field of signal generation circuit design, in particular to a square wave signal generation circuit.
Background
The square wave signal generating circuit is a basic circuit in the field of circuit design, is a circuit for generating a signal which jumps between a high level and a low level according to a certain period and rule, and has the characteristics of simple structure, stable performance, low manufacturing cost and the like. Since the square wave signal generating circuit is widely applied, it is of great significance to improve the structure and performance of the square wave signal generating circuit.
The current common square wave signal generating circuit usually comprises a dual current source and two comparators. Due to the requirement of perfect matching between the two current sources, high demands are placed on circuit design and process manufacturing. In addition, the power consumption of the circuit is higher due to the use of two comparators.
Disclosure of Invention
In view of the deficiencies of the prior art, the present invention provides a square wave signal generating circuit, comprising: the circuit comprises a current source, two capacitors, a plurality of switches, a two-way selector, a comparator and a D trigger, wherein the input of the two-way selector is connected to the current source and the capacitors based on the switching states of the switches, the output of the two-way selector is connected to the input of the comparator, and the output of the comparator is connected to the input of the D trigger.
In one embodiment of the present invention, the period of the square wave generated by the square wave signal generating circuit depends on the size of the current source.
In one embodiment of the present invention, the current source is an adjustable current source to generate square waves with different periods according to requirements.
In one embodiment of the invention, the square wave signal generating circuit comprises two current sources, which do not need to be matched.
In one embodiment of the invention, the duty cycle of the square wave generated by the square wave signal generating circuit is dependent on the relative sizes of the two capacitors.
In one embodiment of the invention, two or either of the two capacitors are adjustable capacitors to generate square waves with different duty ratios according to requirements.
In one embodiment of the present invention, the square wave signal generating circuit further comprises an inverter, an output of the D flip-flop is connected to an input of the inverter, and an output of the inverter is fed back to the D flip-flop.
In one embodiment of the invention, the output of the inverter is further connected to the current source and/or the capacitor based on the open and closed states of the plurality of switches.
In one embodiment of the invention, a predetermined threshold voltage is input to the other input terminal of the comparator.
The square wave signal generating circuit provided by the invention uses double-capacitor matching to replace double-current-source matching of the traditional square wave signal generating circuit, thereby avoiding the problem that double current sources are difficult to match; in addition, because a single comparator is used in the circuit, the problem of overhigh power consumption caused by using double comparators in the traditional square wave signal generating circuit is well solved.
Drawings
The following drawings of the invention are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
In the drawings:
fig. 1 shows an exemplary structural schematic diagram of a conventional square wave signal generating circuit;
fig. 2 shows an exemplary configuration diagram of a square wave signal generating circuit according to an embodiment of the present invention; and
fig. 3 shows waveforms of signals at respective terminals of the square wave signal generating circuit of the embodiment of the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In order to provide a thorough understanding of the present invention, detailed steps and detailed structures will be set forth in the following description in order to explain the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
A square wave is a non-sinusoidal waveform that is commonly found in the electronics field and signal processing, and is a control signal for many electronic systems. The square waves are substantially the same, except that the amplitude, period, and duty cycle of the square waves differ depending on the particular application.
A conventional square wave signal generating circuit is generally shown in fig. 1, and fig. 1 shows an exemplary structure diagram of a conventional square wave signal generating circuit 100. As shown in fig. 1, the square wave signal generating circuit 100 is connected to a dc power supply VDD, and includes two current sources, a capacitor C, two comparators a, an RS flip-flop, and two switches. In the square wave signal generating circuit 100, since perfect matching is required between the two current sources, high requirements are imposed on the circuit design and the process manufacturing. In addition, the power consumption of the circuit is higher due to the use of two comparators.
In order to overcome the above problems, the present invention provides a square wave signal generating circuit, which includes a current source, two capacitors, a plurality of switches, a two-way selector, a comparator, and a D flip-flop. The input of the two-way selector is connected to the current source and the capacitor based on the on-off states of the switches, the output of the two-way selector is connected to the input of the comparator, the output of the comparator is connected to the input of the D trigger, and the output of the D trigger is the square wave which is expected to be generated finally by the square wave signal generating circuit.
The square wave signal generating circuit provided by the invention uses double-capacitor matching to replace double-current-source matching of the traditional square wave signal generating circuit, so that the problem that double current sources are difficult to match can be avoided; in addition, because only one comparator is used in the square wave signal generating circuit provided by the invention, the problem of overhigh power consumption caused by using double comparators in the traditional square wave signal generating circuit can be well improved.
The period of the square wave generated by the square wave signal generating circuit according to the embodiment of the present invention depends on the size of the current source. In one embodiment, the current source included in the square wave signal generating circuit is an adjustable current source. In this way, the magnitude of the current source can be adjusted as required to generate square waves of different periods. Illustratively, the square wave signal generating circuit may include two current sources that need not be matched because the circuit uses dual capacitance matching, thereby reducing the requirements for circuit design and process manufacturing.
The duty cycle of the square wave generated by the square wave signal generating circuit according to the embodiment of the invention depends on the relative sizes of the two capacitors. In one embodiment, both capacitors included in the square wave signal generating circuit may be adjustable capacitors. In this way, the relative size of the two capacitors can be adjusted as required to generate square waves of different duty cycles. In another example, only one of the two capacitors included in the square wave signal generating circuit may be an adjustable capacitor, and thus, the size of the capacitor may also be adjusted as required to adjust the relative sizes of the two capacitors, so as to generate a square wave with a desired duty ratio.
The square wave signal generating circuit according to the embodiment of the present invention may further include an inverter having an input connected to an output of the D flip-flop, and an output of the inverter is fed back to the D flip-flop. Further, the output of the inverter may be fed back to the input of the entire square wave signal generating circuit. In particular, the output of the inverter may be connected to a current source and/or a capacitor based on the open and closed states of a plurality of switches.
According to the embodiment of the invention, one input end of the comparator is connected with the output of the two-way selector, and the other input end can input the preset threshold voltage. The predetermined threshold voltage may be set as desired.
A square wave signal generating circuit according to the present invention is described below according to a specific example with reference to fig. 2. Fig. 2 shows an exemplary structure diagram of a square wave signal generating circuit 200 according to an embodiment of the present invention.
As shown in fig. 2, the square wave signal generating circuit 200 is connected to a dc power supply VDD, and includes current sources I1 and I2, capacitors C1 and C2, a two-way selector D1, a comparator a1, a D flip-flop DFF, an inverter INV1, and a number of switches (four switches S1, S2, S3, and S4 are shown in fig. 2, but they are merely an example, and any number of switches may be provided as needed).
The two input terminals 0 and 1 of the two-way selector D1 respectively input a signal a (the voltage-time waveform diagram of which is shown in fig. 3) and a signal B (the voltage-time waveform diagram of which is shown in fig. 3), which are different based on the difference of the open/close states of the switches S1, S2, S3 and S4. The inputs of the two-way selector may be selectively connected to current sources I1 and I2 and capacitors C1 and C2 based on the open and closed states of switches S1, S2, S3, and S4.
The signal X (the voltage-time waveform diagram of which is shown in fig. 3) at the output of the two-way selector D1 is input to one input of the comparator a1 (shown as a positive input in fig. 2, for example), and the other input of the comparator a1 (shown as a negative input in fig. 2, for example) may be input with a predetermined threshold voltage Vtr. The threshold voltage Vtr can be set according to requirements.
The output signal Y of the comparator a1 (the voltage-time waveform of which is shown in fig. 3) is input to the D flip-flop DFF, and the signal Q at the output of the DFF flip-flop (the voltage-time waveform of which is shown in fig. 3) is used as the output of the square wave generating signal circuit 200, i.e. the square wave which the square wave generating signal circuit 200 is finally expected to generate.
In addition, the signal Q at the output of the DFF flip-flop is also used as an input of the inverter INV1, and the signal Y at the output of the inverter INV1 is fed back to the D flip-flop DFF and to the input of the whole square wave generating signal circuit 200, for example, connected to the current sources I1, I2 or the capacitors C1, C2 through the on and off states of the switches S1, S2, S3 and S4.
The square wave signal generating circuit 200 according to the embodiment of the present invention generates a square wave signal through a comparator (comparator) and a DFF logic by using a curve characteristic of charging and discharging a capacitor by a current source.
The period of the square wave generated by the square wave generating circuit 200 depends on the current sources I1 and I2. In one embodiment, two or any of the current sources I1, I2 included in the square wave signal generating circuit 200 are adjustable current sources. In this way, the current sources I1, I2 can be adjusted in size as required to generate square waves of different periods. In addition, since the square wave generating signal circuit 200 uses the matching of the double capacitors C1 and C2, the two current sources I1 and I2 do not need to be matched, thereby reducing the requirements on circuit design and process manufacturing.
Further, the duty cycle of the square wave generated by the square wave signal generating circuit 200 depends on the relative sizes of the two capacitors C1 and C2. In one embodiment, the two capacitors C1 and C2 included in the square wave signal generating circuit 200 may be both adjustable capacitors. In this way, the relative sizes of the two capacitors C1 and C2 can be adjusted as needed to produce square waves of different duty cycles. In another example, only one of the two capacitors C1 and C2 (e.g., C1 or C2) included in the square wave signal generating circuit 200 may be an adjustable capacitor, and thus, the size of the adjustable capacitor may be adjusted according to the requirement to adjust the relative sizes of the two capacitors C1 and C2, so as to generate a square wave with a desired duty ratio.
The square wave signal generating circuit according to the embodiment of the invention adopts a double-capacitor structure, the advantage of better capacitor matching is fully utilized, and the problem that double current sources of the traditional square wave generating circuit need to be matched is avoided; in addition, because a single comparator is used, power consumption is greatly reduced compared with a dual comparator used in a conventional square wave circuit. In addition, the square wave signal generating circuit according to the embodiment of the invention has the advantages of simple structure, stable performance and easy control of period and duty ratio.
Although the foregoing example embodiments have been described with reference to the accompanying drawings, it is to be understood that the foregoing example embodiments are merely illustrative and are not intended to limit the scope of the invention thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present invention. All such changes and modifications are intended to be included within the scope of the present invention as set forth in the appended claims.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the description provided herein, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the invention and aiding in the understanding of one or more of the various inventive aspects. However, the method of the present invention should not be construed to reflect the intent: that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
It will be understood by those skilled in the art that all of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where such features are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features included in other embodiments, rather than other features, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.
The above description is only for the specific embodiment of the present invention or the description thereof, and the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and the changes or substitutions should be covered within the protection scope of the present invention. The protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (7)
1. A square wave signal generating circuit, comprising: a current source, two capacitors, a plurality of switches, a two-way selector, a comparator and a D flip-flop, wherein an input of the two-way selector is connected to the current source and the capacitors based on an open-closed state of the plurality of switches, an output of the two-way selector is connected to an input of the comparator, and an output of the comparator is connected to an input of the D flip-flop; the square wave signal generating circuit further comprises an inverter, an output of the D flip-flop is connected to an input of the inverter, an output of the inverter is fed back to the D flip-flop, and an output of the inverter is further connected to the current source and/or the capacitor based on an on-off state of the plurality of switches.
2. The square wave signal generating circuit of claim 1, wherein a period of the square wave generated by the square wave signal generating circuit depends on a magnitude of the current source.
3. The square wave signal generating circuit of claim 2, wherein the current source is an adjustable current source to generate square waves of different periods according to requirements.
4. The square wave signal generating circuit of claim 2, wherein the square wave signal generating circuit comprises two current sources, the two current sources not being matched.
5. The square wave signal generating circuit of claim 1, wherein a duty cycle of the square wave generated by the square wave signal generating circuit is dependent on a relative size of the two capacitors.
6. The square wave signal generating circuit of claim 5, wherein two or either of the two capacitors are adjustable capacitors to generate square waves with different duty ratios according to requirements.
7. The square wave signal generation circuit according to any one of claims 1 to 6, wherein a predetermined threshold voltage is input to the other input terminal of the comparator.
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| CN201610490296.9A CN107547068B (en) | 2016-06-29 | 2016-06-29 | Square wave signal generating circuit |
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| CN201610490296.9A CN107547068B (en) | 2016-06-29 | 2016-06-29 | Square wave signal generating circuit |
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| CN107547068B true CN107547068B (en) | 2020-10-02 |
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| CN110739937B (en) * | 2019-10-22 | 2022-11-08 | 华中科技大学 | Switch type square wave generator adopting parallel reference voltage source |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102594299A (en) * | 2012-02-03 | 2012-07-18 | 深圳创维－Rgb电子有限公司 | Square-wave generator circuit |
| CN202713251U (en) * | 2012-07-05 | 2013-01-30 | 深圳市蓝海华腾技术有限公司 | Controllable square-wave signal generator |
| CN103312298A (en) * | 2013-07-05 | 2013-09-18 | 东南大学 | Relaxation oscillator for increasing frequency-control current linearity |
| CN104901652A (en) * | 2015-06-24 | 2015-09-09 | 深圳市富满电子集团股份有限公司 | Oscillator circuit precisely controlled in duty ratio |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1848683B (en) * | 2005-04-15 | 2010-05-05 | 鸿富锦精密工业（深圳）有限公司 | Trianglar-wave generator and pulse-width modulation signal generating circuit containing the same |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102594299A (en) * | 2012-02-03 | 2012-07-18 | 深圳创维－Rgb电子有限公司 | Square-wave generator circuit |
| CN202713251U (en) * | 2012-07-05 | 2013-01-30 | 深圳市蓝海华腾技术有限公司 | Controllable square-wave signal generator |
| CN103312298A (en) * | 2013-07-05 | 2013-09-18 | 东南大学 | Relaxation oscillator for increasing frequency-control current linearity |
| CN104901652A (en) * | 2015-06-24 | 2015-09-09 | 深圳市富满电子集团股份有限公司 | Oscillator circuit precisely controlled in duty ratio |
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