CN107546112B - SiC ohmic contact structure and manufacturing method thereof - Google Patents

SiC ohmic contact structure and manufacturing method thereof Download PDF

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CN107546112B
CN107546112B CN201710583808.0A CN201710583808A CN107546112B CN 107546112 B CN107546112 B CN 107546112B CN 201710583808 A CN201710583808 A CN 201710583808A CN 107546112 B CN107546112 B CN 107546112B
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magnetron sputtering
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张艺蒙
李彦良
张玉明
宋庆文
汤晓燕
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Xian University of Electronic Science and Technology
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Abstract

The invention relates to a SiC ohmic contact structure and a manufacturing method thereof, comprising the following steps: manufacturing a SiC substrate; depositing a first Ni layer, a Ti layer, a second Ni layer and TaSi on the surface of the substrate in sequence2A layer and a Pt layer; and annealing to finish the manufacture of the SiC ohmic contact structure. The SiC ohmic contact provided by the invention improves the thermal stability and oxidation resistance of the ohmic contact.

Description

SiC ohmic contact structure and manufacturing method thereof
Technical Field
The invention belongs to the field of manufacturing of silicon carbide devices, and particularly relates to a SiC ohmic contact structure and a manufacturing method thereof.
Background
Compared with the traditional germanium and silicon materials, the third generation wide band gap semiconductor silicon carbide mainly has the following advantages: the electric field bearing capacity is about ten times of that of silicon material, the forbidden band width is about three times of that of silicon material, and the heat conductivity is about three times of that of silicon material. The above material characteristics make it exhibit incomparable advantages over conventional silicon-based devices under conditions of extreme temperature (especially high temperature) and large voltage, high frequency and power, and strong radiation.
The ohmic contact is one of the key influencing factors of the silicon carbide device applied to extreme environments such as high temperature, easy oxidation and the like, and aims to realize that the electrode can bear the smallest possible voltage drop when forward voltage is applied, so as to ensure the performance of the device. If the ohmic contact degrades or fails, it will affect the on-resistance of the device, and in severe cases, the device performance, or even the device failure. Therefore, it is necessary to design an ohmic contact electrode with good thermal stability and oxidation resistance.
At present, the silicon carbide ohmic contact metal or alloy layer has the problems of weak oxidation resistance and oxidation resistance in air; poor thermal stability, degradation or failure at high temperatures; the defects of low hardness, easy mechanical damage and the like can reduce the reliability of the ohmic contact electrode, seriously limit the application environment and range thereof, and further influence and limit the application range and reliability of the silicon carbide device.
Disclosure of Invention
In view of the above background, the present invention is directed to a high temperature resistant and oxidation resistant ohmic contact structure and a method for fabricating the same.
In one aspect, the invention provides a method for manufacturing a SiC ohmic contact structure, comprising:
(a) manufacturing a SiC substrate;
(b) depositing a first Ni layer, a Ti layer, a second Ni layer and TaSi on the surface of the substrate in sequence2A layer and a Pt layer;
(c) and carrying out first annealing treatment to finish the manufacture of the SiC ohmic contact structure.
In one embodiment of the present invention, the step (a) may comprise:
(a1) selecting a 4H-SiC substrate and carrying out standard RCA cleaning on the 4H-SiC substrate;
(a2) depositing an oxide layer with the thickness of 100nm on the surface of the 4H-SiC substrate by utilizing a Plasma Enhanced Chemical Vapor Deposition (PECVD) process;
(a3) etching the oxide layer to form an ion implantation window, and performing N on the surface of the 4H-SiC substrate by using an ion implantation process+、P+Forming an N-type doped region and a P-type doped region by ion implantation;
(a4) and etching the rest oxide layer, and performing second annealing treatment.
In one embodiment of the present invention, the doping source of the N-type doped region in the step (a3) is Al, and the doping concentration is 1.0 × 1020cm-3(ii) a The doping source of the P-type doping region is N, and the doping concentration is 3.0 multiplied by 1020cm-3
In one embodiment of the present invention, the temperature of the second annealing treatment in the step (a4) is 1700 ℃, and the annealing time is 30 min.
In one embodiment of the present invention, the step (b) may comprise:
(b1) depositing the first Ni layer on the surface of the substrate by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 9.8 nm/min;
(b2) depositing the Ti layer on the surface of the first Ni layer by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 2.9 nm/min;
(b3) depositing the second Ni layer on the surface of the Ti layer by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 9.8 nm/min;
(b4) depositing the TaSi on the surface of the second Ni layer by utilizing a radio frequency magnetron sputtering process2A layer; the deposition power of the radio frequency magnetron sputtering process is 60W, and the deposition rate is 2.9 nm/min;
(b5) using a direct current magnetron sputtering process to deposit the TaSi2Depositing the Pt layer on the surface of the layer; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 2.9 nm/min.
In one embodiment of the invention, the vacuum degree in the cavity of the magnetron sputtering cavity is less than or equal to 5e during deposition-6mTorr。
In one embodiment of the invention, the first Ni layer has a thickness of 30nm, the Ti layer has a thickness of 100nm, the second Ni layer has a thickness of 30nm, the TaSi layer2The layer thickness was 300nm and the Pt layer thickness was 200 nm.
In one embodiment of the present invention, the annealing temperature in the first annealing process in the step (c) is 975 ℃ and the annealing time is 2 min.
In yet another aspect, the present invention provides a SiC ohmic contact structure, including: a SiC substrate, and a first Ni layer, a Ti layer, a second Ni layer, and TaSi sequentially arranged on the SiC substrate2A layer and a Pt layer.
Compared with the prior art, the invention provides a method for utilizing Pt/TaSi2The structure improves the thermal stability and the oxidation resistance of ohmic contact; not only exhibited good I-V characteristics under 500 ℃ conditions in air, but also exhibited no degradation after 300h of 500 ℃ aging test.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a flow chart of a SiC ohmic contact process provided by an embodiment of the invention;
FIG. 2 is an XRD elemental diagram before and after annealing of a Pt/Ti/SiC structure provided by an embodiment of the present invention;
FIG. 3 is a scanning electron microscope image of a surface of a device after annealing according to an embodiment of the present invention;
FIG. 4 shows a Pt/TaSi layer according to an embodiment of the present invention2XRD element diagrams before and after annealing of a/Ni/Ti/Ni/SiC structure;
FIG. 5 shows a Pt/TaSi layer according to an embodiment of the present invention2I-V plot after 975 ℃ annealing of N, P type ohmic contacts for a/Ni/Ti/Ni/SiC, Ti/Pt structure;
FIG. 6 shows a Pt/TaSi layer according to an embodiment of the present invention2A curve chart of the characteristic on-resistance of N, P type ohmic contact of a/Ni/Ti/Ni/SiC and Ti/Pt structure along with aging time;
fig. 7 is a layout of a CTLM structure provided in an embodiment of the present invention;
FIG. 8 is a microscope photograph of a metal structure after lift-off according to an embodiment of the present invention; and
FIG. 9 is a cross-sectional view of a SiC ohmic contact structure according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
Referring to fig. 1, fig. 1 is a flow chart of a SiC ohmic contact process provided in an embodiment of the present invention, including:
(a) manufacturing a SiC substrate;
(b) depositing a first Ni layer, a Ti layer, a second Ni layer and TaSi on the surface of the substrate in sequence2A layer and a Pt layer;
(c) and carrying out first annealing treatment to finish the manufacture of the SiC ohmic contact structure.
Preferably, step (a) may comprise:
(a1) selecting a 4H-SiC substrate and carrying out standard RCA cleaning on the 4H-SiC substrate;
(a2) depositing an oxide layer with the thickness of 100nm on the surface of the 4H-SiC substrate by utilizing a PECVD process;
(a3) etching the oxide layer to form an ion implantation window, and performing N on the surface of the 4H-SiC substrate by using an ion implantation process+、P+Forming an N-type doped region and a P-type doped region by ion implantation;
(a4) and etching the rest oxide layer, and performing second annealing treatment.
Wherein the doping source of the N-type doping region in the step (a3) is Al, and the doping concentration is 1.0 × 1020cm-3(ii) a The doping source of the P-type doping region is N, and the doping concentration is 3.0 multiplied by 1020cm-3
Further, the temperature of the second annealing treatment in the step (a4) is 1700 ℃, and the annealing time is 30 min.
Preferably, step (b) may comprise:
(b1) depositing the first Ni layer on the surface of the substrate by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 9.8 nm/min;
(b2) depositing the Ti layer on the surface of the first Ni layer by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 2.9 nm/min;
(b3) depositing the second Ni layer on the surface of the Ti layer by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 9.8 nm/min;
(b4) depositing the TaSi on the surface of the second Ni layer by utilizing a radio frequency magnetron sputtering process2A layer; the deposition power of the radio frequency magnetron sputtering process is 60W, and the deposition rate is 2.9 nm/min;
(b5) using a direct current magnetron sputtering process to deposit the TaSi2Depositing the Pt layer on the surface of the layer; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 2.9 nm/min.
Wherein the degree of vacuum in the cavity of the magnetron sputtering cavity during deposition in the step (b) is less than or equal to 5e-6mTorr。
Preferably, the thickness of the first Ni layer is 30nm, the thickness of the Ti layer is 100nm, the thickness of the second Ni layer is 30nm, and the TaSi layer is formed2The layer thickness was 300nm and the Pt layer thickness was 200 nm.
Preferably, the annealing temperature in the first annealing process in step (c) is 975 ℃ and the annealing time is 2 min.
Wherein the first Ni layer reacts with SiC, and the Ti layer can combine with C generated by the reaction of Ni and SiC, so as to prevent free C atoms from gathering on the surface to roughen the surface or fail the surface. As shown in fig. 2, fig. 2 is an XRD elemental diagram before and after annealing of the Pt/Ti/SiC structure provided by the embodiment of the present invention, the proportion of Ti after annealing is significantly reduced, and the proportion of TiC alloy is significantly increased.
The second Ni layer is used as Ti layer and TaSi layer2The adhesion layer between the layers can effectively reduce the annealing temperature so as to simultaneously carry out N/P type annealing, and simultaneously can improve the appearance of the contact surface; as shown in FIG. 3, FIG. 3 is a schematic diagram of an embodiment of the present inventionA scanning electron microscope image of the device surface after annealing shows that the Ni layer also acts as a barrier to the upward diffusion of Ti.
Further, TaSi2The layer is the key for preventing the ohmic contact electrode from being oxidized, can effectively prevent O from diffusing downwards, and TaSi is obtained after the annealing condition of 300h in the air at the temperature of 500 DEG C2The proportion of O below the layer did not increase, indicating that TaSi2The barrier effect of the layer against O is significant. In addition to this, TaSi2The exponential form of decomposition allows the structure to be effective for extended periods of time, thus allowing the structure to be exposed to air for aging tests. As shown in FIG. 4, FIG. 4 is a Pt/TaSi substrate according to an embodiment of the present invention2XRD element patterns before and after annealing of the structure of/Ni/Ti/Ni/SiC, each element basically keeps the original alloy structure, namely TaSi2The slow decomposition of (a) allows the structure of each metal layer to remain substantially unchanged.
The pure Ni/Pt and Ti/Pt structures in the invention can be out of work in a short time under the high-temperature air environment. Ni/TaSi2/Pt、Ti/TaSi2the/Pt structure makes it difficult to form a good P-type ohmic contact electrode. Pt/TaSi2the/Ni/Ti/Ni/SiC structure simultaneously realizes the ohmic contact characteristic on N, P substrates, compared with the Ti/Pt structure with excellent performance in a vacuum or inert range, the characteristics are shown in FIG. 5, and FIG. 5 shows a Pt/TaSi structure provided by the embodiment of the invention2I-V plot after 975 ℃ annealing of N, P type ohmic contacts for a/Ni/Ti/Ni/SiC, Ti/Pt structure; the ohmic contact characteristics are good. The structure is subjected to high-temperature and aging tests in air, and does not seriously degrade after 300 hours. Meanwhile, as shown in FIG. 6, FIG. 6 is a Pt/TaSi substrate according to an embodiment of the present invention2A curve chart of the characteristic on-resistance of N, P type ohmic contact of a/Ni/Ti/Ni/SiC and Ti/Pt structure along with aging time; the characteristic on-resistance was measured at room temperature and at a high temperature of 500 ℃ in comparison with the Ti/Pt structure. I.e. Pt/TaSi2the/Ni/Ti/Ni/SiC has good performance under high temperature and aging conditions, and has great advantages compared with the rest structures.
Example two
The invention provides a method for utilizing Pt/TaSi2The method for manufacturing the SiC ohmic contact by the structure of/Ni/Ti/Ni/SiC comprises the following steps:
s201, selecting a 4H-SiC substrate, and carrying out standard RCA cleaning on the 4H-SiC substrate;
s202, depositing the film with the thickness of 100nmSiO on the 4H-SiC substrate by utilizing a PECVD process2An oxide layer;
s203, etching the oxide layer to form an ion implantation window, and carrying out ion implantation on the 4H-SiC substrate N+Or P+Ion implantation is carried out, a highly doped N region or P region is formed, and high-temperature annealing is carried out;
s204, etching the residual oxide layer;
s205, depositing a metal layer on the 4H-SiC substrate, wherein the metal layer sequentially comprises a first Ni layer, a Ti layer, a second Ni layer and TaSi from bottom to top2A layer and a Pt layer;
and S206, rapidly annealing to form ohmic contact.
Preferably, the doping source of the N-type doped region in step S203 is Al, and the doping concentration is 1.0 × 1020cm-3(ii) a The doping source of the P-type doping region is N, and the doping concentration is 3.0 multiplied by 1020cm-3. The high temperature annealing is carried out at 1700 ℃ for 30 min.
Preferably, in step S205, in the deposition method, the first Ni layer, the Ti layer, the second Ni layer, and the Pt layer are deposited by dc magnetron sputtering; TaSi2The layer is deposited by radio frequency magnetron sputtering;
the deposition power of the first Ni layer, the Ti layer, the second Ni layer and the Pt layer is 100W; TaSi2The deposition power of the layer is 60W;
ti layer, TaSi2The deposition rates of the layer and the Pt layer are 2.9nm/min, and the deposition rates of the first Ni layer and the second Ni layer are 9.8 nm/min; the vacuum degree in the cavity is less than or equal to 5e during deposition-6mTorr;
The flow rate of the deposition gas of the first Ni layer and the second Ni layer is 24Ar/sccm, the flow rate of the deposition gas of the Ti layer and the Pt layer is 16Ar/sccm, and TaSi is added2The deposition gas flow rate of the layer was 20 Ar/sccm.
Further, the first Ni layer was 30nm thick, the Ti layer was 100nm thick, the second Ni layer was 30nm thick, TaSi was used2Layer thickness of 300 aThe nm and Pt layer thicknesses were 200 nm.
The method for performing the performance test on the ohmic contact structure in the embodiment is as follows:
the method comprises the following steps: selecting a 4H-SiC substrate, and carrying out standard RCA cleaning on the 4H-SiC substrate;
step two: depositing the film with the thickness of 100nmSiO on a 4H-SiC substrate by using a PECVD process2An oxide layer;
step three: etching the oxide layer to form an ion implantation window for the 4H-SiC substrate N+Or P+Ion implantation is carried out, a highly doped N region or P region is formed, and high-temperature annealing is carried out;
step four: and photoetching by using a mask plate to form a CTLM (computer-to-film transistor) pattern, removing the primer, and removing the natural oxide layer and other impurities by using HF (hydrogen fluoride).
Further, a CTLM graph formed in step four is shown in fig. 7, and fig. 7 is a layout of a CTLM structure provided in the embodiment of the present invention;
preferably, the ratio of HF in the fourth step is HF: h2O is 1: 20. soaking in HF for 2min, and washing with clear water to remove HF solution, N2And (5) drying.
Step five: depositing a first Ni layer, a Ti layer, a second Ni layer and TaSi on the SiC material in sequence2A layer and a Pt layer;
step six: and forming an ohmic contact structure by metal stripping and rapid annealing and carrying out performance test on the ohmic contact structure.
Further, the metal stripping in the sixth step comprises the following specific steps: and soaking the whole substrate material comprising the 4H-SiC substrate and the metal layer in acetone for about 10 hours until the metal layer on the photoresist layer is tilted, and then carrying out ultrasonic treatment for about 3 minutes until the tilted metal completely falls off. As shown in fig. 8, fig. 8 is a microscope photograph of a metal structure after peeling according to an embodiment of the present invention; the metal rings were observed under a microscope to be free from sticking. The annealing condition is that the temperature is 975 ℃, and the annealing time is 2min in the protective atmosphere of inert gas.
The invention utilizes Pt/TaSi2And manufacturing SiC ohmic contact by the structure of/Ni/Ti/Ni/SiC. First, Ni reacts with SiC. The Ti layer can be bonded with Ni and SiC is generated by the reaction of C, so that free C atoms are prevented from being accumulated on the surface, and the surface is rough or invalid. After annealing, the proportion of Ti is obviously reduced, and the proportion of TiC alloy is obviously increased. The second Ni layer is used as Ti metal layer and TaSi2The adhesion layer between the metal layers can effectively reduce the annealing temperature so as to simultaneously carry out N/P type annealing, simultaneously improve the appearance of the contact surface, and the nickel layer also plays a role in blocking the upward diffusion of Ti. TaSi2The layer is the key for preventing the ohmic contact electrode from being oxidized, can effectively prevent O from diffusing downwards, and TaSi passes 300h aging test2The proportion of O below the layer did not increase, indicating that TaSi2The barrier effect of the layer against O is significant.
EXAMPLE III
Referring to fig. 9, fig. 9 is a cross-sectional view of a SiC ohmic contact structure according to an embodiment of the invention; the SiC ohmic contact structure includes: a SiC substrate 1, and a first Ni layer 2, a Ti layer 3, a second Ni layer 4, TaSi provided in this order on the SiC substrate2Layer 5 and Pt layer 6.
In summary, the principle and embodiments of the present invention are described herein by using specific examples, and the above descriptions of the examples are only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention, and the scope of the present invention should be subject to the appended claims.

Claims (8)

1. A method for manufacturing a SiC ohmic contact structure is characterized by comprising the following steps:
(a) manufacturing a SiC substrate; the method comprises the following steps:
(a1) selecting a 4H-SiC substrate and carrying out standard RCA cleaning on the 4H-SiC substrate;
(a2) depositing an oxide layer with the thickness of 100nm on the surface of the 4H-SiC substrate by utilizing a PECVD process;
(a3) etching the oxide layer to form an ion implantation window, and performing N + and P + ion implantation on the surface of the 4H-SiC substrate by using an ion implantation process to form an N-type doped region and a P-type doped region;
(a4) etching the rest oxide layer, and carrying out second annealing treatment;
(b) photoetching the surface of the substrate by using a mask plate to form a CTLM pattern; depositing a first Ni layer, a Ti layer, a second Ni layer and TaSi on the surface of the substrate in sequence2A layer and a Pt layer; the first Ni layer, the Ti layer and the second Ni layer are deposited by adopting a direct-current magnetron sputtering process;
(c) and carrying out first annealing treatment to finish the manufacture of the SiC ohmic contact structure.
2. The method of claim 1, wherein the doping source of the N-type doped region in step (a3) is Al with a doping concentration of 1.0 x 1020cm-3(ii) a The doping source of the P-type doping region is N, and the doping concentration is 3.0 multiplied by 1020cm-3
3. The method of claim 1, wherein the second annealing in step (a4) is performed at 1700 ℃ for 30 min.
4. The method of claim 1, wherein the step (b) of sequentially depositing a first Ni layer, a Ti layer, a second Ni layer, a TaSi2 layer, and a Pt layer on the surface of the substrate comprises:
(b1) depositing the first Ni layer on the surface of the substrate by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 9.8 nm/min;
(b2) depositing the Ti layer on the surface of the first Ni layer by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 2.9 nm/min;
(b3) depositing the second Ni layer on the surface of the Ti layer by using a direct-current magnetron sputtering process; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 9.8 nm/min;
(b4) using radio frequency magnetron sputteringA shooting process, depositing the TaSi on the surface of the second Ni layer2A layer; the deposition power of the radio frequency magnetron sputtering process is 60W, and the deposition rate is 2.9 nm/min;
(b5) using a direct current magnetron sputtering process to deposit the TaSi2Depositing the Pt layer on the surface of the layer; the deposition power of the direct-current magnetron sputtering process is 100W, and the deposition rate is 2.9 nm/min.
5. The method as claimed in claim 4, wherein the degree of vacuum in the magnetron sputtering chamber during deposition is less than or equal to 5e-6mTorr。
6. The method according to claim 1 or 4, wherein the first Ni layer has a thickness of 30nm, the Ti layer has a thickness of 100nm, the second Ni layer has a thickness of 30nm, the TaSi2 layer has a thickness of 300nm, and the Pt layer has a thickness of 200 nm.
7. The method of claim 1, wherein the annealing temperature in the first annealing process in the step (c) is 975 ℃ and the annealing time is 2 min.
8. A SiC ohmic contact structure, comprising: the SiC substrate, and a first Ni layer, a Ti layer, a second Ni layer, a TaSi2 layer and a Pt layer which are arranged on the SiC substrate in sequence; wherein the ohmic contact structure is formed by the method of any one of claims 1 to 7.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103578960A (en) * 2013-11-20 2014-02-12 中国科学院微电子研究所 Method for manufacturing ohmic contact surface on back side of SiC substrate
US9013002B1 (en) * 2011-12-02 2015-04-21 The United States Of America As Represented By The Administrator Of National Aeronautics And Space Administration Iridium interfacial stack (IRIS)
CN106683994A (en) * 2017-01-11 2017-05-17 电子科技大学 Manufacturing method of P-type silicon carbide ohmic contact

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9013002B1 (en) * 2011-12-02 2015-04-21 The United States Of America As Represented By The Administrator Of National Aeronautics And Space Administration Iridium interfacial stack (IRIS)
CN103578960A (en) * 2013-11-20 2014-02-12 中国科学院微电子研究所 Method for manufacturing ohmic contact surface on back side of SiC substrate
CN106683994A (en) * 2017-01-11 2017-05-17 电子科技大学 Manufacturing method of P-type silicon carbide ohmic contact

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
《Reliability assessment of Ti/TaSi2/Pt ohmic contacts on SiC after 1000h at 600℃》;Robert S.Okojie;《Journal of Applied Physics》;20020515;第91卷;全文 *
Improved Thermal Stability Observed in Ni-Based Ohmic Contacts to n-Type SiC for High-Temperature Applications;ARIEL VIRSHUP等;《Journal of Electronic Materials》;20101223;第40卷;第400页正文引言第404页结论 *
Investigation of Thermal Stability and Degradation Mechanisms in Ni-Based Ohmic Contacts to n-Type SiC for High-Temperature Gas Sensors;ARIEL VIRSHUP等;《Journal of Electronic Materials》;20090109;第38卷;全文 *

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