CN107533862A - Crossed array for calculating matrix multiplication - Google Patents
Crossed array for calculating matrix multiplication Download PDFInfo
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- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
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- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/16—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
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- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
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- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
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- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
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- G11C13/004—Reading or sensing circuits or methods
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
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- G06—COMPUTING; CALCULATING OR COUNTING
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- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
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- G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
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- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
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- G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
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Abstract
Crossed array, including：Multiple lines；The multiple alignments intersected in multiple cross part offices with multiple lines；And it is coupled in multiple abutments between multiple lines and multiple alignments at a part of place of multiple cross sections.Each abutment includes resistive memory element, and abutment is positioned to calculate the matrix multiplication of the first matrix and the second matrix.
Description
Background technology
Memristor is can be programmed to the device of different resistance states by applying programming energy such as voltage.Can be
The big crossed array of the storage component part with memristor is used in various applications, including at memory, FPGA, signal
Manage control system, pattern-recognition and other application.
Convolution is the mathematical operation to two functions, and it produces the of the revision that generally to be regarded as one of original function
Three functions.The application of convolution includes image procossing, probability, statistics, Computer signal processing, electrical engineering and the differential equation.
Brief description of the drawings
Following detailed description refer to the attached drawing, wherein：
Fig. 1 is the figure of the example crossed array for calculating matrix multiplication；
Fig. 2 is the figure for calculating the example crossed array of the convolution of image and core；
Fig. 3 is example image processor electric current output, with crossed array for showing programming signal input and collecting
Figure；And
Fig. 4 is the block diagram of the Example Computing Device with image procossing accelerator.
Embodiment
Convolution is the mathematical operation to two functions, and it produces the of the revision that generally to be regarded as one of original function
Three functions.Convolution, including the convolution of image and nuclear matrix are used in some image processing techniques.Image and core are mapped to
Matrix, matrix multiplication can be calculated matrix.However, convolution can be image processing techniques most computation-intensive part it
One.In addition, being realized for hardware, equivalent matrice may be too big and is sparsely mapped very much.
Memristor can be used as the device of the part in various electronic circuits, such as memory, switch, radio frequency electrical
Road and logic circuit and system.In memory construction, the crossed array of the storage component part with memristor can be used.When with
When making the basis of storage component part, position of the memristor available for storage information, 1 or 0.It can be pierced by being applied through the electricity of memristor
Such as voltage or electric current are swashed to change the resistance of memristor.Generally, can be formed can be in two states --- and passage forms conduction
A state and passage during path (" on ") form state during more nonconducting path ("off") --- between
At least one passage of switching.In some other cases, conductive path represents "off", and more nonconducting path represents
" on ".
In some applications, memory crossover array can be used for performing matrix computations.For example, from the defeated of often row in length and breadth
Enter voltage signal to be weighted by the electrical conductivity of the resistance device in each column, and be accumulated as the electric current output from each column.It is desirable that
If wire resistance can be ignored, the electric current I from crossed array outflow will be approximately IT=VTG, wherein V are input voltages, and
And G is conductivity matrix, include the contribution of each memristor in crossed array.Memristor is at the abutment of crossed array
(junction) or the use of intersection makes it possible to a pair resistance corresponding with G value, in each such junction point
(or electrical conductivity) is programmed.Input voltage value maps to matrix.
Example disclosed herein provides the crossed array for calculating matrix multiplication.Example crossed array may include multiple rows
Line, the multiple alignments intersected in multiple cross part offices with multiple lines and is coupled at a part of place of multiple cross sections
Multiple abutments between line and row.Each abutment can have resistive memory element, such as memristor, and abutment is determined
Position is into the matrix multiplication for calculating the first matrix and the second matrix.For example, the first matrix can be configured to vector, and matrix multiplication again
It is convertible into vector-matrix multiplication.In addition, abutment may not be needed to be located at cross part office, the second square in cross section
Battle array can have zero value.By this way, can save for placing the space of driving and sensing circuit to minimize equipment size.
With reference now to accompanying drawing, Fig. 1 shows example crossed array 100.Crossed array 100 can be matching somebody with somebody for parallel and vertical line
Put, abutment is coupled in cross part office between line.Crossed array 100 may include multiple lines 110, the and of multiple alignments 120
Multiple abutments 130.Each abutment can be coupled between a line and the unique combinations of an alignment.In other words, do not have
There is memory cell to share line and alignment.It should be noted that Fig. 1 shows example chi structure., can be various using appropriate structure
Crossed array 100 is used in, including such as in matrix multiplication as described herein.
Line 110 can be the electrode for the electric current for being carried across crossed array 100.In some instances, but line 110 that
This is parallel, generally with equal interval.Line 110 is referred to alternatively as bit line sometimes.According to orientation, line 110 can be alternatively
It is referred to as wordline.Similarly, alignment 120 can be the electrode for being not parallel to the extension of line 110.Alignment 120 is in some agreements
It is referred to alternatively as wordline.In other orientations, alignment 120 is referred to alternatively as bit line.Line 110 and alignment 120 can be used as voltage and
Electric current is sent to the electrode at abutment 130.The examples material of line 110 and alignment 120 may include conductive material, such as Pt, Ta,
Hf、Zr、Al、Co、Ni、Fe、Nb、Mo、W、Cu、Ti、TiN、TaN、Ta2N、WN2、NbN、MoN、TiSi2、TiSi、Ti5Si3、
TaSi2、WSi2、NbSi2、V3Si, electrically doped polycrystalline Si, electrically doped polycrystalline Ge and combinations thereof.
Abutment 130 can be coupled between line 110 and row 120 at a part of place of multiple cross sections.For example, engagement
Point 130 may be positioned to calculate the matrix multiplication of the first matrix and the second matrix.Although directly figure 1 illustrates abutment
130 can form in some cross part offices rather than in some other cross part offices in some instances, leave such
The open circuit (not having electric current flowing) of junction point.In other words, some cross sections are not engaged a little 130.It is further on Fig. 2
The positioning at abutment 130 is described with calculating matrix multiplication.
Each abutment 130 may include resistive memory element.Resistive memory element can have with the voltage of application
Or the resistance that electric current changes.In addition, in some instances, resistive memory element " can remember " its last resistance.With this
Mode, each resistive memory element can be set at least two states.Resistive memory element can be by with memristor
To realize these characteristics, memristor can be to provide such as in the two-terminal electric component of memristor characteristic as described herein.
In some instances, memristor can be based on nitride, it is meant that at least a portion of memristor by comprising
The component of nitride is formed.Memristor can also be based on oxide, it is meant that at least a portion of memristor is by including oxygen
The material of compound is formed.In addition, memristor can be based on nitrogen oxides, it is meant that at least a portion of memristor by comprising
The material of oxide is formed and at least a portion of memristor is formed by the material comprising nitride.The examples material of memristor
It may include tantalum oxide, hafnium oxide, titanium oxide, yittrium oxide, niobium oxide, zirconium oxide or other similar oxides, or non-transition gold
Belong to oxide, such as aluminum oxide, calcium oxide, manganese oxide, dysprosia, lanthana, silica or other similar oxides.In addition
Example include the nitrogen oxides of such as aluminium nitride, gallium nitride, tantalum nitride, the nitride of silicon nitride and such as silicon oxynitride.
In addition, the memristor that can be worked in the practice of teaching herein using other.
Non-linear or linear current-voltage characteristic can be presented in memristor.It is non-linear to describe differently to increase with linear function
Long function.In some realization such as the examples hereins, memristor 140 can be linear in voltage range interested
's.Voltage range interested can be the scope of the voltage for example used in the computing of crossed array 100.
In the example shown, memristor memory component may include miscellaneous part, such as transistor or selector.Selector can be
Can be in memristor device using providing the electric device of desired electrical characteristic.For example, selector can allow to depend on
In 2 terminal devices or circuit element of the electric current for the voltage being applied on terminal.In addition, in some instances, selector can be
At abutment 130 with memristor coupled in series.
In some instances, the cross section of not all line and alignment will have abutment 130.In other words, one
A little cross sections can have abutment.Abutment 130 may be positioned to calculate the matrix multiplication of two matrixes.Matrix can be not used in
The line 110 of multiplication and the cross section of alignment 120 can have abutment, as in Fig. 1 as shown in 140.
Fig. 2 shows the example crossed array 200 of the convolution for calculating image and core.Crossed array 200 can be similar to Fig. 1
Crossed array 100, and can be a part for such as image processor.Crossed array 200 may include similar to line 110
Multiple lines 210, multiple alignments 220 similar to alignment 120 and multiple abutments 230 similar to abutment 130.
Crossed array 200 can calculate the convolution of two dimensional image and two-dimensional nucleus.Crossed array 200 can be by calculating and image pair
The first matrix and the matrix multiplication of the second matrix corresponding with core answered is done so.In some instances, abutment 230 can determine
Position couples line into them are caused in a manner of allowing the matrix multiplication of the first matrix of calculating of crossed array 200 and the second matrix
210 and the cross section of alignment 220.
For example, abutment 230 can be located at the cross part of the crossed array 200 for the engagement for representing the first matrix and the second matrix
Office.In other words, abutment can not build the value for being assigned to abutment in crossed array by be always zero intersection
At part.This can leave the open space in crossed array, as in fig. 2 as shown in 240.Open space 240 can be such as
Driven for accommodating with sensing circuit to minimize the size of crossed array 200.Driving and sensing is more fully described on Fig. 4
Circuit.
For calculating matrix multiplication, crossed array 200 can receive more than first at the resistive memory element at abutment 230
Individual programming signal.Multiple values more than first in the individual matrix of programming signal definable first.In some instances, the first matrix is with treating
The image of processing is corresponding.Programming signal is the electro photoluminescence of such as voltage, electric current, energy or other forms.
In some instances, the first matrix is convertible into the multiple vectors for the part for representing the first matrix.Do so permission
Crossed array 200 performs vector-matrix multiplication.For example, the vector value from the first matrix can concurrently be delivered to crossed array
200 often go in.
In addition, crossed array 200 can receive more than second individual programming signals at resistive memory element.More than second programming
Signal definable to be applied to resistive memory element multiple values.In some instances, the second matrix handles image with being used for
Verification should.For example, nuclear matrix is to being blurred, sharpening, embossed, rim detection and other image procossings are probably useful.
Individual programming signal more than second can be write as resistive memory element some state with corresponding with some values in the second matrix.Example
Such as, resistive memory element can be configured to multiple resistance states.Such as by the way that the voltage defined by the first matrix is applied to
Drive input current input current can be converted into output current on crossed array.
As a result, crossed array 200 can be exported from the respective alignment 220 of resistive memory element from Memister member
Multiple electric currents that part is collected.The matrix of electric current definable first of collection and the matrix multiplication of the second matrix.For example, when more than first
When programming signal passes through crossed array 200, programming signal is changed by the resistance states of resistive memory element, and resistance states can be by
Individual programming signal is set more than second.As a result, the electric current collected is the result of the matrix multiplication of the first matrix and the second matrix.
In some instances, the first matrix can have the dimension of (a, b), and the second matrix can have the dimension of (c, d).
In such example, crossed array 200 may include multiple lines 210 equal to a*b to (a+c-1) * (b+d-1).Crossed array
200 can have multiple alignments 220 equal to (a+c-1) * (b+d-1).In addition, in such example, crossed array 200 can have
There are multiple abutments 230 equal to a*b*c*d.In the case of such dimension, crossed array 200 can calculate in size
Any first matrix equal to or less than (a, b) and the in size Matrix Multiplication of any second matrix equal to or less than (c, d)
Method.
In an example of some examples for example shown in Fig. 2, cross matrix 200 can have the more height being diagonally arranged
Array.Each subarray can be defined by the subset 210A of line 210 and the subset 220A of alignment 220.In some instances, intersect
Array 200 can have the subarray of b*d quantity.
In some instances, the subset 210A of line may include (a) line, and the subset 220A of alignment may include a+c-1
The alignment of quantity.Each subarray can have the abutment 230 of a*c quantity.In some instances, subarray can be arranged so that
(d) subarray of quantity arranges in a row, and crossed array can have the subarray of the row of (b) quantity.
Fig. 3 illustrates in greater detail the square at the abutment in crossed array according to the dimension of the first matrix and the second matrix
Battle array mapping 300.In the example shown in Fig. 3, the first matrix can represent image and can have the dimension of (5,6).Second matrix can
Represent convolution kernel and there can be the dimension of (3,4).When being mapped in matrix mapping 300, the first matrix and the second matrix are calculated
The crossed array of multiplication can have 30 lines 310 and 63 alignments 320.Crossed array can have 360 abutments altogether.
Crossed array can have 24 subarrays for being arranged in 6 row 310A.Each column 310A can have 4 subarrays, such as by
It is grouped shown in 320A.The position of subarray can interlock so that the subarray in adjacent column moves up or down subarray
Size.Each subarray can have 5 lines and 7 alignments.For 15 abutments altogether in each subarray, often
Individual subarray can be further separated into 5 subsets at three abutments.5 subsets can be arranged in adjacent to each other by line, and they
Position can interlock so that subset in adjacent alignment is mobile one to the left or to the right.
Fig. 4 shows the example memory crossed array with the electric current output 414 for showing programming signal input 410 and collecting
402 image processor 400, wherein memory crossover array can play image processor 400.Image processor 400
It may include N number of row electrode 404 and M row electrode 406.It may include memory cell throughout the intersection abutment of crossed array 402
408, it can be similar to abutment 130 or abutment 230.Memory crossover array 402 may include to be used for programming signal for example
Voltage is applied to the programming signal input 410 of row electrode 404, and memory crossover array 402 may include to be used to receive from row electricity
The electric current output 414 of the collection of output voltage caused by electric current flowing in pole 406.Image processor 400, which may also comprise, to be used for
Electric current in row electrode 406 is converted into the sensing circuit 416 of voltage.In the example of the principles described herein, sensing circuit
416 may include operational amplifier 418 and resistor 420, and it may be disposed to represent to be used for read operation virtually.
Image processor 400 may also comprise other peripheral circuits related to the crossed array 402 as memory device.Example
Such as, input 410 may include the driver for being connected to row electrode 404.Address decoder can be used for selection row electrode 404 and activate with
Driver corresponding to select row electrode 404.The driver of select row electrode 404 can be with different from handing over matrix multiplication or setting
Pitch row electrode 404 corresponding to the voltage driving of voltage corresponding to the processing of the resistance value in the memristor element 408 of array 402.It is right
In row electrode 406, it may include similar driver and decoder circuit.Control circuit can also be used for voltage of the control in input
Application and the voltage at the output of image processor 400 reading.Numeral can be used at input 410 and at output 414
To analog circuit and analog to digital circuit.The input signal of row electrode 404 and row electrode 406 can be simulation or digital
's.Can be with being used in the identical integrated morphology of crossed array 402 in the above example or semiconductor chip at semiconductor
Reason technology manufactures peripheral circuit recited above.As described in more detail below, occur during the operation of image processor
Two primary operationals.First operation is the memristor in crossed array to be programmed so as to which the mathematical value in N × Metzler matrix is reflected
It is mapped to array.In the example shown, time of the memristor during programming operation is programmed.Second operation is matrix multiplication behaviour
Make.In this operation, input voltage is applied in and output voltage is obtained, and the vector of N × 1 is multiplied by corresponding to by N × Metzler matrix
As a result.Matrix Multiplication can be caused into full matrix with the successive ignition of vector by matrix multiplication.Input voltage is less than program voltage, institute
Do not changed during matrix multiplication operation with the resistance value of the memristor in array 402.
In the example operated according to the image processor of the principles described herein, image processor 400 can be passed through
One group of voltage V is applied by the row 404 along N × M crossed arrays 402 simultaneouslyI410 and collect electric current through row 406 and survey
Measure output voltage VO414 perform vector matrix multiplication.In each column, each input voltage 410 is by corresponding memristor (1/
Gij) weighting, and weighted sum is reflected at output voltage 414.Using Ohm's law, between input voltage 410 and output voltage 414
Relation can be by { VO}T=-{ VI}TThe vector-matrix multiplications expression of [G] Rs forms, wherein GijIt is by the conductance of crossed array 402
N × Metzler matrix that rate (inverse of resistance) determines, Rs is the resistance value of sense amplifier, and T represents column vector VOAnd VITurn
Put matrix.Negative sign is produced by the use of the negative feedback operational amplifier in sense amplifier.From foregoing teachings, it can be seen that,
Image processor engine 400 can be used for that { b will be worthi}TThe first vector be multiplied by value [aij] matrix to be worth { cj}TSecond
Vector, wherein i=1, N and j=1, M.Vector calculus can be illustrated in further detail below.
a11b1+a21b2+…+aN1bN=c1
…
a1Mb1+a2Mb2…+aNMbN=cM.
Using the vector processing of the principles described herein or multiplication generally by the way that [a will be worthij] matrix be mapped to intersecting maneuver
On row 402 or in other words, by conductivity value GijProgramming (for example, write-in) starts to the intersection abutment of array 402.
Referring still to Fig. 4, in one example, by sequentially forcing electricity on each intersection abutment (Fig. 1,130)
Pressure drop sets each conductivity value Gij.For example, can be by applying the V at the 2nd row equal to crossed array 402Row2Voltage
With the V at the 3rd row equal to the arrayCol3Voltage electrical conductivity G is set2,3.With reference to figure 4, in one example, voltage is defeated
Enter VRow2The 2nd row that can be applied at the position 430 occurred at the 2nd row electrode adjacent to j=1 row electrodes.Voltage is defeated
Enter VCol3It will be applied to that the 3rd row electrode adjacent to i=1 or i=N positions.Pay attention to, when applying the voltage to row electrode 406
During place, the reading circuit 416 of that electrode can be cut off and voltage driver is switched on.Voltage difference VRow2-VCol3It will generally be based on
Conductivity value G caused by being determined positioned at the characteristic of the memristor element 408 of cross part office2,3.When following this method, not
The row 406 and row 404 of selection can be addressed according to one of several schemes, including for example make all non-selected row 406 and row 404
Vacantly or it is grounded all non-selected columns and rows.Other schemes, which are related to, to be grounded row 406 or is grounded part row 406.Make institute
Have non-selected columns and rows ground connection be it is beneficial because the program help to isolate non-selected columns and rows it is selected to minimize
Export the passage current that moves under water of row 406.After programming, the operation of image processor 400 is by applying input voltage 410 and reading
Output voltage 414 is taken to continue.
According to principle disclosed herein example, the memristor for image processor 400 can have linear current-
Voltage relationship.Linear current-voltage relation allows the more high accuracy in matrix multiplication processing.However, there is linear memristor
Crossed array 402 tend to that there is the big passage current that moves under water during the programming of array 402, particularly work as crossed array
When 402 size is more than some size such as 32 × 32.In this case, the electric current flowed by selecting memristor may
It is not enough to program memristor, because most of electric current passes through the flow channels that move under water.Alternatively, memristor can be due to the path that moves under water
And it is programmed with the value of inaccuracy.In order to mitigate the passage current that moves under water in such example, and particularly work as larger battle array
When row are required, for example non-linear selector of access device can merge in memristor or is utilized together with memristor with most
The passage current that moves under water in smallization array.More specifically, memory cell should be broadly construed as including memory resistor, including
Such as resistive memory element, memristor, memristor and selector, or memristor and miscellaneous part.
Fig. 5 shows the block diagram of the Example Computing Device 500 with image procossing accelerator.Computing device 500 can example
The personal computer of function as described herein, Cloud Server, LAN server, web server, mass computing are performed in this way
Machine, mobile computing device, notebook or desktop PC, intelligent TV, point of sale device, Wearable, any other is suitable
When electronic equipment or equipment combination, such as the equipment connected by cloud or Internet.In the example as shown in fig. 5, count
Calculating equipment 50 includes processor 510, image procossing accelerator 520 and convolution engine 530.Dotted line around computing device 500
Border shows that part can individually be positioned and for example can be connected via network.
Processor 510 can be CPU (CPU), the microprocessor based on semiconductor or be suitable for taking for instruction
Other hardware devices for returning and performing.The executable instruction of processor 510 is to perform some or all of processes as described herein.
Image procossing accelerator 520 can be similar to Fig. 3 image processor 400, and can be than being set in more general processing
The possible convolution for quickly performing image and core in the software of standby upper operation.Although image procossing accelerator 520 is depicted as
Equipment inside computing device 500, in other examples, image procossing accelerator 520 can be coupled to computing device 500
Ancillary equipment or be included in be couple in the ancillary equipment of computing device 500.
Image procossing accelerator 500 may include multiple lines, the multiple row similar to alignment 120 similar to line 110
Line and multiple abutments similar to abutment 130.Image procossing accelerator 500 can calculate two dimensional image and the volume of two-dimensional nucleus
Product.Image procossing accelerator 500 can pass through calculating the first matrix corresponding with image and the matrix of the second matrix corresponding with core
Multiplication is done so.In some instances, abutment can be positioned such that them to allow image processor accelerator 500 to calculate
The mode of the matrix multiplication of first matrix and the second matrix couples the cross section of line and alignment.
Convolution engine 530 can represent any combinations of hardware and programming.For example, the programming of convolution engine 530 can be deposited
The processor-executable instruction in non-transitory machinable medium is stored up, and the hardware of engine may include processor 510
Or another processor, to perform those instructions.In addition or as alternative, convolution engine 530 may include one or more hard
Part equipment, including for realizing the electronic circuit of function described below.
For calculating matrix multiplication, convolution engine 530 can be in the Memister at the abutment of image procossing accelerator 520
More than first individual programming signals are transmitted at element.Multiple values more than first in the individual matrix of programming signal definable first.In some examples
In son, the first matrix is corresponding with pending image.Programming signal can be such as voltage, electric current, energy or other forms
Electro photoluminescence.
In addition, convolution engine 530 can transmit more than second individual programming signals at resistive memory element.More than second programming
Signal definable to be applied to resistive memory element multiple values.In some instances, the second matrix handles image with being used for
Verification should.For example, nuclear matrix is to being blurred, sharpening, embossed, rim detection and other image procossings are probably useful.
Individual programming signal more than second can be write as resistive memory element some state with corresponding with some values in the second matrix.Example
Such as, resistive memory element can be configured to multiple resistance states.Such as by the way that the voltage defined by the first matrix is applied to
Drive input current input current can be converted into output current on crossed array.
As a result, convolution engine 530 can be collected from the respective alignment 220 of resistive memory element comes from Memister
Multiple electric currents of the collection of element.The matrix of electric current definable first of collection and the matrix multiplication of the second matrix.For example, when first
When multiple programming signals pass through image procossing accelerator 520, programming signal is changed by the resistance states of resistive memory element, electricity
Resistance state can be set by more than second individual programming signals.As a result, the electric current collected is the matrix of the first matrix and the second matrix
The result of multiplication.First matrix and the matrix multiplication definable image of the second matrix and the convolution of core.
Foregoing teachings describe the crossed array for calculating matrix multiplication and its multiple examples of application.It should be understood that this
Example described in text may include additional part, and some parts as described herein can be removed or altered without departing from example
Or the scope of its application.It should also be understood that what the part described in the accompanying drawings was not necessarily drawn to scale, and therefore part can have
From different relative sizes relative to each other shown in the accompanying drawings.
It should be noted that as used in the application and appended claims, singulative " one " and "the" include plural number member
Part, unless the context clearly dictates otherwise.
Claims (15)
1. a kind of crossed array, including：
Multiple lines；
Multiple alignments, intersect in multiple cross part offices with the multiple line；And
Multiple abutments, be coupled at a part of place of the multiple cross section the multiple line and the multiple alignment it
Between, wherein：
Each abutment includes resistive memory element；And
The abutment is positioned to calculate the matrix multiplication of the first matrix and the second matrix.
2. crossed array as claimed in claim 1, wherein the crossed array is used for：
More than first individual programming signals are received at the resistive memory element, wherein individual programming signal defines institute more than described first
State multiple values in the first matrix；
More than second individual programming signals are received at the resistive memory element, wherein individual programming signal definition is treated more than described second
It is applied to multiple values of the resistive memory element；And
The multiple electric currents collected from the respective alignment output of the resistive memory element from the resistive memory element, wherein
The matrix multiplication of first matrix described in collected current definition and second matrix.
3. crossed array as claimed in claim 1, wherein first matrix is corresponding with two dimensional image, and second square
Battle array is corresponding with two-dimensional nucleus.
4. crossed array as claimed in claim 3, wherein the crossed array is used to calculate the two dimensional image and described two
Tie up the convolution of core.
5. crossed array as claimed in claim 1, wherein：
First matrix has a and b dimension；
Second matrix has c and d dimension；
The multiple line includes a*b line；
The multiple alignment includes (a+c-1) * (b+d-1) individual alignment；And
The multiple abutment includes a*b*c*d abutment.
6. crossed array as claimed in claim 1, wherein some in the cross section do not include abutment.
7. crossed array as claimed in claim 1, wherein the resistive memory element includes memristor.
8. crossed array as claimed in claim 3, wherein the resistive memory element includes coupling of being connected with the memristor
The selector connect.
9. a kind of image processor, includes the crossed array of the convolution for calculating image and core, the crossed array includes：
Multiple lines；
Multiple alignments, intersect in multiple cross part offices with the multiple line；And
Multiple abutments, be coupled at a part of place of the multiple cross section the multiple line and the multiple alignment it
Between, wherein：
Each abutment includes resistive memory element；And
The abutment is positioned to calculate the square of the first matrix corresponding with described image and the second matrix corresponding with the core
Battle array multiplication.
10. image processor as claimed in claim 9, further comprising a circuit, the circuit is used for：
More than first individual programming signals are sent to the resistive memory element, wherein individual programming signal defines institute more than described first
State multiple values in the first matrix；
More than second individual programming signals are sent to the resistive memory element, wherein individual programming signal definition is treated more than described second
It is applied to multiple values of the resistive memory element；And
The multiple electric currents collected from the respective alignment output of the resistive memory element from the resistive memory element, wherein
The matrix multiplication of first matrix described in collected current definition and second matrix.
11. image processor as claimed in claim 10, wherein the matrix of first matrix and second matrix
Multiplication defines described image and the convolution of the core.
12. image processor as claimed in claim 9, wherein：
First matrix has a and b dimension；
Second matrix has c and d dimension；
The multiple line includes a*b line；
The multiple alignment includes (a+c-1) * (b+d-1) individual alignment；And
The multiple abutment includes a*b*c*d abutment.
13. a kind of computing device, including：
Processor；
Image procossing accelerator, including：
Multiple lines；
Multiple alignments, intersect in multiple cross part offices with the multiple line；And
Multiple abutments, be coupled at a part of place of the multiple cross section the multiple line and the multiple alignment it
Between, wherein：
Each abutment includes resistive memory element；And
The abutment is positioned to the Matrix Multiplication by calculating the first matrix corresponding with image and the second matrix corresponding with core
Method calculates the convolution of described image and the core；And
Convolution engine, it is used for：
More than first individual programming signals are sent to the resistive memory element, wherein individual programming signal defines institute more than described first
State multiple values in the first matrix；
More than second individual programming signals are sent to the resistive memory element, wherein individual programming signal definition is treated more than described second
It is applied to multiple values of the resistive memory element；And
It is fixed according to electric current from the respective alignment of the resistive memory element, being collected from the resistive memory element
The matrix multiplication of adopted first matrix and second matrix.
14. computing device as claimed in claim 13, wherein：
First matrix has a and b dimension；
Second matrix has c and d dimension；
The multiple line includes a*b line；
The multiple alignment includes (a+c-1) * (b+d-1) individual alignment；And
The multiple abutment includes a*b*c*d abutment.
15. computing device as claimed in claim 13, wherein the resistive memory element includes memristor.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2015/044246 WO2017026989A1 (en) | 2015-08-07 | 2015-08-07 | Crossbar arrays for calculating matrix multiplication |
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| US (1) | US10497440B2 (en) |
| EP (1) | EP3262651B1 (en) |
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| EP3262651B1 (en) | 2021-07-21 |
| EP3262651A1 (en) | 2018-01-03 |
| CN107533862B (en) | 2021-04-13 |
| WO2017026989A1 (en) | 2017-02-16 |
| US20180301189A1 (en) | 2018-10-18 |
| EP3262651A4 (en) | 2018-03-21 |
| US10497440B2 (en) | 2019-12-03 |
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