CN107517000B - Method and device for controlling frequency jitter of switching signal of power circuit and readable storage medium - Google Patents
Method and device for controlling frequency jitter of switching signal of power circuit and readable storage medium Download PDFInfo
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- CN107517000B CN107517000B CN201710732937.1A CN201710732937A CN107517000B CN 107517000 B CN107517000 B CN 107517000B CN 201710732937 A CN201710732937 A CN 201710732937A CN 107517000 B CN107517000 B CN 107517000B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
Abstract
The invention discloses a power circuit switching signal frequency jitter control method, a device and a readable storage medium. The power switch signal jitter frequency control method comprises the following steps: determining the signal characteristics of the power switch circuit according to the type of the power switch circuit; acquiring a frequency jittering amplitude and a frequency jittering mode corresponding to the power switch circuit according to the signal characteristics of the power switch circuit; setting a dithering cycle of a switch of the power switching circuit according to the cycle of the selected reference signal and the dithering mode; and controlling the switch to carry out periodic frequency dithering in the frequency dithering mode and the frequency dithering period within the frequency dithering amplitude. According to the invention, through carrying out frequency jitter control on the switch of the switch circuit, the energy of the switch signal is dispersed to the whole frequency band of the frequency jitter range, the total energy of the switch signal is unchanged, and the interference amplitude generated by a single frequency in the frequency jitter range is reduced, so that the electromagnetic compatibility of the switch circuit is improved, and no extra material cost is caused.
Description
Technical Field
The present invention relates to the field of control of switching circuits, and in particular, to a method and an apparatus for controlling jitter frequency of a switching signal of a power circuit, and a readable storage medium.
Background
Various electronic and electrical devices and apparatuses generally include a digital clock circuit or various power switching circuits in order to improve power conversion efficiency, power factor, and current harmonics. These clock and switch circuits all use a fixed operating frequency, and their pulse signals contain rich harmonic components, and a large number of harmonic components propagate outward through transmission paths and electromagnetic fields, thereby causing serious electromagnetic interference problems to electronic and electrical equipment and devices. Therefore, how to reduce the electromagnetic interference becomes an important consideration for the design of such products, and is one of the design difficulties at present.
Disclosure of Invention
The invention mainly aims to provide a frequency jitter control method for a switching signal of a power circuit, aiming at solving the problem of electromagnetic interference caused by various power switching circuits.
In order to achieve the above object, the present invention provides a power circuit switching signal jitter frequency control method, which includes the following steps:
determining the signal characteristics of the power switch circuit according to the type of the power switch circuit;
acquiring a frequency jittering amplitude and a frequency jittering mode corresponding to the power switch circuit according to the signal characteristics of the power switch circuit;
setting a dithering cycle of a switch of the power switching circuit according to the cycle of the selected reference signal and the dithering mode;
and controlling the switch to carry out periodic frequency dithering in the frequency dithering mode and the frequency dithering period within the frequency dithering amplitude.
In a possible implementation manner, the step of obtaining a frequency jittering amplitude and a frequency jittering manner corresponding to the power switch circuit according to the signal characteristics of the power switch circuit includes:
determining a jitter frequency range of the power switch circuit according to the signal characteristics of the power switch circuit;
and obtaining the frequency jittering amplitude of the power switch circuit according to the frequency jittering range and the frequency of the power switch circuit.
Optionally, the step of obtaining a jitter frequency amplitude of the power switching circuit according to the jitter frequency range and the frequency of the power switching circuit further includes:
and determining a corresponding frequency jittering mode according to the signal characteristics of the power switch circuit.
In a possible implementation manner, the step of determining a corresponding frequency jittering manner according to the signal characteristics of the power switch circuit includes:
if the equipment circuit connected with the power switch circuit has a first attribute, carrying out frequency dithering in a random or nonlinear mode;
and if the equipment circuit connected with the power switch circuit has a second attribute, carrying out frequency dithering in a preset frequency dithering mode.
In one possible implementation, the step of setting a dithering cycle of a switch of the power switching circuit according to the selected reference signal cycle and the dithering scheme further includes:
determining a basic cycle period of the power switch circuit frequency jitter according to the frequency jitter mode;
and setting a jitter frequency period of the power switch circuit according to the reference signal period and the basic cycle period.
In one possible implementation, the step of determining a cycle period of a basic cycle period of a dither frequency of the power switching circuit according to the dither frequency manner further includes:
and calculating the number of frequency points and the distribution condition in the basic cycle period according to the basic cycle period.
In a possible implementation, the step of calculating the number of frequency points and the distribution within the cycle period according to the basic cycle period includes:
determining whether the basic cycle period and the period of the reference signal need to be synchronized according to the signal characteristics of the power switch circuit;
and when the basic cycle period and the period of the reference signal need to be synchronized, synchronizing the basic cycle period and the period of the reference signal.
In a possible implementation manner, the step of determining whether the fundamental cycle period and the period of the reference signal need to be synchronized according to the signal characteristics of the power switch circuit further includes:
and determining the relation between the basic cycle period and the reference signal period, wherein the relation between the basic cycle period and the reference signal period comprises the same or multiple relation between the basic cycle period and the reference signal period.
In addition, to achieve the above object, the present invention provides a power circuit switching signal jitter frequency control apparatus, including: the power circuit switching signal frequency jitter control program is stored on the memory and can run on the processor, and when being executed by the processor, the power circuit switching signal frequency jitter control program realizes the steps of the power circuit switching signal frequency jitter control method.
In addition, to achieve the above object, the present invention further provides a computer readable storage medium, wherein a power circuit switching signal jitter frequency control program is stored on the computer readable storage medium, and when the power circuit switching signal jitter frequency control program is executed by a processor, the power circuit switching signal jitter frequency control program implements the steps of the power circuit switching signal jitter frequency control method as described above.
According to the frequency jitter control method for the switching signals of the power circuit, the frequency of the switching circuit is jumped within a certain range, so that the energy of the switching signals is dispersed to the whole frequency band of the frequency jitter range, the total energy of the switching frequency is unchanged, but the interference amplitude generated by a single frequency in the frequency jitter range is reduced, and the electromagnetic compatibility of the switching circuit is improved. The invention realizes that the electromagnetic compatibility of the switch circuit is improved by controlling the frequency of the switch circuit, only the frequency of the switch circuit is needed, and the jitter frequency of the switch circuit can be changed according to the specific parameters of the electrical equipment, so that the electromagnetic compatibility improvement effect of the switch circuit is better, and meanwhile, the invention has no obvious adverse effect on other performance parameters of the circuit.
Drawings
FIG. 1 is a schematic diagram of a terminal \ device structure of a hardware operating environment according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart illustrating a method for controlling a switching signal jitter frequency of a power circuit according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating a detailed process of step S20 in another embodiment of the power circuit switching signal frequency jitter control method according to the present invention;
fig. 4 is a flowchart illustrating a detailed process of step S30 in another embodiment of the method for controlling frequency jitter of a switching signal of a power circuit according to the present invention;
FIG. 5 is a diagram illustrating a power circuit according to the present invention in which the lowest frequency point of the switching jitter frequency is in the middle of the jitter frequency period;
FIG. 6 is a diagram illustrating a power circuit according to the present invention in which the highest frequency point of the switching jitter frequency is in the middle of the jitter frequency period;
FIG. 7 is a diagram illustrating the maximum frequency point of the switching jitter frequency of the power circuit at the maximum input voltage;
FIG. 8 is a diagram illustrating the lowest frequency point of the switching jitter frequency of the power circuit at the maximum input voltage;
fig. 9 is a schematic diagram of the power circuit according to the present invention, in which the highest frequency point of the switching jitter frequency is at the maximum of the input voltage and at the zero crossing.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, fig. 1 is a schematic terminal structure diagram of a hardware operating environment according to an embodiment of the present invention.
The terminal of the embodiment of the invention can be an intelligent household appliance, and can also be a mobile terminal device with a display function, such as a smart phone, a tablet computer, an electronic book reader, a portable computer and the like.
As shown in fig. 1, the terminal may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, a communication bus 1002. Wherein a communication bus 1002 is used to enable connective communication between these components. The user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., WI-FI interface). The memory 1005 may be a high-speed RAM memory or a non-volatile memory (e.g., a magnetic disk memory). The memory 1005 may alternatively be a storage device separate from the processor 1001.
Optionally, the terminal may further include a camera, a Radio Frequency (RF) circuit, a sensor, an audio circuit, a WiFi module, and the like. Such as light sensors, motion sensors, and other sensors. Specifically, the light sensor may include an ambient light sensor that may adjust the brightness of the display screen according to the brightness of ambient light, and a proximity sensor that may turn off the display screen and/or the backlight when the mobile terminal is moved to the ear. As one of the motion sensors, the gravity acceleration sensor can detect the magnitude of acceleration in each direction (generally, three axes), detect the magnitude and direction of gravity when the mobile terminal is stationary, and can be used for applications (such as horizontal and vertical screen switching, related games, magnetometer attitude calibration), vibration recognition related functions (such as pedometer and tapping) and the like for recognizing the attitude of the mobile terminal; of course, the mobile terminal may also be configured with other sensors such as a gyroscope, a barometer, a hygrometer, a thermometer, and an infrared sensor, which are not described herein again.
Those skilled in the art will appreciate that the terminal structure shown in fig. 1 is not intended to be limiting and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, a memory 1005, which is a kind of computer storage medium, may include therein an operating system, a network communication module, a user interface module, and a power circuit switching signal dither control program.
In the terminal shown in fig. 1, the network interface 1004 is mainly used for connecting to a backend server and performing data communication with the backend server; the user interface 1003 is mainly used for connecting a client (user side) and performing data communication with the client; and the processor 1001 may be configured to call a power circuit switching signal jitter control program stored in the memory 1005, and perform the following operations:
as shown in fig. 1, as a single chip microcomputer control system, a processor 1001 of the single chip microcomputer control system is a microprocessor chip, and a memory 1002 of a storage medium stores a switching circuit jitter frequency control program, and a power switch control circuit 1003 includes various circuits such as a driving circuit, a protection detection circuit, and an IGBT switching tube. The microprocessor 1001 and the program memory 1002 may be integrated into one chip.
In the block diagram of fig. 1, the processor 1001 may be configured to call a switching circuit jitter control program stored in the memory 1002, and perform the following operations:
determining the signal characteristics of the power switch circuit according to the type of the power switch circuit;
acquiring a frequency jittering amplitude and a frequency jittering mode corresponding to the power switch circuit according to the signal characteristics of the power switch circuit;
setting a dithering cycle of a switch of the power switching circuit according to the cycle of the selected reference signal and the dithering mode;
and controlling the switch to carry out periodic frequency dithering in the frequency dithering mode and the frequency dithering period within the frequency dithering amplitude.
Further, the processor 1001 may call a power circuit switching signal jitter control program stored in the memory 1002, and further perform the following operations:
determining a jitter frequency range of the power switch circuit according to the signal characteristics of the power switch circuit;
and obtaining the frequency jittering amplitude of the power switch circuit according to the frequency jittering range and the frequency of the power switch circuit.
Referring to fig. 2, a first embodiment of the present invention provides a jitter frequency control method, including:
step S10, determining the signal characteristics of the power switch circuit according to the type of the power switch circuit;
step S20, according to the signal characteristics of the power switch circuit, obtaining the frequency jittering amplitude and the frequency jittering mode corresponding to the power switch circuit;
step S30, setting the frequency shaking period of the switch of the power switch circuit according to the period of the selected reference signal and the frequency shaking mode;
and step S40, controlling the switch to perform a periodic frequency dithering in the frequency dithering manner and the frequency dithering period within the frequency dithering range.
Specifically, digital clock circuits and power switching circuits are typically included in the device circuitry to improve power conversion efficiency, power factor, and improve current harmonics, for example: a switching Power supply, an active PFC (Power Factor Correction) circuit, a PWM (Pulse Width Modulation) control circuit, an IPM (Intelligent Power Module) variable frequency driving circuit, and the like. The clock and the switch circuit all adopt fixed working frequency, pulse signals of the clock and the switch circuit contain rich higher harmonic components, the clock and the switch circuit are electromagnetic interference sources of electronic and electrical equipment and devices, and a large number of harmonic components are transmitted outwards through a transmission path and an electromagnetic field, so that the serious electromagnetic interference problem is caused. The frequency jitter control method for the switching signal of the power circuit is to perform frequency jitter according to the corresponding signal characteristics when the switching circuit works. A cyclic method of amplitude (typically no more than 20% of the frequency) and period of the frequency jitter is first determined from the frequency of the switching circuit (typically "high-low-high" or "low-high-low" frequency by frequency linear jitter, which may also be selected to be non-linear or irregular depending on the nature of the device circuitry). And the period of the dither frequency corresponds to the period of the selected reference signal, and the periodic dither frequency is performed. The reference signal includes input voltage, other loop current, node voltage and other waveforms, the present invention mainly takes the embodiment form of the input voltage as the reference signal as an example for discussion, and other similar situations are not repeated.
At present, various electronic and electrical devices and apparatuses generally include a digital clock circuit or various power switching circuits, such as a switching power supply, an active PFC circuit, a PWM control circuit, a DC-DC circuit, and an IPM inverter driver circuit, in order to improve power conversion efficiency, power factor, and current harmonics. However, the impulse signal of the clock and power switch circuit contains abundant harmonic components, which may cause a large amount of harmonic components to propagate outwards through the transmission path and the electromagnetic field, and thus is a source of electromagnetic interference of electronic and electrical equipment and devices, resulting in poor EMC (electromagnetic Compatibility) performance of the equipment circuit.
Therefore, although the switching circuit improves the power factor and solves the current harmonic problem, it brings about a serious EMI (Electromagnetic Interference) problem. There are many ways to reduce the electromagnetic interference (EMI) of the switching circuit, such as soft switching technology, use of FRD (fast recovery diode) slow tube, and add RC spike absorption circuit. However, these methods increase the switching loss, cause the switching tube to be heated and easily burn out.
The invention uses the Jitter technique (Frequency Jitter) of the switching signal to solve the problem of electromagnetic interference of the switching circuit. Dithering is another very effective way to reduce emi, and the emi problem of the switching circuit is improved by controlling the switching frequency dithering. The switching signal characteristics of different frequency switching circuits are different, and therefore the frequency jitter manner is different. For example, a PFC circuit, an ac motor chopper speed regulation circuit, a digital clock circuit, an IPM variable frequency drive circuit, etc., have different switching frequency ranges, some of which need to refer to a synchronization signal and some of which do not need to be switched, and when controlling a frequency switching circuit to perform frequency dithering, the frequency switching circuit needs to be correspondingly adjusted according to the characteristics of a switching signal.
The amplitude of the dither frequency is generally controlled to be not more than 20% of the switching frequency (which can be adjusted according to the performance of a specific circuit and device), the dither mode can be linearly dithered along the frequency of "low-high-low" or "high-low-high" according to the signal characteristics of the switching circuit (non-linear dithering can be performed according to the actual circuit situation as necessary), and the dither frequency must also correspond to the phase of the selected reference signal (of course some switching circuits do not need phase synchronization), i.e. one period of the dither frequency (the dither frequency completes one cycle of "low-high-low" or "high-low-high" as one dither period) is the same as or is a multiple of one period of the selected reference signal, so that the energy of the entire switching signal is dispersed to the entire frequency band of the dither frequency range, because the total energy of the switching signal is not changed, and the interference amplitude generated by a single frequency in the dither range is reduced, therefore, the electromagnetic interference of the switching circuit is finally reduced, and the electromagnetic compatibility of the circuit is effectively improved (for some power switching circuits, the higher the frequency of the switching jitter is, the better the electromagnetic compatibility is, however, the too fast jitter may cause other performances of the circuit to be affected, and therefore, the speed of the jitter frequency needs to be determined by combining the characteristics and the overall performance of the circuit).
Taking the PFC circuit as an example, a power supply sine wave with a frequency of 50Hz is rectified by a full-wave bridge rectifier to become a 100Hz pulsating waveform, that is, an input voltage waveform of the PFC circuit, and a voltage cycle is 10 milliseconds; the switching frequency of the original PFC circuit is 40kHz, and the single switching pulse period is 25 microseconds. Thus, a 40kHz switching signal is 10 milliseconds in one input voltage period) for a total of 400 switching pulses. The switching frequency of the PFC circuit is linearly jittered within the range of 32 kHz-40 kHz or 36 kHz-44 kHz and 40 kHz-48 kHz, the jittering amplitude is 8kHz, the frequency jittering completes one cycle of low-high-low or high-low-high and is counted as a jittering period, the jittering period is the same as the period of input voltage, at most 200 jittering points can be distributed in the jittering frequency band of 8kHz, and the frequency point distribution in the jittering frequency range of 8kHz is shown in table 1.
TABLE 1
Although the existing scheme for improving the EMC performance of the power switch circuit has a good improvement effect, extra parts are required to be added, so that the increase of consumables is caused, the temperature rise of a switch tube is easily caused, and even the problem of burnout of an electric device is caused.
Further, in step S20, the step of obtaining the frequency jittering amplitude and the frequency jittering mode of the power switch circuit according to the signal characteristics of the power switch circuit includes:
step S21, determining the frequency jittering range of the power switch circuit according to the signal characteristics of the power switch circuit;
and step S22, obtaining the frequency jittering amplitude of the power switch circuit according to the frequency jittering range and the frequency of the power switch circuit.
Specifically, the signal characteristics of different power switch circuits are different, and the jitter ranges of the corresponding jitter frequency switches are also different, so that the jitter frequency range of the power switch circuit needs to be determined according to the signal characteristics of the power switch, so as to further determine the jitter frequency amplitude, generally speaking, the jitter frequency range does not exceed 20% of the frequency of the switch circuit, and the jitter amplitude of the power switch circuit can be calculated according to the power of the switch circuit and the jitter range.
In the jitter frequency of the switching circuit, it is very important how to determine the jitter frequency range, if the jitter frequency range is too small, the improvement effect on the electromagnetic compatibility is small, and if the jitter frequency range is too large, other performances of the circuit may be adversely affected. The jitter ranges of different power switch circuits are different, and the jitter amplitude can be determined according to the jitter ranges. The jitter amplitude needs to be determined according to the signal characteristics of the power switch circuit.
For some power switching circuits, the faster the frequency of the switching jitter is, the better the improvement effect of the electromagnetic compatibility is, however, when determining the jitter frequency, it is necessary to take overall consideration, that is, the overall performance of the electrical equipment is considered, and the electromagnetic compatibility of the circuit equipment is improved without adverse effect on the electrical equipment, so that the jitter frequency of the switching circuit needs to be limited so as not to cause adverse effect on the performance of the electrical equipment. Through calculation and test, when the jitter frequency range does not exceed 20% of the frequency of the switching circuit generally, the performance of the electrical equipment is not obviously changed, and the electromagnetic compatibility can reach the standard of normal use. However, when the electrical equipment requires high electromagnetic compatibility or the circuit requires low performance, the jitter range may be appropriately increased without being limited to the jitter range of 20% of the frequency of the switching circuit. The invention controls the jitter range of the frequency of the switching circuit, can ensure that the circuit obtains expected electromagnetic compatibility and the other performances are not obviously influenced.
Further, the step of deriving a jitter frequency amplitude of the power switch circuit according to the jitter frequency range and the frequency of the power switch circuit at step S22 includes:
and step S23, determining a corresponding frequency jittering mode according to the signal characteristics of the power switch circuit.
Specifically, after the jitter frequency amplitude is determined, the switching jitter frequency mode needs to be determined according to the characteristics of the signal connected to the power switch circuit, and the jitter frequency mode of the power switch circuit switching may change in different device circuits. In general, the switching frequency dithering mode is performed according to a preset "high-low-high" or "low-high-low" (i.e. the variation trend of the frequency points, as in the case of the "high-low-high" mode, i.e. the lowest frequency point of the switching frequency of the power switching circuit is in the middle of the dithering frequency period, and the "low-high-low" mode is the highest frequency point of the switching frequency of the power switching circuit is in the middle of the dithering frequency period, which are schematically shown in fig. 5 and 6, respectively), and each cycle of high-low-high or low-high-low is one dither period, the jitter period of the power switch circuit can be made to correspond to the reference signal phase by means of "high-low-high" or "low-high-low". In addition, the switching of the power switching circuit can also dither in a random or non-linear manner depending on the connected device circuit.
The frequency dithering is carried out in a preset frequency dithering mode (a high-low-high mode or a low-high-low mode) or a random and nonlinear mode, so that the waveform of the frequency dithering of the switch of the power switch circuit can play a role in various different power switch circuits, the electromagnetic compatibility of the circuit is better improved, and the original performance of the power switch circuit can be kept.
Further, the step of determining a corresponding frequency jittering manner according to the signal characteristics of the power switch circuit in step S23 includes:
step S231, if the signal characteristics of the power switch circuit have the first attribute, performing frequency dithering in a random or nonlinear mode;
step S232, if the signal connected to the power switch circuit has the second attribute, performing frequency dithering in a preset frequency dithering manner.
Specifically, the power switch circuit selects a dithering mode more suitable for the current device circuit according to the characteristics of the connected signals. The method for performing frequency dithering according to the characteristics of signals connected with the power switch circuit is determined according to a first attribute (the first attribute indicates that the circuit has a special attribute, and the frequency dithering of the switch needs to be correspondingly adjusted according to the special attribute of the circuit) or a second attribute (indicates that the switch has no special attribute), wherein if the preset frequency dithering mode can cause adverse effects on the performance, such as stability and the like, of the equipment circuit, a random or nonlinear frequency dithering mode can be adopted).
The frequency jittering mode of the power switch circuit switch can carry out frequency jittering in frequency point random distribution, frequency point harmonic frequency points and other frequency jittering modes except linear jittering (frequency jittering is carried out according to a frequency point rule of 'high-low-high' or 'low-high-low') under a general condition, and specifically, which frequency jittering mode is used can be determined according to the signal characteristics of the power switch circuit and the frequency jittering effect. For example, there are 5 frequency points, the frequency points are 1-5, if the frequency is dithered in a "high-low-high" linear dithering manner, the frequency points are distributed in 5-3-1-2-4, if the frequency is dithered in an irregular manner, the frequency points may be distributed in 4-5-2-1-3 or other irregular distribution, etc. The frequency jittering mode of the power circuit can carry out frequency jittering in various different modes, so that the power circuit can correspond to different circuits and scenes, and the frequency jittering effect is maximized.
Further, the step S30 of setting the dithering cycle of the switch of the power switch circuit according to the cycle of the selected reference signal and the dithering mode further includes:
step S31, determining the basic cycle period of the power switch circuit according to the frequency jittering mode;
and setting a jitter frequency period of the power switch circuit according to the reference signal period and the basic cycle period.
Specifically, the relationship between the basic cycle period of the power switch circuit switch jitter frequency and the reference signal period is corresponding. The relationship between the fundamental cycle period and the voltage period needs to be determined by judging according to the device attributes of the power switch circuit switch.
The frequency of the power switch circuit is determined according to the period of the reference signal and the basic cycle period, so that the jitter period of the switch of the power switch circuit is adjusted and set according to the reference signal and the basic cycle period. And setting the frequency jittering period of the switch through the reference signal and the basic cycle period so as to obtain a relatively ideal frequency jittering period of the switch.
Further, the step S31 of calculating the number of frequency points and the distribution within the cycle period according to the basic cycle period includes:
step S311, according to the basic cycle period, calculating the number of frequency points and the distribution in the basic cycle period.
Specifically, after the frequency jittering mode of the power switch circuit switch is determined, the frequency jittering times of the switch circuit in the voltage period can be obtained according to the frequency of the reference signal and the frequency of the switch circuit. And the distribution mode of the frequency points can be obtained according to the frequency jittering mode.
When the frequency points are distributed, the optimal scheme is that the distribution of the frequency points is not repeated, so that the time of a signal on a single frequency point is shorter, the energy is smaller, and the effect of improving the electromagnetic compatibility of the circuit is better. However, in the cyclic and cyclic periodic operation, the actual software control cannot do the frequency point repeatedly. Therefore, we can only do so as to try to not repeat the frequency points in one dithering cycle ("low-high-low" or "high-low-high"), such as: there are 100 frequency points (f1, f2, f3, f4, f5,. till.. f96, f97, f98, f99, f100) in a frequency jitter range, and the frequency jitter jumps at the 100 frequency points. The common practice in the past was "f 1, f2, f 3. . . F98, f99, f100, f99, f 98. . . F3, f2, f1 ", the frequency round trip variation is repetitive. We can now "f 1, f3, f 5" within "low-high-low" one jitter cycle. . . F97, f99, f100, f98, f 96. . . F6, f4 and f 2' jump to be not repeated in one period or adjacent periods and then circulate endlessly.
By more scientifically distributing the frequency points, the repeatability of the frequency points can be effectively reduced, and the effect of frequency jitter on improving the electromagnetic compatibility of the circuit is better.
Further, the step S311, after the step of calculating the number of frequency points and the distribution within the basic cycle period according to the basic cycle period, further includes:
step S312, determining whether the basic cycle period and the period of the reference signal need to be synchronized according to the signal characteristics of the power switch circuit;
and when the basic cycle period and the period of the reference signal need to be synchronized, synchronizing the basic cycle period and the period of the reference signal.
Specifically, the signal characteristics of the power switch circuit determine whether the basic cycle period and the reference signal period are synchronized during frequency jittering, and when the basic cycle period and the reference signal period need to be synchronized, the basic cycle period and the reference signal period are synchronized, otherwise, the basic cycle period and the reference signal period do not need to be synchronized.
The synchronization relationship between the power switch circuit and the reference signal period is different according to the signal characteristics of different power switch circuits, for example, the switching signal of the PFC circuit must be synchronized with the input voltage waveform (the voltage is synchronized with the basic cycle period as shown in fig. 7 and 8). The AC motor speed regulation chopper circuit, the switching power supply, the digital clock circuit and the IPM inversion driving circuit do not need to be synchronous with the reference signal.
Further, after the step of determining whether the fundamental cycle period and the period of the reference signal need to be synchronized according to the signal characteristics of the power switch circuit in step S312, the method further includes:
step S313, determining a relationship between the basic cycle period and the reference signal period, where the relationship between the basic cycle period and the reference signal period includes a relationship that the basic cycle period is the same as or multiple of the reference signal period.
Specifically, when determining the relationship between the base cycle period and the reference signal period, the base cycle period may be the same as the reference signal period or may be a multiple of the reference signal period.
Generally speaking, the basic cycle period is the same as the reference signal, which can achieve the purpose of improving the electromagnetic compatibility of the circuit by jittering, and has less adverse effect on other performances of the device circuit, so that the device circuit is used more frequently. However, for some power switch circuits, the faster the frequency of the switch is dithered, the better the electromagnetic compatibility improvement is achieved, i.e., the more the fundamental cycle period is in the same period, the better the electromagnetic compatibility improvement is (fig. 9 shows the basic cycle period in a multiple relationship with the reference signal period, wherein the multiple relationship is at least 2 times). Therefore, in a special circuit device (a circuit with higher requirement on electromagnetic compatibility or a circuit with lower requirement on other performances such as stability), the multiple relation between the basic cycle period and the reference signal period can be properly improved according to the characteristics of the circuit device, so that the improvement effect of the electromagnetic compatibility is better.
The invention can adjust the relation between the basic cycle period and the reference signal according to the signal characteristics of different power switch circuits, thereby adjusting the frequency jittering speed of the power switch circuit and enabling the power switch circuit to obtain better electromagnetic compatibility when conditions require.
The invention also provides a device for controlling the frequency jitter of the switching signal of the power circuit.
The device based on the power circuit switching signal jitter frequency control method comprises the following steps: the power circuit switching signal frequency jitter control program can realize the power circuit switching signal frequency jitter control method steps when being executed by the processor.
The method for implementing the power circuit switching signal jitter frequency control procedure executed on the processor may refer to various embodiments of the power circuit switching signal jitter frequency control method of the present invention, and will not be described herein again.
In addition, the embodiment of the invention also provides a computer readable storage medium.
The computer readable storage medium of the present invention stores a power circuit switching signal frequency jitter control program, which when executed by a processor implements the steps of the power circuit switching signal frequency jitter control method as described above.
The method for implementing the power circuit switching signal jitter frequency control procedure executed on the processor may refer to various embodiments of the power circuit switching signal jitter frequency control method of the present invention, and will not be described herein again.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (8)
1. A power circuit switching signal frequency jitter control method is characterized by comprising the following steps:
determining the signal characteristics of the power switch circuit according to the type of the power switch circuit;
acquiring a frequency jittering amplitude and a frequency jittering mode corresponding to the power switch circuit according to the signal characteristics of the power switch circuit;
determining a basic cycle period of the power switch circuit frequency jitter according to the frequency jitter mode;
setting a dithering period of the power switching circuit according to the selected reference signal period and the basic cycle period;
according to the basic cycle period, calculating the number of frequency points and the distribution condition in the basic cycle period; wherein, the frequency points in one or several adjacent dithering cycles are not repeated;
and controlling the switch to carry out periodic frequency dithering in the frequency dithering mode and the frequency dithering period within the frequency dithering amplitude.
2. The method according to claim 1, wherein the step of obtaining a frequency jittering amplitude and a frequency jittering mode corresponding to the power switch circuit according to the signal characteristics of the power switch circuit comprises:
determining a jitter frequency range of the power switch circuit according to the signal characteristics of the power switch circuit;
and obtaining the frequency jittering amplitude of the power switch circuit according to the frequency jittering range and the frequency of the power switch circuit.
3. The power circuit switching signal jitter frequency control method of claim 2 wherein after the step of deriving a jitter frequency magnitude for the power switching circuit from the jitter frequency range and the frequency of the power switching circuit, the method further comprises:
and determining a corresponding frequency jittering mode according to the signal characteristics of the power switch circuit.
4. The method according to claim 3, wherein the step of determining a corresponding frequency jittering manner according to the signal characteristics of the power switching circuit specifically comprises:
if the equipment circuit connected with the power switch circuit has a first attribute, carrying out frequency dithering in a random or nonlinear mode;
and if the equipment circuit connected with the power switch circuit has a second attribute, carrying out frequency dithering in a preset frequency dithering mode.
5. The power circuit switching signal jitter control method of claim 1 wherein after the step of calculating the number of frequency points and the distribution within the fundamental cycle period based on the fundamental cycle period, the method further comprises:
determining whether the basic cycle period and the period of the reference signal need to be synchronized according to the signal characteristics of the power switch circuit;
and when the basic cycle period and the period of the reference signal need to be synchronized, synchronizing the basic cycle period and the period of the reference signal.
6. The power circuit switching signal jitter control method of claim 5 wherein after the step of determining whether the base cycle period and the period of the reference signal need to be synchronized based on the signal characteristics of the power switching circuit, the method further comprises:
and determining the relation between the basic cycle period and the reference signal period, wherein the relation between the basic cycle period and the reference signal period comprises the same or multiple relation between the basic cycle period and the reference signal period.
7. A power circuit switching signal jitter frequency control apparatus, the apparatus comprising: a memory, a processor and a power circuit switching signal jitter frequency control program stored on the memory and executable on the processor, the power circuit switching signal jitter frequency control program when executed by the processor implementing the steps of the power circuit switching signal jitter frequency control method according to any one of claims 1 to 6.
8. A computer-readable storage medium, having a power circuit switching signal jitter frequency control program stored thereon, wherein the power circuit switching signal jitter frequency control program, when executed by a processor, implements the steps of the power circuit switching signal jitter frequency control method according to any one of claims 1-6.
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| CN108344119B (en) * | 2018-02-10 | 2020-12-11 | 广东美的制冷设备有限公司 | Control method and device of air conditioner and computer readable storage medium |
| CN111010755B (en) * | 2019-11-13 | 2022-04-05 | 九阳股份有限公司 | Frequency jitter control method of electromagnetic heating equipment and electromagnetic heating equipment |
| CN110971118B (en) * | 2019-12-16 | 2022-04-01 | 深圳天邦达科技有限公司 | Jitter frequency control method, device and circuit |
| CN111404636B (en) * | 2020-03-10 | 2022-03-04 | 珠海格力电器股份有限公司 | Communication method, device and system capable of reducing bus interference |
| CN113517751A (en) * | 2021-05-11 | 2021-10-19 | 深圳威迈斯新能源股份有限公司 | Charging circuit and frequency modulation and phase modulation control method thereof |
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| CN101951723A (en) * | 2010-09-15 | 2011-01-19 | 张华建 | Frequency-shaking ballast resistor for electrode-less lamp |
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| CN101951723A (en) * | 2010-09-15 | 2011-01-19 | 张华建 | Frequency-shaking ballast resistor for electrode-less lamp |
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