CN107515962B - Method for calculating combined graph area of electronic layout - Google Patents

Method for calculating combined graph area of electronic layout Download PDF

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Publication number
CN107515962B
CN107515962B CN201710578750.0A CN201710578750A CN107515962B CN 107515962 B CN107515962 B CN 107515962B CN 201710578750 A CN201710578750 A CN 201710578750A CN 107515962 B CN107515962 B CN 107515962B
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file
area
software
layer
cam350
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CN107515962A (en
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李寿胜
尤广为
臧子昂
钱晓晴
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Anhui North Microelectronics Research Institute Group Co ltd
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North Electronic Research Institute Anhui Co., Ltd.
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement

Abstract

The invention discloses a method for calculating the combined graph area of an electronic layout, which comprises the following steps: exporting the electronic layout as a GBR file in EDA software for manufacturing the electronic layout; importing the GBR file into CAM350 software; combining an outer frame layer and a printing layer of the imported electronic layout file in CAM350 software; filling gaps between the outer frame layer and the printing layer in the CAM350 software for the file processed in the step c; separating the background layer and the filling layer of the file processed in the step d in the CAM350 software; exporting the file processed by the CAM350 into a dxf file; importing the dxf file into AUTOCAD software, and creating a face area for the imported file in the AUTOCAD software; merging the surface areas in AUTOCAD software; the area S1 of the outer frame and the area S2 of the combined area are respectively calculated by AUTOCAD software, the area S of the combined graph of the electronic layout is S1 minus S2, and the calculation of the total area after the complex graphs are combined is realized; the efficiency of calculating the printing area is high, and the calculation time can be greatly shortened.

Description

Method for calculating combined graph area of electronic layout
Technical Field
The invention relates to the technical field of microelectronic manufacturing, in particular to a method for calculating the area of a combined graph of an electronic layout.
Background
Electronic products such as thick-film hybrid integrated circuits or PCB printed circuit boards need to be drawn in electronic design software in advance to form a layout file, graphs of specific lines in the layout file are subjected to layered printing or deposition of other metal materials on substrate materials such as ceramics and PCBs through technological means such as optical drawing and plate making, and the printed or deposited graphs are consistent with design graphs.
In actual production, due to the high material cost, especially when the printing material is a gold-containing material, the gold-containing material is expensive, and needs to be purchased, however, the average per gram of such materials needs several hundred yuan, and the material price and the material amount are also related, generally, the more purchases, the lower the price, and this needs to calculate the material consumed by the production material of the product in advance to determine the purchase amount, and make a corresponding purchase plan, and in addition, in the material using process, the material consumption also needs to be calculated, and a necessary control means is established, so as to avoid waste. Therefore, it is necessary to accurately calculate the material printing consumption amount and to improve the cost controllability.
The amount of the printing or deposition material used in the prior art cannot be accurately calculated, the prior art can only be obtained by estimating the material use loss within a certain time, but the material use amount obtained by counting a plurality of products within a certain time cannot reflect the actual use amount, and the cost control and accounting of the printing material, particularly the valuable printing material, are not facilitated.
According to the inherent relation among the mass, the density and the volume of the material, the using mass of the printing material is equal to the product of the density and the volume, and the volume of the printing material is equal to the product of the printing area and the printing thickness.
Thus, with the film layer thickness (or thickness range) being determinable, the mass of material that can be printed per unit area can be obtained according to the following calculation:
assuming the thickness of the printed film layer is H, it can be expressed in cm, and assuming the material density provided by the material supplier is P, it can be expressed in g/cm3Assuming 1cm2The mass of the material printed per unit area is M, and the unit can be g/cm2The value of M can be easily calculated from the formula M = P × H.
After the mass of material printed per unit area is determined, the mass (or mass range) of printed material required for a single circuit can be known, as long as the area of the printed circuit can be calculated. Since the circuit printing is completed in layers, as long as the total area of the circuit in a single layer can be calculated, the mass of the printing material consumed by a certain layer of a single circuit can be calculated according to the following method:
assuming that the mass of printing material consumed to print a layer on a single circuit is M1, the unit can be given as g, and assuming that the total area of the single-layer circuit is S, the unit can be given as cm2And substituting the M value obtained by the previous calculation into a formula M1= M × S for calculation, and performing corresponding cost control and accounting by calculating the quality of the printing material required to be consumed by printing a certain layer by a single circuit.
However, the electronic layout usually uses special design software such as Protel, Cadence, Powerpcb, etc., and these software have no area calculation function, as shown in fig. 1, if the area is calculated by using special design software such as Protel, etc., the prior art can be obtained by measuring the size such as length, width, etc. of each graph and accumulating after calculating the area, the calculation is tedious, and calculation results are easy to miss or repeat, and errors are caused, in addition, there is superposition between the graphs, and there is a possibility of fillet transition at the superposition position, and the existing calculation cannot be considered for this factor, and also affects the accuracy of the calculation results, so the prior art consumes time and labor, and the calculation is not accurate. For slightly more complex areas of the pattern, this method requires at least 1 day of time to measure one by one, calculate one by one, and also require repeated proofreading.
Disclosure of Invention
The invention aims to provide a method for calculating the combined graph area of an electronic layout, which can accurately calculate the combined graph area of the electronic layout and master the use amount of printing materials, thereby realizing scientific and accurate control on material cost, and the calculation method is time-saving, labor-saving and high in efficiency.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a method for calculating the combined graph area of an electronic layout comprises the following steps:
a. exporting the electronic layout as a GBR file in EDA software for manufacturing the electronic layout;
b. importing the GBR file into CAM350 software;
c. combining an outer frame layer and a printing layer of the imported electronic layout file in CAM350 software;
d. filling gaps between the outer frame layer and the printing layer in the CAM350 software for the file processed in the step c;
e. separating the background layer and the filling layer of the file processed in the step d in the CAM350 software;
f. exporting the file processed by the CAM350 into a dxf file;
g. importing the dxf file into AUTOCAD software, and creating a face area for the imported file in the AUTOCAD software;
h. merging the surface areas in AUTOCAD software;
i. and (3) respectively calculating the area S1 of the outer frame and the area S2 of the merged area by using AUTOCAD software, wherein the area S of the combined graph of the electronic layout is S1 minus S2.
The invention has the beneficial effects that:
firstly, importing a layout file by means of CAM350 software, conducting necessary processing and exporting the layout file to a file editable by AUTOCAD software, and calculating a required area by means of the operation of creating, combining areas and the like on the processed graph by means of AUTOCAD, so that the calculation of the total area after the complex graphs are combined is realized;
compared with the prior art, the total area of a printed graph can be calculated in at most 20 minutes by using the calculating method provided by the invention, the efficiency of calculating the printing area is high, and the calculating time can be greatly shortened;
thirdly, the calculation is accurate, and accurate data can be provided for cost control; through actual measurement and calculation, according to the method provided by the invention, the error between the calculated material usage and the actual consumption is within 5%;
and fourthly, the application range is wide, and calculation can be carried out according to the method as long as EDA design software can provide an interface for conversion with CAM350 software.
Drawings
The invention is further illustrated with reference to the following figures and examples:
FIG. 1 is a gold conduction band single layer printed graph of an electronic layout in a Protel environment according to an embodiment of the present invention;
FIG. 2 is a popup menu clicking "CAM Manager" in Protel;
FIG. 3 is a pop-up menu for exporting "Gerber" in Protel;
FIG. 4 is a diagram illustrating the location of export GBR folders in Protel;
FIG. 5 is an initial interface for the CAM350 system to import a GBR file;
FIG. 6 shows the state of the printed layer and the substrate outer frame layer in the document layout after the CAM350 is introduced;
FIG. 7 is a combined image of the printed image layer and the substrate framing layer in CAM 350;
FIG. 8 is a state after selecting a merged layer in CAM350 and modifying the background layer attribute to "dark";
FIG. 9 is the state of the graph after the populated graph (with the default background layer) has been moved together into a new layer (layer 3);
FIG. 10 is a state after an example of moving a fill pattern into a new layer (layer 4);
FIG. 11 is a graphical interface for deriving dxf in CAM 350;
fig. 12 is a state in which a graphic file is opened in AUTOCAD;
fig. 13 is a state after a face field is graphically created in AUTOCAD;
FIG. 14 is a state after the graphics have merged the area in AUTOCAD;
fig. 15 shows the display area of the graphic attribute column in AUTOCAD.
Detailed Description
The invention provides a method for calculating the combined graph area of an electronic layout, which comprises the following steps:
step a, exporting the electronic layout as a GBR file in EDA software for manufacturing the electronic layout;
the present embodiment specifically describes the program specification by taking the PROTE L software as an example, and as shown in fig. 1, the program specification is a gold conduction band single-layer printed pattern of an electronic layout in a Protel environment.
Referring to fig. 2, entering a Protel, opening a PCB File, sequentially clicking File → CAM Manager, clicking 'NEXT' in the popup menu in fig. 2, referring to fig. 3, selecting 'Gerber' in the popup menu in fig. 3, then continuously clicking 'NEXT', entering a graphic unit selection interface, generally selecting inch, and entering an image layer selection interface, selecting an outer frame layer and an image layer to be calculated. Continue clicking "NEXT" continuously, and finally click "finish". Then find the "gerber output 1" file, right click, select "Generation CAM Files" in the drop down menu. And then finding the generated folder, clicking right, selecting 'Export' in a pull-down menu, exporting the output file to a specified folder according to a prompt, wherein the folder contains all output GBR files, and the generated folder is the one corresponding to the blue background folder graph as shown in the combined graph of FIG. 4.
Step b, importing the GBR file into CAM350 software;
the method specifically comprises the following steps: entering CAM350, clicking calls GBR files in the following sequence: file → Import → GerberData …, according to the hint, select the GBR File exported in step a, and when importing the File, only select the GBR File of the printing and substrate outline layer that needs to be calculated.
FIG. 5 shows the initial interface of the 8.7 version CAM350 system when importing a GBR file.
Fig. 6 shows a state in which the printed pattern layer and the substrate outer frame layer are selectively introduced, in which the 1 st layer "hg93xx.gko" is the substrate outer frame layer and the 2 nd layer "hg93xx.gtl" is the gold-tape printed pattern layer.
Step c, combining an outer frame layer and a printing layer of the imported electronic layout file in CAM350 software;
specifically, in the CAM350, the outer frame layer and the printing are combined into one layer, the recommending operation is to click Edit → Move in sequence in one layer, click and Select 'Select All' in the popped-up menu, click 'Move to L eye' in the popped-up menu, and then Move the selected graph to the designated layer according to the prompt.
Fig. 7 shows a state of a combined pattern formed in the printing layer (layer 2) after the outer frame layer is entirely transferred into the printing layer and combined in the CAM350 software.
D, filling a gap between the outer frame layer and the printing layer in the CAM350 software for the file processed in the step c;
specifically, in the CAM350, the filling operation command is divided into two steps, the first step is combination, the operation command is Table → composites …, add is clicked in a pop-up menu, the combined layer is selected, the attribute on the right side of the layer is clicked to be clear, the attribute of the background layer is clicked to be dark, and then OK is clicked to end, the second step is that the combined graph is moved into a new layer, the operation command is Utilities → composites to L player, and the filled graph (including the default background layer) is transferred into the new layer according to the graph.
FIG. 8 shows a state after selecting a merged layer (layer 2) and modifying the background layer attribute to "dark" in the combining operation.
FIG. 9 shows the state of the graphics after the filled graphics (with the default background layer) are moved together into a new layer (layer 3).
Step e, separating the background layer and the filling layer of the file processed in the step d in the CAM350 software;
specifically, in the CAM350, Edit → Move is clicked in sequence, the filled graphics are clicked and selected in the filled part, and then the selected graphics are moved to the appointed layer according to the prompt after the 'Move to L eye' is clicked.
Fig. 10 shows a state after the filling pattern of this example is shifted into a new layer (layer 4).
F, exporting the file processed by the CAM350 into a dxf file;
the method specifically comprises the following steps: in the CAM350, the File → Import → DXF is clicked in turn, and only the layer where the fill graphics processed in step 5 are located is selected according to the prompt, and the DXF File is exported.
FIG. 11 shows a graphical interface for exporting a CAM350 file to dxf.
Step g, importing the dxf file into AUTOCAD software, and creating a face area for the imported file in the AUTOCAD software;
the method specifically comprises the following steps: and (3) opening the export file by using AUOTCAD software, sequentially clicking drawing → surface areas, then selecting an object to be created in a frame, pressing an ENTER key, and automatically splitting the selected filling graph into the surface areas.
Fig. 12 shows a state in which the file of this example is opened in AUTOCAD.
Fig. 13 shows the situation after the face area is created in AUTOCAD.
H, combining the surface areas in AUTOCAD software;
the method specifically comprises the following steps: sequentially clicking an entity editing option in a 'modification' pull-down menu in AUTOCAD, selecting a 'union set' option in the pull-down menu, then selecting an object to be combined in a frame, and pressing an ENTER key to automatically combine the selected object; i.e. modify → entity edit → union → box select the object to be merged → press ENTER key.
FIG. 14 shows the situation after the graphics of this example merge the regions in AUTOCAD.
And i, respectively calculating the area S1 of the outer frame and the area S2 of the merged area by using AUTOCAD software, wherein the area S of the combined graph of the electronic layout is S1 minus S2.
The method specifically comprises the following steps: clicking the left button in AUTOCAD to select the combined area graph, clicking the right button, popping up a menu, selecting 'characteristic', and obtaining the area of the filled graph in the area column S2. And calculating the area S1 of the outer frame according to the size of the outer frame, and calculating the area S of the printing pattern according to the formula S = S1-S2.
As shown in FIG. 15, the area S2 in the graphic property bar of this example is 1.3968 (in inches). In this example, the length dimension of the substrate is found to be 1.99inch, the width dimension is found to be 0.811inch, and the area dimension S1 of the substrate is found to be 1.6139inch from the actual measurement of the layout, and the area S of the printed pattern in this example is found to be 1.6139-1.3968=0.2171inch according to the above calculation requirements.
The foregoing is merely a preferred embodiment of the invention and is not intended to limit the invention in any manner; those skilled in the art can make numerous possible variations and modifications to the present teachings, or modify equivalent embodiments to equivalent variations, without departing from the scope of the present teachings, using the methods and techniques disclosed above. Therefore, any simple modification, equivalent replacement, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention.

Claims (1)

1. A method for calculating the combined graph area of an electronic layout is characterized by comprising the following steps:
a. exporting the electronic layout as a GBR file in EDA software for manufacturing the electronic layout;
b. importing the GBR file into CAM350 software;
c. combining an outer frame layer and a printing layer of the imported electronic layout file in CAM350 software;
d. filling gaps between the outer frame layer and the printing layer in the CAM350 software for the file processed in the step c;
e. separating the background layer and the filling layer of the file processed in the step d in the CAM350 software;
f. exporting the file processed by the CAM350 into a dxf file;
g. importing the dxf file into AUTOCAD software, and creating a face area for the imported file in the AUTOCAD software;
h. merging the surface areas in AUTOCAD software;
i. and (3) respectively calculating the area S1 of the outer frame and the area S2 of the merged area by using AUTOCAD software, wherein the area S of the combined graph of the electronic layout is S1 minus S2.
CN201710578750.0A 2017-07-17 2017-07-17 Method for calculating combined graph area of electronic layout Active CN107515962B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101789048A (en) * 2010-02-08 2010-07-28 浙江大学 Method for quickly extracting critical area of layout
CN102314531A (en) * 2010-07-02 2012-01-11 北京华大九天软件有限公司 Automatic hierarchy construction method for integrated circuit layout

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101789048A (en) * 2010-02-08 2010-07-28 浙江大学 Method for quickly extracting critical area of layout
CN102314531A (en) * 2010-07-02 2012-01-11 北京华大九天软件有限公司 Automatic hierarchy construction method for integrated circuit layout

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
CAM350使用完整版;lvle007;《百度文库》;20120328;第1-18页 *
粗略说下建面域及算面积;wamfcadw;《沐风论坛》;20121028;第1-2页 *

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Address after: No. 2016, Tanghe Road, economic development zone, Bengbu City, Anhui Province 233030

Patentee after: Anhui North Microelectronics Research Institute Group Co.,Ltd.

Address before: No. 2016, Tanghe Road, economic development zone, Bengbu City, Anhui Province 233030

Patentee before: NORTH ELECTRON RESEARCH INSTITUTE ANHUI Co.,Ltd.