CN107506290B - Control system for standard solid state disk state indicator lamp of nonvolatile memory - Google Patents

Control system for standard solid state disk state indicator lamp of nonvolatile memory Download PDF

Info

Publication number
CN107506290B
CN107506290B CN201710706736.4A CN201710706736A CN107506290B CN 107506290 B CN107506290 B CN 107506290B CN 201710706736 A CN201710706736 A CN 201710706736A CN 107506290 B CN107506290 B CN 107506290B
Authority
CN
China
Prior art keywords
indicator lamp
state
hard disk
programmable logic
logic device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710706736.4A
Other languages
Chinese (zh)
Other versions
CN107506290A (en
Inventor
刘艳霞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Inspur Intelligent Technology Co Ltd
Original Assignee
Suzhou Inspur Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Inspur Intelligent Technology Co Ltd filed Critical Suzhou Inspur Intelligent Technology Co Ltd
Priority to CN201710706736.4A priority Critical patent/CN107506290B/en
Publication of CN107506290A publication Critical patent/CN107506290A/en
Application granted granted Critical
Publication of CN107506290B publication Critical patent/CN107506290B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/32Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324Display of status information
    • G06F11/325Display of status information by lamps or LED's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

A control system of a standard solid state hard disk state indicator lamp of a nonvolatile memory comprises a Complex Programmable Logic Device (CPLD), wherein the Complex Programmable Logic Device (CPLD) is connected with a Central Processing Unit (CPU), a hard disk state indicator lamp and a south bridge chip (PCH); the complex programmable logic device CPLD is used for judging whether the volume manager VMD is in an open state or a closed state according to the information sent by the south bridge chip PCH; the complex programmable logic device CPLD is also used for controlling the state of the hard disk state indicator lamp when the volume manager VMD is in a closed state. In the invention, under the condition that the volume manager VMD is closed, the complex programmable logic device CPLD directly controls the state of the hard disk state indicator lamp, thereby unifying the management of the hard disk state indicator lamp.

Description

Control system for standard solid state disk state indicator lamp of nonvolatile memory
Technical Field
The invention belongs to the field of server testing of a whole cabinet, and particularly relates to a control system of a standard solid state disk state indicator lamp of a nonvolatile memory.
Background
Complex Programmable Logic Device, NVMe: Non-Volume Memory express nonvolatile Memory standard, VMD Volume Management Device, SSD Solid State drive Solid State disk, POST: power On Self Test, BIOS Basic Input/Output System, GPIO General Purpose Input/Output, SMBus System Management Bus.
Unlike traditional SAS and SATA protocols, NVMe (Non-Volatile Memory express) is a set of standardized protocols and commands based on PCIe bus, and has characteristics of high IOPS, low latency, low power consumption, and the like.
The NVMe is an extensible storage application protocol, and can fully exert the performance of the PCIe solid state disk, so that the application requirements of various scenes such as enterprise level, data center and consumption level are better met.
The NVMe solid state disk is widely designed and applied to an Intel Purley platform, and is different from SAS/SATA which has mature and complete hard disk indicator lamp management specifications. The state of the hard disk indicator lamp of the NVMe solid state disk is uniformly managed by the VMD storage driver of Intel when the VMD is started. And when the VMD is closed, the VMD is controlled by the BIOS and the drive of the operating system.
In the latter case, the actual appearance of the hard disk light is not uniform when the VMD is off. For example, under different operating systems, the hard disk indicator lamp shows different behaviors, and the hard disk indicator lamp does not conform to the actual state of the hard disk.
Under the condition that the VMD is closed, the hard disk indicator lamp of the NVMe solid state disk is controlled by a default value set by the BIOS in the BIOS power-on self-test stage, but after the operating system driver takes over the control right, the state of the hard disk indicator lamp is relatively disordered due to the fact that no VMD driver is uniformly managed.
The state representation of the hard disk state indicator lamp is different under different operating systems such as Windows and Linux, or the representation of the hard disk state indicator lamp is not accordant with the actual state of the hard disk. Although the problem of data transmission failure or system stability cannot be caused, the user may be disturbed or even misled to judge the state of the hard disk, and the user experience is influenced.
As shown in fig. 1, the complex programmable logic device CPLD 1 does not determine the state of the volume manager VMD of the system, and analyzes all information sent to the CPLD by the central processing unit CPU and directly outputs the information to drive the hard disk state indicator 4, so that when the volume manager VMD is turned off, the hard disk state indicator shows different states under different operating systems, or the hard disk state indicator does not represent the actual hard disk state, which causes a user to be confused or even misled in the judgment of the user.
This is a deficiency of the prior art, and therefore, in view of the above-mentioned disadvantages in the prior art, it is very necessary to provide a control system for a standard solid state hard disk status indicator lamp of a nonvolatile memory.
Disclosure of Invention
The present invention provides a control system for a standard solid state disk status indicator lamp of a non-volatile memory, aiming at the defect that the standard solid state disk status indicator lamp of the non-volatile memory is not uniform when a volume management device is turned off, so as to solve the technical problem.
In order to achieve the purpose, the invention provides the following technical scheme:
a control system of a standard solid state hard disk state indicator lamp of a nonvolatile memory comprises a Complex Programmable Logic Device (CPLD), wherein the Complex Programmable Logic Device (CPLD) is connected with a Central Processing Unit (CPU), a hard disk state indicator lamp and a south bridge chip (PCH);
the complex programmable logic device CPLD is used for judging whether the volume manager VMD is in an open state or a closed state according to the information sent by the south bridge chip PCH;
the complex programmable logic device CPLD is also used for controlling the state of the hard disk state indicator lamp when the volume manager VMD is in a closed state.
Furthermore, the complex programmable logic device CPLD is also configured to directly analyze information sent by the central processing unit CPU when the volume manager VMD is in an open state, and the analyzed information drives the hard disk state indicator light.
Further, the complex programmable logic device CPLD directly resolves the information of the I2C protocol sent by the central processing unit CPU.
Further, the hard disk status indicator lamp comprises a hard disk error status indicator lamp and a hard disk in-place status indicator lamp.
Further, when the volume manager VMD is in the off state, the complex programmable logic device CPLD raises the hard disk error state indicator light and the hard disk in-place state indicator light to control the hard disk error state indicator light and the hard disk in-place state indicator light to be in the non-lighting state.
Further, the complex programmable logic device CPLD is connected with the central processing unit CPU through a system management bus SMBUS.
Further, the south bridge chip PCH is connected to the complex programmable logic device CPLD via a general purpose input/output port GPIO.
Further, the south bridge chip PCH is connected to the complex programmable logic device CPLD via a newly added or reserved GPIO.
When the volume manager VMD is in an open state in the setting of the basic input output system BIOS, the basic input output system BIOS sets the general purpose input output port GPIO high; when the volume manager VMD is in the off state in the setting of the basic input output system BIOS, the basic input output system BIOS sets the general purpose input output port GPIO to be low. And the complex programmable logic device CPLD judges whether the volume manager VMD is opened or not according to the state of the general input/output port GPIO.
The invention has the beneficial effects that: on the premise of not increasing the cost, the complex programmable logic device CPLD directly controls the state of the hard disk state indicator lamp through a simple and easy software and hardware design mode under the condition that the volume manager VMD is turned off, so that the management of the hard disk state indicator lamp is unified, the user experience can be improved, and the product image and the competitiveness are improved.
In addition, the invention has reliable design principle, simple structure and very wide application prospect.
Therefore, compared with the prior art, the invention has prominent substantive features and remarkable progress, and the beneficial effects of the implementation are also obvious.
Drawings
FIG. 1 is a schematic diagram of a control system for a standard solid state disk status indicator lamp of a nonvolatile memory in the prior art;
FIG. 2 is a schematic diagram of the system of the present invention;
wherein, 1-complex programmable logic device CPLD; 2-central slave processor CPU; 3-south bridge chip PCH; 3.1-general purpose input output port GPIO; 4-hard disk status indicator light; 4.1-hard disk error status indicator light; 4.2-hard disk on-position status indicator lamp.
The specific implementation mode is as follows:
in order to make the objects, features and advantages of the present invention more obvious and understandable, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
As shown in fig. 2, the present invention provides a control system for a standard solid state hard disk status indicator lamp of a nonvolatile memory, which comprises a complex programmable logic device CPLD 1, wherein the complex programmable logic device CPLD 1 is connected with a central processing unit CPU 2, a hard disk status indicator lamp 4 and a south bridge chip PCH 3; the hard disk state indicator lamp 4 comprises a hard disk error state indicator lamp 4.1 and a hard disk in-place state indicator lamp 4.2; the complex programmable logic device CPLD 1 is connected with the central processing unit CPU 2 through a system management bus SMBUS; the south bridge chip PCH 3 is connected with the complex programmable logic device CPLD 1 through a newly added or reserved general purpose input output port GPIO;
the complex programmable logic device CPLD 1 is used for judging whether the volume manager VMD is in an open state or a closed state according to the information sent by the south bridge chip PCH 3;
the complex programmable logic device CPLD 1 is also used for controlling the state of the hard disk state indicator lamp 4 when the volume manager VMD is in a closed state, heightening the hard disk error state indicator lamp 4.1 and the hard disk in-place state indicator lamp 4.2, and controlling the hard disk error state indicator lamp 4.1 and the hard disk in-place state indicator lamp 4.2 to be in a non-lighting state;
the complex programmable logic device CPLD 1 is also used for directly analyzing the information of the I2C protocol sent by the central processing unit CPU 2 when the volume manager VMD is in an open state, and driving the hard disk state indicator lamp 4 by the analyzed information;
when the volume manager VMD is in an open state in the setting of the basic input output system BIOS, the basic input output system BIOS sets the general purpose input output port GPIO high; when the volume manager VMD is in a closed state in the setting of the basic input output system BIOS, the basic input output system BIOS sets a General Purpose Input Output (GPIO) to be low; and the complex programmable logic device CPLD judges whether the volume manager VMD is opened or not according to the state of the general input/output port GPIO.
The embodiments of the present invention are illustrative rather than restrictive, and the above-mentioned embodiments are only provided to help understanding of the present invention, so that the present invention is not limited to the embodiments described in the detailed description, and other embodiments derived from the technical solutions of the present invention by those skilled in the art also belong to the protection scope of the present invention.

Claims (5)

1. A control system for a nonvolatile memory standard solid state disk state indicator lamp is characterized by comprising
The complex programmable logic device CPLD is connected with a central processing unit CPU, a hard disk state indicator lamp and a south bridge chip PCH;
the complex programmable logic device CPLD is used for judging whether the volume manager VMD is in an open state or a closed state according to the information sent by the south bridge chip PCH;
the complex programmable logic device CPLD is also used for controlling the state of the hard disk state indicator lamp when the volume manager VMD is in a closed state;
the complex programmable logic device CPLD is also used for directly analyzing the information sent by the CPU when the volume manager VMD is in an open state, and driving the hard disk state indicator lamp by the analyzed information, wherein when the volume manager VMD is in the open state, the volume manager VMD uniformly manages the state of the hard disk state indicator lamp; the hard disk state indicator lamp comprises a hard disk error state indicator lamp and a hard disk in-place state indicator lamp;
when the volume manager VMD is in a closed state, the complex programmable logic device CPLD sets the hard disk error state indicator lamp and the hard disk in-place state indicator lamp high to control the hard disk error state indicator lamp and the hard disk in-place state indicator lamp to be in a non-lighting state.
2. The control system of the standard solid state disk status indicator lamp of the nonvolatile memory as claimed in claim 1, wherein the complex programmable logic device CPLD directly analyzes the information of the I2C protocol sent by the central processing unit CPU.
3. The system as claimed in claim 1, wherein the complex programmable logic device CPLD is connected to the central processing unit CPU via a system management bus SMBUS.
4. The system as claimed in claim 1, wherein the south bridge chip PCH is connected to the CPLD through a GPIO.
5. The control system of claim 4, wherein the south bridge chip PCH is connected to the CPLD through a newly added or reserved GPIO.
CN201710706736.4A 2017-08-17 2017-08-17 Control system for standard solid state disk state indicator lamp of nonvolatile memory Active CN107506290B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710706736.4A CN107506290B (en) 2017-08-17 2017-08-17 Control system for standard solid state disk state indicator lamp of nonvolatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710706736.4A CN107506290B (en) 2017-08-17 2017-08-17 Control system for standard solid state disk state indicator lamp of nonvolatile memory

Publications (2)

Publication Number Publication Date
CN107506290A CN107506290A (en) 2017-12-22
CN107506290B true CN107506290B (en) 2020-09-25

Family

ID=60691198

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710706736.4A Active CN107506290B (en) 2017-08-17 2017-08-17 Control system for standard solid state disk state indicator lamp of nonvolatile memory

Country Status (1)

Country Link
CN (1) CN107506290B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109032992A (en) * 2018-07-12 2018-12-18 郑州云海信息技术有限公司 A kind of server NVME hard disk backboard LED control device and method
CN109213661A (en) * 2018-09-17 2019-01-15 郑州云海信息技术有限公司 A kind of easy-to-use system and method for realizing hard disk or more Electricity Functional
CN110377231B (en) * 2019-07-12 2022-07-22 苏州浪潮智能科技有限公司 VMD control method and device, electronic equipment and readable storage medium
CN111198831A (en) * 2019-12-27 2020-05-26 苏州浪潮智能科技有限公司 NVME hard disk management system and method based on uninstalling card
CN113190419B (en) * 2021-03-22 2022-06-07 山东英信计算机技术有限公司 Method and system for lighting hard disk backboard in POST stage and storage medium

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101996128A (en) * 2009-08-17 2011-03-30 英业达股份有限公司 Hard disk state indicator lamp control system
CN104239187A (en) * 2013-06-11 2014-12-24 鸿富锦精密工业(深圳)有限公司 Hard disk state indicating device
CN104731686A (en) * 2013-12-19 2015-06-24 鸿富锦精密电子(天津)有限公司 Indicator control system and electronic device
CN105487959A (en) * 2015-12-09 2016-04-13 浪潮电子信息产业股份有限公司 Management method of intel NVMe hard disk
CN105512007A (en) * 2015-12-17 2016-04-20 英业达科技有限公司 Method for controlling peripheral component interface express (PCIE) hard disk status lamp and system
CN105529045A (en) * 2015-12-02 2016-04-27 英业达科技有限公司 Lamp signal control system for nonvolatile memory solid state disk
CN105955898A (en) * 2016-05-25 2016-09-21 浪潮电子信息产业股份有限公司 Hard disk backboard compatible with SAS hard disk and NVMe hard disk
CN106294084A (en) * 2016-09-12 2017-01-04 恒为科技(上海)股份有限公司 A kind of monitoring hard-disk status system
US20170161165A1 (en) * 2015-12-02 2017-06-08 Inventec (Pudong) Technology Corporation System is applied to control indicator lights for non-volatile memory express solid state disk

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101996128A (en) * 2009-08-17 2011-03-30 英业达股份有限公司 Hard disk state indicator lamp control system
CN104239187A (en) * 2013-06-11 2014-12-24 鸿富锦精密工业(深圳)有限公司 Hard disk state indicating device
CN104731686A (en) * 2013-12-19 2015-06-24 鸿富锦精密电子(天津)有限公司 Indicator control system and electronic device
CN105529045A (en) * 2015-12-02 2016-04-27 英业达科技有限公司 Lamp signal control system for nonvolatile memory solid state disk
US20170161165A1 (en) * 2015-12-02 2017-06-08 Inventec (Pudong) Technology Corporation System is applied to control indicator lights for non-volatile memory express solid state disk
CN105487959A (en) * 2015-12-09 2016-04-13 浪潮电子信息产业股份有限公司 Management method of intel NVMe hard disk
CN105512007A (en) * 2015-12-17 2016-04-20 英业达科技有限公司 Method for controlling peripheral component interface express (PCIE) hard disk status lamp and system
CN105955898A (en) * 2016-05-25 2016-09-21 浪潮电子信息产业股份有限公司 Hard disk backboard compatible with SAS hard disk and NVMe hard disk
CN106294084A (en) * 2016-09-12 2017-01-04 恒为科技(上海)股份有限公司 A kind of monitoring hard-disk status system

Also Published As

Publication number Publication date
CN107506290A (en) 2017-12-22

Similar Documents

Publication Publication Date Title
CN107506290B (en) Control system for standard solid state disk state indicator lamp of nonvolatile memory
JP6515132B2 (en) Chassis management system and chassis management method
US9122501B1 (en) System and method for managing multiple bios default configurations
US10031736B2 (en) Automatic system software installation on boot
US9542201B2 (en) Network bios management
US9430305B2 (en) Server system
US10296434B2 (en) Bus hang detection and find out
EP2901245B1 (en) Efficient low power exit sequence for peripheral devices
MX2014001056A (en) Method and system for building a low power computer system.
US10210842B2 (en) Techniques of displaying host data on a monitor connected to a service processor during pre-boot initialization stage
CN106201332A (en) Drive Array Policy Control
US9880858B2 (en) Systems and methods for reducing BIOS reboots
JP6864718B2 (en) Hybrid power supply system and method
US20190026022A1 (en) System and Method to Detect Storage Controller Workloads and to Dynamically Split a Backplane
US20140281095A1 (en) Computing device and method for integrating thunderbolt chip on motherboard
US8374046B2 (en) Computing device and method for clearing data stored in complementary metal-oxide semiconductor chip
US10996942B1 (en) System and method for graphics processing unit firmware updates
US11226862B1 (en) System and method for baseboard management controller boot first resiliency
US10628309B1 (en) Loading a serial presence detect table according to jumper settings
US10297004B2 (en) Multiple frame buffers for windowless embedded environment
CN211375594U (en) Interface extension mechanism based on SW421 treater
US10782764B2 (en) Techniques of emulating an ACPI controller on a service processor
CN113190419B (en) Method and system for lighting hard disk backboard in POST stage and storage medium
US20130191592A1 (en) Redundant array of independent disks raid controller and system
CN210323963U (en) Safety main control board based on Shenwei 121 processor

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right

Effective date of registration: 20200820

Address after: 215100 No. 1 Guanpu Road, Guoxiang Street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province

Applicant after: SUZHOU LANGCHAO INTELLIGENT TECHNOLOGY Co.,Ltd.

Address before: 450000 Henan province Zheng Dong New District of Zhengzhou City Xinyi Road No. 278 16 floor room 1601

Applicant before: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY Co.,Ltd.

TA01 Transfer of patent application right
GR01 Patent grant
GR01 Patent grant