CN107491598B - Large-scale microfluidic biochip rapid wiring method and device - Google Patents
Large-scale microfluidic biochip rapid wiring method and device Download PDFInfo
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- CN107491598B CN107491598B CN201710633076.1A CN201710633076A CN107491598B CN 107491598 B CN107491598 B CN 107491598B CN 201710633076 A CN201710633076 A CN 201710633076A CN 107491598 B CN107491598 B CN 107491598B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
Abstract
The embodiment of the invention provides a method and equipment for quickly wiring a large-scale microfluidic biochip. The method comprises the following steps: reading in the connection end position information, the wiring design rule and the chip size of the biochip to be wired; dividing a region to be wired by using a divide-and-conquer strategy according to the size of a chip to obtain a plurality of wiring subregions; obtaining a wiring starting point of a wiring area to be wired by a rule-based wiring method or a semi-rule A-search algorithm in a sub-area to be wired; and wiring the wiring sub-area which is not subjected to wiring by using coordinate transformation. The device is used for executing the method, the embodiment of the invention divides the area to be wired by a divide-and-conquer strategy, and routes the connection starting point in the area to be wired by utilizing a rule-based wiring method or a semi-rule A-x search algorithm for one divided sub-area to be wired, and then routes the wiring sub-area which is not wired by utilizing coordinate transformation, thereby improving the wiring efficiency.
Description
Technical Field
The embodiment of the invention relates to the technical field of microfluidic biochip design automation, in particular to a method and equipment for rapidly wiring a large-scale microfluidic biochip.
Background
The microfluid biochip, also called lab-on-a-chip, is a technology that integrates basic operation units of sample preparation, reaction, separation, detection, etc. in the biological, chemical and medical analysis processes onto a micro-nano scale chip, and a network is formed by microchannels, so that a controllable fluid can penetrate through the whole system to automatically complete the whole analysis process. The microfluid biochip is a necessary product of microminiaturization, can effectively reduce the dosage of reagents, improves the sensitivity and brings great economic benefit. The microfluid biochip can be widely applied to the fields of food safety, ecological environment monitoring and protection, disease diagnosis and the like, and is the mainstream technology of next generation analytical products. Microfluidic biochips have many advantages over conventional assay devices.
Firstly, considering the influence condition of the chemical reaction rate, the small and portable lab-on-a-chip can solve the problem of controlling the contact area of reactants in the design stage more easily, and the problem of controlling the temperature in the test stage, thereby greatly shortening the reaction time of the sample and improving the test efficiency.
Second, consider the cost of the test. From the cost of test equipment, most of the manufacturing materials of the microfluidic chip are inexpensive monocrystalline silicon wafers, quartz, glass and organic polymers, and as long as the cost consumption of the chip in the design stage and in the research and manufacturing process is solved, after the microfluidic chip is put into use formally, a large amount of scientific research cost can be saved for each chip. From the perspective of test reagent cost, many samples and reagents used in biological, chemical and medical tests are high in cost or are rare in source, and the micro-fluidic chip on the micron scale can save a large amount of precious samples compared with the traditional test mode.
Finally, the microfluidic biochip can effectively balance the problem of unbalanced medical resources or scientific research resources in regions, so that places which cannot have advanced instruments can conveniently and effectively complete the research of disease detection, prevention and treatment schemes, laboratories with limited expenditure can perform original complex and expensive experiments, even ordinary families can have mature and effective disease control modes, and the quality of life is improved.
At present, the design of the microfluidic biochip is mainly manually designed, and the connection lines on the biochip are drawn manually through software by trained designers by adopting software such as AutoCAD (auto computer aided design) and even Photoshop. Such a design requires a significant amount of time, typically weeks or even months, to complete. Although microfluidic biochips for drug delivery can be modeled as a least-cost network flow problem to be solved with a computer program, the solution time is still unacceptable due to their large scale, which requires tens of hours. Therefore, how to improve the efficiency of automated wiring for large-scale microfluidic biochips is an urgent issue to be solved.
Disclosure of Invention
Aiming at the problems in the prior art, the embodiment of the invention provides a wiring method and equipment for a large-scale microfluidic biochip.
In one aspect, an embodiment of the present invention provides a large-scale microfluidic biochip rapid wiring method, including:
reading information to be wired of the microfluidic biochip to be wired, wherein the information to be wired comprises wiring end point position information, wiring design rules and chip sizes, and the wiring design rules comprise a rule-based wiring method or a semi-rule-based A-algorithm wiring method;
dividing the area to be wired by using a dividing and controlling strategy according to the size of the chip to obtain a plurality of wiring sub-areas;
obtaining one wiring sub-region as a sub-region to be wired, and wiring a connection starting point in the region to be wired by using a rule-based wiring method or a semi-rule A-search algorithm;
and according to the to-be-wired subarea which is wired, wiring the to-be-wired subarea which is not wired by utilizing coordinate transformation.
In another aspect, an embodiment of the present invention provides an electronic device, including: a processor, a memory, and a bus, wherein,
the processor and the memory are communicated with each other through the bus;
the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method steps described above.
In yet another aspect, an embodiment of the present invention provides a non-transitory computer-readable storage medium, including:
the non-transitory computer readable storage medium stores computer instructions that cause the computer to perform the method steps described above.
According to the large-scale micro-fluidic biochip rapid wiring method and device provided by the embodiment of the invention, the area to be wired is divided through a divide-and-conquer strategy, the wiring starting point in the sub-area to be wired is wired by a sub-area to be wired through a rule-based wiring method or a semi-rule A-search algorithm, and the wiring of the sub-area to be wired which is not wired is realized through coordinate transformation, so that the wiring efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic flow chart of a large-scale microfluidic biochip rapid wiring method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a coordinate transformation method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a rule-based routing method according to an embodiment of the present invention;
fig. 4 is a schematic wiring diagram of an a-search algorithm according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a routing flow of the a-search algorithm according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a layout using the a-search algorithm according to another embodiment of the present invention;
fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic flow chart of a large-scale microfluidic biochip rapid wiring method provided in an embodiment of the present invention, and as shown in fig. 1, the method includes:
step 101: reading information to be wired of the microfluidic biochip of the area to be wired, wherein the information to be wired comprises wiring starting point position information, wiring design rules and chip sizes, and the wiring design rules comprise a rule-based wiring method or a semi-rule-based A-algorithm wiring method; specifically, to-be-wired information of the to-be-wired microfluidic biochip is acquired, wherein the to-be-wired information includes position information of a wiring starting point, a wiring design rule and a chip size, it should be noted that the wiring starting point information refers to information of a wiring starting point and information of a wiring end point on a to-be-wired region, the wiring starting point is an internal starting point in the to-be-wired region, and the wiring end point is a control pin at the edge of the to-be-wired region. The information of the starting points of the links can comprise the number of the starting points of the links in the area to be routed and the positions of the starting points of the links; the wire end point information may include the number of control pins in the area to be routed and the location of each control pin. The routing design rules include a rule-based routing method or a semi-rule-based a-algorithm routing method. It is to be understood that the information to be wired may also include other information, such as a distance between two connection starting points, and the like, which is not specifically limited in this embodiment of the present invention.
Step 102: dividing the area to be wired by using a dividing and controlling strategy according to the size of the chip to obtain a plurality of wiring sub-areas;
specifically, after the size of the area to be wired is obtained, the area to be wired is divided according to the size of the area to be wired, a dividing and controlling strategy is adopted for dividing a large-scale problem into a plurality of sub-problems with smaller scales, the sub-problems are independent of each other and are consistent with the original large-scale problem in form, the small-scale sub-problems are solved, and then solutions of the sub-problems are combined to obtain a solution of the large-scale problem. For example: the width of the area to be wired in the horizontal direction is w, the height of the area to be wired in the vertical direction is h, the area to be wired can be divided into 4 wiring sub-areas through diagonal lines, and the specific formula of the division is as follows:
it should be noted that the area to be wired may be divided into a plurality of wiring sub-areas according to actual situations, which is not specifically limited in the embodiment of the present invention.
Step 103: obtaining one wiring subregion as a subregion to be wired, and wiring a wiring starting point in the subregion to be wired by using a rule-based wiring method or a semi-regular A-search algorithm;
specifically, one wiring sub-region obtained after division is taken as a sub-region to be wired, and a wiring starting point of the sub-region to be wired is wired, wherein the wiring method based on the rule can be used for determining the wiring rule according to the position information of the current wiring starting point in the sub-region to be wired in advance, and after the wiring rule is determined, the wiring can be completed according to the wiring rule. The semi-rule-based A-search algorithm is used for determining the wiring sequence of the connection starting points in the wiring area in advance, and wiring is performed by using the A-search algorithm according to the wiring sequence, wherein the A-search algorithm is the most effective method for solving the shortest path in a static road network, and the optimal path of the current connection starting points in the wiring process can be realized through the A-search algorithm.
Step 104: and according to the to-be-wired subarea which is wired, wiring the to-be-wired subarea which is not wired by utilizing coordinate transformation.
Specifically, after the sub-regions to be wired are wired, the coordinate transformation is used for wiring the wiring sub-regions which are not wired in the region to be wired. Supposing that a region to be wired is divided into 8 wiring sub-regions, fig. 2 is a schematic diagram of a coordinate transformation method provided in the embodiment of the present invention, as shown in fig. 2, a wiring sub-region with a reference number of 1 is obtained as a region to be wired, and after wiring of the wiring sub-region No. 1 is completed, coordinate transformation is performed through a formula (1) to complete wiring of the wiring sub-region No. 2; finishing wiring of the No. 3 wiring sub-region through a formula (2); completing the wiring of the No. 4 wiring sub-area through a formula (3); completing the wiring of No. 5 wiring sub-area through formula (4); completing the wiring of No. 6 wiring sub-area through formula (5); completing the wiring of No. 7 wiring sub-area through formula (6); the wiring of the wiring sub-area No. 8 is completed by the formula (7), and the formula of coordinate transformation is as follows:
the wiring of the entire region to be wired can be realized through the coordinate transformation, and it should be noted that when the region to be wired is selected from the wiring sub-regions, one or two or more regions may be selected, which is not specifically limited in this embodiment of the present invention.
According to the embodiment of the invention, the area to be wired is divided through the divide-and-conquer strategy, the wiring starting points in the area to be wired are wired by the sub-area to be wired by using the rule-based wiring method or the semi-rule A-search algorithm, and the wiring of the wiring sub-area which is not wired is realized by using coordinate transformation, so that the wiring efficiency is improved.
On the basis of the above embodiment, the dividing the sub-area to be wired by using the divide-and-conquer strategy includes:
adopt horizontal axis and perpendicular axis will treat that the wiring area divides into 4 wiring subregion, or adopt horizontal axis, perpendicular axis and diagonal will treat that the wiring area divides into 8 wiring subregion.
Specifically, the regular characteristics of the microfluidic biochip are utilized, that is, the microfluidic biochip is generally rectangular or square, and the culture chambers in the microfluidic biochip are uniformly distributed, wherein each culture chamber is a connection starting point, so that the area to be wired can be divided into 4 equally-divided wiring sub-areas through a horizontal central axis and a vertical central axis. Or the area to be wired can be divided into 8 equally-divided wiring sub-areas by adopting a horizontal central axis, a vertical central axis and a diagonal line. The specific method of partitioning has already been described in the above embodiments, and is not described herein again.
On the basis of the above embodiment, the routing the starting point of the wire in the sub-area to be routed by using the rule-based routing method includes:
and calculating a wiring rule of the current wiring starting point according to a preset rule, and wiring the current wiring starting point in the sub-area to be wired according to the wiring rule.
Specifically, the current wiring starting point is obtained from all the wiring starting points included in the sub-region to be wired, and in the wiring process, wiring needs to be performed from one wiring starting point to another wiring starting point, and the current wiring starting point is the wiring starting point needing wiring at present. And calculating a wiring rule of the current connecting line starting point by using a preset rule according to the position information of the current connecting line starting point and the information of the area to be wired, and wiring the current connecting line starting point according to the wiring rule, wherein the wiring rule specifies a wiring path of the current connecting line starting point, so that the current node is wired along the planned wiring path.
According to the embodiment of the invention, the wiring rule of the current wiring starting point is obtained through the preset rule calculation, and the wiring is carried out on the current wiring starting point according to the wiring rule, so that the automatic wiring of the area to be wired is realized.
On the basis of the above embodiment, the calculating, according to the preset rule, the wiring rule of the current connection starting point includes:
according to the formula
Calculating to obtain a wiring rule of the starting point of the current connecting line;
wherein w is the width of the area to be wired in the x-axis direction, h is the height of the area to be wired in the y-axis direction, n is the number of times of repetition required in the wiring process, m is the moving step length required in the wiring process, and x
wThe number of the points to be wired corresponding to the row where the starting point of the current connecting line is positioned, x
hThe number of the points to be wired corresponding to the column where the current connection starting point is located, i is the number of rows corresponding to the current connection starting point, y is a longitudinal coordinate value corresponding to the current connection starting point in the wiring process, and pitch
wThe distance of the starting point of the connecting line in the direction of the abscissa, pitch
hThe distance between the starting points of the connecting lines in the y-axis direction.
Specifically, the formula (8) is a calculation formula of some parameters used in the preset rule, wherein the formula (8) is as follows:
establishing a rectangular coordinate system according to the area to be wired, wherein w in the formula (8) is the width of the area to be wired in the x-axis direction, h is the height of the area to be wired in the y-axis direction, n is the number of times of repetition required by the current wiring starting point in the wiring process, m is the moving step required in the wiring process of the current wiring starting point, and x is the moving step required by the current wiring starting point in the wiring process
wThe number of the points to be wired corresponding to the row where the starting point of the current connecting line is positioned, x
hThe number of points to be wired corresponding to the column of the current connection starting point, i is the number of rows corresponding to the current connection starting point, y is the ordinate value corresponding to the current connection starting point in the wiring process, pitch
wThe distance of the starting point of the connecting line in the direction of the abscissa, pitch
hFor the distance of the starting points of the connecting lines in the y-axis direction, if the starting points of the connecting lines are uniformly distributed on the subareas to be wired, the pitch
h＝pitch
w. It should be noted that the above formula calculates pitch
wThe method for determining the distance between the connection starting points finally comprises the steps of obtaining the maximum distance between the connection starting points in the sub-area to be wired and obtaining the final distance between the connection starting points by utilizing a bisection method according to the minimum distance and the maximum distance. Batch type
wThe calculation method is similar to that described above, and is not described herein again.
According to the embodiment of the invention, some parameters in the wiring rule are obtained through formula calculation, and the wiring rule of the current wiring starting point is obtained according to the parameters, so that the automatic wiring of the sub-region to be wired is realized.
On the basis of the above embodiment, the wiring rule includes:
s501, obtaining a current connecting line starting point coordinate, and determining a first wiring direction according to the current connecting line starting point coordinate and a side where a connecting line end point is located, wherein the wiring direction is parallel to an x axis or a y axis;
specifically, the coordinates of the current wiring starting point in the sub-region to be wired are obtained, and the first wiring direction is determined according to the current wiring starting point coordinates and the side where the wiring end point is located, for example, all the wiring starting points of the wiring sub-region No. 1 in fig. 2 are on the right side of the side where the wiring end point is located, so that the first wiring direction is left, and can also be the negative direction of the x axis, for example, the wiring sub-region No. 2 in fig. 2, and all the wiring starting points are above the wiring end point, and therefore, the first wiring direction is down, and can also be the negative direction of the y axis.
S502, moving once along the first wiring direction;
specifically, the distance moved once along the first wiring direction from the current connection starting point is the distance of the current connection starting point in the first wiring direction, and taking the wiring sub-region No. 2 in fig. 2 as an example, the distance moved once along the first wiring direction from the current connection starting point is pitch
h。
S503, alternately moving for n times along a second wiring direction perpendicular to the wiring direction and the first wiring direction;
specifically, after moving once along the first wiring direction, the first wiring direction and the second wiring direction are alternately moved n times, that is, the first wiring direction and the second wiring direction are moved once, and the second wiring direction and the first wiring direction are moved once again, wherein the second wiring direction is perpendicular to the first wiring direction, and the distance of movement in the second wiring direction is the distance of the current starting point of the connection in the second wiring direction. Still taking the routing sub-region No. 2 in FIG. 2 as an example, first move pitch left or right
wDistance, then move the pitch downward
hDistance. It should be noted that whether the second wiring direction is to the left or to the right can be determined according to actual circumstances.
S504, moving along the second wiring direction by a moving distance of m;
specifically, after S403 is executed, the second direction is moved by m, where m is i-y +2 pitch
hA specific value for m may be calculated.
S505, moving along the first wiring direction until the first wiring direction reaches the wiring end point;
specifically, the movement is continued along the first wiring direction, and the wiring of the current wiring starting point is completed when the wiring reaches the wiring end point.
According to the embodiment of the invention, the wiring is performed on the starting point of the connecting line in the region to be wired through the rule-based wiring method, the wiring can be completed quickly through the algorithm, and the wiring efficiency is improved.
On the basis of the above embodiment, the wiring rule includes:
s601, obtaining a current connecting line starting point coordinate, and determining a first wiring direction according to the current connecting line starting point coordinate and a side where a connecting line terminal point is located, wherein the wiring direction is parallel to an x axis or a y axis;
specifically, a current wiring starting point coordinate in the area to be wired is obtained, and the first wiring direction is determined according to the current wiring starting point coordinate and the side where the wiring end point is located, for example, all the wiring starting points of the wiring sub-area No. 1 in fig. 2 are on the right side of the side where the wiring end point is located, so that the first wiring direction is left, that is, the negative direction of the x axis, for example, the wiring sub-area No. 2 in fig. 2, and all the wiring starting points are on the upper side of the wiring end point, so that the first wiring direction is down, that is, the negative direction of the y axis.
S602, the moving distance along the first wiring direction is P- (a-a)
i) Wherein, P is the distance of the current connection starting point in the first wiring direction, a is the number of the connection starting points needing wiring corresponding to the current connection starting point in the first wiring direction, a
iA corresponding serial number of the starting point of the current connecting line in the first wiring direction is obtained;
specifically, the current connecting line starts from the starting point, and moves along the first wiring direction, wherein the moving distance is P- (a-a)
i) Taking one connection starting point in the wiring sub-area No. 2 in fig. 2 as an example, if the current connection starting point is located in the column having 6 connection starting points in total and needs to be wired, and the current connection starting point is located in the 4 th column, that is, the corresponding serial number of the current connection starting point on the column is 4, which is counted from the edge formed by the connection end point, and the distance between the two connection starting points in the longitudinal direction is P ═ 4, then the distance that the current connection starting point needs to move is 4- (6-4) ═ 2.
S603, alternately moving the substrate in a second wiring direction perpendicular to the wiring direction and the first wiring direction n times, and if it is determined that an obstacle is encountered while moving the substrate in the second wiring direction, moving the substrate in the first wiring direction until the obstacle is avoided;
specifically, after moving once along the first wiring direction, the first wiring direction and the second wiring direction are alternately moved n times, that is, the first wiring direction and the second wiring direction are moved once, and the second wiring direction and the first wiring direction are moved once again, wherein the second wiring direction is perpendicular to the first wiring direction, and the distance of movement in the second wiring direction is the distance of the current starting point of the connection in the second wiring direction. If an obstacle is encountered during wiring along the second wiring direction, the wiring is moved along the first wiring direction until the obstacle is avoided, and then the wiring is routed along the second wiring direction after the obstacle is avoided, so that the sum of the distance moved in the second wiring direction before the obstacle is encountered and the distance moved in the second wiring direction after the obstacle is avoided should be equal to the distance of the current wiring starting point in the second wiring direction. For example, if the distance to be moved in the second wiring direction is 5 and an obstacle is encountered when the distance to be moved is 2, the distance to be moved in the second wiring direction after avoiding the obstacle is 3. It should be noted that the processing method of avoiding an obstacle in the first wiring direction is in principle the same as the obstacle avoiding in the second wiring direction, that is, when wiring in the first wiring direction, if an obstacle is encountered, the wiring is moved to the second wiring direction until the obstacle is avoided, and the wiring in the first wiring direction is continued after the obstacle is avoided. It should be noted that the second wiring direction is perpendicular to the first wiring direction, but there are two directions perpendicular to the first wiring direction, and a specific selection of which direction can be set in advance according to actual circumstances.
S604, moving along the second wiring direction, if judging that an obstacle is encountered during moving along the second wiring direction, moving along the first wiring direction until the obstacle is avoided, wherein the moving distance along the second wiring direction is m;
specifically, after S503 is executed, the second wire is moved in the second wiring direction by m, i-y +2 pitch
hA specific value for m may be calculated. In moving the wiring, if an obstacle is encountered, the wiring is moved in the first wiring direction until the obstacle is avoided, and then the wiring is moved in the second wiring direction.
S605, moving along the first wiring direction until the first wiring direction reaches the wiring end point;
the distance moved once along the first wiring direction is the distance of the starting point of the current connecting line in the first wiring direction; and the distance moved once along the second wiring direction is the distance between the starting point of the current connecting line and the second wiring direction.
Fig. 3 is a schematic diagram of a rule-based wiring method according to an embodiment of the present invention, and as shown in fig. 3, an origin point represents a starting point of a current connection line, a black solid line represents a wiring situation of the rule-based wiring method, and a black square represents an obstacle.
The embodiment of the invention adds the obstacle avoidance algorithm on the basis of the rule-based wiring method, so that the obstacle wiring can be bypassed if an obstacle is met in the wiring process, the wiring of a single-layer circuit can be prevented from crossing, and the wiring efficiency is improved.
On the basis of the above embodiment, the routing the starting points of the links in the region to be routed by using a semi-rule-based a-x search algorithm includes:
acquiring all connection starting points in the sub-area to be wired, and storing a first number corresponding to the connection starting point into a first array;
and taking the connecting line starting point corresponding to the first number at the middle position in the first array as an intermediate connecting line starting point according to a preset rule, and sequentially routing the connecting line starting points which are adjacent to the intermediate connecting line starting point and have no wiring by using the A-x search algorithm from the intermediate connecting line starting point.
Specifically, all the connection starting points in the sub-region to be wired are obtained, and the connection starting points may be numbered in advance according to a preset rule, specifically, all the connection starting points may be projected onto the edge formed by the connection end points, and then the connection starting points are numbered from left to right, or sequentially from top to bottom, it should be noted that if two or more connection starting points are projected onto one point, the connection starting points far from the edge formed by the connection end points are numbered first. And storing the first number of the starting point of the connecting line into a first array according to the size sequence. It can be understood that the connection end points may also be numbered in sequence, and the second number corresponding to the connection end point is stored in the second array.
Firstly, a first number positioned in the middle is obtained from a first array, a connecting line starting point corresponding to the first number positioned in the middle is used as an intermediate connecting line starting point, similarly, a second number positioned in the middle is obtained from a second array, a connecting line terminal point corresponding to the second number positioned in the middle is used as an intermediate connecting line terminal point, and the intermediate connecting line starting point and the intermediate connecting line terminal point are wired by utilizing an A-x search algorithm. For example: the first array is [0, 1, 2, 3, 4, 5, 6], at this time, the connection starting point corresponding to the first number 3 should be selected as the middle connection starting point, and if the first array is [0, 1, 2, 3, 4, 5], then there are two connection starting points located at the middle in the first array, which are respectively 2 and 3, for this case, it can be preset to select the connection starting point with the first number smaller or larger as the middle connection starting point. And then sequentially extending and wiring from the starting point of the middle connecting line to two sides, namely sequentially selecting a first number corresponding to the starting point of the middle connecting line in the first array, wiring the starting point of the connecting line corresponding to the first number of the starting point of the middle connecting line, similarly, selecting a connecting line terminal point corresponding to a second number of the adjacent connecting line terminal point from the array, and then, wiring by using an A-search algorithm again, and so on. Fig. 4 is a schematic layout diagram of an a-search algorithm according to an embodiment of the present invention, as shown in fig. 4, a diagonal line is first used to divide a region to be routed into 4 parts, and the lowermost triangular region is routed, first, a connection starting point corresponding to a first number located at the middle of the first array in the triangular region is obtained to route, that is, the uppermost point in fig. 4, and then, points extending from two sides of the uppermost point are routed, and fig. 4 is a schematic diagram of three connection starting points for which routing has been completed.
According to the embodiment of the invention, the wiring sequence is specified, and the wiring is carried out by utilizing the A-star search algorithm according to the wiring sequence, so that the wiring of the area to be wired can be rapidly completed.
On the basis of the foregoing embodiment, fig. 5 is a schematic diagram of a routing flow of an a-search algorithm provided in an embodiment of the present invention, and as shown in fig. 5, the routing by using the a-search algorithm includes:
709, obtaining a node to be expanded with a manhattan distance of 1 of the wiring path according to the wiring path, storing the node to be expanded into a list to be detected, and outputting the target wiring path if the node to be expanded in the list to be detected is judged and known to pass through and a corresponding wiring path can be obtained at any connection starting point of unfinished wiring. If the node to be expanded in the list to be detected cannot enable any one wiring starting point which is not finished with wiring to find a wiring path, the target wiring path is illegal, namely the current wiring starting point cannot be wired, and the next row of wiring starting points adjacent to the current wiring starting point are obtained from the first array for wiring.
Fig. 6 is a schematic diagram of the wiring by using the a-search algorithm according to another embodiment of the present invention, and as shown in fig. 6, the wiring of the lowermost wiring sub-region obtained by dividing the region to be wired is completed by using the a-search algorithm.
According to the embodiment of the invention, the wiring starting point of the region to be wired is wired by utilizing the A-star search algorithm, and the wiring of other wiring sub-regions in the region to be wired is completed by utilizing the coordinate transformation mode on the region to be wired, so that the wiring efficiency is improved.
On the basis of the above embodiment, the defining the extended cost of the starting point of the connection includes:
defining the extended cost of the starting point of the connecting line by using a valuation function, wherein the valuation function is as follows:
f(n)＝g(n)+h(n)；
wherein f (n) is an evaluation function from the connection starting point to the connection end point via the node n, g (n) is a distance from the connection starting point to a routed path of a current node, and h (n) is a Manhattan distance from the current node to the connection end point.
Specifically, the expansion cost of the starting point of the link can be calculated by the formula f (n) ═ g (n) + h (n), where g (n) is the distance from the starting point of the link to the routed path of the current node, and h (n) is the manhattan distance from the current node to the end point of the link. It should be noted that the nodes to be expanded can also be evaluated by the above formula.
According to the embodiment of the invention, the area to be wired is divided through the divide-and-conquer strategy, the wiring starting point in the sub-area to be wired is wired in one area to be wired by utilizing the semi-regular A-x search algorithm, and the wiring of the wiring sub-area which is not wired is realized by utilizing coordinate transformation, so that the wiring efficiency is improved.
Fig. 7 is a schematic structural diagram of an entity of an electronic device according to an embodiment of the present invention, and as shown in fig. 7, the electronic device includes: a processor (processor)801, a memory (memory)802, and a bus 803; wherein the content of the first and second substances,
the processor 801 and the memory 802 communicate with each other via the bus 803;
the processor 801 is configured to call program instructions in the memory 802 to perform the methods provided by the above-described method embodiments, including for example: reading information to be wired of the microfluidic biochip to be wired, wherein the information to be wired comprises wiring starting point position information, wiring design rules and chip sizes, and the wiring design rules comprise a rule-based wiring method or a semi-rule-based A-search algorithm wiring method; dividing the area to be wired by using a dividing and controlling strategy according to the size of the chip to obtain a plurality of wiring sub-areas; obtaining one wiring subregion as a subregion to be wired, and wiring a wiring starting point in the subregion to be wired by using a rule-based wiring method or a semi-regular A-search algorithm; and according to the to-be-wired subarea which is wired, wiring the to-be-wired subarea which is not wired by utilizing coordinate transformation.
The present embodiment discloses a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, enable the computer to perform the method provided by the above-mentioned method embodiments, for example, comprising: reading information to be wired of the microfluidic biochip to be wired, wherein the information to be wired comprises wiring starting point position information, wiring design rules and chip sizes, and the wiring design rules comprise a rule-based wiring method or a semi-rule-based A-search algorithm wiring method; dividing the area to be wired by using a dividing and controlling strategy according to the size of the chip to obtain a plurality of wiring sub-areas; obtaining one wiring subregion as a subregion to be wired, and wiring a wiring starting point in the subregion to be wired by using a rule-based wiring method or a semi-regular A-search algorithm; and according to the to-be-wired subarea which is wired, wiring the to-be-wired subarea which is not wired by utilizing coordinate transformation.
The present embodiments provide a non-transitory computer-readable storage medium storing computer instructions that cause the computer to perform the methods provided by the above method embodiments, for example, including: reading information to be wired of the microfluidic biochip to be wired, wherein the information to be wired comprises wiring starting point position information, wiring design rules and chip sizes, and the wiring design rules comprise a rule-based wiring method or a semi-rule-based A-search algorithm wiring method; dividing the area to be wired by using a dividing and controlling strategy according to the size of the chip to obtain a plurality of wiring sub-areas; obtaining one wiring subregion as a subregion to be wired, and wiring a wiring starting point in the subregion to be wired by using a rule-based wiring method or a semi-regular A-search algorithm; and according to the to-be-wired subarea which is wired, wiring the to-be-wired subarea which is not wired by utilizing coordinate transformation.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
The above-described embodiments of the devices and the like are merely illustrative, wherein the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (8)
1. A large-scale microfluidic biochip rapid wiring method is characterized by comprising the following steps:
reading information to be wired of the microfluidic biochip to be wired, wherein the information to be wired comprises wiring starting point position information, wiring design rules and chip sizes, and the wiring design rules comprise a rule-based wiring method or a semi-rule-based A-search algorithm wiring method;
dividing the area to be wired by using a dividing and controlling strategy according to the size of the chip to obtain a plurality of wiring sub-areas;
obtaining one wiring subregion as a subregion to be wired, and wiring a wiring starting point in the subregion to be wired by using a rule-based wiring method or a semi-regular A-search algorithm;
according to the to-be-wired subarea which is wired, wiring the to-be-wired subarea which is not wired by utilizing coordinate transformation;
the dividing of the sub-area to be wired by utilizing the divide-and-conquer strategy comprises the following steps:
dividing the area to be wired into 4 wiring sub-areas by adopting a horizontal central axis and a vertical central axis, or dividing the area to be wired into 8 wiring sub-areas by adopting a horizontal central axis, a vertical central axis and a diagonal line;
the wiring of the wiring starting point in the sub-area to be wired by using the rule-based wiring method comprises the following steps:
calculating a wiring rule of a current wiring starting point according to a preset rule, and wiring the current wiring starting point in the sub-area to be wired according to the wiring rule;
the calculating the wiring rule of the current connecting line starting point according to the preset rule comprises the following steps:
according to the formula
Calculating to obtain a wiring rule of the starting point of the current connecting line;
wherein w is the width of the area to be wired in the x-axis direction, h is the height of the area to be wired in the y-axis direction, n is the number of times of repetition required in the wiring process, m is the moving step length required in the wiring process, and x
wThe number of the points to be wired corresponding to the row where the starting point of the current connecting line is positioned, x
hThe number of the points to be wired corresponding to the column of the current connection starting point is I, the number of rows corresponding to the current connection starting point is I, the longitudinal coordinate value corresponding to the current connection starting point in the wiring process is Y, and pitch is
wFor the distance of the starting point of the line in the direction of the x-axis, pitch
hThe distance between the starting points of the connecting lines in the y-axis direction.
2. The method of claim 1, wherein the routing rule comprises:
s501, obtaining the coordinates of the starting point of the current connecting line, and determining a first wiring direction according to the coordinates of the starting point of the current connecting line and the edge where the terminal point of the connecting line is located, wherein the wiring direction is parallel to an x axis or a y axis;
s502, moving once along the first wiring direction;
s503, alternately moving for n times along a second wiring direction perpendicular to the wiring direction and the first wiring direction;
s504, moving along the second wiring direction by a moving distance of m;
s505, moving along the first wiring direction until the first wiring direction reaches the wiring end point;
the distance moved once along the first wiring direction is the distance of the starting point of the current connecting line in the first wiring direction; and the distance moved once along the second wiring direction is the distance between the starting point of the current connecting line and the second wiring direction.
3. The method of claim 1, wherein the routing rule comprises:
s601, obtaining the coordinates of the starting point of the current connecting line, and determining a first wiring direction according to the coordinates of the starting point of the current connecting line and the edge where the terminal point of the connecting line is located, wherein the wiring direction is parallel to an x axis or a y axis;
s602, the moving distance along the first wiring direction is P- (a-a)
i) Wherein, P is the distance of the current connection starting point in the first wiring direction, a is the number of the connection starting points needing wiring corresponding to the current connection starting point in the first wiring direction, a
iA corresponding serial number of the starting point of the current connecting line in the first wiring direction is obtained;
s603, alternately moving the substrate in a second wiring direction perpendicular to the wiring direction and the first wiring direction n times, and if it is determined that an obstacle is encountered while moving the substrate in the second wiring direction, moving the substrate in the first wiring direction until the obstacle is avoided;
s604, moving along the second wiring direction, if judging that an obstacle is encountered during moving along the second wiring direction, moving along the first wiring direction until the obstacle is avoided, wherein the moving distance along the second wiring direction is m;
s605, moving along the first wiring direction until the first wiring direction reaches the wiring end point;
the distance moved once along the first wiring direction is the distance of the starting point of the current connecting line in the first wiring direction; and the distance moved once along the second wiring direction is the distance between the starting point of the current connecting line and the second wiring direction.
4. The method according to claim 1, wherein the routing the starting point of the wire in the sub-area to be routed by using a semi-rule based a-search algorithm comprises:
acquiring all the starting points of the connecting lines in the sub-area to be wired, and storing a first number corresponding to the starting points of the connecting lines into a first array;
and taking the connecting line starting point corresponding to the first number at the middle position in the first array as an intermediate connecting line starting point according to a preset rule, and sequentially routing the connecting line starting points which are adjacent to the intermediate connecting line starting point and have no wiring by using the A-x search algorithm from the intermediate connecting line starting point.
5. The method of claim 4, wherein said routing using said A-search algorithm comprises:
step 701, defining the expansion cost of the starting point of the connecting line;
step 702, creating a linked list of nodes to be expanded, and storing all accessed nodes which are not expanded according to the sequence of expanding cost from small to large, wherein the nodes are grid points which are searched for in the sub-region to be wired and are not expanded;
step 703, judging whether a node to be expanded exists in the node chain table to be expanded, if so, executing step 704, otherwise, finishing the search and outputting a search failure;
step 704, reading the node with the minimum expansion cost in the node chain table to be expanded, recording the node as the current node to be expanded, judging whether the current node to be expanded is a connection end point, if the judgment result is true, ending the search, outputting the search success, otherwise, executing step 705;
step 705, traversing the extension direction allowed by the current node to be extended, finding out all nodes in the extension direction allowed, and inserting the nodes into the adjacent point list;
step 706, traversing the neighbor point list, and generating a plurality of new expansion nodes aiming at the current nodes to be expanded;
step 707, calculating the expansion cost of the new expansion node, and inserting the expansion cost into an appropriate position of the node linked list to be expanded according to the calculated expansion cost;
step 708, repeating steps 704 to 707 until the search is finished, and obtaining a target wiring path from the starting point of the connection line to the end point of the connection line;
709, obtaining a node to be expanded with a manhattan distance of 1 of the wiring path according to the wiring path, storing the node to be expanded into a list to be detected, and outputting the target wiring path if the node to be expanded in the list to be detected is judged and known to pass through and a corresponding wiring path can be obtained at any connection starting point of unfinished wiring.
6. The method of claim 4, wherein the defining the extended cost of the starting point of the connection comprises:
defining the extended cost of the starting point of the connecting line by using a valuation function, wherein the valuation function is as follows:
f(n)＝g(n)+h(n)；
wherein f (n) is an evaluation function from the connection starting point to the connection end point via the node n, g (n) is a distance from the connection starting point to a routed path of a current node, and h (n) is a Manhattan distance from the current node to the connection end point.
7. An electronic device, comprising: a processor, a memory, and a bus, wherein,
the processor and the memory are communicated with each other through the bus;
the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of any of claims 1-6.
8. A non-transitory computer-readable storage medium storing computer instructions that cause a computer to perform the method of any one of claims 1-6.
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| CN1295775C (en) * | 2004-03-25 | 2007-01-17 | 杭州电子工业学院 | Fast analysis of superlarge integrated circit P/G distributing net |
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