CN107465430B - CPCI bus-based frequency modulation signal parameter monitoring method and system - Google Patents
CPCI bus-based frequency modulation signal parameter monitoring method and system Download PDFInfo
- Publication number
- CN107465430B CN107465430B CN201710532426.5A CN201710532426A CN107465430B CN 107465430 B CN107465430 B CN 107465430B CN 201710532426 A CN201710532426 A CN 201710532426A CN 107465430 B CN107465430 B CN 107465430B
- Authority
- CN
- China
- Prior art keywords
- module
- frequency modulation
- modulation signal
- programmable logic
- logic device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/46—Monitoring; Testing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
Abstract
The embodiment of the invention discloses a method and a system for monitoring frequency modulation signal parameters based on a CPCI bus, belonging to the technical field of signal processing. The method comprises the following steps: after receiving the reference clock signal, the program configuration signal and the bus instruction, the programmable logic device sends an acquisition signal to the digital down-conversion module; after receiving the acquisition signal, the digital down-conversion module acquires and sends a frequency modulation signal parameter to the programmable logic device; the programmable logic device sends the frequency modulation signal parameters to the CPCI bus bridging module; and the CPCI bus bridging module decodes the frequency modulation signal parameters and sends the decoded frequency modulation signal parameters to the CPCI bus. The technical problems of large volume, low intelligence degree and poor system reliability of the equipment are solved, and the technical effects of cost saving and strong reliability are realized.
Description
Technical Field
The invention relates to the technical field of signal processing, in particular to a method and a system for monitoring frequency modulation signal parameters based on a CPCI bus.
Background
In modern broadcast and communication systems, the modulation degree of a frequency modulation signal needs to be monitored in real time, collected monitoring data is analyzed and processed, faults in broadcasting or communication are rapidly eliminated and reported, and the monitoring data is managed by a control center in a unified mode. In the prior art, a special frequency modulation signal modulation degree monitoring device or a testing instrument is adopted to cooperate with a monitoring scheme of a computer to detect a modulation degree, so that the detection of a frequency modulation signal is realized.
In the process of implementing the invention, the inventor finds that at least the following problems exist:
1. the equipment has large volume, low intelligence degree and poor system reliability;
2. the cost is undoubtedly increased due to the high equipment cost;
3. is not conducive to system integration.
Disclosure of Invention
In order to achieve the purpose, the invention provides a method and a system for monitoring frequency modulation signal parameters based on a CPCI bus.
According to an aspect of the present invention, an embodiment of the present invention provides a method for monitoring parameters of a frequency modulated signal based on a CPCI bus, where the method includes:
step 1: after receiving a reference clock signal, a program configuration signal and a bus instruction, the programmable logic device sends a signal for starting acquisition to the digital down-conversion module;
step 2: after receiving the acquisition starting signal, the digital down-conversion module acquires and sends frequency modulation signal parameters to the programmable logic device;
and step 3: the programmable logic device sends the frequency modulation signal parameters to a CPCI bus bridging module;
and 4, step 4: and the CPCI bus bridging module decodes the frequency modulation signal parameters and sends the decoded frequency modulation signal parameters to the CPCI bus.
Preferably, the frequency modulation signal parameter is a modulation degree.
According to the technical scheme that this embodiment provided, on the one hand, need set up corresponding equipment among the prior art, avoided among the prior art equipment bulky, the technical problem that intelligent degree is low. On the other hand, according to the technical scheme of the embodiment, the frequency modulation signal parameters are acquired and transmitted, wherein the frequency modulation signal parameters mainly refer to modulation degrees, so that the technical effects of high reliability, timely acquisition of relevant information and cost saving are achieved.
Further, before the step 1, the method further comprises:
step 11: after receiving a power supply signal provided by a first power supply module, a program configuration module sends the program configuration signal to the programmable logic device;
step 12: after receiving a power supply signal provided by a second power supply module, a clock module sends the reference clock signal to the programmable logic device;
step 13: and after receiving the data acquisition instruction sent by the CPCI bus, the CPCI bus bridging module sends the bus instruction to the programmable logic device.
Further, the step 2 comprises:
step 21: after the digital down-conversion module receives the acquisition signal, acquiring measurement data in an AD conversion module;
step 22: performing sign bit expansion, digital frequency mixing, down-conversion, decimation filtering and frequency discrimination operations on the measurement data to convert the measurement data into the frequency-modulated signal parameters;
step 23: and sending the frequency modulation signal parameters to the programmable logic device.
According to the technical scheme provided by the embodiment, sign bit extension, digital frequency mixing, down-conversion, decimation filtering and frequency discrimination operation are carried out on the received measurement data through the digital down-conversion module, so that the measurement data are converted into frequency modulation signal parameters. Therefore, the related information of the frequency modulation signal parameters can be acquired more clearly and clearly, and the frequency modulation signal parameters can be analyzed and processed in time.
Further, the step 3 comprises:
step 31: the programmable logic device sends the frequency modulation signal parameters to a memory for caching;
step 32: the programmable logic device reads the frequency modulation signal parameters stored in the time interval from the memory according to a preset time interval;
step 33: and the programmable logic device sends the read frequency modulation signal parameters stored in the time interval to the CPCI bus bridging module.
Through the technical scheme provided by the embodiment, the frequency modulation signal parameters do not need to be read all the time, and the frequency modulation signal parameters are read at certain intervals, so that the technical effects of saving resources and uniformly analyzing and transmitting are achieved.
Further, the programmable logic device includes: the device comprises a clock management module, a digital down-conversion interface module, a memory interface module, a CPCI communication module and a data interaction module.
According to another aspect of the present invention, the present invention provides a system for monitoring parameters of a frequency modulated signal based on a CPCI bus corresponding to the method, the system comprising: the device comprises a programmable logic device, a digital down-conversion module, a CPCI bus bridging module and a CPCI bus; wherein the content of the first and second substances,
the programmable logic device: the digital down-conversion module is used for receiving a reference clock signal, a program configuration signal and a bus instruction and then sending an acquisition signal to the digital down-conversion module;
the digital down-conversion module: the programmable logic controller is used for acquiring and sending frequency modulation signal parameters to the programmable logic controller after receiving the acquisition signal;
the programmable logic is further to: sending the frequency modulation signal parameters to the CPCI bus bridging module;
the CPCI bus bridging module: and the CPCI bus is used for decoding the frequency modulation signal parameters and sending the frequency modulation signal parameters to the CPCI bus.
Further, the system further comprises: : the device comprises a program configuration module, a first power supply module, a clock module and a second power supply module; wherein the program configuration module: the power supply module is used for receiving a power supply signal provided by the first power supply module and then sending the program configuration signal to the programmable logic device;
the clock module is used for: the reference clock signal is sent to the programmable logic device after the power signal provided by the second power module is received;
the CPCI bus bridging module is further configured to: and after receiving a data acquisition instruction sent by the CPCI bus, sending the bus instruction to the programmable logic device.
Further, the system further comprises: a memory; wherein the programmable logic is further to: and sending the frequency modulation signal parameters to a memory for caching, reading the frequency modulation signal parameters stored in the time interval from the memory according to a preset time interval, and sending the read frequency modulation signal parameters to the CPCI bus bridging module.
Further, the programmable logic device includes: the device comprises a clock management module, a digital down-conversion interface module, a memory interface module, a CPCI communication module and a data interaction module; wherein the content of the first and second substances,
the clock management module: the CPCI communication module is used for receiving the reference clock signal sent by the clock module and respectively sending the reference clock signal to the digital down-conversion interface module, the memory interface module, the CPCI communication module and the data interaction module;
the data interaction module: the control module is used for respectively sending control signals to the digital down-conversion interface module, the memory interface module and the CPCI communication module;
the digital down-conversion interface module: the data interaction module is used for receiving the control signal, sending the acquisition signal to the digital down-conversion module, receiving the frequency modulation signal parameter sent by the digital down-conversion module and sending the frequency modulation signal parameter to the data interaction module;
the memory interface module: the data interaction module is used for receiving the control signal, reading the frequency modulation signal parameters from the data interaction module, sending the frequency modulation signal parameters to the memory, reading the frequency modulation signal parameters stored in the time interval from the memory according to a preset time interval, and sending the frequency modulation signal parameters stored in the time interval to the data interaction module;
the CPCI communication module: the CPCI bus bridging module is used for receiving the control signal, receiving a bus instruction of the CPCI bus bridging module, sending the bus instruction to the data interaction module, receiving the frequency modulation signal parameter sent by the data interaction module, decoding the frequency modulation signal parameter and sending the decoded frequency modulation signal parameter to the CPCI bus bridging module.
Further, the digital down-conversion module is specifically configured to:
after receiving the acquisition signal, acquiring measurement data in an AD conversion module;
carrying out sign bit expansion, digital frequency mixing, down-conversion, decimation filtering and frequency discrimination operation on the measured data, and converting the measured data into the frequency modulation signal parameters;
and sending the frequency modulation signal parameters to the programmable logic device.
The technical scheme has the advantages that the technical scheme that the digital down-conversion module is adopted to receive the acquisition signal sent by the programmable logic device and acquire and send the frequency modulation signal parameter to the programmable logic device, and the CPCI bus bridging module decodes the frequency modulation signal parameter after receiving the frequency modulation signal parameter sent by the programmable logic device and sends the decoded frequency modulation signal parameter to the IPCI bus is adopted, so that the technical problems of high cost and low intelligence degree are solved, and the technical effects of high reliability, cost saving and high integration level are realized.
Drawings
Fig. 1 is a schematic flow chart of a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention;
fig. 3 is a schematic flow chart of a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention;
fig. 4 is a schematic flow chart of a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention;
fig. 5 is a schematic structural diagram of a system for monitoring parameters of a frequency-modulated signal based on a CPCI bus according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a system for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention;
fig. 7 is a schematic structural diagram of a system for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings in conjunction with the following detailed description. It should be understood that the description is intended to be exemplary only, and is not intended to limit the scope of the present invention. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention.
According to one aspect of the invention, the embodiment of the invention provides a method for monitoring parameters of a frequency-modulated signal based on a CPCI bus.
Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to an embodiment of the present invention.
As shown in fig. 1, the method includes:
step 1: after receiving the reference clock signal, the program configuration signal and the bus instruction, the programmable logic device sends an acquisition signal to the digital down-conversion module;
step 2: after receiving the collected signal, the digital down-conversion module collects and sends a frequency modulation signal parameter to be monitored to the programmable logic device;
and step 3: the programmable logic device sends the frequency modulation signal parameters to the CPCI bus bridging module;
and 4, step 4: and the CPCI bus bridging module decodes the frequency modulation signal parameters and sends the decoded frequency modulation signal parameters to the CPCI bus.
In this embodiment, the programmable logic device sends the collected signal to the digital down-conversion module, the digital down-conversion module performs signal collection according to the collected signal and sends the collected signal to the programmable logic device, and the programmable logic device sends the received frequency modulation signal parameter to the CPCI bus bridge module, so that the CPCI bus bridge module decodes the frequency modulation signal parameter and sends the decoded frequency modulation signal parameter to the CPCI bus.
It will be appreciated that after the collected monitored fm signal parameters, the detected fm signal parameters are processed, which is mainly to monitor and process the modulation degree, so as to quickly know the fault existing in the broadcast or communication. Therefore, preferably, the acquired frequency-modulated signal parameter mainly refers to a modulation degree.
Through the technical scheme that this embodiment provided, need not set up special test instrument cooperation computer and detect, practiced thrift the cost. Also, it is known that the apparatus is bulky, the system stability and reliability are poor, and system integration is not facilitated. Therefore, through the technical scheme provided by the embodiment, the technical effects of high integration level and strong reliability and stability are realized.
Referring to fig. 2, fig. 2 is a schematic flow chart illustrating a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention.
As shown in fig. 2, before step 1, the method further comprises:
step 11: after receiving the power supply signal provided by the first power supply module, the program configuration module sends a program configuration signal to the programmable logic device;
step 12: after receiving the power supply signal provided by the second power supply module, the clock module sends a reference clock signal to the programmable logic device;
step 13: and after receiving the data acquisition instruction sent by the CPCI bus, the CPCI bus bridging module sends a bus instruction to the programmable logic device.
In this embodiment, for example, the CPCI bus provides a dc 5V power to the first power module, provides a ± 12V power to the second power module, and provides a linear dc 5V power to the clock module. The first power supply module converts direct current 5V of the CPCI bus into direct current 3.3V voltage and respectively supplies power to the programmable logic device, the program configuration module and the CPCI bus bridging module.
And after receiving the power supply signal provided by the first power supply, the program configuration module sends a program configuration signal to the programmable logic device. And the clock module sends a reference clock signal to the programmable logic device after receiving the power supply signal provided by the second power supply. And after receiving the data acquisition instruction sent by the CPCI bus, the CPCI bus bridging module sends a bus instruction to the programmable logic device.
Through the technical scheme provided by the embodiment, the power supply is provided, so that the programmable logic device sends the acquired signal to the digital down-conversion module after receiving the bus instruction, and the acquisition of the frequency modulation signal parameter is realized.
Referring to fig. 3, fig. 3 is a schematic flow chart illustrating a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention.
As shown in fig. 3, step 2 includes:
step 21: after receiving the acquisition signal, the digital down-conversion module acquires measurement data in the AD conversion module;
step 22: sign bit expansion is carried out on the measured data, and digital frequency mixing, down conversion, extraction filtering and frequency discrimination operation are carried out so as to convert the measured data into frequency modulation signal parameters;
step 23: and sending the frequency modulation signal parameters to the programmable logic device.
In this embodiment, the second power module provides a linear dc 5V power for the AD conversion module. And the digital down-conversion module acquires the measurement data in the AD conversion module after receiving the acquisition signal sent by the programmable logic device. Sign bit expansion is carried out on the measurement data, and digital frequency mixing, down-conversion, decimation filtering and frequency discrimination operation are carried out to convert the measurement data into frequency modulation signal parameters.
Specifically, the AD conversion module outputs the measurement data of 14BIT to the digital down conversion module. And the digital down-conversion module carries out sign BIT expansion on the 14BIT data, carries out digital frequency mixing, down-conversion, extraction filtering and frequency discrimination processing, converts the data into 32BIT frequency modulation signal parameters and sends the 32BIT frequency modulation signal parameters to the programmable logic device.
By the technical scheme provided by the embodiment, the conversion from the measurement data to the frequency modulation signal parameters is realized, so that whether the fault occurs in broadcasting or communication is timely known according to the frequency modulation signal parameters.
Referring to fig. 4, fig. 4 is a schematic flow chart illustrating a method for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention.
As shown in fig. 4, step 3 includes:
step 31: the programmable logic device sends the frequency modulation signal parameters to a memory for caching;
step 32: the programmable logic device reads the frequency modulation signal parameters stored in the time interval from the memory according to the preset time interval;
step 33: the programmable logic device sends the read frequency modulation signal parameters stored in the time interval to the CPCI bus bridging module.
In this embodiment, the programmable logic device sends the frequency modulation signal parameters to the memory for buffering, reads the frequency modulation signal parameters stored in the time interval from the memory at preset time intervals, and sends the frequency modulation signal parameters stored in the time interval to the CPCI bus bridge module.
For example, every second, the programmable logic reads the frequency modulation signal parameters buffered in the memory, and it is understood that the frequency modulation signal parameters read by the programmable logic are all the frequency modulation signal parameters in the memory within one second. The programmable logic sends all stored fm signal parameters for this second to the CPCI bus bridge module.
Through the technical scheme provided by the embodiment, the waste of resources during the reading and sending of the real-time frequency modulation signal parameters is avoided, and the technical effect of efficiently transmitting and analyzing the frequency modulation signal parameters is realized.
Further, the programmable logic device includes: the device comprises a clock management module, a digital down-conversion interface module, a memory interface module, a CPCI communication module and a data interaction module.
Specifically, before step 21, the method further comprises:
step 211: inputting original data through a band-pass filter, and filtering the original data through the band-pass filter;
step 212: after receiving the filtered original data, the AGC amplifier amplifies the filtered original data to obtain shaped original data;
step 213: and after receiving the reshaped original data, the AD conversion module processes the reshaped original data to obtain measurement data and sends the measurement data to the digital down-conversion module.
Specifically, the band pass filter is a 10.7MHz band pass filter.
According to another aspect of the present invention, the embodiment of the present invention provides a system for monitoring parameters of a frequency modulated signal based on a CPCI bus, corresponding to the method described above.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a system for monitoring parameters of a frequency modulated signal based on a CPCI bus according to an embodiment of the present invention.
As shown in fig. 5, the system includes: the device comprises a programmable logic device, a digital down-conversion module, a CPCI bus bridging module and a CPCI bus; wherein the content of the first and second substances,
the programmable logic device comprises: the device comprises a digital down-conversion module, a reference clock signal, a program configuration signal and a bus instruction, and is used for sending an acquisition signal to the digital down-conversion module after receiving the reference clock signal, the program configuration signal and the bus instruction;
a digital down conversion module: the programmable logic controller is used for acquiring and sending frequency modulation signal parameters to the programmable logic controller after receiving the acquired signals;
the programmable logic is further operable to: sending the frequency modulation signal parameters to a CPCI bus bridging module;
CPCI bus bridge module: and the CPCI bus is used for decoding the frequency modulation signal parameters and sending the frequency modulation signal parameters to the CPCI bus.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a system for monitoring parameters of a frequency modulated signal based on a CPCI bus according to an embodiment of the present invention.
As shown in fig. 6, the system further includes: the device comprises a program configuration module, a first power supply module, a clock module and a second power supply module; wherein, the program configuration module: the power supply module is used for receiving a power supply signal provided by the first power supply module and then sending a program configuration signal to the programmable logic device;
a clock module: the power supply module is used for receiving a power supply signal provided by the second power supply module and then sending a reference clock signal to the programmable logic device;
the CPCI bus bridging module is further configured to: and after receiving a data acquisition instruction sent by the CPCI bus, sending a bus instruction to the programmable logic device.
More specifically, as shown in fig. 6, the digital down-conversion module is specifically configured to: after receiving the acquisition signal, acquiring measurement data in the AD conversion module;
sign bit expansion is carried out on the measured data, digital frequency mixing, down conversion, extraction filtering and frequency discrimination processing are carried out, and the measured data are converted into frequency modulation signal parameters;
and sending the frequency modulation signal parameters to the programmable logic device.
More specifically, as shown in fig. 6, the system further includes: a memory; wherein the programmable logic is further configured to: and sending the frequency modulation signal parameters to a memory for caching, reading the frequency modulation signal parameters stored in the time interval from the memory according to a preset time interval, and sending the read frequency modulation signal parameters to the CPCI bus bridging module.
As shown in fig. 6, preferably, the system further comprises: the device comprises a band-pass filter, an AGC amplifier and an AD conversion module; wherein the content of the first and second substances,
band-pass filter: for filtering the raw data passed through the band-pass filter;
an AGC amplifier: the device is used for amplifying the filtered original data after receiving the filtered original data to obtain the shaped original data;
an AD conversion module: and the digital down-conversion module is used for processing the reshaped original data after receiving the reshaped original data to obtain measurement data and sending the measurement data to the digital down-conversion module.
Referring to fig. 7, fig. 7 is a schematic structural diagram of a system for monitoring parameters of a frequency modulated signal based on a CPCI bus according to another embodiment of the present invention.
As shown in fig. 7, the programmable logic device includes: the device comprises a clock management module, a digital down-conversion interface module, a memory interface module, a CPCI communication module and a data interaction module.
Specifically, the clock management module: and the device is used for receiving the reference clock signal sent by the clock module and respectively sending the reference clock signal to the digital down-conversion interface module, the memory interface module, the CPCI communication module and the data interaction module.
Specifically, the data interaction module: and the control module is used for respectively sending control signals to the digital down-conversion interface module, the memory interface module and the CPCI communication module.
Specifically, the digital down-conversion interface module: the data interaction module is used for receiving the control signal, sending a collected signal to the digital down-conversion module, receiving the frequency modulation signal parameter sent by the digital down-conversion module and sending the frequency modulation signal parameter to the data interaction module.
Specifically, the memory interface module: the device comprises a data interaction module, a storage and a storage, and is used for reading frequency modulation signal parameters from the data interaction module after receiving a control signal and sending the frequency modulation signal parameters to the storage, and is also used for reading the frequency modulation signal parameters stored in a time interval from the storage according to a preset time interval and sending the frequency modulation signal parameters stored in the time interval to the data interaction module.
Specifically, the CPCI communication module: and the CPCI bus bridging module is used for receiving a control signal, receiving a bus instruction of the CPCI bus bridging module, sending the bus instruction to the data interaction module, receiving a frequency modulation signal parameter sent by the data interaction module, decoding the frequency modulation signal parameter, and sending the decoded frequency modulation signal parameter to the CPCI bus bridging module.
After receiving a reference clock signal, a program configuration signal and a bus instruction through a programmable logic device, sending an acquisition signal to a digital down-conversion module; after receiving the acquisition signal, the digital down-conversion module acquires and sends a frequency modulation signal parameter to the programmable logic device; the programmable logic device sends the frequency modulation signal parameters to the CPCI bus bridging module; the technical scheme that the CPCI bus bridging module decodes the frequency modulation signal parameters and sends the decoded frequency modulation signal parameters to the CPCI bus avoids the technical problems of large equipment size, low intelligent degree and poor system reliability, and achieves the technical effects of high integration level, cost saving and strong reliability.
It is to be understood that the above-described embodiments of the present invention are merely illustrative of or explaining the principles of the invention and are not to be construed as limiting the invention. Therefore, any modification, equivalent replacement, improvement and the like made without departing from the spirit and scope of the present invention should be included in the protection scope of the present invention. Further, it is intended that the appended claims cover all such variations and modifications as fall within the scope and boundaries of the appended claims or the equivalents of such scope and boundaries.
Claims (6)
1. A method for monitoring frequency modulation signal parameters based on a CPCI bus is characterized by comprising the following steps:
step 1: after receiving the reference clock signal, the program configuration signal and the bus instruction, the programmable logic device sends an acquisition signal to the digital down-conversion module;
step 2: after receiving the acquisition signal, the digital down-conversion module acquires and sends frequency modulation signal parameters to the programmable logic device;
and step 3: the programmable logic device sends the frequency modulation signal parameters to a CPCI bus bridging module;
and 4, step 4: the CPCI bus bridging module decodes the frequency modulation signal parameters and sends the decoded frequency modulation signal parameters to the CPCI bus;
the step 2 comprises the following steps:
step 21: after the digital down-conversion module receives the acquisition signal, acquiring measurement data in an AD conversion module;
step 22: performing sign bit expansion, digital frequency mixing, down-conversion, decimation filtering and frequency discrimination operations on the measurement data to convert the measurement data into the frequency-modulated signal parameters;
step 23: sending the frequency modulation signal parameters to the programmable logic device;
prior to the step 1, the method further comprises:
step 11: after receiving a power supply signal provided by a first power supply module, a program configuration module sends the program configuration signal to the programmable logic device;
step 12: after receiving a power supply signal provided by a second power supply module, a clock module sends the reference clock signal to the programmable logic device;
step 13: and after receiving the data acquisition instruction sent by the CPCI bus, the CPCI bus bridging module sends the bus instruction to the programmable logic device.
2. A method according to claim 1, wherein said step 3 comprises:
step 31: the programmable logic device sends the frequency modulation signal parameters to a memory for caching;
step 32: the programmable logic device reads the frequency modulation signal parameters stored in the time interval from the memory according to a preset time interval;
step 33: and the programmable logic device sends the read frequency modulation signal parameters stored in the time interval to the CPCI bus bridging module.
3. A method of monitoring parameters of a frequency modulated signal based on a CPCI bus according to claim 1,
the programmable logic device includes: the device comprises a clock management module, a digital down-conversion interface module, a memory interface module, a CPCI communication module and a data interaction module.
4. A system for monitoring parameters of a frequency modulated signal based on a CPCI bus, the system comprising: the device comprises a programmable logic device, a digital down-conversion module, a CPCI bus bridging module and a CPCI bus; wherein the content of the first and second substances,
the programmable logic device: the digital down-conversion module is used for receiving a reference clock signal, a program configuration signal and a bus instruction and then sending an acquisition signal to the digital down-conversion module;
the digital down-conversion module: the programmable logic controller is used for acquiring and sending frequency modulation signal parameters to the programmable logic controller after receiving the acquisition signal;
the programmable logic is further to: sending the frequency modulation signal parameters to the CPCI bus bridging module;
the CPCI bus bridging module: the CPCI bus is used for decoding the frequency modulation signal parameters and sending the frequency modulation signal parameters to the CPCI bus;
the system further comprises: a memory; wherein the content of the first and second substances,
the programmable logic is further to: sending the frequency modulation signal parameters to the memory for caching, reading the frequency modulation signal parameters stored in the time interval from the memory according to a preset time interval, and sending the read frequency modulation signal parameters to the CPCI bus bridging module;
the system further comprises: the device comprises a program configuration module, a first power supply module, a clock module and a second power supply module; wherein the content of the first and second substances,
the program configuration module: the power supply module is used for receiving a power supply signal provided by the first power supply module and then sending the program configuration signal to the programmable logic device;
the clock module is used for: the reference clock signal is sent to the programmable logic device after the power signal provided by the second power module is received;
the CPCI bus bridging module is further configured to: and after receiving a data acquisition instruction sent by the CPCI bus, sending the bus instruction to the programmable logic device.
5. A CPCI bus-based system for parameter monitoring of frequency modulated signals as claimed in claim 4, wherein the programmable logic device comprises: the device comprises a clock management module, a digital down-conversion interface module, a memory interface module, a CPCI communication module and a data interaction module; wherein the content of the first and second substances,
the clock management module: the CPCI communication module is used for receiving the reference clock signal sent by the clock module and respectively sending the reference clock signal to the digital down-conversion interface module, the memory interface module, the CPCI communication module and the data interaction module;
the data interaction module: the control module is used for respectively sending control signals to the digital down-conversion interface module, the memory interface module and the CPCI communication module;
the digital down-conversion interface module: the data interaction module is used for receiving the control signal, sending the acquisition signal to the digital down-conversion module, receiving the frequency modulation signal parameter sent by the digital down-conversion module and sending the frequency modulation signal parameter to the data interaction module;
the memory interface module: the data interaction module is used for receiving the control signal, reading the frequency modulation signal parameters from the data interaction module, sending the frequency modulation signal parameters to the memory, reading the frequency modulation signal parameters stored in the time interval from the memory according to a preset time interval, and sending the frequency modulation signal parameters stored in the time interval to the data interaction module;
the CPCI communication module: and the CPCI bus bridging module is used for receiving the control signal, receiving a bus instruction of the CPCI bus bridging module, sending the bus instruction to the data interaction module, receiving the frequency modulation signal parameter sent by the data interaction module, decoding the frequency modulation signal parameter and sending the decoded frequency modulation signal parameter to the CPCI bus bridging module.
6. A system for monitoring parameters of a frequency modulated signal based on a CPCI bus according to any one of claims 4 to 5, wherein the digital down-conversion module is specifically configured to:
after receiving the acquisition signal, acquiring measurement data in an AD conversion module;
carrying out sign bit expansion, digital frequency mixing, down-conversion, decimation filtering and frequency discrimination operation on the measured data, and converting the measured data into the frequency modulation signal parameters;
and sending the frequency modulation signal parameters to the programmable logic device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710532426.5A CN107465430B (en) | 2017-07-03 | 2017-07-03 | CPCI bus-based frequency modulation signal parameter monitoring method and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710532426.5A CN107465430B (en) | 2017-07-03 | 2017-07-03 | CPCI bus-based frequency modulation signal parameter monitoring method and system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107465430A CN107465430A (en) | 2017-12-12 |
| CN107465430B true CN107465430B (en) | 2021-04-02 |
Family
ID=60546673
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710532426.5A Active CN107465430B (en) | 2017-07-03 | 2017-07-03 | CPCI bus-based frequency modulation signal parameter monitoring method and system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107465430B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203133273U (en) * | 2013-03-15 | 2013-08-14 | 武汉大学 | High-frequency surface wave radar data collecting and processing apparatus based on CPCI bus |
| CN104283514A (en) * | 2014-10-29 | 2015-01-14 | 中国电子科技集团公司第二十九研究所 | Digital FM signal demodulator with instant AGC |
| CN104980381A (en) * | 2015-06-11 | 2015-10-14 | 哈尔滨工业大学 | Signal transmitting and receiving method based on four weighted fractional Fourier transform domain discrete multilevel CPM modulation |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101341946B1 (en) * | 2012-12-12 | 2013-12-16 | 현대로템 주식회사 | Data acquisition system of vehicles applying multi-communication |
| CN103067058B (en) * | 2012-12-25 | 2015-09-09 | 熊猫电子集团有限公司 | Based on the shortwave transmitting-receiving integrated Digital Signal processing module of delay diversity |
| CN106407080B (en) * | 2016-09-29 | 2019-03-12 | 上海航天测控通信研究所 | The signal monitor device of electronic equipment on satellite based on cpci bus |
-
2017
- 2017-07-03 CN CN201710532426.5A patent/CN107465430B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203133273U (en) * | 2013-03-15 | 2013-08-14 | 武汉大学 | High-frequency surface wave radar data collecting and processing apparatus based on CPCI bus |
| CN104283514A (en) * | 2014-10-29 | 2015-01-14 | 中国电子科技集团公司第二十九研究所 | Digital FM signal demodulator with instant AGC |
| CN104980381A (en) * | 2015-06-11 | 2015-10-14 | 哈尔滨工业大学 | Signal transmitting and receiving method based on four weighted fractional Fourier transform domain discrete multilevel CPM modulation |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107465430A (en) | 2017-12-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101799487B (en) | Method and equipment for detecting power supply voltage fluctuation | |
| CN202334788U (en) | Set top box with fault detecting function | |
| CN104316847A (en) | On-line monitoring and positioning system for partial discharge of transformer station | |
| CN207195097U (en) | A kind of blade state monitoring system of the wind power generating set based on video image processing | |
| CN104464016A (en) | Mobile intelligent inspection system of cable device and inspection method | |
| CN110824215A (en) | Broadband carrier based electricity stealing behavior detection method and device | |
| CN105791818A (en) | Fully-automatic digital television set top box test system | |
| CN107465430B (en) | CPCI bus-based frequency modulation signal parameter monitoring method and system | |
| CN111006718A (en) | Intelligent motor monitoring system and method | |
| CN112202741B (en) | Gateway device based on small signal analysis automatic identification communication bus and protocol | |
| CN104485991A (en) | Optical module fault automatic alarm method and system | |
| CN201752138U (en) | Fault point diagnosing and positioning system for indoor wireless network | |
| CN101951614A (en) | Wireless sensor | |
| CN112197888A (en) | Passive ultrahigh frequency RFID (radio frequency identification) tag, and temperature monitoring system and method for non-visible part of distribution network equipment | |
| CN105911239A (en) | PH detection device with wireless communication function | |
| CN114035555A (en) | PLC controller fault detection system | |
| CN103916639A (en) | Online telemetering method and device of reading of mechanical SF6 gas density meter | |
| CN207995072U (en) | Multichannel receiver with health degree management function | |
| CN206164800U (en) | Novel monitoring headpone | |
| CN105486829A (en) | Control method and electronic apparatus | |
| CN104501870A (en) | Cable parameter monitoring system based on LabVIEW | |
| CN105242995A (en) | Multi-level signal state detection apparatus and method | |
| CN103036313A (en) | Short range plastics optical fiber communication method | |
| CN103803678B (en) | Automatic control system and method for treating heavy metal wastewater based on ion-exchange resin method | |
| CN203798905U (en) | Power grid frequency acquisition device in fixed telephone network |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |