CN107395524B - Network failure task discrimination and resource redistribution method and system on many-core chip - Google Patents
Network failure task discrimination and resource redistribution method and system on many-core chip Download PDFInfo
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- H04L47/00—Traffic control in data switching networks
- H04L47/70—Admission control; Resource allocation
- H04L47/76—Admission control; Resource allocation using dynamic resource allocation, e.g. in-call renegotiation requested by the user or requested by the network in response to changing network conditions
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/12—Shortest path evaluation
- H04L45/121—Shortest path evaluation by minimising delays
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- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/12—Avoiding congestion; Recovering from congestion
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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- H04L47/24—Traffic characterised by specific attributes, e.g. priority or QoS
- H04L47/2416—Real-time traffic
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Abstract
The invention discloses a method and a device for discriminating and redistributing network failure tasks on a many-core chip, which are used for pre-judging the probability of task failure in a network on chip consisting of a many-core processor and redistributing resources occupied by the tasks according to the probability of the task failure. The invention improves the effective utilization rate of network-on-chip resources, meets the real-time requirements of more tasks and improves the service quality of effective tasks.
Description
Technical Field
The invention relates to the field of network-on-chip design of a many-core processor, in particular to the technical fields of network-on-chip structure design, task service quality guarantee, network-on-chip resource effective allocation and the like of the many-core processor.
Background
With the rapid development of technologies such as network service, cloud computing and internet of things, the number of concurrent users in a data center is increased from ten million to hundred million, and the data scale is increased from the current 10PB (10 PB) (10)16B) Increase ofTo a large number of EBs (10)18B) And (4) stages. According to statistics, Google receives more than 30 billion search instructions from the world every day, and the data volume processed every month exceeds 400 PB; the data volume generated by the Taobao per day exceeds 50TB, and the total storage volume exceeds 40 PB; a hundred degrees per day is about 100PB of data volume to process; facebook produces over 300TB of log data per day. According to Internet Data Center (IDC) predictions, the amount of data that needs to be managed globally will reach 35ZB by 2020. In order to deal with the massive data in such a large scale, the holding capacity of 18.54 thousands of newly-added internet data center cabinets is increased by 2020, and is increased by nearly 319% compared with 5.82 thousands in 2016. With the processing demands for concurrent processing and dramatic increase in data volume, the number of processor cores on a single chip is gradually increased, and the computing mode completely enters the stage of an on-chip many-core processor from the on-chip single core. Because, compared with a single-core processor, the many-core processor has great advantages in concurrent processing capability, memory access delay hiding and energy efficiency ratio. With the dramatic increase of the task amount concurrency of the data center, the concurrent tasks needing to be processed by the many-core processor are increased day by day, the task processing of the data center takes the service quality of a user as a main measurement standard, and how to well guarantee the service quality under the pressure of the concurrency degree of a hundred million-level scale is a main problem faced by the data center. In the design of processor architecture, memory access has always been a major bottleneck to the performance improvement of processors.
In many-core processors, as the number of cores on a single chip increases, the on-chip networks connecting cores to cores and cores to memories become more and more important, because in the "throat" position of data handling, the performance of the processor and the degree of real-time assurance of tasks are determined to a great extent. However, the current design of the network-on-chip structure cannot well guarantee the task service quality, and the effective utilization rate of the network-on-chip resources is not high. Therefore, how to reasonably allocate the network-on-chip resources to improve the effective utilization rate of the resources and sufficiently ensure the real-time performance of the tasks is one of the problems that the network-on-chip design must face in the future.
Among all the user request access tasks processed by the data center, some tasks always fail in processing due to various reasons. For the user to search or request some data web pages by using the browser, when some links are opened in the browser, the situation that access fails due to timeout and refreshing is likely to be successful often occurs, or the browser automatically resubmits the user request within a certain time. Since this is often the case, there are a certain number of failed tasks in the data center due to the inability to guarantee real-time performance. How to improve the success rate of the task to ensure the real-time performance of the task has become an important research direction in academia and industry. From the hardware perspective, a failed task among tasks processed by the data center may cause a waste of resources because it occupies certain hardware resources, and the end result is a task failure. Therefore, if the tasks which fail certainly can be discriminated on the hardware level, and the resources occupied by the part of tasks are released and transferred to other proper tasks, the real-time performance of the tasks can be guaranteed, and the user service experience can be improved.
Disclosure of Invention
The invention provides a method and a system for discriminating network failure tasks and redistributing resources on a many-core chip, which are used for discriminating the tasks which are about to fail through a network hardware structure on the chip and releasing the resources of the tasks to other suitable tasks.
In order to achieve the above object, the present invention provides a method for discriminating a network failure task on a many-core chip and redistributing resources, which is used for pre-judging the probability of task failure in a network on chip consisting of a many-core processor and redistributing the resources occupied by the task according to the probability of task failure, wherein each router in the network on chip is provided with a task failure judging unit and a resource redistributing unit, and each data packet is provided with an effective bit, the method comprises the following steps:
s1: the many-core processor sends out data packets, each data packet comprises a corresponding task margin time T1, whether the corresponding task margin time T1 is smaller than a preset threshold value T1 or not is judged while each data packet is generated, if yes, an effective position 1 in the data packet is used for indicating that task failure judgment needs to be carried out on the data packet, and if not, the effective position is 0;
s2: the data packet is forwarded through one of the routers, the router detects whether the valid bit is 1 when forwarding the data packet, if not, the data packet is directly forwarded, and if so, the step S3 is performed;
s3, the router calculates the time t2 needed by the data packet to be transmitted to the destination address and updates the margin time given to the data packet to t3, and the task failure judgment unit judges the possibility of the task failure according to t2 and t 3;
s4: when T3-T2 is less than a preset threshold value T2, the task failure judging unit judges that the task is bound to fail and discards the data packet, and simultaneously the task failure judging unit sends a task ending message to the upper layer software and sends a resource reallocation message to the resource reallocation unit;
s5: the upper software finishes the task corresponding to the data packet and releases the occupied resources;
s6: the resource reallocation unit allocates the released resources to the data packet with the minimum margin value in the data packets to be forwarded in the upper-level route;
s7: according to the steps S2-S6, the data packet is forwarded by the routers in sequence until the destination address is reached.
In an embodiment of the present invention, the header of each data packet includes a margin time field for recording and updating the margin time corresponding to the data packet.
In an embodiment of the present invention, a test packet is sent from a first router to a second router at a predetermined time interval, so as to measure and calculate a transmission delay between the first router and the second router, and use the measurement delay as a reference for updating a margin time.
In an embodiment of the present invention, the congestion information of the entire network on chip is collected in real time to be used as a reference for margin time update.
In an embodiment of the present invention, the congestion information of the local network on chip is collected in real time to be used as a reference for updating the margin time.
In an embodiment of the present invention, the router updates the margin time of the data packet by subtracting the time delay between the two routers from the original margin time.
The invention also provides a system for discriminating the network failure tasks and redistributing the resources on the many-core chip, which is used for executing the method for discriminating the network failure tasks and redistributing the resources on the many-core chip.
The system and the method for discriminating the network failure tasks and redistributing the resources on the many-core chip discriminate the tasks which are about to fail through the hardware structure of the network on the chip and release the resources of the tasks to other suitable tasks, can improve the effective utilization rate of the network resources on the chip, meet the real-time requirements of more tasks and greatly improve the service quality of the effective tasks.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram illustrating delay prediction of a data packet during network on chip transmission;
FIG. 2 is a schematic diagram of a data packet;
fig. 3 is a schematic diagram of a router in the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive effort based on the embodiments of the present invention, are within the scope of the present invention.
In a data center highly concurrent customer service environment, there may be a certain amount of failed tasks that are constantly shut down. When the task is closed, the invalid memory access request sent by the task may still stay in the network on chip, and occupies the related hardware resources. Aiming at the problem, the invention provides a system and a method for discriminating the network failure task on the many-core chip and redistributing the resources, wherein the task which is about to fail is discriminated through a network hardware structure on the chip, and the resources of the task are released to other proper tasks, so that the effective utilization rate of the resources is improved, and the real-time requirements of more tasks are met.
Fig. 1 is a schematic diagram of delay prediction of a data packet during transmission in a network on chip, and fig. 1 is a 6 × 6 2D Mesh network on chip. Of course, the method is not only suitable for 2D Mesh, but also has certain applicability to any network on chip. As shown in fig. 1, R represents a router, and the connection line represents a data transmission link between routers, and if a data packet is sent from a processing core connected to router a to a processing core on router B, it is first necessary to predict how long a delay is required for the data packet to be transmitted to router B before router a sends out the data packet. If the predicted transmission delay exceeds the margin time of the task, the task is judged to fail, and then the corresponding memory access request is discarded and the upper-layer system software is informed to finish the task. The margin time is the difference between the absolute time of a task from the required end, and is simply the time that the task can survive. If the task is able to complete all the content within a margin of time, the task can execute successfully, otherwise the task will fail. The predicted delay time of the data packet can be continuously corrected and updated along with the information of the data packet returned by the router B. When the corresponding packet transmission is dropped, the released hardware resources may be allocated to other corresponding tasks. In order to ensure the success rate of more real-time tasks, the released hardware resources can be released to the tasks between failure and success so as to fully ensure the success rate of the tasks.
Based on the above thought, the invention provides a many-core network-on-chip failure task discrimination and resource reallocation method, which is used for pre-judging the probability of task failure in a network-on-chip consisting of a many-core processor and reallocating the resources occupied by the tasks according to the probability of task failure, wherein each router in the network-on-chip is provided with a task failure judgment unit and a resource reallocation unit, and each data packet is provided with an effective bit, and the method comprises the following steps:
s1: the many-core processor sends out data packets, each data packet comprises a corresponding task margin time T1, whether the corresponding task margin time T1 is smaller than a preset threshold value T1 or not is judged while each data packet is generated, if yes, an effective position 1 in the data packet is used for indicating that task failure judgment needs to be carried out on the data packet, and if not, the effective position is 0;
fig. 2 is a schematic diagram of data packets, and as shown in fig. 2, the header of each data packet may include a margin time field for recording and updating the margin time corresponding to the data packet.
S2: the data packet is forwarded through one of the routers, the router detects whether the valid bit is 1 when forwarding the data packet, if not, the data packet is directly forwarded, and if so, the step S3 is performed;
s3, the router calculates the time t2 needed by the data packet to be transmitted to the destination address and updates the margin time given to the data packet to t3, and the task failure judgment unit judges the possibility of the task failure according to t2 and t 3;
when the data packet is transmitted in the network on chip, the margin time of the task to which the data packet belongs is continuously reduced as the distance from the destination address is closer and closer. Therefore, when a packet is transmitted between routers, the margin time of the packet needs to be updated every time a router passes. The mechanism for updating the margin time of the data packet may be obtained by subtracting the time delay between the two routers from the original margin time, and the delay between the two routers may be obtained by "delay between the two routers determined during the network on chip design" × "hop count for packet transmission", for example, "delay between the two routers determined during the network on chip design" is 3 cycles, "hop count for packet transmission" is 5 hops, and then the delay between the two routers is 15 cycles. In addition, when updating the margin time, the following reference methods can be adopted:
(1) collecting congestion information of the whole network on chip in real time to serve as a reference for updating margin time;
this approach is suitable for situations where each part of the network on chip is congested quite well, and there is no situation where a certain part is too congested or not congested at all.
(2) Acquiring congestion information of a local network on chip in real time to serve as a reference for updating margin time;
the method is suitable for the situation that local congestion of the network on chip is serious, and the acquired congestion information of the network on chip in the data packet transmission range can be more clear and more truly acquire the margin time of the data packet.
(3) Sending a test data packet from a first router to a second router at a preset time interval to measure and calculate the transmission delay between the first router and the second router as a reference for updating margin time.
In the network on chip, if a first router transmits more data packets to a second router, the data packets can be used as a reference for updating the margin time in this way, so as to improve the accuracy of the margin time.
S4: when T3-T2 is less than a preset threshold value T2, the task failure judging unit judges that the task is bound to fail and discards the data packet, and simultaneously the task failure judging unit sends a task ending message to the upper layer software and sends a resource reallocation message to the resource reallocation unit;
s5: the upper software finishes the task corresponding to the data packet and releases the occupied resources;
s6: the resource reallocation unit allocates the released resources to the data packet with the minimum margin value in the data packets to be forwarded in the upper-level route;
in step S6, the released resources are allocated to the "near-failure task", which is characterized in that although it is currently judged that the task can be successfully executed, the margin value is the smallest, and the task is most likely to be unsuccessfully executed.
S7: according to the steps S2-S6, the data packet is forwarded by the routers in sequence until the destination address is reached.
Both T1 and T2 of the present invention can be empirically set before implementation to suit specific network-on-chip and network-on-chip data transmission requirements.
The invention also provides a system for discriminating the network failure tasks and redistributing the resources on the many-core chip, which is used for executing the method for discriminating the network failure tasks and redistributing the resources on the many-core chip.
The system and the method for discriminating the network failure tasks and redistributing the resources on the many-core chip discriminate the tasks which are about to fail through the hardware structure of the network on the chip and release the resources of the tasks to other suitable tasks, can improve the effective utilization rate of the network resources on the chip, meet the real-time requirements of more tasks and greatly improve the service quality of the effective tasks.
Those of ordinary skill in the art will understand that: the figures are merely schematic representations of one embodiment, and the blocks or flow diagrams in the figures are not necessarily required to practice the present invention.
Those of ordinary skill in the art will understand that: modules in the devices in the embodiments may be distributed in the devices in the embodiments according to the description of the embodiments, or may be located in one or more devices different from the embodiments with corresponding changes. The modules of the above embodiments may be combined into one module, or further split into multiple sub-modules.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (7)
1. A many-core network-on-chip failure task discrimination and resource redistribution method is used for pre-judging the probability of task failure in a network-on-chip consisting of a many-core processor and redistributing the resources occupied by the tasks according to the probability of the task failure, and is characterized in that each router in the network-on-chip is provided with a task failure judgment unit and a resource redistribution unit, and each data packet is provided with an effective bit, and the method comprises the following steps:
s1: the many-core processor sends out data packets, each data packet comprises a corresponding task margin time T1, whether the corresponding task margin time T1 is smaller than a preset threshold value T1 or not is judged while each data packet is generated, if yes, the effective position in the data packet is 1 to indicate that the data packet needs to be subjected to task failure judgment, and if not, the effective position is 0;
s2: the data packet is forwarded through one of the routers, the router detects whether the valid bit is 1 when forwarding the data packet, if not, the data packet is directly forwarded, and if so, the step S3 is performed;
s3, the router calculates the time t2 needed by the data packet to be transmitted to the destination address and updates the margin time given to the data packet to t3, and the task failure judgment unit judges the possibility of the task failure according to t2 and t 3;
s4: when T3-T2 is less than a preset threshold value T2, the task failure judging unit judges that the task is bound to fail and discards the data packet, and simultaneously the task failure judging unit sends a task ending message to the upper layer software and sends a resource reallocation message to the resource reallocation unit;
s5: the upper software finishes the task corresponding to the data packet and releases the occupied resources;
s6: the resource reallocation unit allocates the released resources to the data packet with the minimum margin value in the data packets to be forwarded in the upper-level route;
s7: according to the steps S2-S6, the data packet is forwarded by the routers in sequence until the destination address is reached.
2. The method of claim 1, wherein a header of each data packet includes a margin time field to record and update a corresponding margin time of the data packet.
3. The method of claim 1, wherein a first router sends a test packet to a second router at a predetermined time interval to measure and calculate a transmission delay between the first router and the second router as a reference for updating margin time.
4. The method of claim 1, wherein congestion information of the entire network-on-chip is collected in real time as a reference for margin time update.
5. The method of claim 1, wherein congestion information of local networks on chip is collected in real time as a reference for margin time update.
6. The method of claim 1, wherein the router updates the margin time of the data packet by subtracting the time delay between two routers from the original margin time.
7. A system for discriminating and redistributing network failure tasks on a many-core chip is characterized in that the system is used for executing the method for discriminating and redistributing network failure tasks on a many-core chip in any one of claims 1 to 6.
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| CN101091334A (en) * | 2004-12-30 | 2007-12-19 | 摩托罗拉公司 | Downlink resource allocation for time offset downlink packets |
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