CN107393999A - Infrared detector with vertical sidewall sensitive layer and preparation method thereof - Google Patents
Infrared detector with vertical sidewall sensitive layer and preparation method thereof Download PDFInfo
- Publication number
- CN107393999A CN107393999A CN201710516399.2A CN201710516399A CN107393999A CN 107393999 A CN107393999 A CN 107393999A CN 201710516399 A CN201710516399 A CN 201710516399A CN 107393999 A CN107393999 A CN 107393999A
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- sensitive layer
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- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 239000004065 semiconductor Substances 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 2
- 238000000605 extraction Methods 0.000 claims 1
- 238000001259 photo etching Methods 0.000 abstract description 7
- 230000035945 sensitivity Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000005057 refrigeration Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/112—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/112—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor
- H01L31/113—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor
- H01L31/1136—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor the device being a metal-insulator-semiconductor field-effect transistor
Abstract
The invention provides a kind of infrared detector with vertical sidewall sensitive layer and preparation method thereof, by forming at least one fin structure on a semiconductor substrate；Ion implanting can be used to form sensitive layer in fin structure side wall；Lower electrode layer is formed in fin structure bottom, lower electrode layer touches with sensitive layer bottom connection；And upper electrode layer is formed above fin structure, upper electrode layer at the top of sensitive layer with being in contact.The present invention reduces influence of the photoetching to sensitive layer by setting vertical sidewall sensitive layer, reduces the influence of the sensitivity to sensitive layer.
Description
Technical field
The present invention relates to image sensor technologies field, and in particular to a kind of infrared acquisition with vertical sidewall sensitive layer
Device and preparation method thereof.
Background technology
Traditional non-refrigeration type infrared detector sensitive layer is planar structure, sandwiched sensitive layer between upper/lower electrode.Traditional electricity
During resistance design, its resistance is influenceed by the factors such as photoetching and etching size, film thickness, causes its uniformity to be deteriorated；
, it is necessary to which increase compensation resistance compensates in being designed by ASIC circuit after pixel sensitive resistance uniformity is deteriorated in array,
But the compensation ability of the technology is limited, and the complexity and cost of circuit can be increased, cause product overall performance decline, into
This rising.Additionally due to the resistivity of part sensitive material is higher, and the design of sensitive resistance must be reduced by reducing voltage processed partially
Value, is extremely difficult for conventional planar structure now.
Therefore, be badly in need of research how to reduce the influence of photoetching, film thickness to sensitive layer, so as to improve sensitive layer precision and
The sensitivity of whole device.
The content of the invention
In order to overcome problem above, the present invention is intended to provide a kind of infrared detector and preparation method thereof, is hung down by setting
Straight sidewall sensitive layer reduces influence of the photoetching to sensitive layer.
In order to achieve the above object, the invention provides a kind of infrared detector, it includes：
Semi-conductive substrate；
At least one fin structure in the Semiconductor substrate；
Positioned at the sensitive layer of fin structure side wall；
Lower electrode layer positioned at fin structure bottom, lower electrode layer touch with sensitive layer bottom connection；And
Upper electrode layer above fin structure, upper electrode layer at the top of sensitive layer with being in contact.
Preferably, the sensitive layer is in continuous state around the side wall of a plurality of fin structure.
Preferably, fin structure forms at least one fin structure unit, and fin structure unit has following characteristics：With M bar fins
Structure, wherein, M-1 bar fin structures are arranged in parallel, and each end of a remaining fin structure and the M-1 bars fin structure is in hang down
Straight intersecting arrangement.
Preferably, a part for a side wall of a remaining fin structure is not provided with sensitive layer, the upper electrode layer
Exit connection upper electrode layer an edge, and close to the side wall for the remaining fin structure for being not provided with sensitive layer
Extend to semiconductor substrate surface；Also, the exit bottom of the upper electrode layer is not in contact with lower electrode layer.
Preferably, the sensitive layer is also located at the top of the fin structure.
In order to achieve the above object, present invention also offers a kind of preparation method of infrared detector, it includes：
Step 01：Semi-conductive substrate is provided；
Step 02：Lower electrode layer is prepared in semiconductor substrate surface；
Step 03：At least one fin structure is prepared on lower electrode layer；
Step 04：Sensitive layer is formed in the side wall of fin structure；
Step 05：Upper electrode layer is formed above fin structure, upper electrode layer at the top of sensitive layer with being in contact.
Preferably, in the step 03, fin structure is prepared using etching technics, fin structure forms at least one fin structure list
Member；At least one fin structure unit has following characteristics：With M bar fin structures, wherein, M-1 bar fin structures are arranged in parallel, wherein
A remaining fin structure with each end of the M-1 bars fin structure is perpendicular intersects arrangement.
Preferably, the step 04 includes：First, in fin structure side wall and deposited atop sensitive layer；Then, etching removes
Positioned at the part sensitive layer of the lateral wall of a remaining fin structure, the lateral wall of a remaining fin structure is exposed.
Preferably, the step 05 includes：First, one layer of Top electrode is deposited in the Semiconductor substrate for completing step 04
Layer；Then, etching removes the upper electrode layer of sensitive layer side wall and the upper electrode layer of part semiconductor substrate surface, and retains sensitivity
The upper electrode layer of the lateral wall of the exposure of upper electrode layer, a remaining fin structure at the top of layer top and fin structure, from
And form upper electrode layer pattern and form the exit pattern of upper electrode layer.
Preferably, in the step 04, during etching, the sensitive layer at the top of fin structure is also removed.
The infrared detector of the present invention, using the design of vertical sidewall sensitive layer, according to formula R=ρ * L/ (W*t), W is
Width, L are length, and t is thickness, here, ignore the thickness of doping film, undoped film thickness is as L, the length of fin structure
As W, error R is smaller obtained from.
Brief description of the drawings
Fig. 1 is the overlooking the structure diagram of the infrared detector of the preferred embodiment of the present invention
Fig. 2 is cross section structure schematic diagrams of the Fig. 1 along a kind of infrared detector in AA ' directions
Fig. 3 is cross section structure schematic diagrams of the Fig. 1 along a kind of infrared detector in BB ' directions
Fig. 4 is cross section structure schematic diagrams of the Fig. 1 along another infrared detector in AA ' directions
Fig. 5 is cross section structure schematic diagrams of the Fig. 1 along another infrared detector in BB ' directions
Fig. 6 is the schematic flow sheet of the preparation method of the infrared detector of the preferred embodiment of the present invention
Fig. 7~14 are each preparation process schematic diagram of the preparation method of Fig. 6 infrared detector
Embodiment
To make present disclosure more clear understandable, below in conjunction with Figure of description, present disclosure is made into one
Walk explanation.Certainly the invention is not limited in the specific embodiment, the general replacement known to those skilled in the art
Cover within the scope of the present invention.
The present invention is described in further detail below in conjunction with accompanying drawing 1~14 and specific embodiment.It should be noted that accompanying drawing
Using very simplified form, using non-accurately ratio, and only to it is convenient, clearly reach aid illustration the present embodiment
Purpose.
Fig. 1~3 are referred to, a kind of infrared detector of the present embodiment includes：Semiconductor substrate 00, fin structure 02, sensitivity
Layer 03, upper electrode layer 04 and lower electrode layer 01.
Specifically, referring to Fig. 1, in Fig. 1 dotted line represent lower electrode layer, be only used for expressing.It is located in the present embodiment and partly leads
Fin structure 02 1 on body substrate 00 shares four；Sensitive layer 03 is located at the side wall of fin structure 02.Here, sensitive layer 03 is around four
The side wall of fin structure 02 is in continuous state.Specifically, four fin structures 02, one fin structure unit of composition of the present embodiment, this
Fin structure unit has following characteristics：With four fin structures 02, wherein, three fin structures 02 are arranged in parallel, wherein remaining
One fin structure 02 with each end of above-mentioned three fin structures 02 is perpendicular intersects arrangement, as shown in fig. 1, the fin structure list
Member is in M shapes.
Referring to Fig. 2, lower electrode layer 01 is located at the bottom of fin structure 02, lower electrode layer 01 touches with the bottom connection of sensitive layer 03.
Meanwhile upper electrode layer 04 is located at the top of fin structure 02, upper electrode layer 04 is in contact with the top of sensitive layer 03.Here, lower electrode layer
01 insertion Semiconductor substrate 00 top layer；Or lower electrode layer 01 can also be located on the surface of Semiconductor substrate 00, and in lower electricity
The surface metallization medium layer of Semiconductor substrate 00 of exposure outside pole layer 01.
In the present embodiment, in order to avoid the short circuit of upper electrode layer 04 and lower electrode layer 01, the exit 041 of upper electrode layer 04
Bottom is not in contact with lower electrode layer 01, as shown in figure 3, in the present embodiment, in the place fin knot of exit 041 of upper electrode layer 04
The bottom of structure 02 is not provided with lower electrode layer 01.Further, because sensitive layer 03 can also be used as signal transmission body, therefore, in order to
Preferably avoid that short circuit occurs between upper electrode layer 04 and lower electrode layer 01, one of the lateral wall of a remaining fin structure 02
Divide and be not provided with sensitive layer 03, the part for the lateral wall of the fin structure 02 of level is not provided with sensitive layer 03 here；Upper electrode layer
04 exit 041 connects an edge of upper electrode layer 04, and close to the remaining fin structure for being not provided with sensitive layer 03
The side wall of 02 (horizontal fin structure 02) extends to the surface of Semiconductor substrate 00.In addition, in the present embodiment, upper electrode layer 04 draws
Go out end 04 and also extend to the surface of Semiconductor substrate 00, and continue on the extension of the surface of Semiconductor substrate 00 and be in horizontal component.
So, the above-mentioned infrared detector of the present embodiment, according to formula R=ρ * L/ (W*t), W is width, and L is length, t
It is thickness, here, doping film is sensitive layer 03, ignores the thickness of sensitive layer 03, and undoped film thickness that is to say fin structure
02 height is used as W, the error R obtained from as the girth approximation of L, a plurality of fin structure 02 the fin structure unit formed
It is smaller.
In addition, referring to Fig. 4~5, the infrared detector of other embodiments of the invention, it is infrared with above-described embodiment
The difference of detector is that sensitive layer 03 is also located at the top of fin structure 02, is located at the top of fin structure 02 so as to reduce
The line thickness of upper electrode layer 04, further reduces electricalresistivityρ.In addition, according to formula R=ρ * L/ (W*t), due to sensitive layer
03 thickness is negligible, and the height of fin structure 02 remains as L, and therefore, the sensitive layer 03 at the top of fin structure 02 will not shadow
Ring error R whole structure.
Referring to Fig. 6, the present embodiment illustrates by taking a kind of preparation method of above-mentioned infrared detector as an example, it has
Body includes：
Step 01：Referring to Fig. 7, provide semi-conductive substrate 00；
Specifically, Semiconductor substrate 00 can be, but not limited to as silicon substrate.
Step 02：Referring to Fig. 8, prepare lower electrode layer 01 on the surface of Semiconductor substrate 00；
Specifically, the preparation of lower electrode layer 01 can include：Lower electrode layer 01 is deposited on the surface of Semiconductor substrate 00 first,
Then it can be, but not limited to etch lower electrode layer 01 using photoetching and etching technics, form the figure of required lower electrode layer 01
Case, then in the exposed surface metallization medium layer of Semiconductor substrate 00.Or the preparation of lower electrode layer 01 can include：Partly leading
The surface etch of body substrate 00 is used for the groove for filling lower electrode layer 01, and lower electrode layer 01, and useization are then deposited in groove
The mechanical polishing process planarization surface of lower electrode layer 01 is learned to flush with the surface of Semiconductor substrate 00.
Step 03：Fig. 9 and 10 are referred to, at least one fin structure 02 is prepared on lower electrode layer 01；
Specifically, Figure 10 is Fig. 9 overlooking the structure diagram；Here it is possible to but it is not limited to use photoetching and etching technics
Fin structure 02 is prepared, the fin structure unit formed for four fin structures 02 of above-described embodiment, Dual graphing can be used
It technique, can be, but not limited to, be vertical fin structure spirte and horizontal fin knot by the inserting drawing of above-mentioned fin structure unit
Structure spirte, then, each spirte is respectively adopted and carries out photoetching and etching technics to obtain final fin structure figure.Need
It is noted that lower electrode layer 01 and the edge of the fin structure 2 of level be not concordant, in order to avoid upper electrode layer and lower electrode layer are short
Road.
Step 04：Figure 11 and 12 are referred to, sensitive layer 03 is formed in the side wall of fin structure 02；
Specifically, Figure 12 is Figure 11 overlooking the structure diagram；First, lead at the side wall of fin structure 02 and top and partly
The surface of body substrate 00 deposits sensitive layer 03, sensitive layer 03 is formed p-type using ion implanting；Then, etching is removed positioned at residue
A fin structure 02 lateral wall part sensitive layer 03, the lateral wall of a remaining fin structure 02 is exposed, this
In, in etching, in addition to remove the sensitive layer 03 positioned at the top of fin structure 02.
Step 05：Figure 13 and 14 is referred to, upper electrode layer 04, upper electrode layer 04 and sensitive layer are formed above fin structure 02
03 top is in contact.
Specifically, Figure 14 is Figure 13 overlooking the structure diagram.First, sunk in the Semiconductor substrate 00 for completing step 04
One layer of upper electrode layer 04 of product；Then, etching removes upper electrode layer 04 and the surface of part semiconductor substrate 00 of the side wall of sensitive layer 03
Upper electrode layer 04, and retain the upper electrode layer 04 at the top of sensitive layer 03 and the top of fin structure 02 and retain remaining one
The upper electrode layer 04 of the lateral wall of the exposure of fin structure (horizontal fin structure 02), so as to formed the pattern of upper electrode layer 04 and
Form the pattern of the exit 041 of upper electrode layer 04.
Although the present invention is disclosed as above with preferred embodiment, right embodiment is illustrated only for the purposes of explanation, and
Be not used to limit the present invention, those skilled in the art can make without departing from the spirit and scope of the present invention it is some more
Dynamic and retouching, the protection domain that the present invention is advocated should be defined by claims.
Claims (10)
- A kind of 1. infrared detector, it is characterised in that including：Semi-conductive substrate；At least one fin structure in the Semiconductor substrate；Positioned at the sensitive layer of fin structure side wall；Lower electrode layer positioned at fin structure bottom, lower electrode layer touch with sensitive layer bottom connection；AndUpper electrode layer above fin structure, upper electrode layer at the top of sensitive layer with being in contact.
- 2. infrared detector according to claim 1, it is characterised in that side wall of the sensitive layer around a plurality of fin structure In continuous state.
- 3. infrared detector according to claim 1, it is characterised in that fin structure forms at least one fin structure unit, Fin structure unit has following characteristics：With M bar fin structures, wherein, M-1 bar fin structures are arranged in parallel, a remaining fin knot Structure with each end of the M-1 bars fin structure is perpendicular intersects arrangement.
- 4. infrared detector according to claim 3 a, it is characterised in that side wall of a remaining fin structure A part is not provided with sensitive layer, and the exit of the upper electrode layer connects an edge of upper electrode layer, and quick close to being not provided with The side wall for feeling a remaining fin structure for layer extends to semiconductor substrate surface；Also, the extraction of the upper electrode layer End bottom is not in contact with lower electrode layer.
- 5. infrared detector according to claim 1, it is characterised in that the sensitive layer is also located at the top of the fin structure Portion.
- A kind of 6. preparation method of infrared detector, it is characterised in that including：Step 01：Semi-conductive substrate is provided；Step 02：Lower electrode layer is prepared in semiconductor substrate surface；Step 03：At least one fin structure is prepared on lower electrode layer；Step 04：Sensitive layer is formed in the side wall of fin structure；Step 05：Upper electrode layer is formed above fin structure, upper electrode layer at the top of sensitive layer with being in contact.
- 7. the preparation method of infrared detector according to claim 6, it is characterised in that in the step 03, using quarter Etching technique prepares fin structure, and fin structure forms at least one fin structure unit；Fin structure unit has following characteristics：With M bars Fin structure, wherein, M-1 bar fin structures are arranged in parallel, and each end of a remaining fin structure and the M-1 bars fin structure is in Intersect vertically arrangement.
- 8. the preparation method of infrared detector according to claim 7, it is characterised in that the step 04 includes：First, In fin structure side wall and deposited atop sensitive layer；Then, etching removes the part of the lateral wall positioned at a remaining fin structure Sensitive layer, the lateral wall of a remaining fin structure is exposed.
- 9. the preparation method of infrared detector according to claim 8, it is characterised in that the step 05 includes：First, One layer of upper electrode layer is deposited in the Semiconductor substrate for completing step 04；Then, etching removes the upper electrode layer of sensitive layer side wall With the upper electrode layer of part semiconductor substrate surface, and retain the upper electrode layer at the top of sensitive layer and at the top of fin structure, described surplus The upper electrode layer of the lateral wall of the exposure of a remaining fin structure, so as to form upper electrode layer pattern and form upper electrode layer Exit pattern.
- 10. the preparation method of infrared detector according to claim 9, it is characterised in that in the step 04, etching When, also remove the sensitive layer at the top of fin structure.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710516399.2A CN107393999B (en) | 2017-06-29 | 2017-06-29 | Infrared detector and preparation method thereof with vertical sidewall sensitive layer |
| US16/618,343 US11276718B2 (en) | 2017-06-29 | 2017-06-30 | Image sensor structure and manufacturing method thereof |
| US16/624,907 US20220149106A1 (en) | 2017-06-29 | 2017-06-30 | Infrared detector having vertical sidewall sensitive layer and manufacturing method thereof |
| PCT/CN2017/091082 WO2019000384A1 (en) | 2017-06-29 | 2017-06-30 | Infrared detector having vertical sidewall sensitive layer and preparation method therefor |
| PCT/CN2017/091083 WO2019000385A1 (en) | 2017-06-29 | 2017-06-30 | Image sensor structure and manufacturing method therefor |
| US17/665,536 US11855107B2 (en) | 2017-06-29 | 2022-02-06 | Manufacturing method for image sensor structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710516399.2A CN107393999B (en) | 2017-06-29 | 2017-06-29 | Infrared detector and preparation method thereof with vertical sidewall sensitive layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107393999A true CN107393999A (en) | 2017-11-24 |
| CN107393999B CN107393999B (en) | 2019-02-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201710516399.2A Active CN107393999B (en) | 2017-06-29 | 2017-06-29 | Infrared detector and preparation method thereof with vertical sidewall sensitive layer |
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| Country | Link |
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| CN (1) | CN107393999B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5450053A (en) * | 1985-09-30 | 1995-09-12 | Honeywell Inc. | Use of vanadium oxide in microbolometer sensors |
| CN101445215A (en) * | 2008-10-16 | 2009-06-03 | 上海集成电路研发中心有限公司 | Infrared receiver and manufacturing method thereof |
| CN102683475A (en) * | 2011-03-18 | 2012-09-19 | 浙江大立科技股份有限公司 | Manufacturing method of infrared detector based on temporary release protective layer |
-
2017
- 2017-06-29 CN CN201710516399.2A patent/CN107393999B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5450053A (en) * | 1985-09-30 | 1995-09-12 | Honeywell Inc. | Use of vanadium oxide in microbolometer sensors |
| CN101445215A (en) * | 2008-10-16 | 2009-06-03 | 上海集成电路研发中心有限公司 | Infrared receiver and manufacturing method thereof |
| CN102683475A (en) * | 2011-03-18 | 2012-09-19 | 浙江大立科技股份有限公司 | Manufacturing method of infrared detector based on temporary release protective layer |
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| CN107393999B (en) | 2019-02-12 |
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