CN107392058A - A kind of computer security card being made up of control circuit and memory bank - Google Patents
A kind of computer security card being made up of control circuit and memory bank Download PDFInfo
- Publication number
- CN107392058A CN107392058A CN201710625051.7A CN201710625051A CN107392058A CN 107392058 A CN107392058 A CN 107392058A CN 201710625051 A CN201710625051 A CN 201710625051A CN 107392058 A CN107392058 A CN 107392058A
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- Prior art keywords
- memory bank
- decoding
- control circuit
- pci
- area
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
Abstract
The invention discloses a kind of computer security card being made up of control circuit and memory bank, including PCI control circuits and memory bank, the PCI control circuits include controller, Serial E2PROM, pseudorandom number generator, buffering area, decoding area decoder and pci bus, the controller include master controller and IC controllers, and Serial E2PROM, pseudorandom number generator, buffering area, decoding area decoder, IC controllers are connected with master controller.The computer security card being made up of control circuit and memory bank, using the safety card based on pci bus technology, have the advantages that high-performance, stability are high, compatibility is strong, plaintext is encrypted using respective algorithms, by decoding area and area decoder by the ciphertext of reception, it is decrypted and is reduced in plain text, using the curable operating system of SSDRAM solid-state disks, important system program and can realize hardware-initiated, using the static memory of computer-internal, not only simplify circuit structure but also improved reliability, while also reduce cost.
Description
Technical field
The present invention relates to computer security card technical field, specially a kind of meter being made up of control circuit and memory bank
Calculation machine safety card.
Background technology
Current society is the society of network.Internet oneself penetrate into people work, study, life each neck
Domain, it is reported that, China's online computer is up to 6,500,000 at present, and nearly 30,000 of website, the people of netizen more than 2,000 ten thousand, network is profoundly
Change actual life, but also bring unprecedented network security problem:The thing of harmful information is lost, steals secret information and propagated on the net
Part occurs repeatedly, and assault behavior is increasing, and some departments are recognized Computer information network safety problem and potential risk
Know deficiency, self-protection and the precautionary measures are not capable, the research of Computer information network security protection technology and product, exploitation and
Using relatively lagging behind, general safety prevention ability is relatively low, and a kind of prior art is using ROM come hardened operating system, this method
Although the hardware-initiated of system can be realized, operating system, system can not be set and controlled in the case where not changing hardware
Software processed is upgraded or changed；Above-mentioned prior art does not contain RAM in structure, therefore can not dynamic access data；In addition
This prior art also contains a single control instruction generation circuit in addition, adds the complexity in structure.
The content of the invention
For problem above, the invention provides a kind of computer security card being made up of control circuit and memory bank,
High-performance, low cost, service life are long, stability is high, compatibility is strong, have not only simplified circuit structure but also have improved reliability, together
When also reduce cost, effectively can solve the problems, such as in background technology.
To achieve the above object, the present invention provides following technical scheme：It is a kind of to be made up of control circuit and memory bank
Computer security card, including PCI control circuits and memory bank, the PCI control circuits include controller, Serial E2PROM, puppet
Randomizer, buffering area, decoding area decoder and pci bus, the controller includes master controller and IC controllers, and goes here and there
Row E2PROM, pseudorandom number generator, buffering area, decoding area decoder, IC controllers are connected with master controller, the buffering area and
Pci bus is connected, and the front end of pci bus is provided with PCI slot, and the memory bank uses the static storage of computer-internal
Device, and memory bank contains SSDRAM solid-state disks, the SSDRAM solid-state disks include addressed memory and data storage, described to translate
Code area decoder includes decoding decoding chip, and decodes decoding chip and be connected with addressed memory.
As a kind of preferable technical scheme of the present invention, the PCI9050 cores for the PLX companies that the pci bus uses
Piece, the decoding decoding chip use the ADSPZIO61 chips of AD companies.
As a kind of preferable technical scheme of the present invention, the master controller uses 97C51 chips, and the buffering area uses
CPLD bidirectional bufferings area.
As a kind of preferable technical scheme of the present invention, the pseudorandom number generator is connected with data storage.
Compared with prior art, the beneficial effects of the invention are as follows：The computer being made up of control circuit and memory bank
Safety card, using the safety card based on pci bus technology, there is long high-performance, low cost, service life, stability height, compatibility
Property it is strong the advantages that, employ current advanced AES, there is provided the hardware of RSA, MDS, DES scheduling algorithm based on public key is real
It is existing, plaintext is encrypted using respective algorithms, ciphertext is generated, is then transmitted by existing network system, by decoding area
With area decoder by the ciphertext of reception, it is decrypted and is reduced in plain text, the PCI9050 of the PLX companies of use realizes PCI affairs,
Various cryptographic algorithms are realized using the ADSPZIO61 of AD companies, using the curable operating system of SSDRAM solid-state disks, important system
Program simultaneously can be realized hardware-initiated, using the static memory of computer-internal, not only simplified circuit structure but also improved reliable
Property, while also reduce cost, the card have security protection performance is good, function is strong, it is simple and reasonable, can field upgrade,
The features such as flexible is operated, can be widely applied to the safety protection field of universal microcomputer information system, prevents various types of calculating
Machine criminal offence.
Brief description of the drawings
Fig. 1 is schematic structural view of the invention；
Fig. 2 is bank structure block diagram of the present invention.
In figure：1-PCI control circuits；2- memory banks；3- controllers；4- Serial Es2PROM；5- pseudorandom number generators；6-
Buffering area；7- decodes area decoder；8-PCI buses；9- master controllers；10-IC controllers；11-PCI slots；12-SSDRAM solid-states
Disk；13- addressed memories；14- data storages；15- decodes decoding chip.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
Embodiment：
Fig. 1 and Fig. 2 are referred to, the present invention provides a kind of technical scheme：A kind of calculating being made up of control circuit and memory bank
Machine safety card, including PCI control circuits 1 and memory bank 2, the PCI control circuits 1 include controller 3, Serial E2PROM4, puppet
Randomizer 5, buffering area 6, decoding area decoder 7 and pci bus 8, the controller 3 includes master controller 9 and IC is controlled
Device 10, and Serial E2PROM4, pseudorandom number generator 5, buffering area 6, decoding area decoder 7, IC controllers 10 and master controller 9
It is connected, the buffering area 6 is connected with pci bus 8, and the front end of pci bus 8 is provided with PCI slot 11, and the memory bank 2 is adopted
With the static memory of computer-internal, and memory bank contains SSDRAM solid-state disks 12, and the SSDRAM solid-state disks 12 include ground
Location memory 13 and data storage 14, it is described decoding area decoder 7 include decoding decoding chip 15, and decode decoding chip 15 with
Addressed memory 13 is connected, and the pci bus 8 is using the PCI9050 chips of the PLX companies used, the decoding decoding chip
15 use the ADSPZIO61 chips of AD companies, and the buffering area 6 is using CPLD bidirectional bufferings area, the pseudorandom number generator
It is connected with data storage 14.
The operation principle of the present invention：The computer security card being made up of control circuit and memory bank, after power-on reset,
Pci bus 8 is from Serial E2Configuration information is read in PROM4, completes configuration:The initialization to card is automatically performed, is divided as needed
With address:The local reset signal of pci bus 8 resets decoding decoding chip 15, decodes decoding chip 15 from Serial E2PROM4
Middle guide service program:Master controller 9 detects the state of IC controllers 10, and detection decoding decoding chip 15 is translated its signal
After code decoding chip 15 is ready to, the information such as the state on IC controllers 10 of master controller 9 are received, to host report, table
Show that decoding decoding chip 15 part can start working, hereafter decode decoding chip 15 and enter interrupt latency.Main frame receives user
Order after, send corresponding order control code to decoding decoding chip 15, after decoding decoding chip 15 receives, as needed,
Call corresponding program to be handled, after decoding decoding chip 15 completes work, completed to the work of host report just now, main frame
When being communicated with decoding decoding chip 15, all relevant devices being connected on local bus are pinned by chip selection signal, prevent from counting
According to disorder, the detection in real time of master controller 9 decodes the state of FLA3G in decoding chip 15, once changing, makes an immediate response, according to
Command code, corresponding operation is performed, data are encrypted.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement made within refreshing and principle etc., should be included in the scope of the protection.
Claims (4)
1. a kind of computer security card being made up of control circuit and memory bank, including PCI control circuits（1）And memory bank
（2）, it is characterised in that：The PCI control circuits（1）Including controller（3）, Serial E2PROM（4）, pseudorandom number generator
（5）, buffering area（6）, decoding area decoder（7）And pci bus（8）, the controller（3）Including master controller（9）Controlled with IC
Device（10）, and Serial E2PROM（4）, pseudorandom number generator（5）, buffering area（6）, decoding area decoder（7）, IC controllers（10）
With master controller（9）It is connected, the buffering area（6）With pci bus（8）It is connected, and pci bus（8）Front end be provided with PCI and insert
Groove（11）, the memory bank（2）Using the static memory of computer-internal, and memory bank（2）Contain SSDRAM solid-state disks
（12）, the SSDRAM solid-state disks（12）Including addressed memory（13）And data storage（14）, the decoding area decoder（7）
Including decoding decoding chip（15）, and decode decoding chip（15）With addressed memory（13）It is connected.
2. a kind of computer security card being made up of control circuit and memory bank according to claim 1, its feature exist
In：The pci bus（8）Using the PCI9050 chips of the PLX companies of use, the decoding decoding chip（15）It is public using AD
The ADSPZIO61 chips of department.
3. a kind of computer security card being made up of control circuit and memory bank according to claim 1, its feature exist
In：The master controller（9）Using 97C51 chips, the buffering area（6）Using CPLD bidirectional bufferings area.
4. a kind of computer security card being made up of control circuit and memory bank according to claim 1, its feature exist
In：The pseudorandom number generator（5）It is connected with data storage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710625051.7A CN107392058A (en) | 2017-07-27 | 2017-07-27 | A kind of computer security card being made up of control circuit and memory bank |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710625051.7A CN107392058A (en) | 2017-07-27 | 2017-07-27 | A kind of computer security card being made up of control circuit and memory bank |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107392058A true CN107392058A (en) | 2017-11-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710625051.7A Pending CN107392058A (en) | 2017-07-27 | 2017-07-27 | A kind of computer security card being made up of control circuit and memory bank |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040117642A1 (en) * | 2002-12-17 | 2004-06-17 | Mowery Keith R. | Secure media card operation over an unsecured PCI bus |
| CN101014923A (en) * | 2004-09-10 | 2007-08-08 | 国际商业机器公司 | An integrated circuit chip for encryption and decryption having a secure mechanism for programming on-chip hardware |
| CN201622570U (en) * | 2009-12-26 | 2010-11-03 | 山东渔翁信息技术股份有限公司 | Computer security card based on memory |
| CN106485149A (en) * | 2015-08-31 | 2017-03-08 | 哈尔滨光凯科技开发有限公司 | A kind of security component of credible and secure simulation computer |
-
2017
- 2017-07-27 CN CN201710625051.7A patent/CN107392058A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040117642A1 (en) * | 2002-12-17 | 2004-06-17 | Mowery Keith R. | Secure media card operation over an unsecured PCI bus |
| CN101014923A (en) * | 2004-09-10 | 2007-08-08 | 国际商业机器公司 | An integrated circuit chip for encryption and decryption having a secure mechanism for programming on-chip hardware |
| CN201622570U (en) * | 2009-12-26 | 2010-11-03 | 山东渔翁信息技术股份有限公司 | Computer security card based on memory |
| CN106485149A (en) * | 2015-08-31 | 2017-03-08 | 哈尔滨光凯科技开发有限公司 | A kind of security component of credible and secure simulation computer |
Non-Patent Citations (1)
| Title |
|---|
| 谭玉波: ""基于PCI的安全卡的硬件设计与实现"", 《中国优秀博硕士学位论文全文数据库（硕士）信息科技辑》 * |
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Application publication date: 20171124 |
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| RJ01 | Rejection of invention patent application after publication |