CN107390893A - The system and method for KVM switcher flicker free switching is realized based on FPGA - Google Patents
The system and method for KVM switcher flicker free switching is realized based on FPGA Download PDFInfo
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- CN107390893A CN107390893A CN201710581735.1A CN201710581735A CN107390893A CN 107390893 A CN107390893 A CN 107390893A CN 201710581735 A CN201710581735 A CN 201710581735A CN 107390893 A CN107390893 A CN 107390893A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
- G06F3/023—Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
- G06F3/038—Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
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Abstract
The invention discloses a kind of system and method that the switching of KVM switcher flicker free is realized based on FPGA, it is related to electronic equipment manufacturing field, the system includes switching command sending module, and it is used to send switching command；Switching control module, it is used to receive switching command and issues image storage information；Memory module, it is used to receive image storage information, stores the picture signal currently shown, and write to be switched image signal data；Judge output module, it is used to judge whether to be switched view data is stablized, if stable, export to be switched picture signal, otherwise, still exports current image signal.This method comprises the following steps：Switching command is sent, to be switched image data information is stored, judges whether to be switched data message is stablized, and in the to be switched data message of steady time display.The present invention can avoid sending the phenomenon of flicker and blank screen during switching, avoid loss of data.
Description
Technical field
The present invention relates to electronic equipment manufacturing field, and in particular to one kind realizes that KVM switcher flicker free is cut based on FPGA
The system and method changed.
Background technology
KVM switcher (Keyboard Video Mouse, computer switch) be by keyboard, mouse and display come
Realization is generally used in the place of multiple computers or server, passed through to two or the control of multiple stage computers, KVM switcher
One display and keyboard and mouse can be achieved with and the interaction of all computers and server.
In actual use, KVM switcher can avoid using a large amount of displays and key mouse, can not only save equipment into
This, additionally it is possible to save substantial amounts of operating space, frame and ground space, user can re-use on Rebuild Memory desktop or
The equipment of more multicomputer in frame；Meanwhile KVM switcher can avoid using by controlling central management multiple stage computers
Person tosses about between different operating station or needs multiple users, can reduce the labor intensity of keeper, and can reduce people
Power cost.
But most of KVM switchers are all based on ASIC (Application Specific Integrated at present
Circuit, integrated circuit) application-specific integrated circuit realizes the switching of multiple stage computers or server, still, because application-specific integrated circuit does not have internal memory,
Picture signal can not be preserved, necessarily causes occur the problem of jitter or transient loss signal in handoff procedure, causes
Switch easily flashes in handoff procedure, the wild effect such as blank screen, although this problem simply occurs switching
Cheng Zhong, but when switch is used for the higher occasion of the real-time and stability requirement to picture such as Surveillance center, data center,
Flicker and blank screen phenomenon all may result in the loss of data, cause more serious consequence.
The content of the invention
For defect present in prior art, realize that KVM switches based on FPGA it is an object of the invention to provide a kind of
The system and method for device flicker free switching, it can avoid sending the phenomenon of flicker and blank screen during switching, avoid loss of data.
To achieve the above objectives, the present invention adopts the technical scheme that：
A kind of system that the switching of KVM switcher flicker free is realized based on FPGA, including：
Switching command sending module, it is used to send switching command；
Switching control module, it is used to receive switching command and issues image storage information；
Memory module, it is used to receive image storage information, stores the picture signal currently shown, and write to be switched
Image signal data；
Judge output module, it is used to judge whether to be switched view data is stablized, if stable, exports to be switched figure
As signal, otherwise, current image signal is still exported.
On the basis of above-mentioned technical proposal, the system also includes display module, and it is used for display image signals.
On the basis of above-mentioned technical proposal, the system encoding module, its image letter being used to read in memory modules
Number, and image signal data is encoded into can be shown the information that module is read after send to display module.
On the basis of above-mentioned technical proposal, the system also includes decoder module, and it is used for outside to be switched figure
The data of memory module can be stored in as signal is converted to.
On the basis of above-mentioned technical proposal, the memory module includes some DDR internal memories, is divided into per a piece of DDR internal memories
Some pieces of Bank, every piece of Bank can preserve a complete field picture.
It is described to be divided into 8 pieces of BankBank0 to Bank7 per a piece of DDR internal memories on the basis of above-mentioned technical proposal.
A kind of method that the switching of KVM switcher flicker free is realized based on FPGA, is comprised the following steps：
Switching command is sent, to be switched image data information is stored, judges whether to be switched data message is stablized, and
In the data message that steady time display is to be switched.
It is described when judging to be switched data message for unstable state on the basis of above-mentioned technical proposal, continue to show
Show present image.
On the basis of above-mentioned technical proposal, during specific read-write, DDR internal memories are read according to a Bank
Write, that is, the view data order write is exactly the refreshing to be moved in circles always from Bank0 to Bankn, has been preserved in each Bank
A whole field picture, n field pictures can be saved simultaneously in every DDR internal memory, FPGA also exists simultaneously while data are write
The data message finished writing is read from DDR internal memories, the position of reading is in the previous Bank of presently written data.
Compared with prior art, the advantage of the invention is that：
(1) a kind of system that the switching of KVM switcher flicker free is realized based on FPGA of the invention, by setting memory module
With judge output module, wherein, memory module can receive image information, storage image signal, and write to be switched image
Signal data；Judge that output module can interpolate that whether to be switched view data is stablized, and it is to be switched in steady timing output
Picture signal, otherwise, still export current image signal.Switching in this way so that read and write during switching
Two-way input signal all cached by memory module so that the signal of input is all steady and continuous, is so being switched
In ensure that output picture steady and continuous, avoid switching when send flicker and blank screen phenomenon, avoid loss of data.
(2) a kind of system that the switching of KVM switcher flicker free is realized based on FPGA of the invention, wherein memory module are included
Some DDR, wherein DDR internal memories are written and read according to a Bank, that is, the view data order write is exactly always from Bank0
The refreshing to be moved in circles to Bankn, a complete field picture is preserved in each Bank, can be preserved simultaneously in every DDR internal memory
N field pictures, FPGA is also reading the data message finished writing from DDR internal memories simultaneously write data while, reading
Position is in the previous Bank of presently written data, so as to which the data for ensureing to write and reading all are steady and continuous.
Brief description of the drawings
Fig. 1 is the structural representation for the system for realizing the switching of KVM switcher flicker free in the embodiment of the present invention based on FPGA；
Fig. 2 is the flow chart for the method for realizing the switching of KVM switcher flicker free in the embodiment of the present invention based on FPGA；
Fig. 3 is the schematic diagram that two panels DDR internal memories are read and write in the embodiment of the present invention；
Fig. 4 is the structured flowchart of the embodiment of the present invention 1.
Embodiment
The present invention is described in further detail below in conjunction with drawings and Examples.
Shown in Figure 1, offer of the embodiment of the present invention is a kind of to be based on what FPGA realized the switching of KVM switcher flicker free
System, including：
Switching command sending module, it is used to send switching command.
Switching control module, it is used to receive switching command and issues image storage information.
Memory module, it is used to receive image storage information, stores the picture signal currently shown, and write to be switched
Image signal data.
Judge output module, it is used to judge whether to be switched view data is stablized, if stable, exports to be switched figure
As signal, otherwise, current image signal is still exported.
In the embodiment of the present invention, according to the needs of practical application, in addition to：
Display module, it is used for display image signals.
Decoder module, it is used to outside to be switched picture signal be converted to the data that can be stored in memory module (such as
RGB data).
Coding module, it is used to read the image signal data in memory modules, and image signal data is encoded into energy
Sent after the information that enough shown module is read to display module.
The present invention also provides a kind of method that the switching of KVM switcher flicker free is realized based on FPGA, comprises the following steps：
Switching command is sent, to be switched image data information is stored, judges whether to be switched data message is stablized, and
In the data message that steady time display is to be switched.
Shown in Figure 2, the present invention realizes that the method for KVM switcher flicker free switching specifically includes following step based on FPGA
Suddenly：
S1, send switching command.
S2, read to be switched image data information and to be switched image data information is decoded.
S3, the decoded image data information of storage.
S4, judge whether the image data information after storage is stablized, if so, being transferred to step S5, otherwise, be transferred to step S6.
The to be switched image of S5, display.
S6, continue to show present image.
In the present embodiment, switching control module and the FPGA (Field-Programmable that output module passes through are judged
GateArray, field programmable gate array) to realize, memory module passes through some DDR (Double Data Rate, Double Data Rate
Synchronous DRAM) realize, because the read-write of view data in a piece of DDR internal memories is carried out simultaneously, thus protect
The real-time of image, continuity are demonstrate,proved.
Memory module in the present invention includes some DDR internal memories, is divided into some pieces of Bank per a piece of DDR internal memories, every piece
Bank can preserve a complete field picture, and during specific read-write, DDR internal memories are read according to a Bank
Write, that is, the view data order write is exactly the refreshing to be moved in circles always from Bank0 to Bankn, has been preserved in each Bank
A whole field picture, n field pictures can be saved simultaneously in every DDR internal memory, FPGA also exists simultaneously while data are write
The data message finished writing is read from DDR internal memories, the position of reading is in the previous Bank of presently written data.
Shown in Figure 3, every a piece of DDR internal memories in the present embodiment are divided into 8 pieces：Bank0 to Bank7, specifically reading
During writing, it is written and read according to a Bank, that is, the view data order write is exactly to be followed always from Bank0 to Bank7
The reciprocal refreshing of ring, a complete field picture is preserved in each Bank, 8 field pictures can be saved simultaneously in every DDR internal memory,
FPGA is also reading the data message finished writing from DDR internal memories simultaneously while data are write, and the position of reading is current
Write in the previous Bank of data, such as：When being currently written into Bank5 data in DDR internal memories, FPGA reads Bank4 number
According to the data that can ensure to write and read all are steady and continuous.
In a practical situation, the Bank quantity that DDR internal memory is separated includes but is not limited to this according to setting is actually needed
8 pieces in application, its operation principle is consistent with the application's.
It is shown in Figure 3, after FPGA receives switching command, allow reading Bank operations to be fixed on the Bank being currently read
In, ceaselessly the field picture in read-only current Bank, ensure that the stability of image image in handoff procedure.
Meanwhile FPGA performs circulation write operation to another DDR internal memory：After order delay time arrives, now current
Having been write in DDR internal memories has expired the view data that needs switch, and now, FPGA reads current DDR internal memories, and before write operation
One Bank starts the cycle over read operation, travels through all Bank.
Such as：When write operation is just writing Bank2 on first DDR internal memory, switching command is received, then read operation will
It is fixed on the Bank1 of first DDR internal memory and ceaselessly reads immediately, now display is shown in this Bank fixed steady
Determine picture；Simultaneously write operation will jump to second DDR internal memory be on started the cycle over from Bank0 and back and forth write new picture number
According to after waiting specific delay time, read operation will be jumped in second DDR from the Bank1 of first original DDR internal memory
Reciprocal read operation is started the cycle on the previous Bank of write operation deposited, then by the display of the data output of reading, display
Show the stable picture after having switched.
The present invention is ensuring that the two-way input signal read and write during switching is all cached by internal memory so that
The signal of input is all steady and continuous, so ensures that the steady and continuous of output picture in the handover.
Below, by a specific embodiment, the present invention is described in detail.
Shown in Figure 4, the present embodiment sends switching command by host computer or button, and its host computer passes through logical
Communication interface is connected with FPGA, and FPGA includes switch controller, and when receiving switching command by switch controller by outside
To be switched image information transmission is simultaneously stored into memory modules, if wherein external image information is divided into main line and (n is shown in figure
Road), reached per being passed through after being decoded all the way by corresponding decoder by FPGA in memory modules.
FPGA reads the data in memory modules in real time, and judges whether to be switched image information completely writes, if not having
Have a complete write-in, memory modules send the image information currently shown to display device by coding module, display device after
Continuous display present image (image not switched)；If complete write-in, coding module is sent a command to, coding module reads internal memory mould
To be switched image information in block, and to be switched image information is subjected to coding transmission to display device, display device and shown
To be switched image, complete the switching of image.
The present invention is not limited to the above-described embodiments, for those skilled in the art, is not departing from
On the premise of the principle of the invention, some improvements and modifications can also be made, these improvements and modifications are also considered as the protection of the present invention
Within the scope of.The content not being described in detail in this specification belongs to prior art known to professional and technical personnel in the field.
Claims (9)
- A kind of 1. system that the switching of KVM switcher flicker free is realized based on FPGA, it is characterised in that including：Switching command sending module, it is used to send switching command；Switching control module, it is used to receive switching command and issues image storage information；Memory module, it is used to receive image storage information, stores the picture signal currently shown, and write to be switched image Signal data；Judge output module, it is used to judge whether to be switched view data is stablized, if stable, exports to be switched image letter Number, otherwise, still export current image signal.
- A kind of 2. system that the switching of KVM switcher flicker free is realized based on FPGA as claimed in claim 1, it is characterised in that： The system also includes display module, and it is used for display image signals.
- A kind of 3. system that the switching of KVM switcher flicker free is realized based on FPGA as claimed in claim 2, it is characterised in that： The system encoding module, it is used to read the image signal data in memory modules, and image signal data is encoded into energy Sent after the information that enough shown module is read to display module.
- 4. a kind of system that the switching of KVM switcher flicker free is realized based on FPGA as claimed any one in claims 1 to 3, It is characterized in that：The system also includes decoder module, and it is used to outside to be switched picture signal is converted to and can be stored in The data of memory module.
- 5. a kind of system that the switching of KVM switcher flicker free is realized based on FPGA as claimed any one in claims 1 to 3, It is characterized in that：The memory module includes some DDR internal memories, is divided into some pieces of Bank per a piece of DDR internal memories, every piece of Bank is equal A complete field picture can be preserved.
- A kind of 6. system that the switching of KVM switcher flicker free is realized based on FPGA as claimed in claim 5, it is characterised in that： It is described to be divided into 8 pieces of BankBank0 to Bank7 per a piece of DDR internal memories.
- A kind of 7. method that the switching of KVM switcher flicker free is realized based on FPGA, it is characterised in that comprise the following steps：Switching command is sent, to be switched image data information is stored, judges whether to be switched data message is stablized, and steady The to be switched data message of time display.
- A kind of 8. method that the switching of KVM switcher flicker free is realized based on FPGA as claimed in claim 7, it is characterised in that： It is described when judging to be switched data message for unstable state, continue to show present image.
- A kind of 9. method that the switching of KVM switcher flicker free is realized based on FPGA as claimed in claim 7, it is characterised in that： During specific read-write, DDR internal memories are written and read according to a Bank, that is, the view data order write is exactly always The refreshing to be moved in circles from Bank0 to Bankn, a complete field picture is preserved in each Bank, can be same in every DDR internal memory When save n field pictures, FPGA is also reading the data message finished writing from DDR internal memories simultaneously while data are write, The position of reading is in the previous Bank of presently written data.
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| CN201710581735.1A CN107390893A (en) | 2017-07-17 | 2017-07-17 | The system and method for KVM switcher flicker free switching is realized based on FPGA |
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| CN201710581735.1A CN107390893A (en) | 2017-07-17 | 2017-07-17 | The system and method for KVM switcher flicker free switching is realized based on FPGA |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112104819A (en) * | 2020-09-04 | 2020-12-18 | 大连捷成科技有限公司 | Multi-channel video synchronous switching system and method based on FPGA |
| WO2023004995A1 (en) * | 2021-07-29 | 2023-02-02 | 广州市保伦电子有限公司 | Seamless video switching method and system in video matrix |
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| US7350091B2 (en) * | 2004-05-13 | 2008-03-25 | Aten International Co., Ltd. | Control apparatus for controlling a plurality of computers |
| CN104615401A (en) * | 2015-02-25 | 2015-05-13 | 浪潮集团有限公司 | FPGA (field programmable gate array) based KVM (kernel-based virtual machine) implementing method |
| CN205302260U (en) * | 2016-01-19 | 2016-06-08 | 山东超越数控电子有限公司 | But KVM switch of dynamic restructuring |
-
2017
- 2017-07-17 CN CN201710581735.1A patent/CN107390893A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7350091B2 (en) * | 2004-05-13 | 2008-03-25 | Aten International Co., Ltd. | Control apparatus for controlling a plurality of computers |
| CN104615401A (en) * | 2015-02-25 | 2015-05-13 | 浪潮集团有限公司 | FPGA (field programmable gate array) based KVM (kernel-based virtual machine) implementing method |
| CN205302260U (en) * | 2016-01-19 | 2016-06-08 | 山东超越数控电子有限公司 | But KVM switch of dynamic restructuring |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112104819A (en) * | 2020-09-04 | 2020-12-18 | 大连捷成科技有限公司 | Multi-channel video synchronous switching system and method based on FPGA |
| WO2023004995A1 (en) * | 2021-07-29 | 2023-02-02 | 广州市保伦电子有限公司 | Seamless video switching method and system in video matrix |
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