CN107390111A - A kind of ICNewProject automated testing methods - Google Patents
A kind of ICNewProject automated testing methods Download PDFInfo
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- CN107390111A CN107390111A CN201710481168.2A CN201710481168A CN107390111A CN 107390111 A CN107390111 A CN 107390111A CN 201710481168 A CN201710481168 A CN 201710481168A CN 107390111 A CN107390111 A CN 107390111A
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- automated testing
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The invention discloses a kind of ICNewProject automated testing methods, this method obtains supported engineering type, the chip type supported by ICNewProject automatically, and automatic new construction and engineering is compiled, finally obtain compiling result and to result statistics and analysis.This method according to different chip types and can need the engineering type supported, automatic new construction, and compile and check result automatically by the record to all chip models and engineering type.
Description
Technical field
The invention belongs to the technical field of test, the automatic test side more particularly to realized by ICNewProject
Method.
Background technology
ICNewProject refers to the different types of engineering of newly-built all IC models, and is confirmed whether to successfully create engineering,
And confirm the correctness of project content and the correctness of compiling result.On stream, chip model species is various, and
The header file definition of every kind of model and initial code also differ, along with the IDE engineering types supported also have a variety of (branch at present
Hold c and asm), if performing compiling again by manually new construction, efficiency is too low.And the content of chip is also often repaiied
Change, chip model can also be changed therewith, in conventional test, be compiled again by artificial new construction, very time-consuming；No
Beneficial to the test and exploitation of chip, the development efficiency of serious image chip.
Therefore, people can take certain methods, to improve compilation speed, increase testing efficiency.Such as patent application
201610820732.4 disclose one kind realizes automated testing method by CodeOption, this method is by obtaining all
The chip model held and related CodeOption；And contrasted CodeOption and right value, by the ID in resultant content
Effective set content is replaced with to realize.Obtain the chip model of all supports automatically by the present invention, and set automatically every
The combination of kind all settings of chip model, finally obtain Codeoption and to result statistics and analysis so that chip can lead to
Cross CodeOption and carry out rapidly automatic test.However, although this application can obtain chip model automatically, for
Required engineering problem can not but solve during chip testing.
The content of the invention
Based on this, therefore the present invention primary mesh be to provide a kind of ICNewProject automated testing methods, the party
The engineering type that method can be supported according to different chip types and needs, automatic new construction, and knot is compiled and checked automatically
Fruit.For newly-increased chip series, the automatic test of the different engineering types of the series can also be realized by the system.
It is to provide a kind of ICNewProject automated testing methods, this method can carry another mesh of the present invention
High testing efficiency, reduce the input of personnel and reduce the situation of test leakage.
To achieve the above object, the technical scheme is that：
A kind of ICNewProject automated testing methods, it is characterised in that this method is obtained automatically by ICNewProject
Take supported engineering type, the chip type supported, and automatic new construction and compile engineering, finally obtain compiling result simultaneously
To result statistics and analysis.
Specifically, it is as follows to include step for this method：
Step 1：Supported engineering type is obtained, obtains supported chip type；
Specifically, the engineering type and chip model in IDE software interfaces windows are first obtained.
Step 2：Select a chip model and a kind of engineering type, new construction；
Step 3：Engineering is compiled, output compiling result；
Step 4：Obtain compiling result；
Step 5：Analysis and statistics compiling result；
Step 6：Generation report.
The ICNewProject automated testing methods that the present invention is realized, by all chip models and engineering type
Record, according to different chip types and the engineering type that support can be needed, automatic new construction, and automatically compiling and
Check result.For newly-increased chip series, the automation of the different engineering types of the series can also be realized by the system
Test.
Meanwhile this method can improve testing efficiency, reduce the input of personnel and reduce the situation of test leakage.
Brief description of the drawings
Fig. 1 is that the present invention implements to obtain engineering type and the flow chart of chip model.
Fig. 2 is that the present invention implements to create the flow chart of engineering.
Fig. 3 is the flow chart that the present invention implements to be compiled engineering.
Embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
The ICNewProject automated testing methods that the present invention is realized, are obtained and are propped up automatically by ICNewProject
The engineering type held, the chip type supported, and automatic new construction and engineering is compiled, finally obtain compiling result and to result
Statistics and analysis.
Specifically, it is as follows to include step for this method：
Step 1：Obtain supported engineering type.
It is shown in Figure 1, the compiler test to various engineering type and chip is realized, first has to obtain supported work
Journey type, that is to say, that obtain the engineering type and chip model in IDE software interfaces windows.Its step is as follows：
101st, after starting developing instrument, IDE is opened, into engineering type selection interface；
102nd, all engineering types are obtained；
103rd, into chip model selection interface；
104th, all chip models are obtained.
Step 2：Select a chip model and a kind of engineering type, new construction.
Then, chip model and engineering type are selected, creates engineering.Comprise the following steps that：
201st, engineering type is selected；
202nd, chip model is selected；
203rd, chip engineering is created, until completing the chip engineering of all chip models；
204th, judge whether to complete all chip models；It is then to continue in next step, otherwise to return to 202 steps；
205th, judge whether to complete all engineering types；It is then to continue in next step, otherwise to return to 201 steps；
206th, all chip types and all engineering types are completed.
Step 3：Engineering is compiled, output and statistics compiling result.
Each engineering is compiled respectively, obtains output result, statistical result.Idiographic flow is as shown in Figure 3：
301st, an engineering is selected；
302nd, engineering is compiled；
303rd, compiling result is obtained；
304th, judge whether to compile successfully；If it is, success is recorded as, if it is not, then being recorded as failure；
305th, all comparative results are counted, export test report.
Step 4：Obtain compiling result；
Step 5：Analysis and statistics compiling result；
Step 6：Final step statistical result, generation are reported and exported.
The ICNewProject automated testing methods that the present invention is realized, by all chip models and engineering type
Record, according to different chip types and the engineering type that support can be needed, automatic new construction, and automatically compiling and
Check result.For newly-increased chip series, the automation of the different engineering types of the series can also be realized by the system
Test.
Meanwhile this method can improve testing efficiency, reduce the input of personnel and reduce the situation of test leakage.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
All any modification, equivalent and improvement made within refreshing and principle etc., should be included in the scope of the protection.
Claims (5)
1. a kind of ICNewProject automated testing methods, it is characterised in that this method is obtained automatically by ICNewProject
The engineering type supported, the chip type supported, and automatic new construction and compile engineering, finally obtain compiling result and right
As a result statistics and analysis.
2. ICNewProject automated testing methods as claimed in claim 1, it is characterised in that this method includes step such as
Under：
Step 1：Supported engineering type is obtained, obtains supported chip type；
Step 2：Select a chip model and a kind of engineering type, new construction；
Step 3：Engineering is compiled, output compiling result；
Step 4：Obtain compiling result；
Step 5：Analysis and statistics compiling result；
Step 6：Generation report.
3. ICNewProject automated testing methods as claimed in claim 2, it is characterised in that specific real in step 1
Now step is：
101st, after starting developing instrument, IDE is opened, into engineering type selection interface；
102nd, all engineering types are obtained；
103rd, into chip model selection interface；
104th, all chip models are obtained.
4. ICNewProject automated testing methods as claimed in claim 2, it is characterised in that specific real in step 2
Now step is：
201st, engineering type is selected；
202nd, chip model is selected；
203rd, chip engineering is created, until completing the chip engineering of all chip models；
204th, judge whether to complete all chip models；It is then to continue in next step, otherwise to return to 202 steps；
205th, judge whether to complete all engineering types；It is then to continue in next step, otherwise to return to 201 steps；
206th, all chip types and all engineering types are completed.
5. ICNewProject automated testing methods as claimed in claim 2, it is characterised in that specific real in step 3
Now step is：
301st, an engineering is selected；
302nd, engineering is compiled；
303rd, compiling result is obtained；
304th, judge whether to compile successfully；If it is, success is recorded as, if it is not, then being recorded as failure；
305th, all comparative results are counted, export test report.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710481168.2A CN107390111A (en) | 2017-06-22 | 2017-06-22 | A kind of ICNewProject automated testing methods |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710481168.2A CN107390111A (en) | 2017-06-22 | 2017-06-22 | A kind of ICNewProject automated testing methods |
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| Publication Number | Publication Date |
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| CN107390111A true CN107390111A (en) | 2017-11-24 |
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| CN201710481168.2A Pending CN107390111A (en) | 2017-06-22 | 2017-06-22 | A kind of ICNewProject automated testing methods |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1755647A (en) * | 2004-09-29 | 2006-04-05 | 微软公司 | Test automation stack layering |
| CN101859244A (en) * | 2009-04-10 | 2010-10-13 | 中兴通讯股份有限公司 | Multi-toolchain engineering construction method and system |
| CN106354966A (en) * | 2016-09-06 | 2017-01-25 | 芯海科技（深圳）股份有限公司 | Method for converting chip IDE project files and rapidly configuring simulation debugging environment |
| CN106546900A (en) * | 2016-09-13 | 2017-03-29 | 芯海科技（深圳）股份有限公司 | One kind realizes automated testing method by CodeOption |
-
2017
- 2017-06-22 CN CN201710481168.2A patent/CN107390111A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1755647A (en) * | 2004-09-29 | 2006-04-05 | 微软公司 | Test automation stack layering |
| CN101859244A (en) * | 2009-04-10 | 2010-10-13 | 中兴通讯股份有限公司 | Multi-toolchain engineering construction method and system |
| CN106354966A (en) * | 2016-09-06 | 2017-01-25 | 芯海科技（深圳）股份有限公司 | Method for converting chip IDE project files and rapidly configuring simulation debugging environment |
| CN106546900A (en) * | 2016-09-13 | 2017-03-29 | 芯海科技（深圳）股份有限公司 | One kind realizes automated testing method by CodeOption |
Non-Patent Citations (1)
| Title |
|---|
| 软件自动测试方法的研究与实现: "翟立东 等", 《大连铁道学院学报》 * |
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Application publication date: 20171124 |
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