CN107329859A

CN107329859A - A kind of data guard method and storage device

Info

Publication number: CN107329859A
Application number: CN201710512405.7A
Authority: CN
Inventors: 上官应兰
Original assignee: Hangzhou Sequoia Polytron Technologies Inc
Current assignee: Hangzhou Sequoia Polytron Technologies Inc
Priority date: 2017-06-29
Filing date: 2017-06-29
Publication date: 2017-11-07
Anticipated expiration: 2037-06-29
Also published as: CN107329859B

Abstract

The application provides a kind of data guard method and storage device; being preconfigured in the dual-active storage system that this method is applied under order WriteMode is Thin LUN from LUN memory cell; main LUN memory cell processing write IO request in dual-active storage system, and data syn-chronization is not performed；It may include：After main LUN memory cell or storage device failure where it, based on the logical address in the write IO request received after failure, the target logic subspace on this LUN is determined；Target logic subspace is converted into interim major state, and automatic dilatation mechanism is opened for it, the data of write IO request the target logic subspace is write into, and do not perform data syn-chronization；After fault recovery; triggering target logic subspace and the data syn-chronization for being converted to the interim logical subspaces in main LUN memory cell corresponding with target logic subspace from state; after synchronously completing; discharge the physical space of target logic subspace occupancy; and recovery operation is performed, so as to realize data protection.

Description

A kind of data guard method and storage device

Technical field

The application is related to computer communication field, more particularly to a kind of dual-active memory technology.

Background technology

Dual-active memory technology is a kind of Data Protection Technologies, and main LUN storages can be generally included in dual-active storage system Unit and from LUN memory cell.Main LUN memory cell and application server can be distributed to from LUN memory cell, be taken for application It is engaged in for device, main LUN memory cell and is identified as same LUN memory cell from LUN memory cell.

After the write IO request that application server is issued is received, the main LUN memory cell in the dual-active storage system can The write IO request is handled, and the data that the write IO request is carried write main LUN memory cell, while the data of the write-in are same Step is extremely from LUN memory cell.

When main LUN memory cell breaks down or storage device where it breaks down, how to proceed IO Request is handled, and the data protection such as recovery data is asked after main LUN memory cell or storage device where it are recovered normally Topic just turns into urgent problem to be solved.

The content of the invention

In view of this, the application provides a kind of data guard method and storage device, to by putting into relatively low hardware Cost realizes the protection of data.

Specifically, the application is achieved by the following technical solution：

According to the first aspect of the application there is provided a kind of data guard method, methods described is applied to dual-active storage system In from LUN LUN memory cell, the dual-active storage system also include main LUN memory cell；The dual-active storage System handles the write IO request, and the master after write IO request is received by the main LUN memory cell in the dual-active storage system LUN memory cell is not by the data syn-chronization in the write IO request to described from LUN memory cell；It is described from LUN memory cell quilts Prewired to be set to thin LUN Thin-LUN memory cell, methods described includes：

After storage device failure where the main LUN memory cell or the main LUN memory cell, after failure The logical address carried in the write IO request received, determines the target logic subspace in this LUN memory cell；Wherein, institute The initial logical address for stating the corresponding destination logical address section in target logic subspace is more than or equal to carrying in the write IO request Logical address；

It is interim major state by the State Transferring of the target logic subspace, is that the target logic subspace is opened certainly Dynamic dilatation mechanism, and the data that the write IO request is carried write the target logic subspace, and data syn-chronization is not performed；

After fault recovery, trigger the target logic subspace and be converted to interim from state and the target logic The data syn-chronization of the corresponding logical subspaces being located in the main LUN memory cell of address field, and after synchronously completing, release Physical space shared by the target logic subspace, and recover this LUN memory cell and the main LUN memory cell.

According to the second aspect of the application there is provided storage device, the storage device includes processor and storage medium, institute State processor and call the machine-executable instruction corresponding with data protection logic stored on the storage medium, the processor The method for being prompted to perform above-mentioned data protection.

The application proposes a kind of data guard method, and this method can be applied to dual-active storage system.

When receiving the write IO request that application server is issued, at the main LUN memory cell in the dual-active storage system The write IO request is managed, not by the data syn-chronization carried in the write IO request extremely from LUN memory cell.

Thin-LUN memory cell is configured as from LUN memory cell in the dual-active storage system, is deposited in the main LUN After storage device failure where storage unit or the main LUN memory cell, received after being based on failure from LUN memory cell Write IO request in the logical address that carries, determine the target logic subspace in this LUN memory cell, and by the target logic The State Transferring of subspace is interim major state, is that automatic dilatation mechanism is opened in the target logic subspace, and write described The data that I/O Request is carried write the target logic subspace, and do not perform data syn-chronization.After fault recovery, from LUN storages Target logic subspace described in unit triggers and being converted to interim is located at from state is corresponding with destination logical address section The data syn-chronization of logical subspaces in the main LUN memory cell, and after synchronously completing, discharge the target logic subspace Shared physical space, and recover this LUN memory cell and the main LUN memory cell.

On the one hand, due in main LUN memory cell or normal storage device where it, only being protected in dual-active storage system Deposit the data that a write IO request is carried, and after main LUN memory cell or storage device failure where it are recovered same step number During, dual-active storage system just preserves the data that two parts of write IO requests are carried, and both may be used using this data protection schemes When being responded with preserving two numbers when reducing normal as far as possible according to caused hardware cost and hardware maintenance complexity and extra IO Between, it also may be implemented in main LUN memory cell or where it during storage device failure, write being normally written for IO, and fault recovery The data recovery of main LUN memory cell afterwards.

On the other hand, main LUN memory cell and the logical space from LUN memory cell are divided into several logics son sky Between, each logical subspaces are to that should have dual-active state.This logic-based subspace manages LUN dual-active status mechanisms, can be with So that after main LUN memory cell or storage device failure where it, for write IO request, continuing to write to from LUN and storing single The target logic subspace of interim major state in member so that write IO request is successfully processed；Meanwhile, for read I O request, as long as The logical subspaces of major state can be accessed in main LUN memory cell, then can reading data in real-time, so as to solve from LUN Data can not be read by not writing the space of data in memory cell, it is necessary to wait main LUN memory cell or storage where it to set The problem of data could being read after the completion of standby recovery and data syn-chronization.

The third aspect, Thin-LUN memory cell is configured as from LUN memory cell, should be from the mesh in LUN memory cell Logical subspaces are marked after interim major state is changed into, automatic dilatation mechanism can be opened, using this on-demand application memory space Mode expands memory capacity, and in fault recovery, the target logic subspace of the interim major state performs after data syn-chronization, can released Put the memory space shared by the target logic subspace.It can both be reduced as far as possible from LUN memory cell pair using this mechanism The requirement of memory space, reduces the waste of memory space, improves the utilization rate of memory space, can also be quickly found out number to be synchronized According to the efficiency of raising data syn-chronization.

Brief description of the drawings

Fig. 1 is a kind of schematic diagram of dual-active storage system shown in the exemplary embodiment of the application one；

Fig. 2 is a kind of flow chart of data guard method shown in the exemplary embodiment of the application one；

Fig. 3 is a kind of schematic diagram of data protection shown in the exemplary embodiment of the application one；

Fig. 4 is a kind of hardware configuration of data protecting device place storage device shown in the exemplary embodiment of the application one Figure；

Fig. 5 is a kind of block diagram of data protecting device shown in the exemplary embodiment of the application one.

Embodiment

Here exemplary embodiment will be illustrated in detail, its example is illustrated in the accompanying drawings.Following description is related to During accompanying drawing, unless otherwise indicated, the same numbers in different accompanying drawings represent same or analogous key element.Following exemplary embodiment Described in embodiment do not represent all embodiments consistent with the application.On the contrary, they be only with it is such as appended The example of the consistent apparatus and method of some aspects be described in detail in claims, the application.

It is the purpose only merely for description specific embodiment in term used in this application, and is not intended to be limiting the application. " one kind ", " described " and "the" of singulative used in the application and appended claims are also intended to including majority Form, unless context clearly shows that other implications.It is also understood that term "and/or" used herein refers to and wrapped It may be combined containing one or more associated any or all of project listed.

It will be appreciated that though various information, but this may be described using term first, second, third, etc. in the application A little information should not necessarily be limited by these terms.These terms are only used for same type of information being distinguished from each other out.For example, not departing from In the case of the application scope, the first information can also be referred to as the second information, similarly, and the second information can also be referred to as One information.Depending on linguistic context, word as used in this " if " can be construed to " ... when " or " when ... When " or " in response to determining ".

Referring to Fig. 1, Fig. 1 is a kind of schematic diagram of dual-active storage system shown in the exemplary embodiment of the application one.

Main LUN memory cell can generally be included in the dual-active storage system and from LUN memory cell.Main LUN storages Unit and it can be arranged respectively in different storage devices from LUN memory cell.Main LUN memory cell and from LUN memory cell Application server can be distributed to, for application server, main LUN memory cell and is identified as together from LUN memory cell One LUN memory cell.

, can be after from LUN memory cell when main LUN memory cell breaks down or storage device where it breaks down It is continuous to carry out I/O Request processing, after main LUN memory cell recovers normal or storage device recovery is normal where it, it can use The data stored from LUN memory cell recover the data of main LUN memory cell.

However, needing identical data preserving two parts in dual-active storage system, considerably increase to memory space Loss of increase in demand hard disk quantity and disk chassis etc..While hardware cost is increased, the hardware dimension also greatly increased The complexity of shield.

In view of this, the application proposes a kind of data guard method, and this method can be applied to dual-active storage system.

It is a kind of flow chart of data guard method shown in the exemplary embodiment of the application one referring to Fig. 2.This method can Applied to, from LUN memory cell, the dual-active storage system is also deposited including main LUN in the dual-active storage system under order WriteMode Storage unit；The dual-active storage system, should by the main LUN memory cell processing in the dual-active storage system after write IO request is received Write IO request, and the main LUN memory cell extremely should not be from LUN memory cell by the data syn-chronization in the write IO request；Should be from LUN Memory cell is preconfigured as Thin-LUN memory cell.This method may include step 201 to step 203.

Step 201：After storage device failure where the main LUN memory cell or the main LUN memory cell, base The logical address carried in the write IO request received after failure, determines the target logic subspace in this LUN memory cell； Wherein, the initial logical address of the corresponding destination logical address section in the target logic subspace is more than or equal to the write IO request The logical address of middle carrying.

The application is intended to that several logical subspaces will be divided into from the logical space of LUN memory cell.Main LUN is stored The memory space of unit can also be divided into logical subspaces on several logical subspaces, and main LUN with from LUN logics Space is corresponded.Each logical subspaces are to that should have dual-active state, by the management of the dual-active state to logical subspaces, come Manage dual-active storage system.

It should be noted that the data guard method that the application is proposed is applied to order WriteMode.So-called order WriteMode, It can refer to that the initial logical address that latter write IO request is carried is more than the initial logical address that previous write IO request is carried, LUN memory cell is the order of logically address field, and data are write successively.

In the embodiment of the present application, dual-active state may include major state, from state, interim major state and temporarily from state.

Wherein, above-mentioned major state, generally can be a kind of state of the dual-active storage system under normal condition, and from state Correspondence.In dual-active storage system normal work, the logical subspaces of major state, can be directly to this after write IO request is received Write IO request enters row write processing.After write IO request is received from the logical subspaces of state, the write IO request can be transmitted to The logical subspaces of major state, the processing of write IO request is carried out by the logical subspaces of major state.From unlike correlation technique, After the completion of write IO request processing, the logical subspaces of major state are not by the data syn-chronization in the write IO request to patrolling from state Collect subspace.

It is above-mentioned from state, generally can be a kind of state of the dual-active storage system under normal condition.This is patrolled from state Collect processing of the subspace without I/O Request.After I/O Request is received from the logical subspaces of state, the I/O Request is forwarded To the logical subspaces of major state, the I/O Request is handled by the logical subspaces of major state.It is different from correlation technique Be, the data syn-chronization not carried write IO request due to the logical subspaces of major state to the logical subspaces from state, so The data that corresponding write IO request is carried are not preserved from the logical subspaces of state.

In the data guard method that the application is provided, should from the LUN memory cell of state (it is i.e. described herein from LUN memory cell) Thin-LUN memory cell is preconfigured to be, and can be according to the memory space of Thin-LUN memory cell Distribution mechanism carries out the distribution of memory space.Also, in dual-active storage system normal work, due to from LUN memory cell In do not preserve the data that any write IO request is carried, so should can be with very little, and automatically from the initial capacity of LUN memory cell Dilatation mechanism is closed.It from the initial capacity of LUN memory cell can be zero that optimal state, which is,.So being deposited from LUN The initial capacity of logical subspaces in storage unit also very little, optimal situation is that the initial capacity of the logical subspaces is zero.

Above-mentioned interim major state, generally can be a kind of state occurred in the dual-active storage system under abnormal condition, With it is temporarily corresponding from state.The logical subspaces of the interim major state can the I/O Request that issues of application server handled. Also, the logical subspaces of the interim major state are to that should have data syn-chronization mark, and the logical subspaces of interim major state can foundation Data syn-chronization identifies to decide whether that the data to write-in are synchronized.For example, when sync id is 0, the interim master The logical subspaces of state can not data to be written be synchronized to the interim logical subspaces from state, when sync id is 1, The logical subspaces of the interim major state can data to be written be synchronized to the interim logical subspaces from state.

It is above-mentioned interim from state, generally can be a kind of state occurred in the dual-active storage system under abnormal condition, It is corresponding with interim major state.After the I/O Request that application server is issued is received, this temporarily from the logical subspaces of state not I/O Request processing is carried out, and the I/O Request can be forwarded to the logical subspaces of interim major state, by the logic of interim major state Subspace carries out the processing of I/O Request.

It should be noted that in the embodiment of the present application, when dual-active storage system normal work, by dual-active storage system In the write IO request that issues of main LUN memory cell processing application server, it is the data carried in the write IO request are not same Step is extremely from LUN memory cell.In other words, in this case, the data carried in write IO request are single-ended write-ins.

Storage device failure where the main LUN memory cell failures in dual-active storage system or its, from LUN memory cell In target logic subspace can be changed into interim major state, the target logic subspace of interim major state can handle application server The write IO request issued, the data syn-chronization write IO request not carried to opposite end.In other words, in this case, write The data carried in I/O Request are also single-ended write-in.

After storage device failure recovers where main LUN memory cell or its, master corresponding with the target logic subspace Logical subspaces in LUN memory cell can be exchanged into temporarily from state, to logic of interim major state after fault recovery Space from the logical subspaces of state to performing before data syn-chronization completes temporarily, the write IO request issued for application server, Handled by the logical subspaces of the interim major state, and the logical subspaces of the interim major state are when not only can be by failure The data syn-chronization being written locally, can also be by the data syn-chronization carried in write IO request to facing to temporarily from the logical subspaces of state When from the logical subspaces of state.In other words, in this case, the data carried in write IO request are both-end write-ins.

It is noted, that the main LUN memory cell that the application is previously mentioned, refers to the LUN memory cell in major state, The application be previously mentioned from LUN memory cell, refer to be in the LUN memory cell from state.In the normal work of dual-active storage system In the case of work, exist major state LUN memory cell (i.e. main LUN memory cell) and from the LUN memory cell of state (i.e. from LUN memory cell), when dual-active storage system is abnormal, dual-active state can be defined logically subspace, hereafter be repeated no more.

In the embodiment of the present application, in the state of dual-active storage system is normal, when dual-active storage system receives application Server is issued after write IO request, is handled the write IO request by the main LUN memory cell in the dual-active storage system, should not The data syn-chronization carried in write IO request is extremely from LUN memory cell.

For example, after main LUN memory cell receives write IO request, can be by main LUN memory cell by the write IO request The data write-in of carrying is local, not by the data syn-chronization carried in the write IO request extremely from LUN memory cell.Then should to this Returned with server and write successful response message for the write IO request.

After write IO request is received from LUN memory cell, the write IO request can be transmitted to main LUN memory cell, it is main LUN memory cell by the data carried in the write IO request write it is local after, the data write-in write IO request not carried from LUN memory cell.Main LUN memory cell can successfully response disappears to being returned from LUN memory cell for write IO request write-in Breath, from returning to the response message from LUN memory cell to application server.

In the embodiment of the present application, the storage where above-mentioned main LUN memory cell failures or the main LUN memory cell is set During standby failure, the mesh in this LUN memory cell can be determined based on the logical address carried in the write IO request received after failure Mark logical subspaces.

In a kind of optional implementation, for the scene of main LUN memory cell failures：In usual dual-active storage system Main LUN memory cell and device identification and the LUN identification of storage device where other side can be recorded mutually from LUN memory cell. In addition, main LUN memory cell correspondence has mark to be reversed.In main LUN memory cell failures, main LUN memory cell can foundation The device identification of equipment and the LUN identification where the LUN memory cell of record, State Transferring is sent to from LUN memory cell Notification instruction.

In addition, in main LUN memory cell failures, main LUN memory cell can add mark to be reversed, to cause in master The write IO request received can be forwarded to from LUN memory cell after LUN memory cell failures.

For example, main LUN memory cell is when receiving write IO request, if there is mark to be reversed in main LUN memory cell Know, then the write IO request can be forwarded to from LUN memory cell.

From LUN memory cell after the notification instruction of the State Transferring is received, the addition of this LUN memory cell can be treated anti- Turn mark, to recognize the write IO request for being out of order and being followed by receiving from LUN.

For example, writing IO receive write IO request that application server issues or the forwarding of main LUN memory cell from LUN After request, it can determine whether there is the mark to be reversed, if in the presence of, the logical address that can be carried based on the write IO request, really Target logic subspace in fixed this LUN memory cell.The write IO request received after addition mark to be reversed is main LUN The write IO request received after storage device failure where memory cell or main LUN memory cell.

In another optional implementation, for the scene of storage device failure where main LUN memory cell：It is logical Often, storage device where main LUN memory cell and examine from heartbeat message can be transmitted between storage device where LUN memory cell Survey the running status of opposite end storage device.

The storage where main LUN memory cell is detected by heartbeat message from storage device where LUN memory cell is set After standby failure, storage device where from LUN memory cell can send the notification instruction of State Transferring to this from LUN memory cell.

For example, after the write IO request that application server is issued is received from LUN, can determine whether there is the mark to be reversed Know, if in the presence of the logical address that can be carried based on the write IO request determines that target logic in this LUN memory cell is empty Between.The write IO request received after addition mark to be reversed is deposited where main LUN memory cell or main LUN memory cell The write IO request received after storage equipment fault.Received after above-mentioned main LUN memory cell or storage device failure where it Write IO request can the memory cell of the LUN based on or first write IO request being received where it after storage device failure, can also Several write IO requests, do not do specifically defined here.However, to ensure that the accuracy of data write-in, comprehensive, it is optimal Mode be, above-mentioned write IO request be main LUN memory cell or received where it after storage device failure first write IO please Ask.

In the embodiment of the present application, logical address is carried in the write IO request received after based on failure, this LUN is determined During the target logic subspace of memory cell, it can realize in the following way.

Default division rule can be based on from LUN memory cell, the corresponding logical space of this LUN memory cell is divided into Some logical subspaces.

Wherein, default division rule may include based on the logical address carried in above-mentioned write IO request, and divide section Length of number or each logical address section etc. is set.Here, developer can be according to actual conditions to above-mentioned default Division rule is set, merely just illustrative to its, it is not limited specifically.

Under the division rule, several logical addresses section marked off is at least more than or equal to including initial logical address The destination address section of the logical address carried in the write IO request.Destination logical address Duan Kewei one or more, here Do not limit specifically.

The corresponding logical subspaces of destination address section can be defined as target logic subspace from LUN memory cell.Should Target logic subspace can be one or more, not limit specifically here.

In addition, the logical address section marked off, which at least also includes end logical address, is less than what is carried in the write IO request Logical address has been written into logical address section, and this has been written into the corresponding logical space of logical address section and can be designated as having been written into here patrolling Collect subspace.

For example, it is assumed that from the corresponding logical address section of the logical space of LUN memory cell be 0GB-100GB, it is above-mentioned to write IO The logical address that request is carried is 60GB, and default division rule can be for will be corresponding from the logical space of LUN memory cell Logical address section is divided into two sections, and the logical address carried using write IO request is separation.

Here, based on default division rule, the logical address Duan Kewei 0GB-60GB marked off, and 60GB-100GB The two logical addresses section.Then initial logical address can be carried logically in the write IO request from LUN memory cell The logical address section (such as 60GB-100GB address fields) of location is corresponded to as destination logical address section, and by destination logical address section Logical subspaces be defined as target logic subspace.And 0GB-60GB can be to have been written into address field.

Step 202：It is interim major state by the State Transferring of the target logic subspace, is that target logic is empty Between open automatic dilatation mechanism, and the data that the write IO request is carried write the target logic subspace, and do not perform number According to synchronization.

In the embodiment of the present application, from LUN memory cell can by the corresponding dual-active state in the target logic subspace by from State is changed into interim major state, and mark to be reversed is removed.Rather than other logical subspaces of the target logic subspace State maintains the original state constant.

When realizing, each dual-active state corresponds to stateful mark, and the value of different conditions mark represents different pairs State living.For example, major state, from state, interim major state with it is interim from the corresponding status indicator value of state be followed successively by 1,2, 3、4.The value of the status indicator of target logic subspace position by 2 can be revised as 3 from LUN memory cell, so as to complete this The State Transferring of target logic subspace is interim major state.

In addition, automatic dilatation mechanism can be opened for the target logic subspace, from LUN memory cell when target logic The residual capacity of the memory space in space be less than or equal to dilatation threshold value when, you can according to dilatation step-length carry out dilatation, reach in real time, The purpose of on-demand application memory space.

In the embodiment of the present application, after being converted to interim major state in target logic subspace, if being connect from LUN memory cell Receive the write IO request that application server is issued, then the data write-in target logic subspace that the write IO request can be carried, and Data syn-chronization is not performed, and write-in success message is returned to application server.

In addition, after being converted to interim major state in target logic subspace, turning if receiving main LUN from LUN memory cell The write IO request of hair, the then data write-in target logic subspace that can be carried the write IO request, does not perform data syn-chronization, so Backward main LUN memory cell returns to write-in success message, is successfully disappeared with returning to write from main LUN memory cell to application server Breath.

Step 203：After fault recovery, trigger the target logic subspace from LUN memory cell and be converted to interim From the same with the data of the corresponding logical subspaces in the main LUN memory cell of destination logical address section of state Step, and after synchronously completing, discharges the physical space shared by the target logic subspace, and recover this LUN memory cell and The main LUN memory cell.

In the embodiment of the present application, in fault recovery, trigger the target logic subspace from LUN memory cell and turn It is changed to interim from state and the corresponding logical subspaces in the main LUN memory cell of destination logical address section Data syn-chronization.

In a kind of optional implementation, for the scene of main LUN memory cell failures：When above-mentioned target logic is empty Between be converted to after interim major state, local State Transferring can be sent to the main LUN memory cell and is notified.Local state conversion is logical The initial logical address of the target logic subspace is carry in knowing.

Main LUN memory cell, can be based on the start logical in the notice after above-mentioned local state conversion notice is received Address, and according to above-mentioned default division rule, the main LUN memory cell is divided, it is divided into several logics empty Between, the logical subspaces marked off and the logical subspaces marked off from LUN memory cell are corresponded.

Main LUN memory cell can be by logical subspaces corresponding with the target logic subspace in this LUN memory cell State is converted to temporarily from state by major state, and removes mark to be reversed.Other logical subspaces in main LUN memory cell State is constant.

For example, it is assumed that being divided into logical subspaces 1 and logical subspaces 2 from LUN memory cell, its is corresponding logically Location section is respectively 0GB-60GB, 60GB-100GB.Wherein logical subspaces 2 are target logic subspace.Target logic is sub Space is converted to after interim major state, and local State Transferring can be sent to main LUN memory cell and is notified, target is carried in the notice The initial logical address of logical subspaces, i.e. 60GB.

Main LUN memory cell can be based on the initial logical address and default division rule after notice is received, will Main LUN memory cell is divided into two logical subspaces, respectively logical subspaces 1 ' and logical subspaces 2 ', and its is corresponding to patrol It is respectively 0GB-60GB, 60GB-100GB to collect address field.

Main LUN memory cell can will be right with the target logic subspace (i.e. logical subspaces 2) in this LUN memory cell The logical subspaces (i.e. logical subspaces 2 ') answered are converted to interim from state.

By the logical subspaces corresponding with the target logic subspace in the main LUN memory cell be converted to it is interim from After state, mark to be reversed is removed.

If main LUN memory cell receives the write IO request that application server is issued, this can be write IO by main LUN memory cell Request is forwarded to from LUN memory cell.From LUN memory cell after the write IO request is received, the write IO request can be carried Data write-in target logic subspace.Then write-in success message is returned to main LUN memory cell, to store single by main LUN Member returns to write-in success message to application server.

In the embodiment of the present application, after main LUN memory cell failures are recovered, main LUN memory cell can be stored to from LUN Unit sends synchronic command, from LUN memory cell after the synchronic command is received, can be (i.e. interim by target logic subspace The logical subspaces of major state) in write-in data syn-chronization to the interim logical subspaces from state.

In another optional implementation, for the scene of storage device failure where main LUN memory cell：When from After equipment fault recovers where storage device where LUN memory cell detects main LUN memory cell, it can store single to main LUN Member sends role negotiation and notified, the role negotiation can carry the initial logical address of target logic subspace in notifying.

Main LUN memory cell is being received after above-mentioned role negotiation notifies, can based on the initial logical address in the notice, And according to above-mentioned default division rule, the main LUN memory cell is divided, several logical subspaces are divided into, should The logical subspaces marked off and the logical subspaces marked off from LUN memory cell are corresponded.

Main LUN memory cell can be with consulting the state of each logical subspaces from LUN memory cell, by consulting, main LUN Logical subspaces corresponding with the target logic subspace in memory cell are to be interim from state.Based on other logical subspaces State.

Logical subspaces corresponding with the target logic subspace in the main LUN memory cell be negotiated for temporarily from After state, main LUN memory cell can send synchronic command to from LUN memory cell, and the synchronization is being received from LUN memory cell After instruction, can by data syn-chronization of write-in in target logic subspace (logical subspaces of i.e. interim major state) to this it is interim from The logical subspaces of state.

It should be noted that the data syn-chronization that the above-mentioned logical subspaces by interim major state are stored is to temporarily from state Logical subspaces may include：After storage device failure where main LUN memory cell or its, logic of the interim major state is empty Between the data syn-chronization that writes to temporarily from the logical subspaces of state.Also include：When main LUN memory cell is recovered or its place After storage device is recovered, the logical subspaces of the interim major state are by the write IO request being currently received (including from application service Write IO request that device is received and the interim write IO request forwarded from LUN memory cell) the data write-in that carries is local, and synchronously To temporarily from the logical subspaces of state.

Wherein, above-mentioned negotiation rules generally may include, when the logical subspaces of existing major state in dual-active storage system or The logical subspaces of the interim major state of person, the logical subspaces newly added can be from state or interim from state.Certainly consult Rule can by developer's sets itself, as long as make in winner's LUN memory cell target logic subspace is corresponding patrols with this Subspace is collected to be interim from state, this is exemplary illustration simply to negotiation rules, it is not carried out specifically defined.

In the embodiment of the present application, for the logical subspaces and the interim logical subspaces from state of interim major state Data syn-chronization, can be realized based on data syn-chronization mark.

Realizing, the logical subspaces of all interim major states are to that there should be data syn-chronization mark.What data syn-chronization was identified takes Value can be the first preset value and the second preset value.Wherein, the first preset value represents not synchronize processing to the data having been written into； Second preset value represents to synchronize processing to the data having been written into.

, can be by the target of the interim major state in above-mentioned target logic subspace after being interim major state from State Transferring The corresponding data syn-chronization mark of logical subspaces is revised as the first preset value so that the target logic subspace of the interim major state After the data write-in of write IO request is carried out, data syn-chronization is not performed.

After fault recovery, when the target logic subspace of interim major state receives the interim logical subspaces from state Data syn-chronization instruction after, the data syn-chronization of the target logic subspace of interim major state mark can be revised as second and preset Value so that the target logic subspace of the interim major state can be empty to logic temporarily from state by the data syn-chronization having been written into Between.

In the embodiment of the present application, after data syn-chronization is completed, shared by the logical subspaces of the releasable interim major state Physical space, simultaneously closes off automatic dilatation mechanism, and recover this LUN memory cell and the main LUN memory cell.

It should be noted that when dual-active storage system is in normal condition, because main LUN memory cell is not to from LUN Memory cell synchrodata, and be converted in the logical subspaces of interim major state and discharge it after the logical subspaces of state Shared physical space so that be constantly in from the logical subspaces of state without the state for preserving data, this state causes After from the logical subspaces of state for the logical subspaces of interim major state, all data of write-in are data to be synchronized, So from the logical subspaces of state data to be synchronized need not be found by difference bitmap.Therefore when performing data syn-chronization, face When major state logical subspaces can directly read the data locally having been written into and synchronize, on the one hand simplify from LUN processing When writing IO, it is no longer necessary to update difference bitmap, simplify software complexity, improve and write I O process efficiency, on the other hand simplify Synchronization process flow, so as to substantially increase data synchronization efficiency.

In the embodiment of the present application, can be by the target logic of interim major state thereon from LUN memory cell when recovering Subspace is converted to from state, and by several the continuous logical subspaces from state marked off in this LUN memory cell Merge.

It can also be sent from LUN memory cell to main LUN memory cell and recover instruction, main LUN memory cell is receiving this Recover after instruction, the interim logical subspaces from state thereon can be changed and be main state, and this LUN memory cell is divided The logical subspaces of some continuous major states gone out are merged.

In the embodiment of the present application, it is above-mentioned at least also to include terminating in some address fields marked off from LUN memory cell Logical address, which is less than in the above-mentioned write IO request received after main LUN memory cell failures or storage device failure where it, to be taken The logical address of band have been written into logical address section.The logic having been written into the corresponding main LUN memory cell of logical address section The state of subspace is main state, and this has been written into the shape of the corresponding logical subspaces from LUN memory cell of logical address section State is from state.

After the read I O request that application server is issued is received from LUN memory cell, read I O request carrying can be obtained Logical address section.

If get the logical address section it is described have been written into logical address section, from LUN memory cell can to should Read error prompting message is returned with server, or the read I O request can be transmitted to the main LUN from LUN memory cell and is deposited Storage unit.Main LUN memory cell can have been written into logical address section based on the logical address carried in the read I O request above-mentioned Corresponding data are read in the logical subspaces of corresponding major state, if reading data, are returned to described from LUN memory cell The data that retaking of a year or grade is got；If not reading data, to described from LUN memory cell return read error prompting message.

The data or the read error that the main LUN memory cell is returned are being received from LUN memory cell After prompting message, the data or the read error prompting message are returned into application server.

In a kind of optional implementation, for the scene of main LUN memory cell failures：

1) main LUN memory cell failures are not recovered：If the logic that the read I O request received from LUN memory cell is carried Address field has been written into logical address section positioned at above-mentioned, and the read I O request can be transmitted to the main LUN storages from LUN memory cell Unit.Main LUN memory cell can have been written into logical address section based on the logical address section carried in the read I O request above-mentioned Corresponding data are read in the logical subspaces of corresponding major state.

It is readable if the corresponding logical subspaces of logical address section that the read I O request is carried can be accessed when reading Data corresponding with the read I O request are got, and the data that can read this are returned from LUN memory cell, by being stored from LUN The data are returned to application server by unit.

If the corresponding logical subspaces access fault of logical address section that the read I O request is carried, can not read number According to, now can to from LUN memory cell return read error prompting message, the read error is carried from LUN memory cell by this Show that message returns to application server.

2) main LUN memory cell failures are recovered (i.e. in data synchronization process)：If the reading received from LUN memory cell The logical address section that I/O Request is carried has been written into logical address section positioned at above-mentioned, can turn the read I O request from LUN memory cell Issue the main LUN memory cell.Main LUN memory cell can be based on the logical address section carried in the read I O request, upper State in the logical subspaces for having been written into the corresponding major state of logical address section and read corresponding data.Main LUN memory cell can be by The data forwarding read is to from LUN memory cell, by returning to application server from LUN memory cell by the data.

In another optional implementation, for the scene of storage device failure where main LUN memory cell：

1) storage device failure where main LUN memory cell does not recover：If the reading IO received from LUN memory cell please The logical address section of carrying is asked to have been written into logical address section positioned at above-mentioned, then returning to read error prompting to application server disappears Breath.

2) storage device failure recovers (i.e. in data synchronization process) where main LUN memory cell：If storing single from LUN The logical address section that read I O request that member is received is carried be located at it is above-mentioned have been written into logical address section, can be by from LUN memory cell The read I O request is transmitted to the main LUN memory cell.Main LUN memory cell can be based on the logic carried in the read I O request Address field, corresponding data are read in the above-mentioned logical subspaces for having been written into the corresponding major state of logical address section.Main LUN is deposited Storage unit can be by the data forwarding read to from LUN memory cell, by returning to application service from LUN memory cell by the data Device.

In the embodiment of the present application, if the logical address section that the read I O request received from LUN memory cell is carried is located at Above-mentioned destination logical address section, can determine whether in the presence of right with the logical address section of read I O request carrying from LUN memory cell The logical address map record answered.

If there is logical address map record corresponding with the logical address section that the read I O request is carried, then read with being somebody's turn to do The corresponding data of read I O request, and the data read can be returned to application server.

If there is no logical address map record corresponding with the logical address section that the read I O request is carried, then to application Server returns to read error prompt message.

In the embodiment of the present application, receiving I/O Request for main LUN memory cell can occur in main LUN memory cell failures Afterwards to before fault recovery, after storage device failure recovers after main LUN memory cell failures are recovered and where main LUN memory cell These three stages.

1) main LUN memory cell failures are not recovered：Main LUN memory cell receives read I O request, if the read I O request is taken The logical address section of band, which is located at, has been written into logical address section, and it is corresponding that main LUN memory cell can have been written into logical address section at this Data corresponding with the read I O request are read in the logical subspaces of major state.If the corresponding logical subspaces of logical address section It can normally access, then may be read into corresponding data, the data read can be returned to application server by main LUN memory cell. If the corresponding logical subspaces access fault of logical address section, main LUN memory cell can return to application server and read mistake Miss prompting message.

If the logical address section that the read I O request is carried is located at destination logical address section, main LUN memory cell can read this I/O Request is forwarded to from LUN memory cell.It can determine whether to exist from LUN memory cell and carried logically with the read I O request The corresponding logical address map record of location section.If it does, from LUN memory cell can interim major state target logic it is empty Between in read data, and the data that this is read return should main LUN memory cell, main LUN memory cell can return the data Return application server.If it does not, read error prompting message is returned from LUN memory cell to main LUN memory cell, it is main The read error prompting message can be returned to application server by LUN memory cell.

2) main LUN memory cell failures are recovered (i.e. in data synchronization process)：Main LUN memory cell receives reading IO please Ask, if the logical address section that the read I O request is carried, which is located at, has been written into logical address section, main LUN memory cell can have been written at this Data corresponding with the read I O request are read in the logical subspaces of the corresponding major state of logical address section.And by the number read According to return application server.

3) in another optional implementation, for the scene of storage device failure where main LUN memory cell：

Storage device failure recovers where main LUN memory cell：Main LUN memory cell receives read I O request, if the reading The logical address section that I/O Request is carried, which is located at, has been written into logical address section, and main LUN memory cell can have been written into logical address at this Data corresponding with the read I O request are read in the logical subspaces of the corresponding major state of section.And should by the data read return Use server.

Referring to Fig. 3, Fig. 3 is a kind of schematic diagram of data protection shown in the exemplary embodiment of the application one.

Below by specific example, and combine storage device where main LUN memory cell failures and main LUN memory cell Both scenes of failure, the above method is described in detail.

Assuming that the WriteMode of dual-active storage system is the pattern of sequential write, the main LUN memory cell in dual-active storage system It is LUN-B from LUN memory cell for LUN-A.LUN-A is configured in device A, and LUN-B is configured on device B.LUN-B is pre- First it is configured to Thin-LUN memory cell.The logical subspaces of LUN memory cell be configured with status indicator position, wherein major state, It is respectively 1,2,3 and 4 from state, interim major state and the interim value from the corresponding status indicator of state.Interim major state pair The logical subspaces answered are configured with data syn-chronization flag, are represented not when wherein data syn-chronization flag value is 0 to having write The data entered synchronize processing, and data syn-chronization flag value represents to synchronize processing to the data having been written into when being 1.

When dual-active storage system is in normal condition, after LUN-A receives write IO request, the write IO request can be taken The data write-in of band is local, not by the data syn-chronization of the write-in to LUN-B.After the completion of write-in, returned to application server Write successful response message.

After LUN-B receives write IO request, the write IO request can be forwarded to LUN-A, by LUN-A by the write IO request The data write-in LUN-A of middle carrying, not by the data syn-chronization of the write-in to LUN-B.After the completion of write-in, returned to LUN-B Successful response message is write, is returned from LUN-B to application server and writes successful response message.

When the LUN-A failures or device A failure in dual-active storage system, it can proceed as follows.

1) LUN-A failures are directed to

When LUN-A, which detects itself, is changed into malfunction, LUN-A can add mark to be reversed so that LUN-A is received Write IO request be transmitted to LUN-B.In addition, LUN-A can also be marked by the equipment B of storage device identification and LUN-B LUN Know, sending role transforming to LUN-B notifies.

LUN-B is after role transforming notice is received, and LUN-B can add mark to be reversed.After addition band reversion mark, After first write IO request for receiving whether application server is issued or LUN-A forwardings, it can be write based on this first The logical address carried in I/O Request, is divided to LUN-B logical space.

Assuming that the logical address that first write IO request is carried is 60GB, it is assumed that be divided into two sections.Assuming that LUN-A with The corresponding logical address sections of LUN-B are 0GB-100GB.Then LUN-B can the logical address based on 60GB, by LUN-B logic Address field is divided into two address fields of 0GB-60GB and 60GB-100GB, here by two addresses of 0GB-60GB and 60GB-100GB The corresponding logical subspaces of section are logical subspaces 1 and logical subspaces 2.Initial logical address can be more than or equal to by LUN-B The address field of logical address in the write IO request is as destination address section, and in this instance, 60GB-100GB is mesh described above Mark address field.The corresponding logical subspaces 2 of destination address section can be target logic subspace described above.

The status indicator of the logical subspaces 2 by 2 can be revised as 3 by LUN-B so that the target logic subspace is by from shape State is converted to interim major state, and the value that the data syn-chronization of logical subspaces is identified is revised as 0.LUN-B can also be removed and treated Reversion mark.Meanwhile, LUN-B can open dilatation mechanism for the target logic subspace.Now, logical subspaces 1 are still from shape State.

LUN-B can send local State Transferring to LUN-A and notify, the write IO request can be carried logically in the notice Location, i.e. 60GB.

LUN-A is being received after local state conversion notifies, logical address that can be according to the 60GB, by patrolling for LUN-A Collect address field and be divided into two address fields of 0GB-60GB and 60GB-100GB.The corresponding logical subspaces difference of the two address fields It is denoted as logical subspaces 1 ' and logical subspaces 2 '.

The status indicator of logical subspaces 2 ' by 1 can be revised as 4 by LUN-A so that logical subspaces 2 ' are turned by major state It is changed to interim from state.Now logical subspaces 1 ' are still main state.LUN-A can remove mark to be reversed.

After LUN-B receives write IO request, the data that the write IO request is carried can be write in the logical subspaces 2, And 0 is designated based on data syn-chronization, data to be written is not synchronized to logical subspaces 2 '.

If LUN-A is receiving write IO request, the write IO request can be transmitted to LUN-B execution, this can be write IO by LUN-B The data that request is carried are write in the logical subspaces 2, and are designated 0 based on data syn-chronization, and data to be written is not synchronized to Logical subspaces 2 '.Then, the implementing result of the write request can be returned to LUN-A by LUN-B, and returning to front end by LUN-A should Use server.

If LUN-B receives read I O request, LUN-B can obtain the logical address section carried in the read I O request.If this is patrolled Collect address field and be located at destination logical address section (i.e. 60GB-100GB), LUN-B can determine whether in the presence of right with logical address section The logical address map record answered.If it can be read the corresponding data of the read I O request in the presence of, LUN-B, and by the data read Return to application server.If being not present, LUN-B can return to read error prompting message to application server.

If the logical address section carried in the read I O request that LUN-B is received, which is located at, has been written into address field (i.e. 0GB- 60GB), LUN-B can send the read I O request to LUN-A.If on LUN-A, the logical address section correspondence that the read I O request is carried Logical subspaces can normally access, LUN-A can be read the corresponding data of the read I O request, and the data are returned into LUN-B, with The data read are returned into application server by LUN-B.If on LUN-A, the logical address section that the read I O request is carried is right The logical subspaces access fault answered, LUN-A can return to read error prompting message to LUN-B, with by LUN-B by read error Prompting message returns to application server.

If LUN-A receives read I O request, LUN-A can obtain the logical address section of read I O request carrying.If the logic Address field, which is located at, has been written into logical address section, and the corresponding data of the read I O request can be read in LUN-A.If on LUN-A, reading IO The corresponding logical subspaces of the logical address carried section are asked normally to access, it is corresponding that LUN-A may be read into the read I O request Data, and the data are returned into application server.If corresponding in the logical address section that on LUN-A, the read I O request is carried Logical subspaces access fault, LUN-A can return to read error prompting message to application server.

If the logical address section that LUN-A receives read I O request is located at destination logical address section, LUN-A can ask reading IO Ask and be transmitted to LUN-B.LUN-B can determine whether that there is logical address corresponding with the logical address section that the read I O request is carried reflects Penetrate record.If the corresponding data of the read I O request can be read in the presence of, LUN-B, and the data read are returned into LUN-A, with by The data read are returned to application server by LUN-A.If being not present, LUN-B can return to read error prompting to LUN-A and disappear Breath, to return to read error prompting message from LUN-A to application server., can be to when LUN-A detects faults itself and recovered LUN-B sends data syn-chronization instruction.LUN-B, can be by the data syn-chronization of logical subspaces 2 after data syn-chronization instruction is received Flag value is set to 1, is then based on the data syn-chronization flag 1, by the data syn-chronization having been written into logical subspaces 2 '.

In data synchronization process, if LUN-B receives write IO request, the data that LUN-B can carry the write IO request Write in logical subspaces 2, and by the data syn-chronization to logical subspaces 2 '.

If LUN-A receives write IO request, the write IO request can be forwarded to LUN-B by LUN-A, and this can be write IO by LUN-B In the data write-in logical subspaces 2 that request is carried, and by the data syn-chronization to logical subspaces 2 '.

In data synchronization process, if the logical address section that the read I O request that LUN-B is received is carried is located at target logic Address field (i.e. 60GB-100GB), LUN-B can determine whether to be present in the corresponding logical address map record of logical address section. If in the presence of the corresponding data of the read I O request are can be read in LUN-B, and the data read are returned into application server.If not depositing Read error prompting message can be returned in, LUN-B to application server.

If the logical address section carried in the read I O request, which is located at, has been written into address field (i.e. 0GB-60GB), LUN-B can be to LUN-A sends the read I O request.LUN-A can be read the corresponding data of the read I O request, and the data are returned into LUN-B, with by The data read are returned to application server by LUN-B.

During data syn-chronization, if the logical address section that the read I O request that LUN-A is received is carried is patrolled positioned at target Address field (i.e. 60GB-100GB) is collected, the read I O request can be transmitted to LUN-B by LUN-A.LUN-B can determine whether there is the reading The corresponding logical address map record of logical address section that I/O Request is carried.If in the presence of read I O request correspondence can be read in LUN-B Data, and by the data read return LUN-A, with by LUN-A by the data read return application server.If not depositing Read error prompting message can be returned to LUN-A in, LUN-B, be disappeared with returning to read error prompting to application server from LUN-A Breath.

If the logical address section that the read I O request that LUN-A is received is carried, which is located at, has been written into logical address section (i.e. 0GB- 60GB), the corresponding data of the read I O request are can be read in LUN-A, and the data are returned into application server.

After the completion of data syn-chronization, the status indicator of logical subspaces 2 by 3 can be revised as 2 by LUN-B so that it is from facing When major state be converted to from state, and discharge the physical space shared by LUN-B, simultaneously close off automatic dilatation mechanism.LUN-B can Logical subspaces 1 and logical subspaces 2 are merged, recover original state from LUN memory cell.

LUN-B is sent to LUN-A recovers instruction, and LUN-A, can be by logical subspaces 2 ' after recovery instruction is received Status indicator is revised as 1 by 4 so that logical subspaces 2 ' are by temporarily from State Transferring major state, and merge logical subspaces 1 ' With logical subspaces 2 ', to recover the state of original main LUN memory cell.

2) it is directed to device A failure

Equipment B can by the heartbeat message detection device A between device A whether failure.When equipment B detects device A After failure, equipment B can by local record with device A to be used as main LUN memory cell corresponding from LUN memory cell pair It should be related to, search LUN-B corresponding with LUN-A.Then equipment B can send State Transferring instruction to LUN-B.

LUN-B can add LUN-B mark to be reversed after State Transferring instruction is received.When addition mark to be reversed After knowledge, receive after first write IO request, can be based on the logical address carried in the write IO request, the logic to LUN-B is empty Between divided.

Assuming that the logical address that write IO request is carried is 60GB, it is assumed that be divided into two sections.Assuming that LUN-A is corresponding with LUN-B Logical address section be 0GB-100GB.Then LUN-B can the logical address based on 60GB, LUN-B logical address section is divided For two address fields of 0GB-60GB and 60GB-100GB, here by 0GB-60GB and two address fields of 60GB-100GB are corresponding patrols It is logical subspaces 1 and logical subspaces 2 to collect subspace.LUN-B can will write IO with address segment base more than or equal to this The address field of logical address in request is as destination address section, and in this instance, 60GB-100GB is destination address described above Section.The corresponding logical subspaces 2 of destination address section are target logic subspace described above.

The status indicator of the logical subspaces 2 by 2 can be revised as 3 by LUN-B so that the target logic subspace is by from shape State is converted to interim major state, and the value that the data syn-chronization of logical subspaces is identified is revised as 0.LUN-B, which can be removed, treats anti- Turn mark.Meanwhile, LUN-B can open dilatation mechanism for the target logic subspace.Now, logical subspaces 1 are still from state.

If LUN-B receives read I O request, LUN-B can obtain the logical address section carried in the read I O request.If this is patrolled Volume address field is located at destination logical address section (i.e. 60GB-100GB), and it is right that LUN-B can determine whether to be present in the logical address section The logical address map record answered.If it can be read the corresponding data of the read I O request in the presence of, LUN-B, and by the data read Return to application server.If being not present, LUN-B can return to read error prompting message to application server.

If the logical address section carried in the read I O request, which is located at, has been written into address field (i.e. 0GB-60GB), LUN-B is to answering Read error prompting message is returned with server.

When equipment B detects device A fault recovery, LUN-B can carry out the state association of each logical subspaces with LUN-A Business.

For example, LUN-B can give logical address section and its state notifying corresponding to logical subspaces 1 and logical subspaces 2 LUN-A, LUN-A are based on the notice, local logical space can be divided into logical subspaces 1 ' and logical subspaces 2 ', its is right The logical address section answered is respectively 0GB-60GB and 60GB-100GB.LUN-A can be set the status indicator of logical subspaces 2 ' For 4 so that it is to be set to 1 from state, and by the status indicator of logical subspaces 1 ' temporarily so that it is main state.Then LUN-A can send data syn-chronization instruction to LUN-B.

The data syn-chronization mark of logical subspaces 2 can be revised as 1, so by LUN-B after data syn-chronization instruction is received 1 is designated based on the data syn-chronization afterwards, by the data syn-chronization having been written into logical subspaces 2 '.

If the logical address section that the read I O request that LUN-A is received is carried, which is located at, has been written into logical address section (i.e. 0GB- 60GB), the corresponding data of the read I O request are can be read in LUN-A, and the data are returned into application server.Completed in data syn-chronization Afterwards, the status indicator of logical subspaces 2 by 3 can be revised as 2 by LUN-B so that it is converted to from state from interim major state, and The physical space shared by LUN-B is discharged, automatic dilatation mechanism is simultaneously closed off.LUN-B can be empty by logical subspaces 1 and logic Between 2 merge, recover original state from LUN memory cell.

Embodiment with aforementioned data guard method is corresponding, and present invention also provides the embodiment of data protecting device.

The embodiment of the application data protecting device can be using on a storage device.Device embodiment can pass through software Realize, can also be realized by way of hardware or software and hardware combining.Exemplified by implemented in software, as on a logical meaning Device, be to be read corresponding computer program instructions in nonvolatile memory by the processor of storage device where it Into internal memory, operation is formed.For hardware view, as shown in figure 4, the storage device where the application data protecting device A kind of hardware structure diagram, in addition to the processor shown in Fig. 4, internal memory, network interface and storage medium, in embodiment Storage device where device can also include other hardware, this is no longer gone to live in the household of one's in-laws on getting married generally according to the actual functional capability of the storage device State.

The processor of above-mentioned storage device can call the machine corresponding with above-mentioned data protection logic stored in storage medium Device executable instruction, to perform above-mentioned data guard method.

Fig. 5 is refer to, Fig. 5 is a kind of block diagram of data protecting device shown in the exemplary embodiment of the application one.It is described Device is applied to, from LUN LUN memory cell, the dual-active is stored in the dual-active storage system under order WriteMode System also includes main LUN memory cell；The dual-active storage system is after write IO request is received, in the dual-active storage system Main LUN memory cell handles the write IO request, and the main LUN memory cell not by the data syn-chronization in the write IO request to described From LUN memory cell；It is described to be preconfigured from LUN memory cell as thin LUN Thin-LUN memory cell.

Functionally divide, above-mentioned data protection logic can be the data protecting device, it may include determining unit 510, turn Change unit 520, synchronization unit 530 and recovery unit 540.

Wherein, above-mentioned determining unit 510, is stored where the main LUN memory cell or the main LUN memory cell After equipment fault, based on the logical address carried in the write IO request received after failure, the mesh in this LUN memory cell is determined Mark logical subspaces；Wherein, the initial logical address of the corresponding destination logical address in target logic subspace section is more than etc. The logical address carried in the write IO request；

Converting unit 520, is interim major state by the State Transferring of the target logic subspace, is the target logic Automatic dilatation mechanism is opened in subspace, and the data that the write IO request is carried write the target logic subspace, and does not hold Row data syn-chronization；

Synchronization unit 530, after fault recovery, trigger the target logic subspace and be converted to temporarily from state with The data syn-chronization of the corresponding logical subspaces in the main LUN memory cell of the destination logical address section；

Recovery unit 540, for after synchronously completing, discharging the physical space shared by the target logic subspace, and Recover this LUN memory cell and the main LUN memory cell.

In a kind of optional implementation, above-mentioned determining unit 510, specifically for based on default division rule, inciting somebody to action The corresponding logical space of described LUN memory cell is divided into some logical subspaces so that in some logical subspaces In corresponding some logical address sections, at least it is more than or equal to including initial logical address in the write IO request and carries logically The destination logical address section of location；The corresponding logical subspaces of destination logical address section are defined as target logic subspace.

In another optional implementation, some logical address sections at least include terminating logical address less than institute That states the logical address that is carried in write IO request has been written into logical address section；It is described to have been written into the corresponding main LUN of logical address section The state of logical subspaces in memory cell is main state；It is described have been written into logical address section it is corresponding from LUN memory cell On the states of logical subspaces be from state；

Described device also includes：

Reading unit 550, is carried for after the read I O request that application server is issued is received, obtaining the read I O request Logical address section；If the logical address section got has been written into logical address section described, returned to application server Retaking of a year or grade takes miscue message；Or the read I O request is transmitted to the main LUN memory cell, so that the main LUN is deposited Storage unit has been written into patrolling for the logical address corresponding major state of section based on the logical address carried in the read I O request described Collect in subspace and read corresponding data, if reading data, to the data for returning and reading from LUN memory cell； If not reading data, to described from LUN memory cell return read error prompting message；Deposited receiving the main LUN After the data or the read error prompting message of storage unit return, the data or the read error are pointed out Message returns to application server.

In another optional implementation, the reading unit 550 is additionally operable to issue receiving application server Read I O request after, obtain the read I O request carrying logical address section；If the logical address section got is described Destination logical address section, judges whether logical address map record corresponding with logical address section；If it is, at this The corresponding data of the read I O request are read in the target logic subspace of interim major state, and the data read are returned into application Server；If it is not, then returning to read error prompt message to application server.

In another optional implementation, the main LUN memory cell is after read I O request is received, if reading IO Ask the logical address carried section to have been written into address field described, then the corresponding data of the read I O request are read, if can read The data read are returned to application server by data；If data can not be read, return to read error to application server and carry Show message.

In another optional implementation, the main LUN memory cell is after read I O request is received, if reading IO The logical address section that carries is asked in destination logical address section, then the read I O request is forwarded to it is described from LUN memory cell, with By from LUN memory cell judge whether with the corresponding logical address map record of logical address section, if it does, by from LUN memory cell reads data in the target logic subspace of interim major state, and the data that this reads are returned into main LUN Memory cell, by main LUN memory cell by the data return application server, if it does not, it is described from LUN memory cell to The main LUN memory cell returns to read error prompting message, by the main LUN memory cell by the read error prompting message Return to application server.

In another optional implementation, the recovery unit 540, specifically for by the mesh of the interim major state Mark logical subspaces are converted to from state, and by some continuous logics from state of marking off in this LUN memory cell Subspace is merged；And, notify in the main LUN memory cell interim changes as main shape from the logical subspaces of state State, so that the main LUN memory cell merges the logical subspaces of some continuous major states marked off thereon.

In another optional implementation, if the initial capacity of the logical subspaces is zero, logic is empty Between automatic dilatation mechanism be closed mode；

Described device also includes：Closing unit 560, for being changed by the target logic subspace of the interim major state After state, to close the automatic dilatation mechanism.

In another optional implementation, in the main LUN memory cell failures, the main LUN memory cell After the local state conversion notice that the interim main LUN memory cell is sent is received, changed and notified based on the local state Logical address in the write IO request of middle carrying, determine in the main LUN memory cell with the destination logical address section Corresponding logical subspaces, and by the State Transferring of the logical subspaces for temporarily from state.

In another optional implementation, in storage device failure where the main LUN memory cell, the master LUN memory cell is after the fault recovery of storage device where the main LUN memory cell, based on being stored with the interim main LUN Unit is directed to the negotiation result of each logical subspaces state, and each logic updated respectively in the main LUN memory cell is empty Between state so that the state of logical subspaces corresponding with the destination logical address in the main LUN memory cell is more New is temporarily from state.

The function of unit and the implementation process of effect specifically refer to correspondence step in the above method in said apparatus Implementation process, will not be repeated here.

For device embodiment, because it corresponds essentially to embodiment of the method, so related part is real referring to method Apply the part explanation of example.Device embodiment described above is only schematical, wherein described be used as separating component The unit of explanation can be or may not be physically separate, and the part shown as unit can be or can also It is not physical location, you can with positioned at a place, or can also be distributed on multiple NEs.Can be according to reality Selection some or all of module therein is needed to realize the purpose of application scheme.Those of ordinary skill in the art are not paying In the case of going out creative work, you can to understand and implement.

The preferred embodiment of the application is the foregoing is only, not to limit the application, all essences in the application God is with principle, and any modification, equivalent substitution and improvements done etc. should be included within the scope of the application protection.

Claims

1. a kind of data guard method, it is characterised in that methods described is applied in the dual-active storage system under order WriteMode From LUN LUN memory cell, the dual-active storage system also include main LUN memory cell；The dual-active storage system System handles the write IO request, and the main LUN after write IO request is received by the main LUN memory cell in the dual-active storage system Memory cell is not by the data syn-chronization in the write IO request to described from LUN memory cell；It is described prewired from LUN memory cell Thin LUN Thin-LUN memory cell is set to, methods described includes：

After storage device failure where the main LUN memory cell or the main LUN memory cell, based on reception after failure To write IO request in the logical address that carries, determine the target logic subspace in this LUN memory cell；Wherein, the mesh The initial logical address of the corresponding destination logical address section of mark logical subspaces is more than or equal to patrolling for being carried in the write IO request Collect address；

It is interim major state by the State Transferring of the target logic subspace, is that automatic expand is opened in the target logic subspace Appearance mechanism, and the data that the write IO request is carried write the target logic subspace, and data syn-chronization is not performed；

After fault recovery, trigger the target logic subspace and be converted to interim from state and the destination logical address The data syn-chronization of the corresponding logical subspaces being located in the main LUN memory cell of section, and after synchronously completing, discharge the mesh The physical space shared by logical subspaces is marked, and recovers this LUN memory cell and the main LUN memory cell.

2. according to the method described in claim 1, it is characterised in that target logic in determination this LUN memory cell Space, including：

Based on default division rule, the corresponding logical space of described LUN memory cell is divided into some logical subspaces, So that in the corresponding some logical addresses sections of some logical subspaces, being at least more than or equal to institute including initial logical address State the destination logical address section of the logical address carried in write IO request；

The corresponding logical subspaces of destination logical address section are defined as target logic subspace.

3. according to the method described in claim 1, it is characterised in that some logical address sections at least include terminating logically Location has been written into logical address section less than the logical address carried in the write IO request；It is described to have been written into logical address section correspondence Main LUN memory cell on the states of logical subspaces be main state；The logical address section that has been written into corresponding is deposited from LUN The state of logical subspaces on storage unit is from state；

Methods described also includes：

After the read I O request that application server is issued is received, the logical address section of read I O request carrying is obtained；

If the logical address section got has been written into logical address section described, read error is returned to application server Prompting message；Or

The read I O request is transmitted to the main LUN memory cell, so that the main LUN memory cell please based on the reading IO The logical address of middle carrying is sought, is read in the logical subspaces for having been written into the corresponding major state of logical address section corresponding Data, if reading data, to the data for returning and reading from LUN memory cell；If not reading data, to institute State from LUN memory cell and return to read error prompting message；

, will be described after the data or the read error prompting message of the main LUN memory cell return are received Data or the read error prompting message return to application server.

4. method according to claim 3, it is characterised in that methods described also includes：

If the logical address section got is in destination logical address section, judge whether and logical address section Corresponding logical address map record；

If it is, reading the corresponding data of the read I O request in the target logic subspace of the interim major state, and it will read The data arrived return to application server；

If it is not, then returning to read error prompt message to application server.

5. method according to claim 3, it is characterised in that the main LUN memory cell after read I O request is received, If the logical address section that the read I O request is carried has been written into address field described, the corresponding data of the read I O request are read, if Data can be read, the data read are returned into application server；If data can not be read, return and read to application server Take miscue message.

6. method according to claim 3, it is characterised in that the main LUN memory cell after read I O request is received, If the logical address section that the read I O request is carried is in destination logical address section, the read I O request is forwarded to and described deposited from LUN Storage unit, with by from LUN memory cell judge whether with the corresponding logical address map record of logical address section, if In the presence of by reading data, and the data that this is read in the target logic subspace of interim major state from LUN memory cell Main LUN memory cell is returned, the data application server is returned into by main LUN memory cell, if it does not, described from LUN Memory cell returns to read error prompting message to the main LUN memory cell, by the main LUN memory cell that the reading is wrong Prompting message returns to application server by mistake.

7. according to the method described in claim 1, it is characterised in that this LUN of recovery memory cell and the main LUN storages Unit, including：

The target logic subspace of the interim major state is converted to from state, and by marking off in this LUN memory cell Some continuously merged from the logical subspaces of state；And,

Notify the interim logical subspaces from state in the main LUN memory cell are changed to be main state, so that the main LUN Memory cell merges the logical subspaces of some continuous major states marked off thereon.

8. method according to claim 7, it is characterised in that if the initial capacity of the logical subspaces is zero, should The automatic dilatation mechanism of logical subspaces is closed mode；

Methods described also includes：

Be converted to by the target logic subspace of the interim major state after state, close the automatic dilatation mechanism.

9. according to the method described in claim 1, it is characterised in that in the main LUN memory cell failures, the main LUN Memory cell is after the local state conversion notice that the interim main LUN memory cell is sent is received, based on the local state Logical address in the write IO request that conversion is carried in notifying, determines being patrolled with the target in the main LUN memory cell The corresponding logical subspaces of address field are collected, and by the State Transferring of the logical subspaces for temporarily from state.

10. according to the method described in claim 1, it is characterised in that the storage device failure where the main LUN memory cell When, the main LUN memory cell after the fault recovery of storage device where the main LUN memory cell, based on it is described interim Main LUN memory cell is directed to the negotiation result of each logical subspaces state, and each in the main LUN memory cell is updated respectively The state of logical subspaces, so that the logical subspaces corresponding with the destination logical address in the main LUN memory cell State be updated to it is interim from state.

11. a kind of storage device, it is characterised in that the storage device includes processor and storage medium, the processor is adjusted With machine-executable instruction corresponding with data protection logic is stored on the storage medium, the processor is prompted to perform Claim 1 is to the method described in claim 10.