CN107329311B - Array substrate and liquid crystal display panel - Google Patents
Array substrate and liquid crystal display panel Download PDFInfo
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- CN107329311B CN107329311B CN201710657999.0A CN201710657999A CN107329311B CN 107329311 B CN107329311 B CN 107329311B CN 201710657999 A CN201710657999 A CN 201710657999A CN 107329311 B CN107329311 B CN 107329311B
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- 239000000758 substrate Substances 0.000 title claims abstract description 79
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 37
- 239000010409 thin film Substances 0.000 claims abstract description 18
- 125000006850 spacer group Chemical group 0.000 claims description 15
- 239000011521 glass Substances 0.000 claims description 7
- 239000010410 layer Substances 0.000 description 52
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133514—Colour filters
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides an array substrate and a liquid crystal display panel. The array substrate comprises a plurality of pixel units which are arranged in an array mode, wherein each pixel unit comprises a substrate, a thin film transistor, a color resistance layer and a pixel electrode, the shape of the pixel electrode is a centrosymmetric figure, the pixel electrode is provided with a connecting convex block which is contacted with a drain electrode to realize connection, and also provided with a symmetric convex block which is centrosymmetrically arranged with the connecting convex block, and the color resistance layer is provided with a first color resistance opening and a second color resistance opening which respectively correspond to the connecting convex block and the symmetric convex block, so that the poor alignment caused by the asymmetric design of the color resistance opening and the pixel electrode of the existing COA type array substrate can be improved, and the quality of a liquid crystal display panel can be effectively improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate and a liquid crystal display panel.
Background
Liquid Crystal Display (LCD) devices have many advantages such as thin body, power saving, and no radiation, and are widely used. Such as: liquid crystal televisions, mobile phones, Personal Digital Assistants (PDAs), digital cameras, computer screens, notebook computer screens, or the like.
Generally, a liquid crystal display device includes a housing, a liquid crystal panel disposed in the housing, and a Backlight module (Backlight module) disposed in the housing. The Liquid Crystal panel is mainly composed of a Thin film transistor Array (TFT Array) substrate, a Color Filter (CF) substrate, and a Liquid Crystal Layer (Liquid Crystal Layer) disposed between the two substrates, and has an operation principle of applying a driving voltage to the two glass substrates to control the rotation of Liquid Crystal molecules of the Liquid Crystal Layer, and refracting light of the backlight module to generate a picture. In addition, the TFT array substrate and the CF substrate usually have an alignment film thereon, and the alignment film is in contact with the liquid crystal molecules to generate a pre-tilt angle in a certain direction, so as to provide a bearing angle for the liquid crystal molecules.
The Color-filter-on-Array (COA) technology is an integrated technology for directly manufacturing a Color filter layer on an Array substrate, can effectively solve the problems of light leakage and the like caused by alignment deviation in a liquid crystal display device box aligning process, and can remarkably improve the display aperture ratio.
However, in the TFT-LCD panel quality test, the sandy dark spot is a problem that is often found in COA products, and its macroscopic expression is that sporadic dark spots appear at the panel fixing position, and the dark spots appear or disappear with different viewing angles, and present different colors, which is formed because sub-pixels (sub-pixels) of individual colors are not well aligned when the pixels are aligned. The phenomenon of abnormal alignment is mainly caused by the asymmetric design of the ITO (indium tin oxide) pixel electrode and the topographic influence of the color resistance layer. For the COA product, the color resistance layer is designed on the Array substrate side, as shown in fig. 1, in order to make the ITO pixel electrode 110 and the drain electrode (drain)310 electrically connected with each other through the Via hole (Via hole)210, the color resistance layer 400 is dug out at the Via hole 210 to form a color resistance opening (CF open)410, and as shown in fig. 2, the thickness of the color resistance layer 400 is usually about 3um, and the thickness difference reaches 70 times compared with the ITO pixel electrode 110 with the thickness of 0.04um, so that the liquid crystal and the PI are accumulated at the color resistance opening 410, and the problem of poor alignment is more likely to occur in the COA product than in the non-COA product during alignment. Meanwhile, in order to connect the ITO pixel electrode 110 and the drain 310, there is one more ITO pixel electrode 110 at the via hole 210, which results in an asymmetric shape of the ITO pixel electrode 110 structure, and thus an asymmetric voltage is applied to the ITO pixel electrode 110 during alignment, which results in a dark fringe offset from the pixel center.
Disclosure of Invention
The invention provides an array substrate, which can improve poor alignment caused by asymmetrical color resistance openings and pixel electrode design by introducing a novel pixel design, thereby effectively improving the quality of a liquid crystal display panel.
The invention also aims to provide a liquid crystal display panel, and the quality of the liquid crystal display panel is effectively improved by adopting the array substrate.
In order to achieve the above object, the present invention provides an array substrate, including a plurality of pixel units arranged in an array; each pixel unit comprises a substrate, a thin film transistor arranged on the substrate, a color resistance layer arranged on the thin film transistor and a pixel electrode arranged on the color resistance layer, wherein the thin film transistor is provided with a grid electrode, a source electrode and a drain electrode, the color resistance layer is provided with a first color resistance opening and a second color resistance opening, the pixel electrode is connected with the drain electrode in the thin film transistor through the first color resistance opening, and the first color resistance opening and the second color resistance opening are symmetrically distributed relative to the center of the pixel electrode.
In each pixel unit, the pixel electrode is provided with a connecting convex block and a symmetrical convex block, the connecting convex block is contacted with the drain electrode through the first color resistance opening so as to realize the connection of the pixel electrode and the drain electrode, and the connecting convex block and the symmetrical convex block are symmetrically distributed relative to the center of the pixel electrode.
The shape of the pixel electrode is in a centrosymmetric pattern.
The array substrate further comprises a common electrode wire which is located on the same layer as the grid electrode, the drain electrode extends from the upper part of the grid electrode to the upper part of the common electrode wire, the first color resistance opening is correspondingly arranged above the common electrode wire, and the pixel electrode extends to the upper part of the common electrode wire and is connected with the drain electrode through the first color resistance opening.
The second color resistance opening is correspondingly arranged above the grid.
Each pixel unit further comprises a spacer respectively arranged in the first color resistance opening and the second color resistance opening.
The array substrate further comprises a first spacing layer arranged between the thin film transistor and the color resistance layer and a second spacing layer arranged between the color resistance layer and the pixel electrode;
the first spacing layer and the second spacing layer are provided with through holes communicated with the first color resistance openings at the positions corresponding to the first color resistance openings, and the pixel electrodes are connected with the drain electrodes through the first color resistance openings and the through holes. The array substrate further comprises a plurality of gate lines and a plurality of data lines which are arranged in a crossed mode with the gate lines, and the gate lines and the data lines define a plurality of pixel units; the color resistance layer in each pixel unit is a red color resistance layer, a green color resistance layer or a blue color resistance layer.
The invention also provides a liquid crystal display panel which comprises the array substrate, a glass substrate arranged opposite to the array substrate and a liquid crystal layer arranged between the array substrate and the glass substrate.
The invention has the beneficial effects that: the array substrate comprises a plurality of pixel units which are arranged in an array mode, wherein each pixel unit comprises a substrate, a thin film transistor, a color resistance layer and a pixel electrode, the shape of the pixel electrode is a centrosymmetric figure, the pixel electrode is provided with a connecting convex block which is contacted with a drain electrode to realize connection, and also provided with a symmetric convex block which is centrosymmetrically arranged with the connecting convex block, and the color resistance layer is provided with a first color resistance opening and a second color resistance opening which respectively correspond to the connecting convex block and the symmetric convex block, so that the poor alignment of the conventional COA type array substrate caused by the asymmetric design of the color resistance opening and the pixel electrode can be improved, and the quality of a liquid crystal display panel can be effectively improved. The liquid crystal display panel adopts the array substrate, can improve poor alignment caused by asymmetrical design of color resistance openings and pixel electrodes of the prior COA type array substrate, and further can effectively improve the quality of the liquid crystal display panel.
For a better understanding of the nature and technical aspects of the present invention, reference should be made to the following detailed description of the invention, taken in conjunction with the accompanying drawings, which are provided for purposes of illustration and description and are not intended to limit the invention.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
In the drawings, there is shown in the drawings,
FIG. 1 is a schematic top view of a pixel unit in a COA type array substrate;
FIG. 2 is a schematic view of an interlayer structure of the COA type array substrate of FIG. 1 at A-A;
FIG. 3 is a schematic top view of a pixel unit in a first embodiment of an array substrate according to the present invention;
FIG. 4 is a schematic view of an interlayer structure of the array substrate of FIG. 3 at B-B;
FIG. 5 is a schematic top view of a pixel unit in a second embodiment of an array substrate according to the present invention;
fig. 6 is a schematic view of an interlayer structure of the array substrate of fig. 5 at C-C.
Detailed Description
To further illustrate the technical means and effects of the present invention, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Referring to fig. 3 and 4, a first embodiment of the array substrate of the present invention includes a plurality of gate lines (not shown), a plurality of data lines (not shown) crossing the gate lines, and a plurality of pixel units 1 defined by the gate lines and the data lines and arranged in an array manner.
Specifically, the array substrate includes a substrate 10, a first metal layer M1 disposed on the substrate 10, an insulating layer 20, a second metal layer M2, a first spacer layer 50, a color barrier layer 30 disposed on the first spacer layer 50, a second spacer layer 60 disposed on the color barrier layer 30, and a pixel electrode 45 disposed on the second spacer layer 60. Wherein the first metal layer M1, the insulating layer 20 and the second metal layer M2 form the thin film transistor T in combination with the patterning process.
As shown in fig. 4, the first metal layer M1 forms the gate electrode 21 of the thin film transistor, the gate line on the array substrate, and the common electrode line 22 through a patterning process; the second metal layer M2 forms the source and drain electrodes 23 and 24 of the thin film transistor and the data line on the array substrate through the patterning process.
The pixel electrode 45 has a connection protrusion 451 contacting the drain electrode 24 for connection, the color resist layer 30 is provided with a first color resist opening 301 above the drain electrode 24 corresponding to the connection protrusion 451 for connecting the pixel electrode 45 and the drain electrode 24, that is, the connection protrusion 451 contacts the drain electrode 24 through the first color resist opening 301 for connection between the pixel electrode 45 and the drain electrode 24, the pixel electrode 45 is shaped as a central symmetrical figure, the pixel electrode 45 further has a symmetrical protrusion 452 arranged in central symmetry with the connection protrusion 451, and the color resist layer 30 is provided with a second color resist opening 302 at the corresponding symmetrical protrusion 452.
In the array substrate of the invention, the shape of the pixel electrode 45 is a central symmetrical figure, the pixel electrode 45 not only has the connection convex block 451 which is contacted with the drain electrode 24 to realize connection, but also has the symmetrical convex block 452 which is arranged in central symmetry with the connection convex block 451, and the color resistance layer 30 is respectively provided with the first color resistance opening 301 and the second color resistance opening 302 corresponding to the connection convex block 451 and the symmetrical convex block 452, thereby improving the poor alignment caused by the asymmetric design of the color resistance opening and the pixel electrode of the prior COA type array substrate, and further effectively improving the quality of the liquid crystal display panel.
Specifically, in each pixel unit 1, the drain electrode 24 extends from above the gate electrode 21 to above the common electrode line 22, the drain electrode 24 and the common electrode line 22 form a storage capacitor (Cst), the first color resist opening 301 is correspondingly disposed above the common electrode line 22, and the connecting projection block 451 is in contact with the drain electrode 24 above the corresponding common electrode line 22.
Specifically, for every two adjacent rows of pixel units 1, the symmetric protruding blocks 452 of the pixel unit 1 in the previous row extend to the upper side of the gate 21 of the pixel unit 1 in the next row, so that in each pixel unit 1, the second color-resisting opening 302 is correspondingly disposed above the gate 21.
Specifically, the first spacer layer 50 and the second spacer layer 60 are provided with a via 501 penetrating the first color resist opening 301 at a position corresponding to the first color resist opening 301, and the connection projection 451 is in contact with the drain electrode 24 through the first color resist opening 301 and the via 501 so as to connect the pixel electrode 45 with the drain electrode 24; and for the symmetric protruding bumps 452, they are spaced apart from the underlying thin film transistor T at the second color-resist opening 302 by the first spacer layer 50 and the second spacer layer 60.
Specifically, the color resist layer 30 of each pixel unit 1 may be a red color resist layer, a green color resist layer, or a blue color resist layer, and the color resist layers 30 of all the pixel units 1 together form a color filter layer.
Specifically, the material of the pixel electrode 45 is preferably indium tin oxide.
As shown in fig. 5 to 6, the second embodiment of the array substrate of the present invention is different from the first embodiment in that the array substrate further includes a spacer 70 correspondingly disposed above the first color resist opening 301 and the second color resist opening 302, that is, the spacer 70 fills the first color resist opening 301 and the second color resist opening 302 to cover the pixel electrode 45 at the first color resist opening 301 and the second color resist opening 302, and when the array substrate of the present invention is used to manufacture a liquid crystal display panel, the spacer 70 not only plays a role of supporting the upper and lower substrates, but also prevents liquid crystal and alignment material from being accumulated at the first color resist opening 301 and the second color resist opening 302, thereby further improving poor alignment and improving the quality of the liquid crystal display panel.
Based on the array substrate, the invention further provides a liquid crystal display panel, which includes an array substrate, a glass substrate disposed opposite to the array substrate, and a liquid crystal layer disposed between the array substrate and the glass substrate, wherein the array substrate is the same as the first embodiment or the second embodiment of the array substrate, and is not repeated herein.
In summary, the array substrate of the present invention includes a plurality of pixel units arranged in an array manner, each pixel unit includes a substrate, a thin film transistor, a color resistance layer, and a pixel electrode, wherein the pixel electrode is shaped as a central symmetric pattern, the pixel electrode not only has a connection protrusion block contacting with a drain electrode to achieve connection, but also has a symmetric protrusion block arranged in central symmetry with the connection protrusion block, and the color resistance layer is provided with a first color resistance opening and a second color resistance opening corresponding to the connection protrusion block and the symmetric protrusion block, respectively, so as to improve poor alignment caused by asymmetric color resistance opening and pixel electrode design of the existing COA type array substrate, and further effectively improve the quality of the liquid crystal display panel. The liquid crystal display panel adopts the array substrate, can improve poor alignment caused by asymmetrical design of color resistance openings and pixel electrodes of the prior COA type array substrate, and further can effectively improve the quality of the liquid crystal display panel.
As described above, it will be apparent to those skilled in the art that various other changes and modifications can be made based on the technical solution and the technical idea of the present invention, and all such changes and modifications should fall within the protective scope of the appended claims.
Claims (9)
1. An array substrate is characterized by comprising a plurality of pixel units (1) arranged in an array manner; each pixel unit (1) comprises a substrate (10), a thin film transistor (T) arranged on the substrate (10), a color resistance layer (30) arranged on the thin film transistor (T) and a pixel electrode (45) arranged on the color resistance layer (30), wherein the thin film transistor (T) is provided with a grid electrode (21), a source electrode (23) and a drain electrode (24), the color resistance layer (30) is provided with a first color resistance opening (301) and a second color resistance opening (302), the pixel electrode (45) is connected with the drain electrode (24) in the thin film transistor (T) through the first color resistance opening (301), and the first color resistance opening (301) and the second color resistance opening (302) are symmetrically distributed relative to the center of the pixel electrode (45);
in each pixel unit (1), the pixel electrode (45) is provided with a connecting convex block (451) and a symmetrical convex block (452), the connecting convex block (451) is contacted with the drain electrode (24) through the first color resistance opening (301) so as to realize the connection of the pixel electrode (45) and the drain electrode (24), and the connecting convex block (451) and the symmetrical convex block (452) are symmetrically distributed relative to the center of the pixel electrode (45).
2. The array substrate according to claim 1, wherein the pixel electrode (45) has a shape of a central symmetrical pattern.
3. The array substrate of claim 1, further comprising a common electrode line (22) located at the same layer as the gate electrode (21), wherein the drain electrode (24) extends from above the gate electrode (21) to above the common electrode line (22), the first color resist opening (301) is correspondingly located above the common electrode line (22), and the pixel electrode (45) extends to above the common electrode line (22) and is connected to the drain electrode (24) through the first color resist opening (301).
4. The array substrate of claim 3, wherein the second color-resist opening (302) is correspondingly disposed above the gate (21).
5. The array substrate of claim 1, wherein the second color-resist opening (302) is correspondingly disposed above the gate (21).
6. The array substrate of claim 1, wherein each pixel unit (1) further comprises a spacer (70) respectively disposed in the first color-resist opening (301) and the second color-resist opening (302).
7. The array substrate of claim 1, further comprising a first spacer layer (50) disposed between the thin film transistor (T) and the color-resist layer (30) and a second spacer layer (60) disposed between the color-resist layer (30) and the pixel electrode (45);
the first spacing layer (50) and the second spacing layer (60) are provided with through holes (501) which are communicated with the first color resistance openings (301) at positions corresponding to the first color resistance openings (301), and the pixel electrodes (45) are connected with the drain electrodes (24) through the first color resistance openings (301) and the through holes (501).
8. The array substrate of claim 1, further comprising a plurality of gate lines and a plurality of data lines disposed to cross the plurality of gate lines, the plurality of gate lines and the plurality of data lines defining the plurality of pixel cells (1); the color resistance layer (30) in each pixel unit (1) is a red color resistance layer, a green color resistance layer or a blue color resistance layer.
9. A liquid crystal display panel comprising the array substrate according to any one of claims 1 to 8, a glass substrate disposed opposite to the array substrate, and a liquid crystal layer disposed between the array substrate and the glass substrate.
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| CN201710657999.0A CN107329311B (en) | 2017-08-03 | 2017-08-03 | Array substrate and liquid crystal display panel |
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| CN201710657999.0A CN107329311B (en) | 2017-08-03 | 2017-08-03 | Array substrate and liquid crystal display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108363249B (en) * | 2018-03-14 | 2023-06-13 | 京东方科技集团股份有限公司 | Display panel, driving method thereof and display device |
| CN108732836B (en) * | 2018-05-29 | 2019-07-02 | 深圳市华星光电半导体显示技术有限公司 | COA array substrate, preparation method and display device |
| CN109270751B (en) * | 2018-10-23 | 2020-10-30 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN109613771B (en) * | 2018-12-29 | 2021-07-23 | 苏州华星光电技术有限公司 | Method for repairing dark spots of liquid crystal panel |
| CN110161765B (en) * | 2019-06-12 | 2022-01-07 | 惠科股份有限公司 | Array substrate, manufacturing method of array substrate and display panel |
| CN113156715A (en) * | 2020-01-23 | 2021-07-23 | 京东方科技集团股份有限公司 | Display substrate and display panel |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1627160A (en) * | 2003-12-11 | 2005-06-15 | Lg.菲利浦Lcd株式会社 | Array substrate for in-plane switching mode liquid crystal display device and method of fabricating the same |
| CN102236218A (en) * | 2011-06-07 | 2011-11-09 | 深圳市华星光电技术有限公司 | Pixel electrode structure |
| KR20120003770A (en) * | 2010-07-05 | 2012-01-11 | 엘지디스플레이 주식회사 | Thin film transistor array substrate and method for fabricating the same |
| CN103018988A (en) * | 2012-12-06 | 2013-04-03 | 京东方科技集团股份有限公司 | TFT-LCD (thin film transistor-liquid crystal display) array substrate, manufacturing method thereof and display device |
| TW201500822A (en) * | 2013-06-28 | 2015-01-01 | Innolux Corp | Pixel array substrate and liquid crystal display |
| CN104777667A (en) * | 2015-04-30 | 2015-07-15 | 武汉华星光电技术有限公司 | Display panel and display device |
| CN106842746A (en) * | 2016-12-28 | 2017-06-13 | 友达光电股份有限公司 | Active element array substrate and liquid crystal panel |
-
2017
- 2017-08-03 CN CN201710657999.0A patent/CN107329311B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1627160A (en) * | 2003-12-11 | 2005-06-15 | Lg.菲利浦Lcd株式会社 | Array substrate for in-plane switching mode liquid crystal display device and method of fabricating the same |
| KR20120003770A (en) * | 2010-07-05 | 2012-01-11 | 엘지디스플레이 주식회사 | Thin film transistor array substrate and method for fabricating the same |
| CN102236218A (en) * | 2011-06-07 | 2011-11-09 | 深圳市华星光电技术有限公司 | Pixel electrode structure |
| CN103018988A (en) * | 2012-12-06 | 2013-04-03 | 京东方科技集团股份有限公司 | TFT-LCD (thin film transistor-liquid crystal display) array substrate, manufacturing method thereof and display device |
| TW201500822A (en) * | 2013-06-28 | 2015-01-01 | Innolux Corp | Pixel array substrate and liquid crystal display |
| CN104777667A (en) * | 2015-04-30 | 2015-07-15 | 武汉华星光电技术有限公司 | Display panel and display device |
| CN106842746A (en) * | 2016-12-28 | 2017-06-13 | 友达光电股份有限公司 | Active element array substrate and liquid crystal panel |
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