CN107305254A - A kind of method and device for realizing bit synchronization - Google Patents
A kind of method and device for realizing bit synchronization Download PDFInfo
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- CN107305254A CN107305254A CN201610252488.6A CN201610252488A CN107305254A CN 107305254 A CN107305254 A CN 107305254A CN 201610252488 A CN201610252488 A CN 201610252488A CN 107305254 A CN107305254 A CN 107305254A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S19/00—Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
- G01S19/01—Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
- G01S19/13—Receivers
- G01S19/35—Constructional details or hardware or software details of the signal processing chain
- G01S19/37—Hardware or software details of the signal processing chain
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Abstract
A kind of method and device for realizing bit synchronization, including：The segment data that any 20 adjacent data are analyzed as bit synchronization is selected from the data flow for moving into shift register；Related operation is carried out to 20 data in the segment data that marks off；The result of related operation is carried out after absolute value or square processing, the correlation result of absolute value or square processing to same candidate position is added up, and obtains each corresponding snr gain of position candidate；The corresponding snr gain maximum of position candidate and the difference of second largest value are calculated, the difference for calculating acquisition is compared with predetermined threshold value, the processing of bit synchronization is determined.Present invention method, carries out related operation by the segment data to division, obtains the laggard line position synchronization process of snr gain, reduce the bit synchronization time, improve the operating efficiency of bit synchronization.
Description
Technical field
Present document relates to but be not limited to location technology, espespecially a kind of method and device for realizing bit synchronization.
Background technology
Global positioning system (GPS) receiver will then enter after capture, tracking reception signal is completed
Capable is exactly bit synchronization, frame synchronization and demodulating and decoding process, so as to obtain signal hair from signal there is received
Penetrate time and navigation message, and finally realize that GPS navigation is positioned.
Bit synchronization is called bit synchronous, and it is that receiving channel determines that current Received Signal exists according to certain algorithm
The position of some data bit, or perhaps determine to receive data bit start edge position in signal.
For the navigation message of 50 bps (bps) being modulated in corresponding carriers, each navigation message correspondence
20 thick capture (C/A) code cycles, thus result in the uncertainty on bit reversal border.Obtain
The position on text bit reversal border is modulated, that is, realizes bit synchronous, is to realize that demodulation text, measurement are pseudo-
Away from the basis that highly sensitive tracking is realized using coherent accumulation.So receiver must estimate the bit and turn over
Turn the position on border, realize bit synchronization.
Common bit-synchronization algorithm has histogram method, maximum likelihood (ML) Algorithm of Bit Synchronization etc.；Wherein,
Histogram method is a kind of quite basic bit-synchronization algorithm, the adjacent product that this method is exported to carrier wave ring
The sign change of score value is counted, and has 20 position candidates, through statistics after a while, if
Sign change number of times in some position is significantly greater than other positions, then it is assumed that the position is bit boundaries.
The implementation example of histogram method is as shown in figure 1,1 millisecond (ms) first exporting carrier wave ring wide number
It is numbered according to bit with 1~20, wherein the first data bit that numbering is 1 is arbitrarily selected, so
Count the saltus step situation of data between two neighboring millisecond one by one afterwards：If i-th of data is to i+1 number
According to there occurs saltus step, then add 1 corresponding to the counter of i+1 Nogata, otherwise counter keeps constant.
So, after 20ms data have been handled, histogram method checks whether statistical result is following two
One of the situation of kind：The Counter Value for having a Nogata reaches thresholding N1；As shown in figure 1, the 4th Nogata
Counter Value it is maximum, i.e., in the data flow of a period of time, by according to 20ms being the cycle to data flow
After being counted, from the 3rd millisecond to the bit transition times of the 4th millisecond at most, and the counting
The value of device has reached threshold value N again1It is secondary, it is believed that bit synchronization is realized, determines that bit edge deviation is
3ms.So preceding 4th to the 20th millisecond belongs to a bit plus the 1st to the 3rd millisecond, and
4 to the 20th milliseconds add followed by the 1st to the 3rd millisecond belong to next bit, and remaining is counted
Can be by that analogy according to bit segmentation；The Counter Value of at least two Nogatas meets or exceeds threshold value N2：
Such case shows that signal intensity is too weak, or the data bit saltus step that this period navigation message is included
Very little, bit synchronization fails, by the counter O reset of all Nogatas, to the statistics of data jump since newly.
If both the above situation does not all occur, then receiver continues to carry out data stream to check and count one by one.
If the losing lock to signal occurs before not yet bit synchronization is realized in carrier wave ring, above statistic processes is equally needed
Reset and restart.The shortcoming of histogram method is exactly that its performance can become increasingly as signal intensity dies down
Difference, and, it is necessary to which the time of tens seconds could obtain reliable synchronization in the case of relatively low carrier-to-noise ratio.This
The individual time is oversize, the scope that can be born considerably beyond usual receiver.
In order to improve net synchronization capability of the receiver at low carrier-to-noise ratio (C/N0), maximum likelihood position is occurred in that
Synchronized algorithm, this method accumulates continuous 20 data after each position candidate, asks envelope to obtain
To after corresponding bit energy, then bit energy carried out the noncoherent accumulation of a period of time, so correspondence
The position of bit energy maximum position, as bit boundaries in 20 positions.This method passes through increase
Noncoherent accumulation number of times improves signal to noise ratio, available under Low SNR.Specific algorithm is described as follows：
Assuming that the signal that is received at k-th of epoch of receiver closed through local C/A code-phases after model
For
rk=Ack+nk (1)
Wherein ckTo modulate 20 repetitions of navigation message, such as ck+δ=ck+1+δ=...=ck+19+δ=bk, each
ckMaintain a C/A code cycle；δ is the position of bit boundaries, δ ∈ { 0,1 ... 19 }；bkFor modulation
Navigation message, bk∈{±1}；A is signal power；nkIt is that 0, variance is for averageAdditive white gaussian
Noise, a likelihood function for containing N number of reception signal phasor can be by each reception signal likelihood letter
The product of number is represented：
Want to find bit start edge position, formula (2) is needed in parameter δ, A, maximized under b；Formula (2)
Middle Section 1 is unrelated with other specification, can ignore；Two can regard 2 as afterwards | A | f (r；δ；b)+N|A|2,
The maximization of formula (2) is realized, as long as by f (r；δ；B) maximize, wherein
In formula,To round downwards, K=N/20+1, l represents to receive the millisecond number of signal；Work as bkWithSymbol it is equal when, formula (3) reaches maximum.According to xsign (x)=| x |, formula (3)
Maximization can be equivalent to the maximization of formula (4),
Then, maximum likelihood bit-synchronization algorithm can be attributed to the maximum likelihood bit synchronization calculating formula of formula (5),
Relative to histogramming algorithm, maximum likelihood bit-synchronization algorithm can 20 decibels-hertz (dB-Hz) with
On signal intensity under obtain good bit synchronization effect, and it only needs to the time of several seconds.But most
Maximum-likelihood bit-synchronization algorithm will generally fix a larger noncoherent accumulation number of times, to ensure low signal-to-noise ratio
Under net synchronization capability, for high s/n ratio situation, more noncoherent accumulation is unnecessary, and unnecessary
Noncoherent accumulation considerably increases average lock in time, influences the operating efficiency of bit synchronization.
The content of the invention
The following is the general introduction of the theme to being described in detail herein.This general introduction is not to limit claim
Protection domain.
The embodiment of the present invention provides a kind of method and device for realizing bit synchronization, can reduce bit synchronization duration,
Improve bit synchronization efficiency.
The embodiments of the invention provide a kind of method for realizing bit synchronization, including：
Select any one group of adjacent 20 data same as position from the data flow for moving into shift register
Walk the segment data of analysis；
Related operation is carried out to the segment data marked off；
The result of related operation is carried out after absolute value or square processing, to same candidate position in segment data
The absolute value or the correlation result of square processing put are added up, and obtain each position candidate corresponding
Snr gain；
Calculate snr gain maximum and snr gain in the corresponding snr gain of all position candidates
The difference of second largest value, is carried out at the determination of bit synchronization according to the comparison for calculating the difference obtained and predetermined threshold value
Reason.
Optionally, segment data is：
Rk=(r20(k-1)+1..., r20k), K is data bit length；
Wherein, rk=Ack+nk；
The ckTo modulate 20 repetitions of navigation message, each ckMaintain a thick capture C/A codes week
Phase；The A is signal power；nkIt is 0 for average, variance isPower white Gaussian noise.
Optionally, carrying out related operation includes：
With the fixed data bit of 20 different position candidates in the segment data of division and in advance
The probability matrix of setting carries out related operation；
The probability matrix is used to represent that the segment data demodulates the data come and there is the possible position of saltus step
Put.
Optionally, default probability matrix includes：
With
It should be noted that segment data RkWhen being determined with default probability matrix T, the embodiment of the present invention
In method, carrying out related operation includes：Carry out RkT computing.
Optionally, carrying out the determination processing of bit synchronization includes：
If calculating the difference obtained is more than the predetermined threshold value, by the maximum of the snr gain
Corresponding position is defined as bit start edge, completes bit synchronization；
If calculating the difference obtained is less than or equal to the predetermined threshold value, and carries out the related operation
As a result when the number of times of accumulation calculating is less than default number of times threshold value, posted again from the immigration displacement
The segment data that 20 adjacent datas are analyzed as the bit synchronization is marked off in the data flow of storage, according to
The segment data repartitioned proceeds the processing of bit synchronization；
If the difference is less than or equal to the predetermined threshold value, and carries out the correlation result accumulation calculating
Number of times be more than or equal to the default number of times threshold value, determine bit synchronization fail.
On the other hand, the embodiment of the present invention also provides a kind of device for realizing bit synchronization, including：Divide single
Member, related operation unit, summing elements and determining unit；Wherein,
Division unit is used for, and any one group adjacent 20 is selected from the data flow for moving into shift register
The segment data that individual data are analyzed as bit synchronization；
Related operation unit is used for, and related operation is carried out to the segment data marked off；
Summing elements are used for, and the result of related operation are carried out after absolute value or square processing, to segments
Added up, obtained each according to the absolute value of middle same candidate position or the correlation result of square processing
The corresponding snr gain of position candidate；
Determining unit is used for, and calculates in the corresponding snr gain of all position candidates, snr gain is most
The difference of big value and snr gain second largest value, according to relatively entering for the difference and predetermined threshold value for calculating acquisition
The synchronous determination processing of line position.
Optionally, the segment data is：
Rk=(r20(k-1)+1..., r20k), K is data bit length；
Wherein, rk=Ack+nk；
The ckTo modulate 20 repetitions of navigation message, each ckMaintain a thick capture C/A codes week
Phase；The A is signal power；nkIt is 0 for average, variance isPower white Gaussian noise.
Optionally, related operation unit specifically for,
With the fixed data bit of 20 different position candidates in the segment data of division and in advance
The probability matrix of setting carries out related operation；
The probability matrix is used to represent that the segment data demodulates the data come and there is the possible position of saltus step
Put.
Optionally, default probability matrix includes：
With
Optionally, determining unit specifically for,
Calculate snr gain maximum and snr gain in the corresponding snr gain of all position candidates
The difference of second largest value；
If calculating the difference obtained is more than the predetermined threshold value, by the maximum of the snr gain
Corresponding position is defined as bit start edge, completes bit synchronization；
If calculating the difference obtained is less than or equal to the predetermined threshold value, and carries out the related operation
As a result when the number of times of accumulation calculating is less than default number of times threshold value, posted again from the immigration displacement
The segment data that 20 adjacent datas are analyzed as the bit synchronization is marked off in the data flow of storage, according to
The segment data repartitioned proceeds the processing of bit synchronization；
If the difference is less than or equal to the predetermined threshold value, and carries out the correlation result accumulation calculating
Number of times be more than or equal to the default number of times threshold value, determine bit synchronization fail.
Compared with correlation technique, technical scheme includes：From the data flow for moving into shift register
The segment data for selecting any 20 adjacent data to be analyzed as bit synchronization；To the segment data marked off
In 20 data carry out related operation；The result of related operation is carried out after absolute value or square processing,
The correlation result of absolute value or square processing to same candidate position is added up, and obtains each wait
Bit selecting puts corresponding snr gain；Calculate the corresponding snr gain maximum of position candidate and second largest value
Difference, by calculate obtain difference be compared with predetermined threshold value, be determined the processing of bit synchronization.
Present invention method, carries out related operation by the segment data to division, obtains snr gain
Laggard line position synchronization process, reduces the bit synchronization time, improves the operating efficiency of bit synchronization.
After reading and understanding accompanying drawing and being described in detail, it can be appreciated that other aspects.
Brief description of the drawings
Fig. 1 is the analysis schematic diagram of the synchronous histogram method of correlation technique middle position；
Fig. 2 is the flow chart for the method that the embodiment of the present invention realizes bit synchronization；
Fig. 3 is the structured flowchart for the device that the embodiment of the present invention realizes bit synchronization.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, below in conjunction with accompanying drawing
Embodiments of the invention are described in detail.It should be noted that in the case where not conflicting, this Shen
Please in embodiment and the feature in embodiment can mutually be combined.
Fig. 2 is the flow chart for the method that the embodiment of the present invention realizes bit synchronization, as shown in Fig. 2 including：
Step 200, from move into shift register data flow in select any one group of adjacent 20 data
The segment data analyzed as bit synchronization；
, can be with when the selection for carrying out segment data is divided it should be noted that present invention method
Determine that arbitrary original position is chosen from the data flow for moving into shift register, as long as it is adjacent
20 data, simplify the implementation process of bit synchronization of embodiment of the present invention processing.
Optionally, segment data is：
Rk=(r20(k-1)+1..., r20k), K is data bit length；
Wherein, rk=Ack+nk；
ckTo modulate 20 repetitions of navigation message, each ckMaintain a thick capture C/A code cycle；A
For signal power；nkIt is 0 for average, variance isPower white Gaussian noise.
It should be noted that r herekIt is identical with the processing mode of bit synchronization histogram method.RkRepresent 20
Adjacent data.
Step 201, the segment data progress related operation to marking off；
Optionally, carrying out related operation includes：
With the fixed data bit of 20 different position candidates in the segment data of division with pre-setting
Probability matrix carry out related operation；
Probability matrix is used to represent that segment data demodulates the data come and there is saltus step possible position.
Optionally, default probability matrix includes：
With
It should be noted that segment data RkWhen being determined with default probability matrix T, the embodiment of the present invention
In method, carrying out related operation includes：Carry out RkT computing.
The likelihood function analyzed for bit synchronization can be converted to following formula：
In addition, the deformation type for the matrix or matrix for possessing above-mentioned probability matrix identical function can also be applied to
The embodiment of the present invention.
Step 202, the result of related operation carried out after absolute value or square processing, in segment data
The absolute value of same candidate position or the correlation result of square processing are added up, and obtain each candidate
The corresponding snr gain in position；
It should be noted that in addition to absolute value or square processing, biquadratic etc. can be by related operation knot
Represent that positive and negative symbol is removed in fruit, enter to compare the processing mode of the Digital size after sign symbol.
Here cumulative process represents noncoherent accumulation, and purpose is exactly to obtain certain snr gain.With
The increase of accumulative frequency, gain also can correspondingly increase.
In step 203, the corresponding snr gain of all position candidates of calculating, snr gain maximum
With the difference of snr gain second largest value, line position is relatively entered according to the difference and predetermined threshold value for calculating acquisition
Synchronous determination processing.
Optionally, in present invention method, carrying out the determination processing of bit synchronization includes：
If calculating the difference obtained is more than predetermined threshold value, and the corresponding position of the maximum of snr gain is true
It is set to bit start edge, completes bit synchronization；
If calculating the difference obtained is less than or equal to predetermined threshold value, and carries out the cumulative meter of correlation result
When the number of times of calculation is less than default number of times threshold value, drawn again from the data flow for moving into shift register
Separate the segment data that 20 adjacent datas are analyzed as bit synchronization, according to the segment data repartitioned after
The continuous processing for carrying out bit synchronization；
If difference be less than or equal to predetermined threshold value, and carry out correlation result accumulation calculating number of times be more than or
Equal to default number of times threshold value, determine that bit synchronization fails.
It should be noted that according to inventor's empirical analysis, number of times threshold value is typically taken less than or equal to 200
Numerical value.In addition, predetermined threshold value can be determined by way of those skilled in the art are using emulation,
Belong to the conventional techniques of those skilled in the art, to different predetermined threshold values, correlation result
The number of times of accumulation calculating there may be difference.If predetermined threshold value is smaller, in requisition for cumulative time
Number will lack；Conversely, predetermined threshold value is than larger, then in requisition for accumulative frequency will be more.
On the other hand, the difference between the maximum and second largest value of noncoherent accumulation value is found through a large amount of emulation
Can be as the parameter in a bit synchronization processing procedure, and the difference is with carrier-to-noise ratio and incoherent
The approximate dull increase of accumulative frequency, therefore the restriction of difference progress predetermined threshold value can be estimated well
Noncoherent accumulation number of times needed for going out under certain carrier-to-noise ratio, and then realize that adaptive bit is synchronous.
Present invention method, can either in high s/n ratio still in the case of low signal-to-noise ratio
Good bit synchronization performance, and its averaged power spectrum time are obtained, during the averaged power spectrum of particularly strong signal
Between be greatly lowered, compromised in bit synchronization success rate and on lock in time.
Present invention method, carries out related operation by the segment data to division, obtains signal to noise ratio
The laggard line position synchronization process of gain, can be adaptively adjusted the number of times of noncoherent accumulation, i.e., in relatively low letter
Make an uproar and more multiple noncoherent accumulation is used than in the case of, and only needed less time in the case of relative high s/n ratio
It is incoherent accumulative, so as to reduce the bit synchronization time, improve the operating efficiency of bit synchronization.
Fig. 3 is the structured flowchart for the device that the embodiment of the present invention realizes bit synchronization, as shown in figure 3, including：
Division unit, related operation unit, summing elements and determining unit；Wherein,
Division unit is used for, and any one group adjacent 20 is selected from the data flow for moving into shift register
The segment data that individual data are analyzed as bit synchronization；
Optionally, segment data is：
Rk=(r20(k-1)+1..., r20k), K is data bit length；
Wherein, rk=Ack+nk；
ckTo modulate 20 repetitions of navigation message, each ckMaintain a thick capture C/A code cycle；A
For signal power；nkIt is 0 for average, variance isPower white Gaussian noise.
Related operation unit is used for, and related operation is carried out to the segment data marked off；
Optionally, related operation unit specifically for,
With the fixed data bit of 20 different position candidates in the segment data of division with pre-setting
Probability matrix carry out related operation；
Probability matrix is used to represent that segment data demodulates the data come and there is saltus step possible position.
Optionally, default probability matrix includes：
With
Summing elements are used for, and the result of related operation are carried out after absolute value or square processing, to segments
Added up, obtained each according to the absolute value of middle same candidate position or the correlation result of square processing
The corresponding snr gain of position candidate；
Determining unit is used for, and calculates in the corresponding snr gain of all position candidates, snr gain is most
The difference of big value and snr gain second largest value, according to relatively entering for the difference and predetermined threshold value for calculating acquisition
The synchronous determination processing of line position.
Optionally, determining unit specifically for,
Calculate snr gain maximum and snr gain in the corresponding snr gain of all position candidates
The difference of second largest value；
If calculating the difference obtained is more than predetermined threshold value, and the corresponding position of the maximum of snr gain is true
It is set to bit start edge, completes bit synchronization；
If calculating the difference obtained is less than or equal to predetermined threshold value, and carries out the cumulative meter of correlation result
When the number of times of calculation is less than default number of times threshold value, drawn again from the data flow for moving into shift register
Separate the segment data that 20 adjacent datas are analyzed as bit synchronization, according to the segment data repartitioned after
The continuous processing for carrying out bit synchronization；
If difference be less than or equal to predetermined threshold value, and carry out correlation result accumulation calculating number of times be more than or
Equal to default number of times threshold value, determine that bit synchronization fails.
One of ordinary skill in the art will appreciate that all or part of step in the above method can pass through program
To instruct related hardware (such as processor) to complete, described program can be stored in computer-readable storage
In medium, such as read-only storage, disk or CD.Alternatively, all or part of above-described embodiment
Step can also use one or more integrated circuits to realize.Correspondingly, it is each in above-described embodiment
Module/unit can be realized in the form of hardware, for example, its corresponding function is realized by integrated circuit,
It can also be realized, for example, be stored in by computing device in memory in the form of software function module
Program/instruction realize its corresponding function.The present invention is not restricted to the hardware and software of any particular form
Combination.”.
Although disclosed herein embodiment as above, described content is only to readily appreciate the present invention
And the embodiment used, it is not limited to the present invention.Technology people in any art of the present invention
Member, do not depart from disclosed herein spirit and scope on the premise of, can be in the form of implementation and thin
Any modification and change, but the scope of patent protection of the present invention are carried out on section, still must be with appended right
The scope that claim is defined is defined.
Claims (10)
1. a kind of method for realizing bit synchronization, it is characterised in that including：
Select any one group of adjacent 20 data same as position from the data flow for moving into shift register
Walk the segment data of analysis；
Related operation is carried out to the segment data marked off；
The result of related operation is carried out after absolute value or square processing, to same candidate position in segment data
The absolute value or the correlation result of square processing put are added up, and obtain each position candidate corresponding
Snr gain；
Calculate snr gain maximum and snr gain in the corresponding snr gain of all position candidates
The difference of second largest value, is carried out at the determination of bit synchronization according to the comparison for calculating the difference obtained and predetermined threshold value
Reason.
2. according to the method described in claim 1, it is characterised in that the segment data is：
Rk=(r20(k-1)+1..., r20k), K is data bit length；
Wherein, rk=Ack+nk；
The ckTo modulate 20 repetitions of navigation message, each ckMaintain a thick capture C/A codes week
Phase；The A is signal power；nkIt is 0 for average, variance isAdditive white Gaussian noise.
3. according to the method described in claim 1, it is characterised in that the progress related operation includes：
With the fixed data bit of 20 different position candidates in the segment data of division and in advance
The probability matrix of setting carries out related operation；
The probability matrix is used to represent that the segment data demodulates the data come and there is the possible position of saltus step
Put.
4. method according to claim 3, it is characterised in that the default probability matrix includes：
With
5. the method according to any one of Claims 1 to 4, it is characterised in that it is described enter line position it is same
The determination processing of step includes：
If calculating the difference obtained is more than the predetermined threshold value, by the maximum of the snr gain
Corresponding position is defined as bit start edge, completes bit synchronization；
If calculating the difference obtained is less than or equal to the predetermined threshold value, and carries out the related operation
As a result when the number of times of accumulation calculating is less than default number of times threshold value, posted again from the immigration displacement
The segment data that 20 adjacent datas are analyzed as the bit synchronization is marked off in the data flow of storage, according to
The segment data repartitioned proceeds the processing of bit synchronization；
If the difference is less than or equal to the predetermined threshold value, and carries out the correlation result accumulation calculating
Number of times be more than or equal to the default number of times threshold value, determine bit synchronization fail.
6. a kind of device for realizing bit synchronization, it is characterised in that including：Division unit, related operation list
Member, summing elements and determining unit；Wherein,
Division unit is used for, and any one group adjacent 20 is selected from the data flow for moving into shift register
The segment data that individual data are analyzed as bit synchronization；
Related operation unit is used for, and related operation is carried out to the segment data marked off；
Summing elements are used for, and the result of related operation are carried out after absolute value or square processing, to segments
Added up, obtained each according to the absolute value of middle same candidate position or the correlation result of square processing
The corresponding snr gain of position candidate；
Determining unit is used for, and calculates in the corresponding snr gain of all position candidates, snr gain is most
The difference of big value and snr gain second largest value, according to relatively entering for the difference and predetermined threshold value for calculating acquisition
The synchronous determination processing of line position.
7. device according to claim 6, it is characterised in that the segment data is：
Rk=(r20(k-1)+1..., r20k), K is data bit length；
Wherein, rk=Ack+nk；
The ckTo modulate 20 repetitions of navigation message, each ckMaintain a thick capture C/A codes week
Phase；The A is signal power；nkIt is 0 for average, variance isAdditive white Gaussian noise.
8. device according to claim 6, it is characterised in that related operation unit specifically for,
With the fixed data bit of 20 different position candidates in the segment data of division and in advance
The probability matrix of setting carries out related operation；
The probability matrix is used to represent that the segment data demodulates the data come and there is the possible position of saltus step
Put.
9. device according to claim 8, it is characterised in that the default probability matrix includes：
With
10. the device according to any one of claim 6~9, it is characterised in that determining unit is specific
For,
Calculate snr gain maximum and snr gain in the corresponding snr gain of all position candidates
The difference of second largest value；
If calculating the difference obtained is more than the predetermined threshold value, by the maximum of the snr gain
Corresponding position is defined as bit start edge, completes bit synchronization；
If calculating the difference obtained is less than or equal to the predetermined threshold value, and carries out the related operation
As a result when the number of times of accumulation calculating is less than default number of times threshold value, posted again from the immigration displacement
The segment data that 20 adjacent datas are analyzed as the bit synchronization is marked off in the data flow of storage, according to
The segment data repartitioned proceeds the processing of bit synchronization；
If the difference is less than or equal to the predetermined threshold value, and carries out the correlation result accumulation calculating
Number of times be more than or equal to the default number of times threshold value, determine bit synchronization fail.
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| CN107305254B (en) | 2020-02-04 |
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