CN107294405A - System controller and method for regulation power supply converter - Google Patents

System controller and method for regulation power supply converter Download PDF

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Publication number
CN107294405A
CN107294405A CN201710534527.6A CN201710534527A CN107294405A CN 107294405 A CN107294405 A CN 107294405A CN 201710534527 A CN201710534527 A CN 201710534527A CN 107294405 A CN107294405 A CN 107294405A
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China
Prior art keywords
input signal
threshold
predetermined lasting
lasting time
signal
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CN201710534527.6A
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Chinese (zh)
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CN107294405B (en
Inventor
曹亚明
罗强
林元
方烈义
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On Bright Electronics Shanghai Co Ltd
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On Bright Electronics Shanghai Co Ltd
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Priority to CN201710534527.6A priority Critical patent/CN107294405B/en
Priority to US15/665,264 priority patent/US10622902B2/en
Priority to US15/719,283 priority patent/US10622903B2/en
Publication of CN107294405A publication Critical patent/CN107294405A/en
Priority to TW106140199A priority patent/TWI665860B/en
Application granted granted Critical
Publication of CN107294405B publication Critical patent/CN107294405B/en
Priority to US16/786,372 priority patent/US11764684B2/en
Priority to US16/787,869 priority patent/US11581815B2/en
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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0048Circuits or arrangements for reducing losses
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Disclose the system controller and method for regulation power supply converter.For example, the system controller includes the first controller terminal and second controller terminal.The system controller is configured as at the first controller terminal receiving input signal, and be at least partially based on input signal drive signal is generated at second controller terminal, to turn on and off transistor so as to influenceing the electric current associated with the secondary windings of supply convertor.In addition, the system controller is additionally configured to determine whether input signal is remained above first threshold within the first period equal or longer than the first predetermined lasting time.

Description

System controller and method for regulation power supply converter
Technical field
The present invention relates to integrated circuit.More specifically, the invention provides utilize output detection and synchronous rectification scheme System and method.Only by example, the present invention is applied to power converting system.It will be appreciated that the present invention has more Wide application.
Background technology
Fig. 1 is the simplification figure for showing traditional flyback power supply transformation system.The power converting system 100 includes:It is primary Winding 110, secondary windings 112, power switch 120, current-sense resistor 122, commutation diode 124, capacitor 126, every From feedback component 128 and controller 102.Controller 102 includes:Under-voltage locking component 104, pulse width modulation generator 106th, gate drivers 108, lead-edge-blanking (LEB) component 116 and overcurrent protection (OCP) component 114.For example, power switch 120 be bipolar transistor.In another example, power switch 120 is field-effect transistor.
Power converting system 100 realizes the transformer including armature winding 110 and secondary windings 112, so that primary side On ac input voltage 190 and primary side on output voltage 192 be isolated.Isolation feedback component 128 is handled on output electricity The information of pressure 192 simultaneously generates feedback signal 136.Controller 102 receives feedback signal 136 and generates gate drive signal (Gate) 130, to turn on and off switch 120 so as to adjust output voltage 192.For example, isolation feedback component 128 includes:Error is amplified Device, compensation network and photo-coupler.
Although flyback power supply transformation system 100 can be used for output voltage regulation, in the additional of not high cost In the case of circuit, the output current control that power converting system 100 can not often have been obtained.In addition, needed for primary side Output current sense resistor typically reduce the efficiency of power converting system 100.
Fig. 2 (A) is the simplification figure for showing another traditional flyback power supply transformation system.The power converting system 200 is wrapped Include:System controller 202, armature winding 210, secondary windings 212, assists winding 214, power switch 220, current sensing resistor Device 230, two commutation diodes 260 and 262, two capacitors 264 and 266 and two resistors 268 and 270.For example, Power switch 220 is bipolar transistor.In another example, power switch 220 is MOS transistor.
Information on output voltage 250 can be extracted to adjust output voltage 250 by assists winding 214.Work as power During the closure of switch 220 (for example, connection), energy is stored in the transformer including armature winding 210 and secondary windings 212. Then, when power switch 220 disconnects (for example, shut-off), the energy of storage is released to primary side, and assists winding 214 Voltage mapping primary side on output voltage.System controller 202 receives the primary current for indicating to flow through armature winding 210 The feedback signal 274 of 276 current sensing signal 272 and demagnetization process on primary side.For example, the switch week of switch 220 Phase includes the turn-on time section of the closure of switch 220 (for example, connection) and switch 220 disconnects the turn-off time section of (for example, shut-off).
Fig. 2 (B) is simplified traditional sequential of the flyback power supply transformation system 200 operated with interrupted conduction mode (DCM) Figure.Waveform 292 is denoted as the voltage 254 of the assists winding 214 of the function of time, and waveform 294 is denoted as the function of time Flow through the second electric current 278 of secondary windings 212.
For example, as shown in Fig. 2 (B), the switch periods T of switch 220sStart from moment t0, end at moment t3;During connection Between section TonStart from moment t0, end at moment t1;Demagnetize period TdemagStart from moment t1, end at moment t2;Turn-off time Section ToffStart from moment t1, end at moment t3.In another example, t0≤t1≤t2≤t3.In DCM, turn-off time section ToffIt is significantly longer than demagnetization period Tdemag
In demagnetization period TdemagPeriod, switch 220 is remained open, and primary current 276 is maintained at low value (for example, close Zero).Secondary current 278 is from value 296 (for example, in t1Place) decline, as shown in waveform 294.Demagnetization process has in secondary current 278 T at the time of having low value 298 (for example, close to zero)2Terminate.Secondary current 278 is maintained at value 298 in the remainder of switch periods Place.Next switch periods are after demagnetization process is completed for a period of time (for example, in t3Place) just start.
As shown in Fig. 1 and Fig. 2 (A), each power conversion system in power converting system 100 and power converting system 200 Unite in primary side and to carry out rectification using commutation diode (for example, diode 260 in diode 124 and Fig. 2 in Fig. 1).Rectification The forward voltage of diode is generally in the range of 0.3V-0.8V.The forward voltage frequently results in significant power in operation Loss, so as to cause the poorly efficient of power converting system.For example, when power converting system has 5V/1A output level, having The commutation diode of 0.3V-0.4V forward voltage causes about 0.3W-0.4W power attenuation under fully loaded (for example, 1A). The reduction of system effectiveness is about 4%-6%.
In addition, in order that power converting system 200 obtains relatively low standby power loss, switching frequency often keeps relatively low To reduce the switching loss under the conditions of no-load or underloading.But, when power converting system 200 is changed into completely from no-load/underloading condition During carrier strip part, output voltage 250 may decline suddenly, and the voltage declines and may not at once examined by system controller 202 Measure, because system controller 202 generally only can detect output voltage during the demagnetization of each switch periods.Therefore, The dynamic property of power converting system 200 is often unsatisfactory at the low switching frequency under the conditions of no-load/underloading.Example Such as, power converting system 200 has 5V/1A output level, and output capacitor 264 has 1000 μ F electric capacity.In nothing Under the conditions of load/underloading, switching frequency is 1kHz, corresponding to 1ms switch periods.If output loading is from no-load/underloading condition (for example, 0A) is changed into full load conditions (for example, 1A), then output voltage 250 declines 1V (for example, from 5V to 4V), and this is answered some It is typically unacceptable in.
Fig. 3 is the simplification figure for showing the conventional power source transformation system with secondary synchronous rectifier (SR).The power conversion System 2300 (for example, flyback power supply converter) includes:Primary side pulse width modulation (PWM) controller 2302, it is primary around It is group 2304, secondary windings 2306, secondary side synchronous rectifier device (SR) controller 2308, transistor 2310 (for example, MOSFET), defeated Go out capacity load 2312, output resistance load 2314 and power switch 2330 (for example, transistor).Secondary side synchronous Rectifier (SR) controller 2308 includes terminal 2390,2392,2394 and 2396.
As shown in Figure 3, terminal 2390 receives the terminal 2364 for indicating transistor 2310 (for example, the leakage of transistor 2310 Extreme son) place voltage voltage signal 2362, and terminal 2392 believes to transistor 2310 (for example, MOSFET) output driving Numbers 2366.In addition, terminal 2394 receives the voltage signal 2316 for indicating output voltage, wherein, output voltage is by output capacitive Load 2312 and output resistance load 2314 are received.In addition, terminal 2396 is with being biased to primary side.
Primary side pulse width modulation (PWM) controller 2302 generates drive signal 2332 (for example, Vg1) and will driving Signal 2332 is output to power switch 2330 (for example, transistor), and the generation of secondary side synchronous rectifier device (SR) controller 2308 is driven Dynamic signal 2366 is (for example, Vg) and drive signal 2366 is output to transistor 2310 (for example, MOSFET).
In secondary side synchronous rectifier device (SR) control system, the switch on delay of transistor 2310 usually requires minimum Change, to avoid any significant demagnetization current from flowing through the body diode of transistor 2310.The switch on delay of transistor 2310 is most Smallization is very important generally for efficient and/or high power density system.On the other hand, in order to avoid transistor 2310 It is not intended to connect by noise or disturbance, generally for secondary controller 2308 it is highly important that before transistor 2310 is connected leading to Spend the addition Key dithering time and filter out noise or disturbance.
Secondary side synchronous rectifier device (SR) controller 2308 include voltage detector 2320, logic controller 2322 and Driver 2324.The detection of secondary side synchronous rectifier device (SR) controller 2308 indicates the terminal 2364 of transistor 2310 (for example, brilliant The drain terminal of body pipe 2310) place voltage voltage signal 2362 (for example, Vd), and connecing for decision transistor 2310 is provided Logical or shut-off drive signal 2366 is (for example, Vg).Initially, transistor 2310 is because drive signal 2366 is (for example, voltage Vg) etc. In zero or voltage signal 2362 (for example, Vd) be more than zero and turn off.Under normal operation, when primary lateral vein rushes width modulated (PWM) when controller 2302 disconnects (for example, shut-off) power switch 2330 (for example, transistor), voltage signal 2362 (for example, Vd) rapid reduction.In voltage signal 2362 (for example, Vd) become less than after threshold voltage, secondary side synchronous rectifier device (SR) control Device 2308 by by driving voltage 2366 (for example, Vd) draw high to connect transistor 2310.Generally, noise or disturbance pass through transformation Device is coupled to voltage signal 2362 from AC circuits.
Accordingly it is highly desirable to improve the technology of rectification and the output detection for power converting system.
The content of the invention
The present invention relates to integrated circuit.More specifically, the invention provides utilize output detection and synchronous rectification scheme System and method.Only by example, the present invention is applied to power converting system.It will be appreciated that the present invention has more Wide application.
It is to be understood that the present invention has the wider scope of application.
According to one embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.The system controller is configured as in the first controller terminal reception at least input signal, and based on extremely Few information associated with the input signal, generates gate drive signal, to turn on and off crystal in second controller terminal Pipe is so as to influence the electric current associated with the secondary windings of power converting system.The system controller is additionally configured to:If defeated Enter signal more than first threshold, then generate the gate drive signal in the first logic level to turn off transistor, and if defeated Enter the second value that signal becomes smaller than Second Threshold from the first value more than Second Threshold, then patrol gate drive signal from first Level is collected to be changed into the second logic level to connect transistor.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.The system controller is configured as in the first controller terminal reception at least input signal, the input signal The output voltage associated with the secondary windings of power converting system is proportional to, and based at least associated with input signal Information, gate drive signal is generated in second controller terminal, to turn on and off transistor so as to influence and power conversion system The associated electric current of the secondary windings of system.The system controller is additionally configured to:Only input signal is from more than first threshold When first value becomes smaller than the second value of first threshold, the pulse of gate drive signal is just generated with associated with the pulse Transistor is connected during pulse period.
According to another embodiment, the system controller for regulation power supply transformation system includes first comparator, signal and examined Survey device and drive component.First comparator is configured as receiving input signal, and based on letter at least associated with input signal Breath the first comparison signal of output.Signal detector is configured as receiving input signal, and based at least associated with input signal Information output first detection signal.Drive component be configured as based at least with the first comparison signal and first detection signal phase The information of association exports gate drive signal to turn on and off transistor to influence the secondary windings with power converting system Associated electric current.Comparator is additionally configured to determine whether input signal is more than first threshold.Signal detector is also configured To determine whether input signal becomes smaller than the second value of Second Threshold from the first value more than Second Threshold.Drive component also by It is configured to:If the first comparison signal indicates that input signal is more than first threshold, grid of the generation in the first logic level Drive signal is to turn off transistor, and if first detection signal indicates that input signal is changed into from the first value more than Second Threshold Less than the second value of Second Threshold, then gate drive signal is changed into the second logic level to connect crystal from the first logic level Pipe.
In one embodiment, the system controller for regulation power supply transformation system includes comparator, pulse signal hair Raw device and drive component.Comparator is configured as receiving input signal, and defeated based on information at least associated with input signal Go out comparison signal.Pulse signal generator is configured as receiving at least comparison signal, and based at least related to the comparison signal The information generation pulse signal of connection.Drive component is configured as return pulse signal, and based at least related to the pulse signal The information generation gate drive signal of connection, to turn on and off transistor so as to influence the secondary windings phase with power converting system The electric current of association.Comparator is additionally configured to determine that input signal is greater than also being less than threshold value.Pulse signal generator also by It is configured to:Only when comparison signal indicates that input signal becomes smaller than the second value of threshold value from the first value more than threshold value, Generate the first pulse of pulse signal.Drive component is additionally configured to:In response to the first pulse of pulse signal, generation grid drives The second pulse of signal is moved to connect transistor in the pulse period associated with the second pulse.
In another embodiment, the method for regulation power supply transformation system includes:Receive at least input signal, processing with The associated information of the input signal, and gate drive signal is generated based on information at least associated with the input signal, with Transistor is turned on and off to influence the electric current associated with the secondary windings of power converting system.Based at least with the input The associated information generation gate drive signal of signal, it is secondary with power converting system so as to influence to turn on and off transistor The process of the associated electric current of level winding includes:If input signal is more than first threshold, generation is in the first logic level Gate drive signal to turn off transistor, and if input signal becomes smaller than the second threshold from the first value more than Second Threshold The second value of value, then be changed into the second logic level to connect transistor by gate drive signal from the first logic level.
In another embodiment, the method for regulation power supply transformation system includes:Receive at least input signal, the input Signal is proportional to the output voltage associated with the secondary windings of power converting system, handles the letter associated with the input signal Breath, and gate drive signal is generated based at least information associated with the input signal, to turn on and off transistor so that The influence electric current associated with the secondary windings of power converting system.Based on information generation at least associated with the input signal Gate drive signal, to turn on and off transistor so as to influence the electric current associated with the secondary windings of power converting system Process includes:It is just raw when only becoming smaller than the second value of first threshold from the first value more than first threshold in input signal Into the pulse of gate drive signal to connect transistor during the pulse period associated with the pulse.
In another embodiment, the method for regulation power supply transformation system includes:Receive input signal, processing and input The associated information of signal, and determine whether input signal is more than first threshold.This method also includes:Based at least with inputting letter Number associated information generation comparison signal, determines whether input signal becomes smaller than second from the first value more than Second Threshold The second value of threshold value, and based on information generation detection signal at least associated with input signal.In addition, this method includes:Base In at least exporting gate drive signal with the associated information of detection signal with comparison signal, to turn on and off transistor so that The influence electric current associated with the secondary windings of power converting system.Based at least associated with comparison signal and detection signal Information exports gate drive signal, to turn on and off transistor so as to influence associated with the secondary windings of power converting system The process of electric current include:If comparison signal indicates that input signal is more than first threshold, generation is in the first logic level Gate drive signal to turn off transistor, and if detection signal designation input signal becomes from the first value more than Second Threshold For the second value less than Second Threshold, then gate drive signal is changed into the second logic level to connect crystalline substance from the first logic level Body pipe.
In another embodiment, the method for regulation power supply transformation system includes:Receive input signal, processing and input The associated information of signal, and determine that input signal is greater than also being less than threshold value.This method also includes:Based at least with first The associated information generation comparison signal of input signal, receives comparison signal, and handle the information associated with comparison signal.This Outside, this method includes:Pulse signal is generated based at least information associated with comparison signal, return pulse signal, processing with The associated information of the pulse signal, and gate drive signal is generated based on information at least associated with the pulse signal, with Transistor is turned on and off to influence the electric current associated with the secondary windings of power converting system.Based at least with being compared letter The process of number associated information generation pulse signal includes:Only comparison signal indicates input signal from first more than threshold value When value becomes smaller than the second value of threshold value, the first pulse of pulse signal is just generated.Based at least associated with the pulse signal Information generation gate drive signal, to turn on and off transistor so as to influenceing related to the secondary windings of power converting system The process of the electric current of connection includes:In response to the first pulse of pulse signal, generate the second pulse of gate drive signal with Transistor is connected during the associated pulse period of second pulse.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Divide and be based on the input signal, drive signal is generated in second controller terminal, to turn on and off transistor so as to influence and electric The associated electric current of the secondary windings of source transformation system.In addition, the system controller is additionally configured to:Determine that the input signal exists Whether the first moment was more than first threshold;It was determined to be in for the first moment more than first threshold in response to the input signal, it is determined that Whether the input signal is less than Second Threshold at the second moment;And it is small to be determined to be in for the second moment in response to the input signal In Second Threshold, the drive signal at second controller terminal is changed into the second logic level from the first logic level.In addition, the Two moment are after the first moment.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Point be based on the input signal, second controller terminal generate drive signal to turn on and off transistor so that with influence with The associated electric current of the secondary windings of power converting system.In addition, the system controller is additionally configured to:Determine the input signal First threshold whether is remained above within the period longer than predetermined lasting time, and is determined in response to the input signal To be remained above first threshold within the period longer than predetermined lasting time, the input signal is determined after that period of time Certain moment whether be less than Second Threshold.In addition, the system controller is additionally configured to:It is confirmed as in response to the input signal It is less than Second Threshold at the moment, the drive signal at second controller terminal is changed into the second logic electricity from the first logic level It is flat.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Divide and be based on the input signal, generate drive signal to turn on and off transistor to influence and power supply in second controller terminal The associated electric current of the secondary windings of transformation system.In addition, the system controller is additionally configured to:It is determined that becoming from the input signal Must be more than first threshold the first moment be become less than to the input signal Second Threshold the second moment time interval whether It is longer than predetermined lasting time, and it is confirmed as in response to the time interval longer than predetermined lasting time, determine the input signal Whether certain moment after the time interval is less than the 3rd threshold value.In addition, the system controller is additionally configured to:In response to this Input signal is determined to be in the moment less than the 3rd threshold value, and the drive signal at second controller terminal is electric from the first logic It is flat to be changed into the second logic level.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Divide and be based on the input signal, generate drive signal to turn on and off transistor to influence and power supply in second controller terminal The associated electric current of the secondary windings of transformation system.In addition, the system controller is additionally configured to:Whether determine the input signal More than first threshold;Determine whether the input signal is remained above second within the period longer than the first predetermined lasting time Threshold value;And determine that go above the first moment of the 3rd threshold value from the input signal becomes less than the 4th threshold to the input signal Whether the time interval at the second moment of value is longer than the second predetermined lasting time.In addition, the system controller is additionally configured to:Ring Should be determined to be greater than in the input signal first threshold, the input signal be determined to be in it is longer than the first predetermined lasting time Period in be remained above Second Threshold or the time interval is confirmed as longer than the second predetermined lasting time, determine that this is defeated Enter whether signal is less than the 5th threshold value, and be confirmed as in response to the input signal less than the 5th threshold value, by second controller Drive signal at terminal is changed into the second logic level from the first logic level.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal with turn on and off transistor so as to The influence electric current associated with the secondary windings of power converting system.In addition, the processing packet associated with the input signal Include:Determine whether the input signal is more than first threshold at the first moment.In addition, being at least partially based on input signal generation drive Dynamic signal, to turn on and off transistor so as to influence the electric current associated with the secondary windings of power converting system to include:Ring It should be determined to be in for the first moment in the input signal more than first threshold, determine whether the input signal is less than at the second moment Second Threshold, and be determined to be in for the second moment less than Second Threshold in response to the input signal, by drive signal from first Logic level is changed into the second logic level.In addition, the second moment is after the first moment.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal, with turn on and off transistor from And influence the electric current associated with the secondary windings of power converting system.In addition, the processing information associated with the input signal Including:Determine whether the input signal is remained above first threshold within the period longer than predetermined lasting time.In addition, extremely Input signal generation drive signal is at least partly based on, it is secondary with power converting system so as to influence to turn on and off transistor The associated electric current of level winding includes:It is determined to be in response to the input signal in the period longer than predetermined lasting time First threshold is remained above, determines whether certain moment of the input signal after that period of time is less than Second Threshold, and is rung The moment should be determined to be in the input signal less than Second Threshold, drive signal is changed into second from the first logic level and patrolled Collect level.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal, with turn on and off transistor from And influence the electric current associated with the secondary windings of power converting system.In addition, the processing information associated with the input signal Including:It is determined that go above the first moment of first threshold from the input signal becomes less than Second Threshold to the input signal Whether the time interval at the second moment is longer than predetermined lasting time.In addition, being at least partially based on input signal generation driving letter Number, to turn on and off transistor so as to influence the electric current associated with the secondary windings of power converting system to include:In response to The time interval is confirmed as longer than predetermined lasting time, whether determines certain moment of the input signal after the time interval The moment is determined to be in less than the 3rd threshold value less than the 3rd threshold value, and in response to the input signal, by drive signal from the One logic level is changed into the second logic level.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal, with turn on and off transistor from And influence the electric current associated with the secondary windings of power converting system.In addition, the processing information associated with the input signal Including:Determine whether the input signal is more than first threshold;Determine the input signal whether than the first predetermined lasting time more Second Threshold is remained above in the long period;And determine from the input signal go above the first moment of the 3rd threshold value to Whether the time interval that the input signal becomes less than the second moment of the 4th threshold value is longer than the second predetermined lasting time.In addition, Input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and power converting system The associated electric current of secondary windings includes:First threshold is determined to be greater than in response to the input signal, the input signal is true It is set within the period longer than the first predetermined lasting time and is remained above Second Threshold, or the time interval is confirmed as ratio Second predetermined lasting time is long, determines that whether the input signal is less than the 5th threshold value, and be determined in response to the input signal For less than the 5th threshold value, drive signal is changed into the second logic level from the first logic level.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.The system controller is configured as:Input signal is received at the first controller terminal, and is at least partially based on Input signal, generates drive signal at second controller terminal, to turn on and off transistor so as to influence and power conversion The associated electric current of the secondary windings of device.In addition, system controller is additionally configured to:Determine input signal equal or longer than Whether first threshold is remained above in first period of one predetermined lasting time;And it is not determined in response to input signal First threshold is remained above in the first period equal or longer than first predetermined lasting time, is grasped using first scheme Make.In addition, being operated using first scheme, the system controller is additionally configured to:Determine input signal equal or longer than Whether Second Threshold is remained less than in second period of the second predetermined lasting time;It is determined to be in and is equal in response to input signal Or be longer than in the second period of second predetermined lasting time and remain less than Second Threshold, by the drive at second controller terminal Dynamic signal is changed into the second logic level from the first logic level.It is predetermined lasting that first predetermined lasting time is more than zero, and second Time is more than zero.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.The system controller is configured as:Input signal, and at least part base are received at the first controller terminal In input signal, drive signal is generated at second controller terminal, to turn on and off transistor so as to influence and power supply change The associated electric current of the secondary windings of parallel operation.In addition, the system controller is additionally configured to:Determine that input signal is being equal to or grown In whether being remained less than in the first period of the first predetermined lasting time or equal to first threshold and more than Second Threshold, the second threshold Value is less than first threshold;And it is not determined in response to input signal equal or longer than the first of the first predetermined lasting time Remain less than or equal to first threshold and more than Second Threshold, operated using first scheme in period.In addition, utilizing first Scheme is operated, and the system controller is additionally configured to:Determine input signal equal or longer than the second predetermined lasting time The second period in whether remain less than the 3rd threshold value;Hold predetermined equal or longer than second is determined to be in response to input signal The 3rd threshold value is remained less than in the second period of continuous time, by the drive signal at second controller terminal from the first logic level It is changed into the second logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.The system controller is configured as:Input signal, and at least part base are received at the first controller terminal In input signal, drive signal is generated at second controller terminal, to turn on and off transistor so as to influence and power supply change The associated electric current of the secondary windings of parallel operation.In addition, system controller is additionally configured to:Determine input signal equal or longer than Whether be remained above first threshold in first period of the first predetermined lasting time, and determine input signal equal or longer than Whether Second Threshold is remained above in second period of the second predetermined lasting time.Second Threshold is less than first threshold, and second is pre- Surely the first predetermined lasting time is lasted longer than.In addition, the system controller is additionally configured to:In response to input signal not by It is defined as within the first period equal or longer than the first predetermined lasting time being remained above first threshold, and input signal is not It is determined to be in the second period equal or longer than the second predetermined lasting time and is remained above Second Threshold, utilizes first scheme Operated.In addition, being operated using first scheme, the system controller is additionally configured to:Determine input signal equal to Or it is longer than in the 3rd period of the 3rd predetermined lasting time whether remain less than the 3rd threshold value;And it is true in response to input signal It is set to and remains less than the 3rd threshold value within the 3rd period equal or longer than the 3rd duration, at second controller terminal Drive signal is changed into the second logic level from the first logic level.When first predetermined lasting time is predetermined more than zero, second lasting Between be more than zero, and the 3rd predetermined lasting time be more than zero.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.The system controller is configured as:Input signal, and at least part base are received at the first controller terminal In input signal, drive signal is generated at second controller terminal, to turn on and off transistor so as to influence and power supply change The associated electric current of the secondary windings of parallel operation.In addition, the system controller is additionally configured to:Determine that input signal is being equal to or grown In whether being remained above first threshold in the first period of the first predetermined lasting time, and determine that input signal is being equal to or long In whether being remained above Second Threshold in the second period of the second predetermined lasting time.In addition, system controller is additionally configured to: It is not determined to be remained above first within the first period equal or longer than the first predetermined lasting time in response to input signal Threshold value, and input signal is not determined to be remained above within the second period equal or longer than the second predetermined lasting time Two threshold values, are operated using first scheme.Second Threshold is less than first threshold, and the second predetermined lasting time is longer than first Predetermined lasting time.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero.First threshold is in amplitude On change with input signal, Second Threshold is in amplitude as input signal changes.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.The system controller is configured as:Input signal, and at least part base are received at the first controller terminal In input signal, drive signal is generated at second controller terminal, to turn on and off transistor so as to influence and power supply change The associated electric current of the secondary windings of parallel operation.In addition, the system controller is additionally configured to:Determine that input signal is being equal to or grown In whether being remained above first threshold in the first period of the first predetermined lasting time, and determine that input signal is being equal to or long In whether being remained above Second Threshold in the second period of the second predetermined lasting time.In addition, the system controller is also configured For:It is not determined to be remained above within the first period equal or longer than the first predetermined lasting time in response to input signal One threshold value, and input signal is not determined to be remained above within the second period equal or longer than the second predetermined lasting time Second Threshold, is operated using first scheme.Second Threshold is less than first threshold, and the second predetermined lasting time is longer than the One predetermined lasting time.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero, the first predetermined lasting time As input signal changes in amplitude, and the second predetermined lasting time in amplitude as input signal changes.
According to another embodiment, the method for regulation power supply converter includes:Receive input signal;Processing is believed with input Number associated information;And input signal generation drive signal is at least partially based on, to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period equal or longer than the first predetermined lasting time;And in response to defeated Enter signal to be not determined to be remained above first threshold within the first period equal or longer than the first predetermined lasting time, utilize First scheme is operated.Input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence The electric current associated with the secondary windings of supply convertor includes:In response to being operated using first scheme, it is determined that input letter Number whether remain less than Second Threshold within the second period equal or longer than the second predetermined lasting time;And in response to input Signal is determined to be in the second period equal or longer than the second predetermined lasting time and remains less than Second Threshold, and driving is believed Number it is changed into the second logic level from the first logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time More than zero.
According to another embodiment, the method for regulation power supply converter includes:Receive input signal;Processing is believed with input Number associated information;And input signal generation drive signal is at least partially based on, to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal remains less than within the first period equal or longer than the first predetermined lasting time or equal to first threshold and is more than Second Threshold, Second Threshold is less than first threshold;And it is not determined in response to input signal pre- equal or longer than first Determine to remain less than in the first period of duration or equal to first threshold and more than Second Threshold, grasped using first scheme Make.Input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and supply convertor The associated electric current of secondary windings includes:In response to being operated using first scheme, determine input signal equal or longer than The 3rd threshold value whether is remained less than in second period of the second predetermined lasting time;And it is determined to be in response to input signal It is equal or longer than the 3rd threshold value is remained less than in the second period of the second predetermined lasting time, drive signal is electric from the first logic It is flat to be changed into the second logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero.
According to another embodiment, the method for regulation power supply converter includes:Receive input signal;Processing is believed with input Number associated information;And input signal generation drive signal is at least partially based on, to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period equal or longer than the first predetermined lasting time;Determine input signal Second Threshold whether is remained above within the second period equal or longer than the second predetermined lasting time, Second Threshold is less than first Threshold value, the second predetermined lasting time is longer than the first predetermined lasting time;And in response to input signal be not determined to equal to Or be longer than in the first period of the first predetermined lasting time and be remained above first threshold, and input signal be not determined to equal to Or be longer than in the second period of the second predetermined lasting time and be remained above Second Threshold, operated using first scheme.At least Input signal generation drive signal is based partially on, to turn on and off transistor so as to influence the secondary windings with supply convertor The electric current of association includes:In response to being operated using first scheme, determine the input signal pre- equal or longer than the 3rd Determine whether remain less than the 3rd threshold value in the 3rd period of duration;And be determined to be in response to input signal be equal to or The 3rd threshold value is remained less than in the 3rd period for being longer than the 3rd predetermined lasting time, by drive signal from the first logic level It is changed into the second logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than the zero, and the 3rd and makes a reservation for hold The continuous time is more than zero.
According to another embodiment, the method for regulation power supply converter includes:Receive input signal;Processing is believed with input Number associated information;And input signal generation drive signal is at least partially based on, to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period equal or longer than the first predetermined lasting time;Determine input signal Whether Second Threshold is remained above within the second period equal or longer than the second predetermined lasting time;And believe in response to input Number it is not determined within the first period equal or longer than the first predetermined lasting time to be remained above first threshold, and input letter Number it is not determined to be remained above Second Threshold within the second period equal or longer than the second predetermined lasting time, utilizes first Scheme is operated.Second Threshold is less than first threshold, and the second predetermined lasting time is longer than the first predetermined lasting time.First is pre- The duration is determined more than zero, and the second predetermined lasting time is more than zero.First threshold in amplitude as input signal changes, And Second Threshold is in amplitude as input signal changes.
According to another embodiment, the method for regulation power supply converter includes:Receive input signal;Processing is believed with input Number associated information;And input signal generation drive signal is at least partially based on, to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period equal or longer than the first predetermined lasting time;Determine input signal Whether Second Threshold is remained above within the second period equal or longer than the second predetermined lasting time;And believe in response to input Number it is not determined within the first period equal or longer than the first predetermined lasting time to be remained above first threshold, and input letter Number it is not determined to be remained above Second Threshold within the second period equal or longer than the second predetermined lasting time, utilizes first Scheme is operated.Second Threshold is less than first threshold, and the second predetermined lasting time is longer than the first predetermined lasting time.The One predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero, and the first predetermined lasting time is in amplitude with input Signal change, and the second predetermined lasting time in amplitude as input signal changes.
Depending on embodiment, one or more of these benefits benefit can be implemented.With reference to following accompanying drawing and in detail Thin description will understand the various additional targets, feature and advantage of these benefits and the present invention completely.
Brief description of the drawings
Fig. 1 is the simplification figure for showing traditional flyback power supply transformation system.
Fig. 2 (A) is the simplification figure for showing another traditional flyback power supply transformation system.
Fig. 2 (B) is with interrupted conduction mode (DCM) operation, the flyback power supply transformation system as shown in Fig. 2 (A) Simplify tradition timing diagram.
Fig. 3 is the simplification figure for showing the conventional power source transformation system with secondary side synchronous rectifier device (SR).
Fig. 4 (A) is the simplification figure that embodiments in accordance with the present invention show the power converting system with rectification circuit.
Fig. 4 (B) is the simplification for showing the power converting system with rectification circuit according to another embodiment of the present invention Figure.
Fig. 5 is embodiments in accordance with the present invention, power supply operated with interrupted conduction mode (DCM), as shown in Fig. 4 (A) The simplified timing diagram of transformation system.
Fig. 6 is embodiments in accordance with the present invention, shows the part as the power converting system as shown in Fig. 4 (A) Secondary controller some components simplification figure.
Fig. 7 is embodiments in accordance with the present invention, including secondary controller as shown in Figure 6 and with interrupted conduction mode (DCM) simplified timing diagram of power converting system being operated, as shown in Fig. 4 (A).
Fig. 8 be according to another embodiment of the present invention, with interrupted conduction mode (DCM) operate, as shown in Fig. 4 (A) The simplified timing diagram of power converting system 300.
Fig. 9 be according to another embodiment of the present invention, with interrupted conduction mode (DCM) operate, as shown in Fig. 4 (A) The simplified timing diagram of power converting system 300.
Figure 10 be according to another embodiment of the present invention, with interrupted conduction mode (DCM) operate, as shown in Fig. 4 (A) The simplified timing diagram of power converting system 300.
Figure 11 is the secondary for showing the part as power converting system 300 according to another embodiment of the present invention The simplification figure of some components of controller 308.
Figure 12 is according to one embodiment of present invention, to show for enabling one as power converting system 300 The simplification figure of the method for the trailing edge detection components 1110 of the secondary controller 308 divided.
Figure 13 is according to one embodiment of present invention, to show the power conversion with secondary side synchronous rectifier device (SR) The simplification figure of system.
Figure 14 is according to one embodiment of present invention, to show for secondary side synchronous rectifier device as shown in Figure 13 (SR) the connection scheme of controller is changed into the simplification figure of one or more predetermined conditions of Quick connecting pipe fitting scheme from slow connection scheme.
Figure 15 is according to another embodiment of the invention, to show secondary side synchronous rectifier device as shown in Figure 13 (SR) the connection scheme of controller is changed into the simplification figure of one or more predetermined conditions of Quick connecting pipe fitting scheme from slow connection scheme.
Figure 16 is, according to some embodiments of the present invention, to show secondary side synchronous rectifier device (SR) as shown in Figure 13 The simplification figure of the method for scheme is connected in the determination of controller.
Figure 17 is, according to certain embodiments of the present invention, to show secondary side synchronous rectifier device (SR) as shown in Figure 13 The simplification figure of the method for scheme is connected in the determination of controller.
Figure 18 is the primary side for showing power converting system as shown in Figure 13 according to one embodiment of present invention The simplification figure of some components of synchronous rectifier (SR) controller.
Embodiment
The present invention relates to integrated circuit.More specifically, the invention provides utilize output detection and synchronous rectification scheme System and method.Only by example, the present invention is applied to power converting system.It will be appreciated that the present invention has more Wide application.
Fig. 4 (A) is the simplification figure that embodiments in accordance with the present invention show the power converting system with rectification circuit.Should Figure is only example, and it should not exceedingly limit the scope of claim.One of ordinary skill in the art will be recognized that perhaps Many changes, substitutions and modifications.Power converting system 300 includes:Controller 302, armature winding 304, secondary windings 306, auxiliary Winding 324, rectification circuit 301, diode 320, current-sense resistor 328, capacitor 312 and 380, resistor 314,316, 322 and 326, and power switch 330.Rectification circuit 301 includes:Secondary controller 308, resistor 318 and transistor 310. Secondary controller 308 includes terminal 390,392,394,396 and 398.For example, transistor 310 is MOSFET.In another example In, power switch 330 is transistor.
According to one embodiment, when power switch 330 closes (for example, connection), energy be stored in including primary around In the transformer of group 304 and secondary windings 306.For example, when power switch 330 disconnects (for example, shut-off), the energy quilt of storage It is transferred to the output voltage 350 in primary side, and the voltage mapping primary side of assists winding 324.In another example, control Device 302 receives the feedback signal 360 adjusted for output voltage from the divider including resistor 322 and 326.In another example In, in the process (for example, demagnetization process) of energy transfer, transistor 310 is switched on, and at least the one of secondary current 352 Flow through transistor 310 in part.In another example, the conducting resistance of transistor 310 is very small (for example, in the model of tens milliohms In enclosing).In another example, when closed, the voltage on transistor 310, which declines, is far smaller than commutation diode (for example, two poles Pipe 124 or diode 260) on voltage decline, therefore power attenuation and system 100 or the system 200 of power converting system 300 Compared to substantially reducing.
According to another embodiment, at the end of energy transfer process (for example, demagnetization process), secondary current 352 has Low value (for example, almost nil).For example, transistor 310 is turned off to prevent residual current from output end 351 by transistor 310 flow to ground.In another example, when transistor 310 is connected, power switch 330 is held off (for example, disconnection).Another In one example, secondary controller 308 receives terminal 364 (for example, drain electrode end of transistor 310) place of instruction transistor 310 The voltage signal 362 of voltage is (for example, VDR), and (for example, at terminal G2) provides signal 366 with driving transistor 310.
As emphasizing as discussed above and further herein, Fig. 4 (A) is only example, and it should not be excessive Ground limits the scope of claim.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, control Device 302 and secondary controller 308 processed are on different chips.In another example, secondary controller 308 and transistor 310 exist On different chips, the different chips are the parts of multi-chip package.In another example, secondary controller 308 and transistor 310 it is integrated on the same chip.
Fig. 4 (B) is the simplification for showing the power converting system with rectification circuit according to another embodiment of the present invention Figure.The figure is only example, and it should not exceedingly limit the scope of claim.One of ordinary skill in the art will recognize that To many changes, substitutions and modifications.Power converting system 400 includes:Controller 402, armature winding 404, secondary windings 406, First assists winding 424, the second assists winding 425, rectification circuit 401, diode 420 and 474, capacitor 412,476 and 478, current-sense resistor 428, resistor 414,416,470 and 472, and power switch 430.Rectification circuit 401 includes: Secondary controller 408, resistor 418 and transistor 410.For example, transistor 410 is MOSFET.In another example, power is opened It is transistor to close 430.In another example, rectification circuit 401 is identical with rectification circuit 301.
According to one embodiment, when power switch 430 closes (for example, connection), energy be stored in including primary around In the transformer of group 404 and secondary windings 406.For example, when power switch 430 disconnects (for example, shut-off), the energy quilt of storage It is transferred to the output voltage 450 in primary side, and the voltage mapping primary side of the second assists winding 425.In another example, Controller 402 receives the feedback signal 460 adjusted for output voltage from the divider including resistor 470 and 472.Another In example, in the process (for example, demagnetization process) of energy transfer, transistor 410 is switched on, and secondary current 452 is extremely A few part flows through transistor 410.In another example, the conducting resistance of transistor 410 is very small (for example, in tens milliohms In the range of).
According to another embodiment, at the end of energy transfer process (for example, demagnetization process), secondary current 452 has Low value (for example, almost nil).For example, transistor 410 is turned off to prevent reverse current from flowing by transistor 410 from output end To ground.In another example, when transistor 410 is connected, power switch 430 is held off (for example, disconnection).In another example In, secondary controller 408 (for example, at terminal DR) receives the terminal 464 for indicating transistor 410 (for example, transistor 410 Drain electrode end) place voltage voltage signal 462, and (for example, at terminal G2) provide signal 466 with driving transistor 410.
As emphasizing as discussed above and further herein, Fig. 4 (B) is only example, and it should not be excessive Ground limits the scope of claim.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, control Device 402 and secondary controller 408 processed are on different chips.In another example, secondary controller 408 and transistor 410 exist On different chips, the different chips are the parts of multi-chip package.In another example, secondary controller 408 and transistor 410 it is integrated on the same chip.
Fig. 5 is embodiments in accordance with the present invention, power supply operated with interrupted conduction mode (DCM), as shown in Fig. 4 (A) The simplified timing diagram of transformation system 300.The figure is only example, and it should not exceedingly limit the scope of claim.Ability Domain skilled artisan will realize that many changes, substitutions and modifications.For example, power switch 330 is connected or closed by waveform 502 Disconnected to be expressed as the function of time, secondary current 352 is expressed as the function of time by waveform 504, and waveform 506 is by the table of feedback signal 360 It is shown as the function of time.In addition, voltage signal 362 (for example, at terminal DR) is expressed as the function of time, waveform 510 by waveform 508 Voltage signal 366 (for example, at terminal G2) is expressed as the function of time, waveform 512 will flow through the channel current of transistor 310 368 are expressed as the function of time, and waveform 514 will flow through the pole of body two of the body diode (for example, parasitic diode) of transistor 310 Tube current 370 is expressed as the function of time.
For example, the switch periods of switch 330 include the turn-on time section and switch 330 of the closure of switch 330 (for example, connection) Disconnect the turn-off time section of (for example, shut-off).In another example, as shown in figure 5, switch 330 turn-on time section (for example, Ton) start from moment t4, end at moment t5;The turn-off time section of switch 330 is (for example, Toff) start from moment t5, end at Moment t9.With including the demagnetization period associated with secondary windings 306 of armature winding 304 (for example, Tdemag) start from moment t5, End at moment t8.In another example, t4≤t5≤t6≤t7≤t8≤t9
According to one embodiment, in turn-on time section (for example, Ton) during, the closure of switch 330 (for example, connection), such as ripple Shown in shape 502, energy is stored in the transformer including armature winding 304 and secondary windings 306.For example, secondary current 352 With low value 516 (for example, almost nil), as shown in waveform 504.In another example, the electricity received by secondary controller 308 Signal 362 is pressed (for example, VDR) there is the value 518 (for example, as shown in waveform 508) for being higher than zero.In another example, signal 366 In logic low (for example, as shown in waveform 510), and transistor 310 is turned off.In another example, in turn-on time Section is (for example, Ton) during, channel current 368 has low value 520 (for example, almost nil, as shown by waveform 512), and body two Pole pipe electric current 370 has low value 522 (for example, almost nil, as shown in waveform 514).
According to another embodiment, (for example, in t at the end of turn-on time section5Place), switch 330 is disconnected (for example, closing It is disconnected), as shown in waveform 502, and energy is transferred to primary side.For example, secondary current 352 increases to value 524 from value 516 (for example, in t5Place), as shown in waveform 504.In another example, voltage signal 362 is (for example, VDR) it is reduced to value from value 518 526 (for example, as shown in waveforms 508).In another example, value 526 is less than first threshold voltage 528 (for example, Vth1) and second Threshold voltage 530 is (for example, Vth2) the two.In another example, first threshold voltage 528 is (for example, Vth1) and Second Threshold electricity Pressure 530 is (for example, Vth2) the two is below ground voltage 372 (for example, zero volt).In another example, the pole of body two of transistor 310 Pipe is begun to turn on, and body diode current 370 increases to value 529 (for example, as shown in waveform 514) from value 522.Hereafter, believe Numbers 366 are changed into logic high (for example, in t from logic low6Place, as shown in waveform 510), and in some embodiments In, transistor 310 is switched on.For example, channel current 368 increases to value 525 (for example, in t from value 5206Place, such as the institute of waveform 512 Show).In another example, in voltage signal 362 (for example, VDR) from value 518 be reduced to value 526 at the time of with signal 366 from patrolling There is delay (for example, T between collecting at the time of low level is changed into logic highd).In another example, the delay is (for example, Td) It is zero.
According to another embodiment, in the demagnetization period (for example, Tdemag) in, switch 330 remains open (for example, shut-off), such as Shown in waveform 502.For example, secondary current 352 declines from value 524, as shown in waveform 504.In another example, if voltage is believed Numbers 362 (for example, VDR) it is more than first threshold voltage 528 (for example, in t7Place, as shown in waveform 508), then signal 366 is from logic High level is changed into logic low (for example, as shown in waveform 510).In another example, voltage signal 362 is (for example, VDR) again Secondary drop to gets lower than first threshold signal 528 (for example, in t8Place, as shown in waveform 508).In another example, crystal Pipe 310 is turned off, and channel current 368 is reduced to low value 534 (for example, almost nil, as shown by waveform 512).Another In example, body diode current 370 flows through the body diode of transistor 310, and is reduced to low value (for example, in t9Place is almost Zero, as shown in waveform 514).In another example, the demagnetization period is in moment t9Terminate.In another example, immediately moment t9, electricity Pressure signal 362 increases, as shown in the rising edge of waveform 508, and the rising edge will not be also used for determining even if being detected The switching frequency (for example, loading condition) of power converting system 300.In another example, secondary current 352 is equal to channel current 368 and the sum of body diode current 370.Therefore, in certain embodiments, waveform 512 is (for example, in t5And t9Between) one Divide and waveform 514 is (for example, in t5And t9Between) a part combination be equal to waveform 504 (for example, in t5And t9Between) one Part.
According to another embodiment of the present invention, Fig. 5 is the electricity being shown in Fig. 4 (B) operated with interrupted conduction mode (DCM) The simplified timing diagram of source transformation system 400.For example, waveform 502, which turns on and off power switch 430, is expressed as the function of time, Secondary current 452 is expressed as the function of time by waveform 504, and feedback signal 460 is expressed as the function of time by waveform 506.In addition, Voltage signal 462 (for example, at terminal DR) is expressed as the function of time by waveform 508, and waveform 510 is by (the example of voltage signal 466 Such as, at terminal G2) function of time is expressed as, the channel current 468 for flowing through transistor 410 is expressed as time letter by waveform 512 Number, and the body diode current 480 that waveform 514 will flow through the body diode (for example, parasitic diode) of transistor 410 is expressed as The function of time.
As emphasizing as discussed above and further herein, Fig. 4 is only example, and it should not exceedingly be limited The scope of claim processed.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, with other Pattern (for example, quasi-resonant mode) the is operated, power converting system 300 being shown in Fig. 4 (A) or the power supply being shown in Fig. 4 (B) Transformation system 400 can also realize the scheme shown in Fig. 4.
In certain embodiments, scheme as shown in Figure 5 is realized with continuous conduction mode.If for example, secondary control Device 308 processed detects signal 362 (for example, VDR) trailing edge, then secondary controller 308 change signal 366 to connect transistor 310.In another example, controller 302 terminates to connect crystal before (for example, secondary current 352 is more than zero) in the demagnetization period Pipe 310, and as response, signal 362 is (for example, VDR) increase.In another example, secondary controller 308 detects signal 362 rising edge, and change signal 366 to turn off transistor 310.
Fig. 6 is embodiments in accordance with the present invention, shows the secondary controller of the part as power converting system 300 The simplification figure of 308 some components.The figure is only example, and it should not exceedingly limit the scope of claim.This area Skilled artisan will realize that many changes, substitutions and modifications.Secondary controller 308 includes:Clamper component 602, compensation Component (offset component) 604, rising edge detection components 606, comparator 608 and 624, trailing edge detection components 610, Time schedule controller 612, logic control component 614, gate drivers 616, underloading detector 618, signal generator 620, vibration Device 622, under-voltage locking component 628 and reference signal generator 626.For example, some components of secondary controller 308 by with In synchronous rectification, including:Clamper component 602, compensation component 604, rising edge detection components 606, comparator 608, trailing edge inspection Survey component 610, time schedule controller 612, logic control component 614 and gate drivers 616.In another example, secondary control Some components of device 308 processed are used for output voltage detection and controlled, including:Underloading detector 618, signal generator 620, shake Swing device 622, reference signal generator 626, logic control component 614 and gate drivers 616.In another example, it is secondary It is used to be used for the component quilt of synchronous rectification in component and secondary controller 308 that output voltage is detected and controlled in controller 308 It is integrated on the same chip.
Fig. 7 is embodiments in accordance with the present invention, including secondary controller 308 as shown in Figure 6 and with interrupted guided modes The simplified timing diagram for the power converting system 300 that formula (DCM) is operated.The figure is only example, and it should not exceedingly be limited The scope of claim processed.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, waveform 702 Power switch 330 is turned on and off and is expressed as the function of time, feedback signal 360 is expressed as the function of time by waveform 704, and ripple Voltage signal 362 (for example, at terminal 390) is expressed as the function of time by shape 706.In addition, waveform 708 is by (the example of signal 366 Such as, at terminal 392) function of time is expressed as, the channel current 368 for flowing through transistor 310 is expressed as time letter by waveform 710 Number, and the voltage signal 388 (for example, at terminal 398) for indicating output voltage 350 is expressed as the function of time by waveform 712.
According to one embodiment, clamper component 602 from terminal 390 (for example, terminal DR) receiving voltage signal 362 (for example, VDR).For example, rising edge detection components 606, comparator 608 and trailing edge detection components 610 receive signal 658, the signal 658 Equal to the voltage signal 362 changed by compensation component 604.In another example, rising edge detection components 606, the and of comparator 608 Trailing edge detection components 610 distinguish output signal 670,660 and 650 based on information at least associated with signal 658.Another In example, time schedule controller 612 receives signal 670,660 and 650, and to the output signal 672 of logic controller 614 to drive Transistor 310.In certain embodiments, compensation component 604 is removed.
According to another embodiment, in moment t16Before, power converting system 300 is under the conditions of no-load/underloading, and system 300 switching frequency is kept relatively low (for example, less than threshold value).For example, in turn-on time section (for example, in moment t11With moment t12 Between) in, the closure of switch 330 (for example, connection), as shown in waveform 702, and energy is stored in including armature winding 304 In the transformer of secondary windings 306.In another example, voltage signal 362 (for example, at terminal DR) has (example of value 714 Such as, as shown in waveform 706), and it is clamped the clamper of component 602.In another example, signal 366 (for example, at terminal G2) In logic low (for example, as shown in waveform 708), and transistor 310 is turned off.In another example, in turn-on time Section is (for example, Ton) in, channel current 368 has low value 716 (for example, almost nil, as shown in waveform 710).In another example In, voltage signal 388 is (for example, Vs) there is value 718 (for example, as shown in waveform 712).
According to another embodiment, (for example, in t at the end of turn-on time section12Place), switch 330 is disconnected (for example, closing It is disconnected), as shown in waveform 702, and energy is transferred to primary side.For example, voltage signal 362 is reduced to value 720 from value 714 (for example, as shown in waveform 706).In another example, value 720 is less than the 3rd threshold voltage 722 (for example, Vth3) and the 4th threshold Threshold voltage 724 is (for example, Vth4) the two.In another example, the 3rd threshold voltage 722 is (for example, Vth3) and the 4th threshold voltage 724 (for example, Vth4) the two is below ground voltage 372.In another example, the body diode of transistor 310 is begun to turn on, and And body diode current 370 increases in size.Hereafter, signal 366 from logic low be changed into logic high (for example, t13Place, as shown in waveform 708), and in certain embodiments, transistor 310 is switched on.For example, the 3rd threshold voltage 722 (for example, Vth3) and the 4th threshold voltage 724 (for example, Vth4) respectively with first threshold voltage 528 and the phase of second threshold voltage 530 Together.
According to another embodiment, when voltage signal 362 is reduced to value 720 (for example, as shown in waveform 706) from value 714, Trailing edge detection components 610 detect the decline of voltage signal 362, and change signal 650 to connect transistor 310.For example, As response, channel current 368 increases to value 726 (for example, in t from value 71613Place, as shown in waveform 710).In another example In, the voltage between the drain electrode end and source terminal of transistor 310 declines to be determined based on below equation:
VDS_M2=-Isec×Rds_on(formula 1)
Wherein, VDS_M2Represent that the voltage between the drain electrode end and source terminal of transistor 310 declines, IsecRepresent secondary current 352, and Rds_onRepresent the conducting resistance of transistor 310.
According to some embodiments because the conducting resistance of transistor 310 is very small, the drain electrode end of transistor 310 and The size that voltage between source terminal declines is far smaller than the forward direction of commutation diode (for example, diode 124 or diode 260) Voltage.For example, when secondary current 352 becomes very little (for example, close to zero), between the drain electrode end and source terminal of transistor 310 Voltage decline and become very small in size, and voltage signal 362 is very small in size.In another example, if Signal 658 is more than reference signal 652 in size, then comparator 608 changes signal 660 to turn off transistor 310.Show another In example, signal 366 is changed into logic low (for example, in t from logic high14Place, as shown in waveform 708), and transistor 310 shut-offs.In another example, the body diode of transistor 310 starts again at conducting, and body diode current 370 is big Small upper reduction is (for example, final in t15Place reaches almost nil).Therefore, in certain embodiments, energy is fully transmitted to defeated Go out.
In one embodiment, secondary controller 308 by signal 388 (for example, Vs) continuous monitoring output voltage 350. For example, comparator 624 receives reference signal 680 and signal 388 (for example, Vs), and output signal 682.In another example, Underloading detector 618 receives clock signal from oscillator 622 and receives signal 676 from time schedule controller 612.In another example In, some of indication signal 362 of signal 676 switch events (for example, rising edge or trailing edge).In another example, underloading The signal 678 of the switching frequency of the output indication power converting system 300 of detector 618.In another example, signal generator 620 receive signals 678 and signal 682, and to the output signal 684 of logic control component 614 to influence the state of transistor 310.
In another embodiment, if output voltage 350 under any conditions (for example, when output load condition from no-load/ Underloading condition is when being changed into full load conditions (for example, in t16And t17Between)) dropping below threshold level, then output voltage 350 subtracts Small (for example, less than threshold level).If for example, signal 388 is (for example, Vs) from being more than the of reference signal 680 in size One value is changed into being less than in size the second value of reference signal 680 (for example, in t16Place, as shown in waveform 712), then comparator 624 generate pulse to connect transistor 310 in short time period in signal 682.In certain embodiments, if signal 678 indicate power converting system 300 under the conditions of no-load/underloading, then signal generator 620 exports pulse in signal 684, and And as response, gate drivers 616 generate pulse 730 (for example, as shown in waveform 708) in signal 366.For example, signal 362 (for example, at terminal DR) are reduced to value 728 (for example, in t16And t17Between, as shown in waveform 706).In another example In, during the pulse period associated with the pulse 730 in signal 366, transistor 310 is switched on, and channel current 368 (for example, passing through transistor 310 to ground from output capacitor 312) is flowed in different directions, as shown in waveform 710.Show another In example, feedback signal 360 increases in size, and forms pulse (for example, in t16And t17Between, as shown in waveform 704).Root According to some embodiments, controller 302 detects the pulse of feedback signal 360, and as response, increase armature winding 304 Peak point current and switching frequency to primary side to transmit more energy.For example, output voltage 350 and voltage signal 388 are most Increase in size is (for example, in t eventually18Place, as shown in waveform 712).
As emphasizing as discussed above and further herein, Fig. 6 and Fig. 7 are only example, and it should not mistake The scope of degree ground limitation claim.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, Secondary controller 408 is identical with the secondary controller 308 shown in Fig. 6.
In certain embodiments, Fig. 7 is to include secondary controller 408 and operated with interrupted conduction mode (DCM) Power converting system 400 simplified timing diagram.For example, waveform 702, which turns on and off power switch 430, is expressed as time letter Number, feedback signal 460 is expressed as the function of time by waveform 704, and voltage signal 462 is expressed as the function of time by waveform 706.This Outside, signal 466 is expressed as the function of time by waveform 708, when the channel current 468 for flowing through transistor 410 is expressed as by waveform 710 Between function, and waveform 712 by indicate output voltage 450 voltage signal 488 be expressed as the function of time.
In certain embodiments, with other patterns (for example, continuous conduction mode and critical conduction mode are (for example, quasi-resonance Pattern)) operation the part as power converting system 300 secondary controller 308 or be used as power converting system 400 The secondary controller 408 of a part can also realize scheme as shown in Figure 6 and Figure 7.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.The system controller is configured as in the first controller terminal reception at least input signal, and based on extremely Few information associated with the input signal, generates gate drive signal to turn on and off transistor in second controller terminal So as to influence the electric current associated with the secondary windings of power converting system.The system controller is additionally configured to:If input Signal is more than first threshold, then generation is in the gate drive signal of the first logic level to turn off transistor, and if input Signal becomes smaller than the second value of Second Threshold from the first value more than Second Threshold, then by gate drive signal from the first logic Level is changed into the second logic level to connect transistor.For example, the system is according to Fig. 4 (A), Fig. 4 (B), Fig. 5, Fig. 6, and/or figure 7 realize.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.The system controller is configured as in the first controller terminal reception at least input signal, the input signal The output voltage associated with the secondary windings of power converting system is proportional to, and based at least associated with input signal Information, generates gate drive signal to turn on and off transistor to influence and power converting system in second controller terminal The associated electric current of secondary windings.The system controller is additionally configured to:Only input signal is from more than first threshold When one value becomes smaller than the second value of first threshold, the pulse of gate drive signal is just generated with the arteries and veins associated with the pulse Transistor is connected during rushing the period.For example, realizing the system according at least to Fig. 4 (A), Fig. 4 (B), Fig. 6, and/or Fig. 7.
According to another embodiment, the system controller for regulation power supply transformation system includes first comparator, signal and examined Survey device and drive component.First comparator is configured as receiving input signal, and based on letter at least associated with input signal Breath the first comparison signal of output.Signal detector is configured as receiving input signal, and based at least associated with input signal Information output first detection signal.Drive component be configured as based at least with the first comparison signal and first detection signal phase The information of association exports gate drive signal to turn on and off transistor to influence the secondary windings with power converting system Associated electric current.Comparator is additionally configured to determine whether input signal is more than first threshold.Signal detector is also configured To determine whether input signal becomes smaller than the second value of Second Threshold from the first value more than Second Threshold.Drive component also by It is configured to:If the first comparison signal indicates that input signal is more than first threshold, grid of the generation in the first logic level Drive signal is to turn off transistor, and if first detection signal indicates that input signal is changed into from the first value more than Second Threshold Less than the second value of Second Threshold, then gate drive signal is changed into the second logic level to connect crystal from the first logic level Pipe.For example, the system is realized according to Fig. 4 (A), Fig. 4 (B), Fig. 5, Fig. 6, and/or Fig. 7.
In one embodiment, the system controller for regulation power supply transformation system includes comparator, pulse signal hair Raw device and drive component.Comparator is configured as receiving input signal, and defeated based on information at least associated with input signal Go out comparison signal.Pulse signal generator is configured as receiving at least comparison signal, and based at least related to the comparison signal The information generation pulse signal of connection.Drive component is configured as return pulse signal, and based at least related to the pulse signal The information of connection generates gate drive signal to turn on and off transistor to influence the secondary windings phase with power converting system The electric current of association.Comparator is additionally configured to determine that input signal is greater than also being less than threshold value.Pulse signal generator also by It is configured to:Only when comparison signal indicates that input signal becomes smaller than the second value of threshold value from the first value more than threshold value, Generate the first pulse of pulse signal.Drive component is additionally configured to:In response to the first pulse of pulse signal, generation grid drives The second pulse of signal is moved to connect transistor in the pulse period associated with the second pulse.For example, according at least to Fig. 4 (A), Fig. 4 (B), Fig. 6, and/or Fig. 7 realize the system.
In another embodiment, the method for regulation power supply transformation system includes:Receive at least input signal, processing with The associated information of the input signal, and generate gate drive signal to connect based on information at least associated with the input signal Logical or shut-off transistor is so as to influence the electric current associated with the secondary windings of power converting system.Based at least with the input believe Number associated information generation gate drive signal is to turn on and off transistor so as to influenceing the secondary with power converting system The process of the associated electric current of winding includes:If input signal is more than first threshold, generation is in the first logic level Gate drive signal is to turn off transistor, and if input signal becomes smaller than Second Threshold from the first value more than Second Threshold Second value, then gate drive signal is changed into the second logic level to connect transistor from the first logic level.For example, the party Method is realized according to Fig. 4 (A), Fig. 4 (B), Fig. 5, Fig. 6, and/or Fig. 7.
In another embodiment, the method for regulation power supply transformation system includes:Receive at least input signal, the input Signal is proportional to the output voltage associated with the secondary windings of power converting system, handles the letter associated with the input signal Breath, and generate gate drive signal to turn on and off transistor so as to shadow based on information at least associated with the input signal Ring the electric current associated with the secondary windings of power converting system.Grid are generated based on information at least associated with the input signal Pole drive signal is to turn on and off transistor so as to influenceing the mistake of the electric current associated with the secondary windings of power converting system Journey includes:When only becoming smaller than the second value of first threshold from the first value more than first threshold in input signal, just generate The pulse of gate drive signal during the pulse period associated with the pulse to connect transistor.For example, according at least to Fig. 4 (A), Fig. 4 (B), Fig. 6, and/or Fig. 7 realize this method.
In another embodiment, the method for regulation power supply transformation system includes:Receive input signal, processing and input The associated information of signal, and determine whether input signal is more than first threshold.This method also includes:Based at least with inputting letter Number associated information generation comparison signal, determines whether input signal becomes smaller than second from the first value more than Second Threshold The second value of threshold value, and based on information generation detection signal at least associated with input signal.In addition, this method includes:Base In at least with comparison signal with detection signal it is associated information output gate drive signal with turn on and off transistor so that The influence electric current associated with the secondary windings of power converting system.Based at least associated with comparison signal and detection signal Information exports gate drive signal to turn on and off transistor to influence associated with the secondary windings of power converting system The process of electric current include:If comparison signal indicates that input signal is more than first threshold, generation is in the first logic level Gate drive signal to turn off transistor, and if detection signal designation input signal becomes from the first value more than Second Threshold For the second value less than Second Threshold, then gate drive signal is changed into the second logic level to connect crystalline substance from the first logic level Body pipe.For example, this method is realized according to Fig. 4 (A), Fig. 4 (B), Fig. 5, Fig. 6, and/or Fig. 7.
In another embodiment, the method for regulation power supply transformation system includes:Receive input signal, processing and input The associated information of signal, and determine that input signal is greater than also being less than threshold value.This method also includes:Based at least with first The associated information generation comparison signal of input signal, receives comparison signal, and handle the information associated with comparison signal.This Outside, this method includes:Pulse signal is generated based at least information associated with comparison signal, return pulse signal, processing with The associated information of the pulse signal, and generate gate drive signal to connect based on information at least associated with the pulse signal Logical or shut-off transistor is so as to influence the electric current associated with the secondary windings of power converting system.Based at least with comparison signal The process of associated information generation pulse signal includes:Only comparison signal indicates input signal from the first value more than threshold value When becoming smaller than the second value of threshold value, the first pulse of pulse signal is just generated.Based at least associated with the pulse signal Information generates gate drive signal to turn on and off transistor to influence associated with the secondary windings of power converting system The process of electric current include:In response to the first pulse of pulse signal, the second pulse of gate drive signal is generated with the Transistor is connected during the associated pulse period of two pulses.For example, according at least to Fig. 4 (A), Fig. 4 (B), Fig. 6, and/or Fig. 7 To realize this method.
Fig. 8 be according to another embodiment of the present invention, with interrupted conduction mode (DCM) operate, as shown in Fig. 4 (A) The simplified timing diagram of power converting system 300.The figure is only example, and it should not exceedingly limit the scope of claim. One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, waveform 802 connects power switch 330 Or shut-off is expressed as the function of time, waveform 808 is by voltage signal 362 (for example, the V at terminal DRDR) function of time is expressed as, And signal 366 (for example, at terminal G2) is expressed as the function of time by waveform 810.
As shown in figure 8, according to some embodiments, (example of receiving voltage signal 362 at terminal 390 of secondary controller 308 Such as, VDR), and determine whether voltage signal 362 exceeds the first reference voltage 829 (for example, Vref1).For example, the first reference voltage 829 (for example, Vref1) it is higher than first threshold voltage 828 (for example, Vth1), and first threshold voltage 828 is (for example, Vth1) be higher than Second threshold voltage 830 is (for example, Vth2).In another example, the first reference voltage 829 is (for example, Vref1) it is higher than ground voltage 372 (for example, zero volts), and first threshold voltage 828 is (for example, Vth1) and second threshold voltage 830 (for example, Vth2) the two is Less than ground voltage 372 (for example, zero volt).In another example, the first reference voltage 829 is (for example, Vref1) it is approximately equal to 15V.
In one embodiment, if voltage signal 362 is defined as exceeding the first reference voltage by secondary controller 308 829, then secondary controller 308 in response to voltage signal 362 (for example, VDR) be reduced to from the value higher than the first reference voltage 829 Less than first threshold voltage 828 (for example, Vth1) and second threshold voltage 830 (for example, Vth2) value of the two, by signal 366 from Logic low is changed into logic high to connect transistor 310.In another embodiment, if voltage signal 362 not by Secondary controller 308 is defined as exceeding the first reference voltage 829, even if then voltage signal 362 is (for example, VDR) it is decreased below One threshold voltage 828 is (for example, Vth1) and second threshold voltage 830 (for example, Vth2) value of the two, secondary controller 308 is not yet Signal 366 is changed into logic high by meeting from logic low, so that transistor 310 is held off.
For example, the switch periods of switch 330 include the turn-on time section during switch 330 closes (for example, connection) and opened Close the turn-off time section during 330 disconnections (for example, shut-off).In another example, as shown in figure 8, the turn-on time of switch 330 Section is (for example, Ton) start from moment t24, end at moment t25;The turn-off time section of switch 330 is (for example, Toff) start from the moment t25, end at moment t30.In another example, it is associated with the transformer including armature winding 304 and secondary windings 306 The period demagnetize (for example, Tdemag) start from moment t25, end at moment t30Or moment t30Before.In another example, t24≤ t25≤t30
In one embodiment, in turn-on time section (for example, Ton) in, the closure of switch 330 (for example, connection), such as waveform Shown in 802, and energy is stored in the transformer including armature winding 304 and secondary windings 306.For example, secondary current 352 have low value (for example, almost nil).In another example, (the example of voltage signal 362 received by secondary controller 308 Such as, VDR) there is the value 818 (for example, as shown in waveform 808) for being higher than zero.In another example, signal 366 is in logic low electricity Put down (for example, as shown in waveform 810), and transistor 310 is turned off.In another example, in turn-on time section (for example, Ton) In, the channel current 368 of transistor 310 has low value (for example, almost nil), and the body diode current of transistor 310 370 have low value (for example, almost nil).
In another embodiment, (for example, in moment t at the end of turn-on time section25Place), switch 330 disconnects (example Such as, turn off), as shown in waveform 802, and energy is transferred to primary side.For example, secondary current 352 increase (for example, when Carve t25Place).In another example, voltage signal 362 is (for example, VDR) value 826 is reduced to (for example, such as the institute of waveform 808 from value 818 Show).In another example, value 826 is less than first threshold voltage 828 (for example, Vth1) and second threshold voltage 830 (for example, Vth2) the two.In another example, first threshold voltage 828 is (for example, Vth1) and second threshold voltage 830 (for example, Vth2) two Person is below ground voltage 372 (for example, zero volt).In another example, first threshold voltage 828 is (for example, Vth1) be approximately equal to 300mV, and second threshold voltage 830 is (for example, Vth2) it is approximately equal to 10mV.In another example, the body two of transistor 310 Pole pipe 374 is begun to turn on, and the body diode current 370 of body diode 374 increases.
According to some embodiments, secondary controller 308 at terminal 390 receiving voltage signal 362 (for example, VDR), and really Whether determining voltage signal 362 exceeds the first reference voltage 829 (for example, Vref1).In one embodiment, the first reference voltage 829 (for example, Vref1) it is higher than first threshold voltage 828 (for example, Vth1), and first threshold voltage 828 is (for example, Vth1) be higher than Second threshold voltage 830 is (for example, Vth2).For example, the first reference voltage 829 is (for example, Vref1) it is approximately equal to 15V.In another reality Apply in example, if voltage signal 362 (for example, value 818) has been confirmed as beyond the first reference voltage 829 (for example, in moment t24 With moment t25Between, as shown in waveform 808), then secondary controller 308 in response to voltage signal 362 (for example, VDR) from higher than The value (for example, value 818) of first reference voltage 829 is decreased below first threshold voltage 828 (for example, Vth1) and Second Threshold Voltage 830 is (for example, Vth2) value (for example, value 826) of the two, signal 366 is changed into logic high (example from logic low Such as, in moment t25Place, as shown in waveform 810, or in moment t25At the time of afterwards) to connect transistor 310.In another reality Apply in example, if voltage signal 362 (for example, value 818) has been confirmed as beyond the first reference voltage 829 (for example, in moment t24 With moment t25Between, as shown in waveform 808), then secondary controller 308 in response to voltage signal 362 (for example, VDR) from higher than The value (for example, value 818) of first reference voltage 829 is decreased below second threshold voltage 830 (for example, Vth2) value (for example, Value 826), signal 366 is changed into logic high (for example, in moment t from logic low25Place, as shown in waveform 810, or Moment t25At the time of afterwards) to connect transistor 310.
For example, in voltage signal 362 (for example, VDR) from value 818 be reduced to value 826 at the time of with signal 366 from logic low There is delay (for example, T between at the time of level is changed into logic highd).In another example, the delay is (for example, Td) be Zero.In another example, after the connection of transistor 310, the channel current 368 of transistor 310 increases.In another example, Secondary current 352 is equal to the sum of channel current 368 and body diode current 370.
In another embodiment, if voltage signal 362 is not determined to exceed the first reference voltage 829, no matter electricity Signal 362 is pressed (for example, VDR) first threshold voltage 828 whether is decreased below (for example, Vth1) and (example of second threshold voltage 830 Such as, Vth2) value of the two, signal 366 all is maintained at logic low to keep transistor 310 to turn off by secondary controller 308. In another embodiment, if voltage signal 362 is not determined to exceed the first reference voltage 829, no matter voltage signal 362 (for example, VDR) second threshold voltage 830 whether is decreased below (for example, Vth2) value, secondary controller 308 is all by signal 366 Logic low is maintained to keep transistor 310 to turn off.
According to one embodiment, during the demagnetization period, switch 330 remains open (for example, shut-off), such as the institute of waveform 802 Show.For example, secondary current 352 reduces.In another example, if voltage signal 362 is (for example, VDR) go above first threshold Voltage 828 (for example, as shown in waveform 808), then signal 366 be changed into logic low (for example, such as waveform from logic high Shown in 810).In another example, transistor 310 is turned off, and the channel current 368 of transistor 310 is reduced to low value (example Such as, it is almost nil).In another example, the body diode current 370 of transistor 310 flows through the body diode of transistor 310 374, then it is reduced to low value.In another example, the demagnetization period is in moment t30Terminate before.In another example, immediately move back The end of magnetic period, voltage signal 362 increases to value 819, as shown in the rising edge of waveform 808.
According to some embodiments, secondary controller 308 at terminal 390 receiving voltage signal 362 (for example, VDR), and really Whether determining voltage signal 362 exceeds the first reference voltage 829 (for example, Vref1).In one embodiment, the first reference voltage 829 (for example, Vref1) it is higher than first threshold voltage 828 (for example, Vth1), and first threshold voltage 828 is (for example, Vth1) be higher than Second threshold voltage 830 is (for example, Vth2).For example, the first reference voltage 829 is (for example, Vref1) it is approximately equal to 15V.In another reality Apply in example, if voltage signal 362 (for example, value 819) is not determined to beyond the first reference voltage 829 (for example, in moment t25 Afterwards but in moment t30Before, as shown in waveform 808), even if then voltage signal 362 is (for example, VDR) it is decreased below the first threshold Threshold voltage 828 is (for example, Vth1) and second threshold voltage 830 (for example, Vth2) value (for example, value 827) of the two, secondary controller Signal 366 also from logic low will not be changed into logic high by 308, so that transistor 310 is held off.
According to another embodiment of the present invention, Fig. 8 is the electricity as shown in Fig. 4 (B) operated with interrupted conduction mode (DCM) The simplified timing diagram of source transformation system 400.For example, waveform 802, which turns on and off power switch 430, is expressed as the function of time, Voltage signal 462 (for example, at terminal DR) is expressed as the function of time by waveform 808, and waveform 810 by signal 466 (for example, At terminal G2) it is expressed as the function of time.
As previously discussed, in one embodiment, if voltage signal 362 is (for example, VDR) go above first Threshold voltage 828 (for example, as shown in waveform 808), then signal 366 be changed into logic low (for example, such as ripple from logic high Shown in shape 810), to turn off transistor 310.For example, shut-off (hard turn-off) often exists firmly as transistor 310 Ring (ringing) is produced at the drain electrode of transistor 310, because in the transformer including armature winding 304 and secondary windings 306 Remaining energy is shed by the parasitic body diode 374 of transistor 310, and with the capacitor parasitics and transformation of transistor 310 The inductor of device produces resonance.In another example, these resonance rings are (for example, in moment t as shown in waveform 80830Before Ring) it can reach less than first threshold voltage 828 (for example, Vth1) and second threshold voltage 830 (for example, Vth2) value of the two (for example, value 827).
Equally as previously discussed, in another embodiment, secondary controller 308 determines the (example of voltage signal 362 Such as, VDR) whether exceed the first reference voltage 829 (for example, Vref1), and the result based on the determination, also decide whether in response to Voltage signal 362 is (for example, VDR) first threshold voltage 828 is decreased below (for example, Vth1) and (example of second threshold voltage 830 Such as, Vth2) the two value and turn off transistor 310.For example, if the ac input voltage in primary side had big amplitude, electricity The value 818 of signal 362 is pressed to be higher than the value 819 of voltage signal 362, as shown in waveform 808;Therefore, (the example of the first reference voltage 829 Such as, Vref1) value 818 can be selected to be less than but more than value 819, to avoid passing through resonance ring (for example, such as the institute of waveform 808 Show in moment t30Ring before) false triggering secondary controller 308.In another example, the false triggering can cause primary side whole Flow the unstability of the asynchronous and output voltage 350 of device.
As emphasizing as discussed above and further herein, Fig. 8 is only example, and it should not exceedingly be limited The scope of claim processed.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, with other Electricity that pattern (for example, continuous conduction mode and critical conduction mode (for example, quasi-resonant mode)) is operated, as shown in Fig. 4 (A) Source transformation system 300 or the power converting system 400 as shown in Fig. 4 (B) can also realize scheme as shown in Figure 8.
According to some embodiments, scheme as shown in Figure 8 is realized under continuous conduction mode.In one embodiment, such as Fruit voltage signal 362 is defined as exceeding the first reference voltage 829 by secondary controller 308, then secondary controller 308 is in response to electricity Signal 362 is pressed (for example, VDR) from the value higher than the first reference voltage 829 be decreased below first threshold voltage 828 (for example, Vth1) and second threshold voltage 830 (for example, Vth2) value of the two, by signal 366 from logic low be changed into logic high with Just transistor 310 is connected.In another embodiment, if voltage signal 362 is not defined as exceeding first by secondary controller 308 Reference voltage 829, even if then voltage signal 362 is (for example, VDR) first threshold voltage 828 is decreased below (for example, Vth1) and the Two threshold voltages 830 are (for example, Vth2) value of the two, signal 366 will not also be changed into by secondary controller 308 from logic low Logic high, so that transistor 310 is held off.In another embodiment, controller 302 connects before the demagnetization period terminates Logical transistor 310 (for example, controller 302 connects transistor 310 before secondary current 352 drops to zero), and it is used as sound Should, signal 362 is (for example, VDR) increase.In another example, secondary controller 308 detects the rising edge of signal 362, and changes Varying signal 366 is to turn off transistor 310.
Fig. 9 be according to another embodiment of the present invention, with interrupted conduction mode (DCM) operate, as shown in Fig. 4 (A) The simplified timing diagram of power converting system 300.The figure is only example, and it should not exceedingly limit the scope of claim. One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, waveform 902 connects power switch 330 Or shut-off is expressed as the function of time, waveform 908 is by voltage signal 362 (for example, the V at terminal DRDR) function of time is expressed as, And signal 366 (for example, at terminal G2) is expressed as the function of time by waveform 910.
As shown in figure 9, according to some embodiments, (example of receiving voltage signal 362 at terminal 390 of secondary controller 308 Such as, VDR), and determine whether voltage signal 362 exceeds the second reference voltage 929 (for example, Vref2).In one embodiment, such as Fruit voltage signal 362 is confirmed as beyond the second reference voltage 929 (for example, Vref2), then secondary controller 308 is further determined that Voltage signal 362 is kept beyond the second reference voltage 929 (for example, Vref2) duration, and whether determine the duration Than the first threshold period (for example, Tth1) long.For example, the second reference voltage 929 is (for example, Vref2) less than first shown in Fig. 8 Reference voltage 829 is (for example, Vref1).In another example, the second reference voltage 929 is (for example, Vref2) it is higher than (the example of ground voltage 372 Such as, zero volt), and first threshold voltage 928 is (for example, Vth1) and second threshold voltage 930 (for example, Vth2) the two is below ground Voltage 372 (for example, zero volt).
In another embodiment, if voltage signal 362 is kept beyond the second reference voltage 929 (for example, Vref2) hold The continuous time is confirmed as than the first threshold period (for example, Tth1) long, then secondary controller 308 is in response to voltage signal 362 (for example, VDR) first threshold voltage 928 is decreased below (for example, V from the value higher than the second reference voltage 929th1) and the second threshold Threshold voltage 930 is (for example, Vth2) value of the two, signal 366 is changed into logic high to connect transistor from logic low 310.In another embodiment, if voltage signal 362 is kept beyond the second reference voltage 929 (for example, Vref2) it is lasting when Between be not determined to than the first threshold period (for example, Tth1) long, even if then voltage signal 362 is (for example, VDR) be decreased below First threshold voltage 928 is (for example, Vth1) and second threshold voltage 930 (for example, Vth2) value of the two, secondary controller 308 Signal 366 from logic low will not be changed into logic high, so that transistor 310 is held off.
For example, the switch periods of switch 330 include the turn-on time section during switch 330 closes (for example, connection) and opened Close the turn-off time section during 330 disconnections (for example, shut-off).In another example, as shown in figure 9, the turn-on time of switch 330 Section is (for example, Ton) start from moment t34, end at moment t35;The turn-off time section of switch 330 is (for example, Toff) start from the moment t35, end at moment t40.In another example, it is associated with the transformer including armature winding 304 and secondary windings 306 The period demagnetize (for example, Tdemag) start from moment t35, end at moment t40Or moment t40Before.In another example, t34≤ t35≤t40
In one embodiment, in turn-on time section (for example, Ton) during, the closure of switch 330 (for example, connection), such as ripple Shown in shape 902, and energy is stored in the transformer including armature winding 304 and secondary windings 306.For example, secondary electrical Stream 352 has low value (for example, almost nil).In another example, (the example of voltage signal 362 received by secondary controller 308 Such as, VDR) there is the value 918 (for example, as shown in waveform 908) for being higher than zero.In another example, signal 366 is in logic low electricity Put down (for example, as shown in waveform 910), and transistor 310 is turned off.In another example, in turn-on time section (for example, Ton) phase Between, the channel current 368 of transistor 310 has low value (for example, almost nil), and the body diode current of transistor 310 370 have low value (for example, almost nil).
In another embodiment, (for example, in moment t at the end of turn-on time section35Place), switch 330 disconnects (example Such as, turn off), as shown in waveform 902, and energy is transferred to primary side.For example, secondary current 352 increase (for example, when Carve t35Place).In another example, voltage signal 362 is (for example, VDR) value 926 is reduced to (for example, such as the institute of waveform 908 from value 918 Show).In another example, value 926 is less than first threshold voltage 928 (for example, Vth1) and second threshold voltage 930 (for example, Vth2) the two.In another example, first threshold voltage 928 is (for example, Vth1) and second threshold voltage 930 (for example, Vth2) two Person is below ground voltage 372 (for example, zero volt).In another example, first threshold voltage 928 is (for example, Vth1) be approximately equal to- 300mV, and second threshold voltage 930 is (for example, Vth2) it is approximately equal to -10mV.In another example, the body two of transistor 310 Pole pipe 374 is begun to turn on, and the body diode current 370 of body diode 374 increases.
According to some embodiments, secondary controller 308 at terminal 390 receiving voltage signal 362 (for example, VDR), and really Whether determining voltage signal 362 exceeds the second reference voltage 929 (for example, Vref2).In one embodiment, if voltage signal 362 are confirmed as exceeding (for example, in moment t34Place) the second reference voltage 929 is (for example, Vref2), then secondary controller 308 enters One step determines that voltage signal 362 is kept beyond the second reference voltage 929 (for example, Vref2) during duration (for example, from when Carve t34To moment t35Duration TA), and determine the duration (for example, duration TA) whether than the first threshold time Section is (for example, Tth1) long.For example, the second reference voltage 929 is (for example, Vref2) less than (example of the first reference voltage 829 shown in Fig. 8 Such as, Vref1).In another embodiment, if the duration is (for example, duration TA) be confirmed as than the first threshold time Section is (for example, Tth1) it is long, then secondary controller 308 in response to voltage signal 362 (for example, VDR) from higher than the second reference voltage 929 Value (for example, value 918) be decreased below first threshold voltage 928 (for example, Vth1) and second threshold voltage 930 (for example, Vth2) value (for example, value 926) of the two, signal 366 is changed into logic high (for example, in moment t from logic low35Place, As shown in waveform 910, or in t35Afterwards sometime) to connect transistor 310.In another embodiment, if this is held The continuous time is (for example, duration TA) be confirmed as than the first threshold period (for example, Tth1) long, the then sound of secondary controller 308 Should be in voltage signal 362 (for example, VDR) it is decreased below the second threshold from the value (for example, value 918) higher than the second reference voltage 929 Threshold voltage 930 is (for example, Vth2) value (for example, value 926), by signal 366 from logic low be changed into logic high (for example, In moment t35Place, as shown in waveform 910, or in t35Afterwards sometime) to connect transistor 310.
For example, duration TAThan first threshold period Tth1It is long.In another example, (the example of first threshold voltage 928 Such as, Vth1) with Fig. 8 shown in first threshold voltage 828 (for example, Vth1) identical, and second threshold voltage 930 is (for example, Vth2) With the second threshold voltage 830 shown in Fig. 8 (for example, Vth2) identical.In another example, in voltage signal 362 (for example, VDR) At the time of being reduced to value 926 from value 918 and signal 366 from logic low be changed into logic high at the time of between exist delay (for example, Td).In another example, the delay is (for example, Td) it is zero.
In another example, after the connection of transistor 310, the channel current 368 of transistor 310 increases.In another reality Apply in example, secondary current 352 is equal to the sum of channel current 368 and body diode current 370.
In another embodiment, if the duration is (for example, duration TA) be not determined to than the first threshold time Section is (for example, Tth1) long, then no matter voltage signal 362 is (for example, VDR) whether be decreased below first threshold voltage 928 (for example, Vth1) and second threshold voltage 930 (for example, Vth2) value of the two, signal 366 is all maintained at logic low by secondary controller 308 Level is to keep transistor 310 to turn off.In another embodiment, if the duration is (for example, duration TA) be not determined For than the first threshold period (for example, Tth1) long, then no matter voltage signal 362 is (for example, VDR) whether it is decreased below the second threshold Threshold voltage 930 is (for example, Vth2) value, signal 366 all is maintained at logic low to keep transistor by secondary controller 308 310 shut-offs.
According to one embodiment, during the demagnetization period, switch 330 remains open (for example, shut-off), such as the institute of waveform 902 Show.For example, secondary current 352 reduces.In another example, if voltage signal 362 is (for example, VDR) become greater than first threshold Voltage 928 (for example, as shown in waveform 908), then signal 366 be changed into logic low (for example, such as waveform from logic high Shown in 910).In another example, transistor 310 is turned off, and the channel current 368 of transistor 310 is reduced to low value (example Such as, it is almost nil).In another example, the body diode current 370 of transistor 310 flows through the body diode of transistor 310 374, then it is reduced to low value.In another example, the demagnetization period is in moment t40Terminate before.In another example, immediately move back The end of magnetic period, voltage signal 362 increases to value 919, as shown in the rising edge of waveform 908.
According to some embodiments, secondary controller 308 at terminal 390 receiving voltage signal 362 (for example, VDR), and really Whether determining voltage signal 362 exceeds the second reference voltage 929 (for example, Vref2).In one embodiment, if voltage signal 362 are confirmed as exceeding (for example, in moment t36Place) the second reference voltage 929 is (for example, Vref2), then secondary controller 308 enters One step determines that voltage signal 362 is kept beyond the second reference voltage 929 (for example, Vref2) during duration (for example, from when Carve t36To moment t37Duration TB), and determine the duration (for example, duration TB) whether than the first threshold time Section is (for example, Tth1) long.In another embodiment, if the duration is (for example, duration TB) be not determined to than the first threshold It is worth the period (for example, Tth1) long, even if then voltage signal 362 is (for example, VDR) it is decreased below (the example of first threshold voltage 928 Such as, Vth1) and second threshold voltage 930 (for example, Vth2) value (for example, value 927) of the two, secondary controller 308 also will not be by Signal 366 is changed into logic high from logic low, so that transistor 310 is held off.For example, duration TBThan first Threshold time period Tth1It is short.
According to another embodiment of the present invention, Fig. 9 is the electricity as shown in Fig. 4 (B) operated with interrupted conduction mode (DCM) The simplified timing diagram of source transformation system 400.For example, waveform 902, which turns on and off power switch 430, is expressed as the function of time, Voltage signal 462 (for example, at terminal DR) is expressed as the function of time by waveform 908, and waveform 910 by signal 466 (for example, At terminal G2) it is expressed as the function of time.
As previously discussed, in one embodiment, if voltage signal 362 is (for example, VDR) go above first Threshold voltage 928 (for example, as shown in waveform 908), then signal 366 be changed into logic low (for example, such as ripple from logic high Shown in shape 910), to turn off transistor 310.For example, hard shut-off is often in the drain electrode of transistor 310 as transistor 310 Place produces ring, because remaining energy passes through transistor 310 in the transformer including armature winding 304 and secondary windings 306 Parasitic body diode 374 shed, and the inductor of capacitor parasitics with transistor 310 and transformer produces resonance.Another In one example, these resonance rings are (for example, in moment t as shown in waveform 90840Ring before) it can reach less than first threshold Voltage 928 is (for example, Vth1) and second threshold voltage 930 (for example, Vth2) value (for example, value 927) of the two.
Equally as previously discussed, in another embodiment, secondary controller 308 determines that voltage signal 362 is kept Beyond the second reference voltage 929 (for example, Vref2) during duration whether than the first threshold period (for example, Tth1) long. For example, the result based on the determination, secondary controller 308 also decides whether in response to voltage signal 362 (for example, VDR) be reduced to Less than first threshold voltage 928 (for example, Vth1) and second threshold voltage 930 (for example, Vth2) the two value and turn off transistor 310。
In another example, if the ac input voltage in primary side has small amplitude, the value of voltage signal 362 918 and the approximately equal of value 919 of voltage signal 362, as shown in waveform 908;Therefore, selection is less than value 918 but more than value 919 First reference voltage 829 is (for example, Vref1) value be difficult, but the second reference voltage 929 is (for example, Vref2) value can quilt Voltage signal 362 is chosen so as to keep beyond the second reference voltage 929 (for example, Vref2) duration can be used for avoiding Secondary controller 308 is by resonance ring (for example, in moment t as shown in waveform 90840Ring before) false triggering.Show another In example, the false triggering can cause the unstability of the asynchronous and output voltage 350 of secondary side rectifier.
As emphasizing as discussed above and further herein, Fig. 9 is only example, and it should not exceedingly be limited The scope of claim processed.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, with other Electricity that pattern (for example, continuous conduction mode and critical conduction mode (for example, quasi-resonant mode)) is operated, as shown in Fig. 4 (A) Source transformation system 300 or the power converting system 400 as shown in Fig. 4 (B) can also realize scheme as shown in Figure 9.
According to some embodiments, scheme as shown in Figure 9 is realized under continuous conduction mode.In one embodiment, such as Fruit voltage signal 362 is kept beyond the second reference voltage 929 (for example, Vref2) duration when being confirmed as than first threshold Between section (for example, Tth1) it is long, then secondary controller 308 in response to voltage signal 362 (for example, VDR) from higher than the second reference voltage 929 value is decreased below first threshold voltage 928 (for example, Vth1) and second threshold voltage 930 (for example, Vth2) the two Value, signal 366 is changed into logic high to connect transistor 310 from logic low.In another embodiment, if electric Signal 362 is pressed to keep beyond the second reference voltage 929 (for example, Vref2) duration be not determined to than the first threshold time Section is (for example, Tth1) long, even if then voltage signal 362 is (for example, VDR) first threshold voltage 928 is decreased below (for example, Vth1) With second threshold voltage 930 (for example, Vth2) value of the two, secondary controller 308 also will not be by signal 366 from logic low It is changed into logic high, so that transistor 310 is held off.In another embodiment, controller 302 terminates it in the demagnetization period Preceding connection transistor 310 (for example, controller 302 connects transistor 310 before secondary current 352 drops to zero), and make For response, signal 362 is (for example, VDR) increase.In another example, secondary controller 308 detects the rising edge of signal 362, And change signal 366 to turn off transistor 310.
According to some embodiments, as shown in figure 9, (the example of receiving voltage signal 362 at terminal 390 of secondary controller 308 Such as, VDR), and determine whether voltage signal 362 is less than the first reference voltage 829 (for example, Vref1) but beyond the second reference voltage 929 (for example, Vref2).In one embodiment, if voltage signal 362 is determined to be below the (example of the first reference voltage 829 Such as, Vref1) but exceed the second reference voltage 929 (for example, Vref2), then secondary controller 308 further determines that voltage signal 362 The first reference voltage 829 is kept below (for example, Vref1) but exceed the second reference voltage 929 (for example, Vref2) duration, And determine the duration whether than the first threshold period (for example, Tth1) long.In another embodiment, if voltage signal 362 keep below the first reference voltage 829 (for example, Vref1) but exceed the second reference voltage 929 (for example, Vref2) it is lasting when Between be confirmed as than the first threshold period (for example, Tth1) it is long, then secondary controller 308 in response to voltage signal 362 (for example, VDR) first threshold voltage 928 is decreased below (for example, V from the value higher than the second reference voltage 929th1) and second threshold voltage 930 (for example, Vth2) value of the two, signal 366 is changed into logic high to connect transistor 310 from logic low. In another embodiment, if voltage signal 362 keeps below the first reference voltage 829 (for example, Vref1) but beyond the second reference Voltage 929 is (for example, Vref2) duration be not determined to than the first threshold period (for example, Tth1) long, even if then voltage Signal 362 is (for example, VDR) first threshold voltage 928 is decreased below (for example, Vth1) and second threshold voltage 930 (for example, Vth2) value of the two, signal 366 also from logic low will not be changed into logic high by secondary controller 308, so that crystal Pipe 310 is held off.
Figure 10 be according to another embodiment of the present invention, with interrupted conduction mode (DCM) operate, as shown in Fig. 4 (A) The simplified timing diagram of power converting system 300.The figure is only example, and it should not exceedingly limit the scope of claim. One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, waveform 1002 connects power switch 330 Logical or shut-off is expressed as the function of time, and waveform 1008 is by voltage signal 362 (for example, the V at terminal DRDR) it is expressed as time letter Number, and signal 366 (for example, at terminal G2) is expressed as the function of time by waveform 1010.
As shown in Figure 10, secondary controller 308 at terminal 390 receiving voltage signal 362 (for example, VDR), and determine from Voltage signal 362 is beyond the 3rd reference voltage 1029 (for example, Vref3) at the time of drop below the 4th ginseng to voltage signal 362 Voltage 1031 is examined (for example, Vref4) at the time of duration, and when further determining that whether the duration is than Second Threshold Between section (for example, Tth2) long.In one embodiment, if the duration be confirmed as than the Second Threshold period (for example, Tth2) it is long, then secondary controller 308 in response to voltage signal 362 (for example, VDR) subtract from the value higher than the 3rd reference voltage 1029 It is small to arrive less than first threshold voltage 1028 (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value of the two, by signal 366 are changed into logic high to connect transistor 310 from logic low.In another embodiment, if the duration It is not determined to than the Second Threshold period (for example, Tth2) long, even if then voltage signal 362 is (for example, VDR) it is decreased below One threshold voltage 1028 is (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value of the two, secondary controller 308 Signal 366 from logic low will not be changed into logic high, so that transistor 310 is held off.
For example, the switch periods of switch 330 include the turn-on time section and switch 330 of the closure of switch 330 (for example, connection) Disconnect the turn-off time section of (for example, shut-off).In another example, as shown in Figure 10, switch 330 turn-on time section (for example, Ton) start from moment t44, end at moment t45, or start from moment t50, end at moment t51.In another example, as schemed Shown in 10, the turn-off time section of switch 330 is (for example, Toff) start from moment t45, end at moment t50.In another example, The demagnetization period associated with the transformer including armature winding 304 and secondary windings 306 is (for example, Tdemag) start from the moment t45, end at moment t50Or moment t50Before.In another example, t44≤t45≤t50≤t51
In one embodiment, in turn-on time section (for example, Ton) during, the closure of switch 330 (for example, connection), such as ripple Shown in shape 1002, and energy is stored in the transformer including armature winding 304 and secondary windings 306.For example, secondary electrical Stream 352 has low value (for example, almost nil).In another example, (the example of voltage signal 362 received by secondary controller 308 Such as, VDR) there is the value 1018 (for example, as shown in waveform 1008) for being higher than zero.In another example, signal 366 is in logic low Level (for example, as shown in waveform 1010), and transistor 310 turns off.In another example, turn-on time section (for example, Ton) during, the channel current 368 of transistor 310 has low value (for example, almost nil), and the body diode of transistor 310 Electric current 370 has low value (for example, almost nil).
In another embodiment, (for example, in moment t at the end of turn-on time section45Place or in moment t51Place), open Close 330 and disconnect (for example, shut-off), as shown in waveform 1002, and energy is transferred to primary side.For example, secondary current 352 increases Greatly (for example, in moment t45Place or in moment t51Place).In another example, voltage signal 362 is (for example, VDR) subtract from value 1018 It is small to arrive value 1026 (for example, as shown in waveform 1008).In another example, value 1026 less than first threshold voltage 1028 (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) the two.In another example, first threshold voltage 1028 is (for example, Vth1) With second threshold voltage 1030 (for example, Vth2) the two is below ground voltage 372 (for example, zero volt).In another example, first Threshold voltage 1028 is (for example, Vth1) -300mV is approximately equal to, and second threshold voltage 1030 is (for example, Vth2) be approximately equal to- 10mV.In another example, the body diode 374 of transistor 310 is begun to turn on, and the body diode electricity of body diode 374 Stream 370 increases.
According to some embodiments, secondary controller 308 at terminal 390 receiving voltage signal 362 (for example, VDR), and really It is fixed to exceed the 3rd reference voltage 1029 (for example, V from voltage signal 362ref3) at the time of (for example, moment t46) arrive voltage signal 362 drop below the 4th reference voltage 1031 (for example, Vref4) at the time of (for example, moment t47) duration (for example, holding Continuous time TC), and further determine that the duration (for example, duration TC) whether than the Second Threshold period (for example, Tth2) long.For example, the 4th reference voltage 1031 is (for example, Vref4) it is less than the 3rd reference voltage 1029 (for example, Vref3), the 3rd ginseng Voltage 1029 is examined (for example, Vref3) less than the first reference voltage 829 shown in Fig. 8 (for example, Vref1), also below shown in Fig. 9 Two reference voltages 929 are (for example, Vref2).In another example, the 3rd reference voltage 1029 is (for example, Vref3) higher than the 4th reference Voltage 1031 is (for example, Vref4), the 4th reference voltage 1031 is (for example, Vref4) it is higher than first threshold voltage 1028 (for example, Vth1), And first threshold voltage 1028 is (for example, Vth1) it is higher than second threshold voltage 1030 (for example, Vth2).In another example, the 3rd Reference voltage 1029 is (for example, Vref3) and the 4th reference voltage 1031 (for example, Vref4) the two be above ground voltage 372 (for example, Zero volt), and first threshold voltage 1028 is (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) the two is below ground electricity Press 372 (for example, zero volts).In another example, duration TCThan Second Threshold period Tth2It is short.
In one embodiment, if the duration is (for example, duration TC) be not determined to than the Second Threshold time Section is (for example, Tth2) long, even if then voltage signal 362 is (for example, VDR) first threshold voltage 1028 is decreased below (for example, Vth1) With second threshold voltage 1030 (for example, Vth2) value (for example, value 1027) of the two, secondary controller 308 also will not be by signal 366 are changed into logic high from logic low, so that transistor 310 is held off.For example, (the example of first threshold voltage 1028 Such as, Vth1) with figure 9 illustrates first threshold voltage 928 (for example, Vth1) identical, also with the first threshold shown in Fig. 7 Voltage 828 is (for example, Vth1) identical.In another example, second threshold voltage 1030 is (for example, Vth2) with Fig. 9 shown in second Threshold voltage 930 is (for example, Vth2) identical, also with the second threshold voltage 830 shown in Fig. 8 (for example, Vth2) identical.
According to some embodiments, secondary controller 308 at terminal 390 receiving voltage signal 362 (for example, VDR), and really It is fixed to exceed the 3rd reference voltage 1029 (for example, V from voltage signal 362ref3) at the time of (for example, moment t48) arrive voltage signal 362 drop below the 4th reference voltage 1031 (for example, Vref4) at the time of (for example, moment t51) duration (for example, holding Continuous time TD), and further determine that the duration (for example, duration TD) whether than the Second Threshold period (for example, Tth2) long.In one embodiment, if the duration is (for example, duration TD) be confirmed as than the Second Threshold period (for example, Tth2) it is long, then secondary controller 308 in response to voltage signal 362 (for example, VDR) from higher than the 3rd reference voltage 1029 Value (for example, value 1018) be decreased below first threshold voltage 1028 (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value (for example, value 1026) of the two, signal 366 is changed into logic high (for example, in moment t from logic low51 Place, as shown in waveform 1010, or in t51Afterwards sometime) to connect transistor 310.In another embodiment, if Duration is (for example, duration TD) be confirmed as than the Second Threshold period (for example, Tth2) long, then secondary controller 308 In response to voltage signal 362 (for example, VDR) it is decreased below from the value (for example, value 1018) higher than the 3rd reference voltage 1029 Two threshold voltages 1030 are (for example, Vth2) value (for example, value 1026), signal 366 is changed into logic high from logic low (for example, in moment t51Place, as shown in waveform 1010, or in t51Afterwards sometime) to connect transistor 310.
For example, duration TDThan Second Threshold period Tth2It is long.In another example, voltage signal 362 (for example, VDR) from value 1018 be reduced to value 1026 at the time of and signal 366 from logic low be changed into logic high at the time of between deposit In delay (for example, Td).In another example, the delay is (for example, Td) it is zero.In another embodiment, connect in transistor 310 After passing to, the channel current 368 of transistor 310 increases.In another embodiment, secondary current 352 is equal to the He of channel current 368 The sum of body diode current 370.
In another embodiment, if the duration is (for example, duration TD) be not determined to than the Second Threshold time Section is (for example, Tth2) long, then no matter voltage signal 362 is (for example, VDR) whether be decreased below first threshold voltage 1028 (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value of the two, signal 366 is all maintained at logic low by secondary controller 308 Level is to keep transistor 310 to turn off.In another embodiment, if the duration is (for example, duration TD) be not determined For than the Second Threshold period (for example, Tth2) long, then no matter voltage signal 362 is (for example, VDR) whether it is decreased below the second threshold Threshold voltage 1030 is (for example, Vth2) value, signal 366 all is maintained at logic low to keep transistor by secondary controller 308 310 shut-offs.
According to one embodiment, during the demagnetization period, switch 330 remains open (for example, shut-off), such as the institute of waveform 1002 Show.For example, secondary current 352 reduces.In another example, if voltage signal 362 is (for example, VDR) go above first threshold Voltage 1028 (for example, as shown in waveform 1008), then signal 366 be changed into logic low (for example, such as waveform from logic high Shown in 1010).In another example, transistor 310 is turned off, and the channel current 368 of transistor 310 is reduced to low value (for example, almost nil).In another example, the body diode current 370 of transistor 310 flows through the pole of body two of transistor 310 Pipe 374, is then reduced to low value.In another example, the demagnetization period starts from moment t45, and in moment t50Terminate before, or Start from moment t51.In another example, the immediately end of demagnetization period, voltage signal 362 increases to value 1019, such as waveform Shown in 1008 rising edge.
According to another embodiment of the present invention, Figure 10 be with interrupted conduction mode (DCM) operate as shown in Fig. 4 (B) The simplified timing diagram of power converting system 400.For example, waveform 1002, which turns on and off power switch 430, is expressed as time letter Voltage signal 462 (for example, at terminal DR) is expressed as the function of time by number, waveform 1008, and waveform 1010 is by signal 466 (for example, at terminal G2) is expressed as the function of time.
As previously discussed, in one embodiment, if voltage signal 362 is (for example, VDR) go above first Threshold voltage 1028 (for example, as shown in waveform 1008), then signal 366 be changed into logic low (for example, such as from logic high Shown in waveform 1010) so as to turn off transistor 310.For example, hard shut-off is often in the leakage of transistor 310 as transistor 310 Ring is produced at pole, because remaining energy passes through transistor in the transformer including armature winding 304 and secondary windings 306 310 parasitic body diode 374 sheds, and the capacitor parasitics and the inductor of transformer with transistor 310 produce resonance. In another example, these resonance rings are (for example, in moment t as shown in waveform 100850Ring before) it can reach less than first Threshold voltage 1028 is (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value (for example, value 1027) of the two.
Equally as previously discussed, in another embodiment, secondary controller 308 determines 362 to surpass from voltage signal Go out the 3rd reference voltage 1029 (for example, Vref3) at the time of drop below the (example of the 4th reference voltage 1031 to voltage signal 362 Such as, Vref4) at the time of duration whether than the Second Threshold period (for example, Tth2) long.For example, the knot based on the determination Really, secondary controller 308 is further determined whether in response to voltage signal 362 (for example, VDR) it is decreased below first threshold electricity Pressure 1028 is (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) the two value and turn off transistor 310.Show another In example, if power converting system 300 is under underloading or unloaded condition, duration TA(for example, Ton) can become than One threshold time period is (for example, Tth1) short, so that lead to miss pulse-triggered (pulse firing) and/or asynchronous, but this The resonance Ring Mode of sample can be detected, as shown in Figure 10.
As emphasizing as discussed above and further herein, Figure 10 is only example, and it should not be exceedingly Limit the scope of claim.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, with it His pattern (for example, continuous conduction mode and critical conduction mode (for example, quasi-resonant mode)) operation, as shown in Fig. 4 (A) Power converting system 300 or the power converting system 400 as shown in Fig. 4 (B) can also realize scheme as shown in Figure 10.
According to some embodiments, scheme as shown in Figure 10 is realized under continuous conduction mode.In one embodiment, such as Fruit is from voltage signal 362 beyond the 3rd reference voltage 1029 (for example, Vref3) at the time of drop below to voltage signal 362 Four reference voltages 1031 are (for example, Vref4) at the time of duration be confirmed as than the Second Threshold period (for example, Tth2) It is long, then secondary controller 308 in response to voltage signal 362 (for example, VDR) be reduced to from the value higher than the 3rd reference voltage 1029 Less than first threshold voltage 1028 (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value of the two, by signal 366 It is changed into logic high from logic low to connect transistor 310.In another embodiment, if from voltage signal 362 Beyond the 3rd reference voltage 1029 (for example, Vref3) at the time of drop below the 4th reference voltage 1031 to voltage signal 362 (for example, Vref4) at the time of duration be not determined to than the Second Threshold period (for example, Tth2) long, even if then voltage Signal 362 is (for example, VDR) first threshold voltage 1028 is decreased below (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value of the two, signal 366 also from logic low will not be changed into logic high by secondary controller 308, so that crystal Pipe 310 is held off.In another embodiment, controller 302 connects transistor 310 (for example, control before the demagnetization period terminates Device 302 processed connects transistor 310 before secondary current 352 drops to zero), and as response, signal 362 is (for example, VDR) Increase.In another example, secondary controller 308 detects the rising edge of signal 362, and changes signal 366 to turn off crystal Pipe 310.
According to some embodiments, the as shown in Figure 10, (example of receiving voltage signal 362 at terminal 390 of secondary controller 308 Such as, VDR), it is determined that from voltage signal 362 less than the first reference voltage 829 (for example, Vref1) and the second reference voltage 929 (for example, Vref1) the two but beyond the 3rd reference voltage 1029 (for example, Vref3) at the time of drop below the 4th ginseng to voltage signal 362 Voltage 1031 is examined (for example, Vref4) at the time of duration, and when further determining that whether the duration is than Second Threshold Between section (for example, Tth2) long.For example, Vref1>Vref2>Vref3>Vref4.In one embodiment, if the duration is determined For than the Second Threshold period (for example, Tth2) it is long, then secondary controller 308 in response to voltage signal 362 (for example, VDR) from height First threshold voltage 1028 is decreased below (for example, V in the value of the 3rd reference voltage 1029th1) and second threshold voltage 1030 (for example, Vth2) value of the two, signal 366 is changed into logic high to connect transistor 310 from logic low.Another In one embodiment, if the duration is not determined to than the Second Threshold period (for example, Tth2) long, even if then voltage is believed Numbers 362 (for example, VDR) first threshold voltage 1028 is decreased below (for example, Vth1) and second threshold voltage 1030 (for example, Vth2) value of the two, signal 366 also from logic low will not be changed into logic high by secondary controller 308, so that crystal Pipe 310 is held off.
Figure 11 is the secondary for showing the part as power converting system 300 according to another embodiment of the present invention The simplification figure of some components of controller 308.The figure is only example, and it should not exceedingly limit the scope of claim. One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.Secondary controller 308 includes:Clamper component 1102, compensate component 1104, rising edge detection components 1106, comparator 1124,1210,1220,1230 and 1240, trailing edge inspection Survey component 1110, time schedule controller 1112, logic control component 1114, gate drivers 1116, underloading detector 1118, signal Generator 1120, oscillator 1122, under-voltage locking component 1128, reference signal generator 1126, OR gate 1250 disappears and trembles component 1224, and timeout component 1234.For example, some components of secondary controller 308 are used for synchronous rectification, including:Clamper Component 1102, compensates component 1104, and rising edge detection components 1106, comparator 1124,1210,1220,1230 and 1240 declines Along detection components 1110, time schedule controller 1112, logic control component 1114, gate drivers 1116, OR gate 1250 disappears and trembles group Part 1224, and timeout component 1234.In another example, some components of secondary controller 308 are used for output voltage Detection and control, including:Underloading detector 1118, signal generator 1120, oscillator 1122, reference signal generator 1126, Logic control component 1114 and gate drivers 1116.In another example, synchronous rectification is used in secondary controller 308 Component and secondary controller 308 in be used for output voltage detect and control component be integrated on the same chip.
In one embodiment, clamper component 1102 is from (the example of terminal 390 (for example, terminal DR) receiving voltage signal 362 Such as, VDR).For example, voltage signal 362 is (for example, VDR) it is clamped the clamper of component 1102.In another example, clamper component 1102 Removed from secondary controller 308.In another embodiment, rising edge detection components 1106, comparator 1210,1220,1230 With 1240, and the reception signal 1158 of trailing edge detection components 1110, the signal 1158 is equal to what is changed by compensation component 1104 Voltage signal 362.For example, compensation component 604 is removed, and signal 1158 is identical with signal 362.In another example, on Rising along detection components 1106 includes comparator, and trailing edge detection components 1110 include comparator.
In another embodiment, comparator 1210 receives the reference voltage 1218 of signal 1158 and first (for example, the first reference Voltage 829), and to OR gate output signal 1216.If for example, signal 1158 is more than the first reference voltage 1218 (for example, first Reference voltage 829), then signal 1216 is in logic high.In another example, if signal 1158 is less than first with reference to electricity 1218 (for example, first reference voltages 829) are pressed, then signal 1216 is in logic low.In another embodiment, comparator 1220 receive the reference voltages 1228 (for example, second reference voltage 929) of signal 1158 and second, and tremble component 1224 to disappearing and export Signal 1222.If for example, signal 1158 is more than the second reference voltage 1228 (for example, second reference voltage 929), signal 1222 are in logic high.In another example, if signal 1158 is less than the second reference voltage 1228 (for example, the second ginseng Examine voltage 929), then signal 1222 is in logic low.
In another embodiment, comparator 1230 receives the reference voltage 1238 of signal 1158 and the 3rd (for example, the 3rd reference Voltage 1029), and to the output signal 1232 of timeout component 1234.If for example, signal 1158 is more than the 3rd reference voltage 1238 (for example, the 3rd reference voltages 1029), then signal 1232 is in logic high.In another example, if signal 1158 are less than the 3rd reference voltage 1238 (for example, the 3rd reference voltage 1029), then signal 1232 is in logic low.Another In one embodiment, comparator 1240 receives the reference voltage 1248 (for example, the 4th reference voltage 1031) of signal 1158 and the 4th, and To the output signal 1242 of timeout component 1234.If for example, signal 1158 is more than the 4th reference voltage 1248 (for example, the 4th Reference voltage 1031), then signal 1242 is in logic high.In another example, if signal 1158 is less than the 4th reference Voltage 1248 (for example, the 4th reference voltage 1031), then signal 1242 is in logic low.
According to one embodiment, disappear and tremble component 1224 from the reception signal 1222 of comparator 1220, whether determine signal 1222 Indication signal 1158 than the first threshold period (for example, Tth1) the second reference voltage is remained above in longer duration 1228 (for example, second reference voltages 929), and to the output signal 1226 of OR gate 1250.If determined for example, disappearing and trembling component 1224 The indication signal 1158 of signal 1222 than the first threshold period (for example, Tth1) second is remained above in longer duration Reference voltage 1228 (for example, second reference voltage 929), then disappear and tremble signal of the generation of component 1224 in logic high 1226.In another example, determine the non-indication signal 1158 of signal 1222 than the first threshold time if disappearing and trembling component 1224 Section is (for example, Tth1) be remained above the second reference voltage 1228 (for example, second reference voltage 929) in longer duration, then Disappear and tremble signal 1226 of the generation of component 1224 in logic low.
According to another embodiment, timeout component 1234 receives signal 1232 from comparator 1230, and from comparator 1240 receive signals 1242, and to the output signal 1236 of OR gate 1250.For example, timeout component 1234 is determined from voltage signal 1158 drop below at the time of exceeding the 3rd reference voltage 1238 (for example, the 3rd reference voltage 1029) to voltage signal 1158 Duration at the time of 4th reference voltage 1248 (for example, the 4th reference voltage 1031).In another example, if institute is true The fixed Duration Ratio Second Threshold period is (for example, Tth2) long, then the generation of timeout component 1234 is in logic high Signal 1236.In another example, if the identified duration unlike the Second Threshold period (for example, Tth2) long, then it is fixed When device assembly 1234 generation in logic low signal 1236.
According to another embodiment, OR gate 1250 respectively from comparator 1210, disappear and tremble component 1224 and timeout component 1234 Signal 1216,1226 and 1236 is received, and to trailing edge detection components 1110 (for example, comparator) output signal 1252.For example, If any one in signal 1216,1226 and 1236 is in logic high, OR gate generation is in logic high Signal 1252.In another example, if signal 1216,1226 and 1236 is not located at logic high, OR gate generation In the signal 1252 of logic low.
In one embodiment, trailing edge detection components 1110 (for example, comparator) receive signal 1252 from OR gate 1250, And to the output signal 1111 of time schedule controller 1112.If for example, signal 1252 is in logic high, trailing edge detection group Part 1110 (for example, comparator) is enabled for trailing edge detection;And if signal 1252 is in logic low, then trailing edge Detection components 1110 (for example, comparator) are not enabled (for example, in standby) for trailing edge detection.In another example, If trailing edge detection components 1110 (for example, comparator) are enabled, if signal 1158 becomes less than second threshold voltage 1113 (for example, second threshold voltage 830, second threshold voltage 930, and/or second threshold voltages 1030), then trailing edge is examined Survey component 1110 and signal 1111 is changed into logic low from logic high.In another example, if trailing edge detection group Part 1110 (for example, comparator) is not enabled, then trailing edge detection components 1110 signal 1111 is maintained at logic high and No matter whether signal 1158 becomes less than second threshold voltage 1113.
In another embodiment, rising edge detection components 1106 (for example, comparator) are exported to time schedule controller 1112 and believed Numbers 1107.If for example, signal 1158 goes above first threshold voltage 1109 (for example, first threshold voltage 828, the first threshold Threshold voltage 928, and/or first threshold voltage 1028), then rising edge detection components 1106 become signal 1107 from logic high For logic low.In another example, first threshold voltage 1109 is more than second threshold voltage 1113 in size.
In another embodiment, time schedule controller 1112 receives signal 1107 and 1111, and defeated to logic controller 1114 Go out signal 1172.For example, logic controller 1114 is to the output signal 1115 of gate drivers 1116.In another example, grid Driver 1116 provides signal 366 (for example, at terminal G2) with driving transistor 310.For example, in response to signal 1107 from patrolling Collect high level and be changed into logic low, signal 366 is changed into logic low to close by gate drivers 1116 from logic high Disconnected transistor 310.In another example, if signal 1111 is changed into logic low, gate drivers from logic high Signal 366 is changed into logic high to connect transistor 310 by 1116 from logic low.
According to one embodiment, secondary controller 308 is by signal 388 (for example, Vs) continuous monitoring output voltage 350. For example, comparator 1124 receives reference signal 1180 and signal 388 (for example, Vs), and output signal 1182.In another example In, underloading detector 1118 receives clock signal 1174 from oscillator 1122 and receives signal from time schedule controller 1112 1176.In another example, some of indication signal 362 of signal 1176 switch events (for example, rising edge or trailing edge). In another example, the signal 1178 of the switching frequency of the output indication power converting system 300 of underloading detector 1118.Show another In example, signal generator 1120 receives signal 1178 and signal 1182, and to the output signal 1184 of logic control component 1114 with Influence the state of transistor 310.
In another embodiment, if output voltage 350 under any conditions (for example, when output load condition from no-load/ When underloading condition is changed into full load conditions) drop below certain threshold level, then output voltage 350 reduces (for example, less than certain threshold value Level).If for example, signal 388 is (for example, Vs) be changed into size from the first value for being more than reference signal 1180 in size Less than the second value of reference signal 1180, then signal generator 1120 generates pulse so as in short time period in signal 1184 Connect transistor 310.
According to some embodiments, if signal 1178 indicates that power converting system 300 under the conditions of no-load/underloading, is believed Number generator 620 is in response to signal 388 (for example, Vs) be changed into from the first value for being more than reference signal 1180 in size in size The upper second value less than reference signal 1180, pulse is exported in signal 1184.For example, in response to the pulse in signal 1184, Gate drivers 1116 generate pulse 730 in signal 366.In another example, related to the pulse 730 in signal 366 In the pulse period of connection, transistor 310 is switched on, and channel current 368 is in different directions (for example, from output capacitor 312 By transistor 310 to ground) flowing.In another example, feedback signal 360 increases in size, and forms pulse.According to certain A little embodiments, controller 302 detects the pulse of feedback signal 360, and as response, increases the peak value of armature winding 304 Electric current and switching frequency to primary side to transmit more energy.For example, output voltage 350 and voltage signal 388 finally exist Increase in size.
As emphasizing as discussed above and further herein, Figure 11 is only example, and it should not be exceedingly Limit the scope of claim.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.For example, comparing Device 1230 and 1240 and timeout component 1234 are removed from secondary controller 308, and OR gate 1250 receives signal 1216 With 1226 and to trailing edge detection components 1110 (for example, comparator) output signal 1252.In another example, comparator 1220 Tremble component 1224 with disappearing and removed from secondary controller 308, and OR gate 1250 receives signal 1216 and 1236 and to trailing edge Detection components 1110 (for example, comparator) output signal 1252.In another example, comparator 1210 is from secondary controller 308 It is middle remove, and OR gate 1250 receive signal 1226 and 1236 and to trailing edge detection components 1110 (for example, comparator) export Signal 1252.
In another example, comparator 1220,1230 and 1240, disappear and tremble component 1224, timeout component 1234, Yi Jihuo Door 1250 is removed from secondary controller 308, and signal 1216 is used as signal 1252 and by trailing edge detection components 1110 (for example, comparator) is received.In another example, comparator 1210,1230 and 1240, timeout component 1234, and OR gate 1250 remove from secondary controller 308, and signal 1226 is used as signal 1252 and by the (example of trailing edge detection components 1110 Such as, comparator) receive.In another example, comparator 1210 and 1220, disappear and tremble component 1224, and OR gate 1250 is from secondary Removed in controller 308, and signal 1236 is used as signal 1252 and by trailing edge detection components 1110 (for example, comparator) Receive.
Figure 12 is according to one embodiment of present invention, to show for enabling one as power converting system 300 The simplification figure of the method for the trailing edge detection components 1110 of the secondary controller 308 divided.The figure is only example, and it should not mistake The scope of degree ground limitation claim.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.Method 1300 include:For the process 1310 for keeping trailing edge detection components 1110 to be not enabled on, for determining the mistake whether condition A meets Journey 1320, for determining the process 1322 whether condition B meets, for determining the process 1324 whether condition C meets, for true At least one process 1330 whether met in fixed condition A, condition B or condition C, and for enabling trailing edge detection group The process 1340 of part 1110.
In process 1310, trailing edge detection components 1110 keep being not enabled on (for example, keeping standby).If for example, signal 1252 be in logic low, then trailing edge detection components 1110 (for example, comparator) be not enabled (for example, in standby) use In trailing edge detection.In another example, if trailing edge detection components 1110 (for example, comparator) are not enabled, decline Along detection components 1110 by signal 1111 be maintained at logic high but regardless of signal 1158 whether become smaller than Second Threshold electricity Pressure 1113.
In process 1320, whether the condition A of determination meets, and its conditional A requires that signal 1158 is more than the first reference voltage 1218 (for example, first reference voltages 829).If for example, signal 1158 is more than the first reference voltage 1218 (for example, the first ginseng Examine voltage 829), then condition A is confirmed as meeting.In another example, process 1320 is performed by comparator 1210.
In process 1322, whether the condition B of determination meets, and its conditional B requires signal 1158 than the first threshold period (Tth1) the second reference voltage 1228 (for example, first reference voltage 929) is remained above in longer duration.If for example, Signal 1158 is than first threshold period (Tth1) be remained above in longer duration the second reference voltage 1228 (for example, Second reference voltage 929), then condition B is confirmed as meeting.In another example, process 1322 is trembled by comparator 1220 and disappearing Component 1224 is performed.
In process 1324, determine whether condition C meets, wherein condition C requirement is referred to from voltage signal 1158 beyond the 3rd At the time of voltage 1238 (for example, the 3rd reference voltage 1029) the 4th reference voltage 1248 is dropped below to voltage signal 1158 Duration Ratio Second Threshold period (T at the time of (for example, the 4th reference voltage 1031)th2) long.If for example, from electricity Pressure signal 1158 declines at the time of exceeding the 3rd reference voltage 1238 (for example, the 3rd reference voltage 1029) to voltage signal 1158 Duration Ratio Second Threshold period at the time of to less than the 4th reference voltage 1248 (for example, the 4th reference voltage 1031) (Tth2) long, then condition C is confirmed as meeting.In another example, process 1324 is by comparator 1230 and 1240 and timer Component 1234 is performed.
According to some embodiments, the second reference voltage 1228 (for example, second reference voltage 929) is less than the first reference voltage 1218 (for example, first reference voltages 829), the 3rd reference voltage 1238 (for example, the 3rd reference voltage 1029) is less than the second ginseng Voltage 1228 (for example, second reference voltage 929) is examined, the 4th reference voltage 1248 (for example, the 4th reference voltage 1031) is less than 3rd reference voltage 1238 (for example, the 3rd reference voltage 1029), and second threshold voltage 1113 is (for example, Second Threshold is electric Pressure 830, second threshold voltage 930, and/or second threshold voltage 1030) it is less than the 4th reference voltage 1248 (for example, the 4th ginseng Examine voltage 1031).According to some embodiments, the first reference voltage 1218 (for example, first reference voltage 829), second are with reference to electricity Press 1228 (for example, second reference voltages 929), the 3rd reference voltage 1238 (for example, the 3rd reference voltage 1029), the 4th reference Each of voltage 1248 (for example, the 4th reference voltage 1031) is more than zero, and second threshold voltage 1113 is (for example, the second threshold Threshold voltage 830, second threshold voltage 930, and/or second threshold voltage 1030) it is less than zero.
In process 1330, whether at least one for determining in condition A, condition B or condition C meets.If for example, condition A Meet, then at least one satisfaction in condition A, condition B or condition C.In another example, if condition A and condition B is met, Then at least one in condition A, condition B or condition C is met.In another example, process 1330 is performed by OR gate 1250.
According to one embodiment, if condition A, condition B or condition C are all unsatisfactory for, implementation procedure 1310 so that under Drop keeps being not enabled on (for example, keeping standby) along detection components 1110.According to another embodiment, if condition A, condition B or bar At least one in part C is met, then implementation procedure 1340.
For example, if trailing edge detection components 1110 (for example, comparator) were not enabled, trailing edge detection components 1110 Signal 1111 is maintained at logic high but regardless of signal 1158 and whether becomes smaller than second threshold voltage 1113 (for example, Two threshold voltages 830, second threshold voltage 930, and/or second threshold voltage 1030).In another example, if trailing edge Detection components 1110 (for example, comparator) are not enabled, then gate drivers 1116 by signal 366 be maintained at logic low from And keep transistor 310 to turn off but regardless of whether signal 1158 becomes smaller than second threshold voltage 1113 (for example, Second Threshold is electric Pressure 830, second threshold voltage 930, and/or second threshold voltage 1030).
In step 1340, trailing edge detection components 1110 are enabled.If for example, trailing edge detection components 1110 (for example, Comparator) it is enabled, if then signal 1158 becomes less than second threshold voltage 1113 (for example, second threshold voltage 830, Two threshold voltages 930, and/or second threshold voltage 1030), then trailing edge detection components 1110 are by signal 1111 from logically high Level is changed into logic low.In another example, if signal 1111 is changed into logic low, grid from logic high Signal 366 is changed into logic high by driver 1116 from logic low, to connect transistor 310.In another example, such as Fruit trailing edge detection components 1110 (for example, comparator) are enabled and if signal 1158 becomes less than second threshold voltage 1113 (for example, second threshold voltage 830, second threshold voltage 930, and/or second threshold voltage 1030), then gate drivers 1116 Signal 366 is changed into logic high from logic low, to connect transistor 310.
As emphasizing as discussed above and further herein, Figure 12 is only example, and it should not be exceedingly Limit the scope of claim.One of ordinary skill in the art will be recognized that many changes, substitutions and modifications.If for example, Trailing edge detection components 1110 are enabled in process 1340, then detecting signal 1158 in trailing edge detection components 1110 is changed into small After second threshold voltage 1113, trailing edge detection components 1110 are changed into being not enabled on again, so that repetitive process 1310.Another In one example, signal 1158 is identical with signal 362.
In one embodiment, secondary controller 408 is identical with the secondary controller 308 shown in Figure 11.Implement another In example, Figure 12 is shown for enabling the trailing edge inspection as the secondary controller 408 of a part for power converting system 400 Survey the simplification figure of the method for component 1110.
According to some embodiments, with other patterns (for example, continuous conduction mode and critical conduction mode are (for example, quasi-resonance Pattern)) operation, the secondary controller 308 of a part as power converting system 300 or be used as power converting system 400 The secondary controller 408 of a part can also realize scheme as is illustrated by figs. 11 and 12.
Certain embodiments of the present invention is provided and can avoided due to being shaken caused by capacitor parasitics and transformer inductance Swing and cause the rectification circuit of the erroneous trigger of switching pulse.For example, the erroneous trigger of switching pulse can cause secondary side switch It is asynchronous between control and primary side switch control.In another example, this it is asynchronous cause may cause power conversion The integrity problem of system failure.It is synchronous with primary side switch that some embodiments of the present invention provide raising secondary side switch Property and also improve power converting system reliability system and method.For example, the secondary controller of the present invention is recognizable negative Pulse is really to connect signal or simply resonance ring or burr.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Divide and be based on the input signal, generate drive signal to turn on and off transistor to influence and power supply in second controller terminal The associated electric current of the secondary windings of transformation system.In addition, the system controller is additionally configured to:Determine the input signal Whether one moment was more than first threshold;It was determined to be in for the first moment more than first threshold in response to the input signal, it is determined that should Whether input signal is less than Second Threshold at the second moment;And it was determined to be in for the second moment in response to the input signal to be less than Second Threshold, the second logic level is changed into by the drive signal at second controller terminal from the first logic level.In addition, second Moment is after the first moment.For example, realizing the system controller according at least to Fig. 8 and/or Figure 11.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Divide and be based on the input signal, drive signal is generated in second controller terminal to turn on and off transistor, with influence and power supply The associated electric current of the secondary windings of transformation system.In addition, the system controller is additionally configured to:Whether determine the input signal First threshold is remained above within the period longer than predetermined lasting time, and is determined to be in response to the input signal First threshold is remained above in the period longer than predetermined lasting time, certain of input signal after that period of time is determined Whether the moment is less than Second Threshold.In addition, the system controller is additionally configured to:This is determined to be in response to the input signal Moment is less than Second Threshold, and the drive signal at second controller terminal is changed into the second logic level from the first logic level. For example, realizing the system controller according at least to Fig. 9 and/or Figure 11.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Divide and be based on the input signal, generate drive signal to turn on and off transistor to influence and power supply in second controller terminal The associated electric current of the secondary windings of transformation system.In addition, the system controller is additionally configured to:It is determined that becoming from the input signal Must be more than first threshold the first moment be become less than to the input signal Second Threshold the second moment time interval whether It is longer than predetermined lasting time, and it is confirmed as in response to the time interval longer than predetermined lasting time, determine the input signal Whether certain moment after the time interval is less than the 3rd threshold value.In addition, the system controller is additionally configured to:In response to this Input signal is determined to be in the moment less than the 3rd threshold value, and the drive signal at second controller terminal is electric from the first logic It is flat to be changed into the second logic level.For example, realizing the system controller according at least to Figure 10 and/or Figure 11.
According to another embodiment, the system controller for regulation power supply transformation system includes the first controller terminal and the Two controller terminals.In addition, the system controller is configured as in the first controller terminal reception input signal, and at least portion Divide and be based on the input signal, generate drive signal to turn on and off transistor to influence and power supply in second controller terminal The associated electric current of the secondary windings of transformation system.In addition, the system controller is additionally configured to:Whether determine the input signal More than first threshold;Determine whether the input signal is remained above second within the period longer than the first predetermined lasting time Threshold value;And determine that go above the first moment of the 3rd threshold value from the input signal becomes less than the 4th threshold to the input signal Whether the time interval at the second moment of value is longer than the second predetermined lasting time.In addition, the system controller is additionally configured to:Ring Should be determined to be greater than in the input signal first threshold, the input signal be determined to be in it is longer than the first predetermined lasting time Period in be remained above Second Threshold or the time interval is confirmed as longer than the second predetermined lasting time, determine that this is defeated Enter whether signal is less than the 5th threshold value, and be confirmed as in response to the input signal less than the 5th threshold value, by second controller Drive signal at terminal is changed into the second logic level from the first logic level.For example, coming real according at least to Figure 11 and/or Figure 12 The existing system controller.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal with turn on and off transistor so as to The influence electric current associated with the secondary windings of power converting system.In addition, the processing packet associated with the input signal Include:Determine whether the input signal is more than first threshold at the first moment.In addition, being at least partially based on input signal generation drive Signal is moved to turn on and off transistor to influence the electric current associated with the secondary windings of power converting system to include:Response It was determined to be in for the first moment more than first threshold in the input signal, determines whether the input signal is less than the at the second moment Two threshold values, and it was determined to be in for the second moment less than Second Threshold in response to the input signal, drive signal is patrolled from first Collect level and be changed into the second logic level.In addition, the second moment is after the first moment.For example, according at least to Fig. 8 and/or Figure 11 To realize this method.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal with turn on and off transistor so as to The influence electric current associated with the secondary windings of power converting system.In addition, the processing packet associated with the input signal Include:Determine whether the input signal is remained above first threshold within the period longer than predetermined lasting time.In addition, at least Input signal generation drive signal is based partially on to turn on and off transistor to influence the secondary with power converting system The associated electric current of winding includes:It is determined to be in the period longer than predetermined lasting time and protects in response to the input signal Hold more than first threshold, determine that whether certain moment of the input signal after that period of time is less than Second Threshold, and respond The moment is determined to be in less than Second Threshold in the input signal, and drive signal is changed into the second logic from the first logic level Level.For example, realizing this method according at least to Fig. 9 and/or Figure 11.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal with turn on and off transistor so as to The influence electric current associated with the secondary windings of power converting system.In addition, the processing packet associated with the input signal Include:It is determined that the first moment for going above first threshold from the input signal becomes less than the of Second Threshold to the input signal Whether the time interval at two moment is longer than predetermined lasting time.In addition, being at least partially based on input signal generation drive signal To turn on and off transistor so as to influence the electric current associated with the secondary windings of power converting system to include:During in response to this Between interval be confirmed as longer than predetermined lasting time, determine whether certain moment of the input signal after the time interval is less than 3rd threshold value, and the moment is determined to be in less than the 3rd threshold value in response to the input signal, drive signal is patrolled from first Collect level and be changed into the second logic level.For example, realizing this method according at least to Figure 10 and/or Figure 11.
According to another embodiment, the method for regulation power supply transformation system includes:Input signal is received, is handled defeated with this Enter the associated information of signal, and be at least partially based on input signal generation drive signal with turn on and off transistor so as to The influence electric current associated with the secondary windings of power converting system.In addition, the processing packet associated with the input signal Include:Determine whether the input signal is more than first threshold;Determine the input signal whether longer than the first predetermined lasting time Period in be remained above Second Threshold;And determine from the input signal go above the first moment of the 3rd threshold value to this Whether the time interval that input signal becomes less than the second moment of the 4th threshold value is longer than the second predetermined lasting time.In addition, extremely Input signal generation drive signal is at least partly based on to turn on and off transistor to influence time with power converting system The associated electric current of level winding includes:First threshold is determined to be greater than in response to the input signal, the input signal is determined To be remained above Second Threshold within the period longer than the first predetermined lasting time, or the time interval is confirmed as than Two predetermined lasting times are long, determine that whether the input signal is less than the 5th threshold value, and be confirmed as in response to the input signal Less than the 5th threshold value, drive signal is changed into the second logic level from the first logic level.For example, according at least to Figure 11 and/or Figure 12 realizes this method.
Figure 13 is according to one embodiment of present invention, to show the power conversion with secondary side synchronous rectifier device (SR) The simplification figure of system.The figure is only example, and it should not exceedingly limit the scope of claim.The ordinary skill of this area Personnel will be recognized that many changes, substitutions and modifications.Power converting system 3300 (for example, flyback power supply converter) is included just Level side pulse width modulation (PWM) controller 3302, armature winding 3304, secondary windings 3306, secondary side synchronous rectifier device (SR) controller 3308, transistor 3310 (for example, MOSFET), output capacitive load 3312, output resistance load 3314, And power switch 3330 (for example, transistor).Secondary side synchronous rectifier device (SR) controller 3308 include terminal 3390, 3392nd, 3394 and 3396.
In one embodiment, terminal 3390 receives the terminal 3364 for indicating transistor 3310 (for example, transistor 3310 Drain electrode end) place voltage voltage signal 3362, and the output drive signal 3366 of terminal 3392 to transistor 3310 (for example, MOSFET).In another embodiment, terminal 3394, which is received, indicates output capacitive load 3312 and output capacitive load 3314 The voltage signal 3316 of the output voltage received.In another embodiment, terminal 3396 is with being biased to primary side.
According to some embodiments, the generation drive signal 3332 of primary side pulse width modulation (PWM) controller 3302 and To power switch 3330 (for example, transistor) output drive signal 3332, secondary side synchronous rectifier device (SR) controller 3308 is given birth to Into drive signal 3366 and to transistor 3310 (for example, MOSFET) output drive signal 3366.
In one embodiment, the detection of secondary side synchronous rectifier device (SR) controller 3308 indicates the terminal of transistor 3310 The voltage signal 3362 of the voltage at 3364 (for example, the building of transistor 3310 is extreme) places, and decision transistor 3310 is provided The drive signal 3366 turned on and off.In another embodiment, secondary side synchronous rectifier device (SR) controller 3308 determines to make Scheme or Quick connecting pipe fitting scheme are connected with slow.
According to one embodiment, if secondary side synchronous rectifier device (SR) controller 3308 determines to use Quick connecting pipe fitting scheme, Then the detectable voltage signals 3362 of secondary side synchronous rectifier device (SR) controller 3308 whether become less than threshold voltage (for example, Vth).For example, in Quick connecting pipe fitting scheme, if secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 Threshold voltage (for example, Vth) is become less than, then secondary side synchronous rectifier device (SR) controller 3308 is immediately by drive signal 3366 It is changed into logic high from logic low;If secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 do not become less than threshold voltage (for example, Vth), then secondary side synchronous rectifier device (SR) controller 3308 is not believed driving Numbers 3366 are changed into logic high from logic low.In another example, if drive signal 3366 is in Quick connecting pipe fitting scheme Logic high is not changed into it from logic low, then the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 Quick connecting pipe fitting scheme is remained, until being changed into logically high electricity from logic low in Quick connecting pipe fitting scheme in response to drive signal 3366 Flat, the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 is changed into slow connection scheme from Quick connecting pipe fitting scheme. In another example, if drive signal 3366 is changed into logic high in Quick connecting pipe fitting scheme from logic low, for secondary Level side synchronous rectifier (SR) controller 3308 connection scheme change back to slow connection scheme from Quick connecting pipe fitting scheme, until in response to One or more predetermined conditions are satisfied (for example, as shown in Figure 14, Figure 15, and/or Figure 16), for secondary side synchronous rectifier device (SR) the connection scheme of controller 3308 is changed into Quick connecting pipe fitting scheme from slow connection scheme.
According to another embodiment, if secondary side synchronous rectifier device (SR) controller 3308 determines to connect scheme using slow, Then the detectable voltage signals 3362 of secondary side synchronous rectifier device (SR) controller 3308 whether become less than threshold voltage (for example, Vth).For example, in slow connection scheme, if secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 Threshold voltage (for example, Vth) is become less than, then secondary side synchronous rectifier device (SR) controller 3308 is not immediately by drive signal 3366 are changed into logic high from logic low.In another example, in slow connection scheme, if secondary side synchronous rectifier Device (SR) controller 3308 detects voltage signal 3362 and becomes less than threshold voltage (for example, Vth), then secondary side synchronous rectifier Whether the detectable voltage signals 3362 of device (SR) controller 3308 keep small within the duration equal to or more than predetermined amount of time In threshold voltage (for example, Vth), and if voltage signal 3362 is protected within the duration equal to or more than predetermined amount of time Hold less than predetermined voltage (for example, Vth), then secondary side synchronous rectifier device (SR) controller 3308 by drive signal 3366 from logic Low level is changed into logic high.In another example, in slow connection scheme, if secondary side synchronous rectifier device (SR) is controlled Device 3308 detects voltage signal 3362 and threshold value electricity is not remained less than within the duration equal to or more than predetermined amount of time Press (for example, Vth), then drive signal 3366 is not changed into by secondary side synchronous rectifier device (SR) controller 3308 from logic low Logic high.In another example, no matter whether drive signal 3366 is changed into patrolling in slow connection scheme from logic low High level is collected, the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 keeps connecting the slow of scheme by default Connection scheme, until being satisfied (for example, as shown in Figure 14, Figure 15, and/or Figure 16) in response to one or more predetermined conditions, Connection scheme for secondary side synchronous rectifier device (SR) controller 3308 is changed into Quick connecting pipe fitting scheme from slow connection scheme.
According to some embodiments, in Quick connecting pipe fitting scheme, if secondary side synchronous rectifier device (SR) controller 3308 is detected Threshold voltage (for example, Vth) is become less than to voltage signal 3362, then secondary side synchronous rectifier device (SR) controller 3308 is immediately Drive signal 3366 is changed into logic high from logic low.For example, in secondary side synchronous rectifier device (SR) controller 3308 are changed into drive signal 3366 after logic high from logic low in Quick connecting pipe fitting scheme, secondary side synchronous rectifier Drive signal 3366 is maintained at logic high by device (SR) controller 3308, then by drive signal 3366 from logic high It is changed into logic low.For example, under continuous conduction mode (CCM), secondary side synchronous rectifier device (SR) controller 3308 is predicted Drive signal 3366 is become again to the time of logic low from logic high.In another example, in interrupted conduction mode (DCM) under, secondary side synchronous rectifier device (SR) controller 3308 is flowing through the source terminal and transistor 3310 of transistor 3310 Drive signal 3366 is become again logic low when the size of electric current between drain electrode end reaches zero from logic high.
According to some embodiments, in slow connection scheme, if secondary side synchronous rectifier device (SR) controller 3308 is detected Threshold voltage (for example, Vth) is become less than to voltage signal 3362, then secondary side synchronous rectifier device (SR) controller 3308 is detected Whether voltage signal 3362 remains less than threshold voltage (for example, Vth) within the duration equal or longer than predetermined amount of time, And if voltage signal 3362 remains less than threshold voltage (example within the duration for being equal to or being longer than predetermined amount of time Such as, Vth), then drive signal 3366 is changed into logically high by secondary side synchronous rectifier device (SR) controller 3308 from logic low Level.For example, secondary side synchronous rectifier device (SR) controller 3308 in slow connection scheme by drive signal 3366 from logic Low level is changed into after logic high, and drive signal 3366 is maintained at by secondary side synchronous rectifier device (SR) controller 3308 patrols High level is collected, then drive signal 3366 is become again logic low from logic high.For example, in continuous conduction mode (CCM) under, the prediction drive signal 3366 of secondary side synchronous rectifier device (SR) controller 3308 becomes logic low again from logic high The time of level.In another example, under interrupted conduction mode (DCM), secondary side synchronous rectifier device (SR) controller 3308 Driving is believed when the size of the electric current between flowing through the drain electrode end of the source terminal of transistor 3310 and transistor 3310 reaches zero Numbers 3366 are changed into logic low from logic high.
According to some embodiments, it is to connect slowly that the acquiescence for secondary side synchronous rectifier device (SR) controller 3308, which connects scheme, Logical scheme.In one embodiment, if one or more predetermined conditions are satisfied (for example, such as Figure 14, Figure 15, and/or Figure 16 It is shown), then the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 from slow connection scheme is changed into Quick connecting pipe fitting side Case.For example, in Quick connecting pipe fitting scheme, if secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 and become Threshold voltage (for example, Vth) must be less than, then secondary side synchronous rectifier device (SR) controller 3308 generates connection crystal no-delayly The drive signal 3366 of pipe 3310.In another example, if the driving of transistor 3310 is connected in generation in Quick connecting pipe fitting scheme Signal 3366, then the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 from Quick connecting pipe fitting scheme become slow connection again Scheme, and keep connecting the slow connection scheme of scheme by default, it is satisfied until in response to one or more predetermined conditions (for example, as shown in Figure 14, Figure 15, and/or Figure 16), the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 It is changed into Quick connecting pipe fitting scheme from slow connection scheme.
In another embodiment, in slow connection scheme, if secondary side synchronous rectifier device (SR) controller 3308 is detected Threshold voltage (for example, Vth) is become less than to voltage signal 3362, then secondary side synchronous rectifier device (SR) controller 3308 enters one Whether step detectable voltage signals 3362 at least remain less than threshold voltage in (for example, 400ns) disappearing to tremble the duration, if electric Pressure signal 3362 at least remains less than threshold voltage in (for example, 400ns) disappearing to tremble the duration, then secondary side synchronous rectifier device (SR) drive signal 3366 of transistor 3310 is connected in the generation of controller 3308.If for example, voltage signal 3362 is without at least Threshold voltage (for example, Vth) is remained less than disappearing to tremble the duration in (for example, 400ns), then secondary side synchronous rectifier device (SR) Controller 3308 does not generate the drive signal 3366 for connecting transistor 3310.In another example, regardless of in slow connection scheme Whether generation connect transistor 3310 drive signal 3366, the connection for secondary side synchronous rectifier device (SR) controller 3308 Scheme keeps connecting the slow connection scheme of scheme by default, until being satisfied in response to one or more predetermined conditions (for example, As shown in Figure 14, Figure 15, and/or Figure 16), connection scheme for secondary side synchronous rectifier device (SR) controller 3308 from connecing slowly Logical scheme is changed into Quick connecting pipe fitting scheme.In another example, slow connection scheme is used to filter out the noise jamming of voltage signal 3362.
According to some embodiments, when electricity on secondary side synchronous rectifier device (SR) controller 3308, scheme is connected in upper electricity Process is initially set to hold high case as the slow connection that it gives tacit consent to connection scheme.In one embodiment, if as in Figure 14 Shown one or more predetermined conditions are satisfied, then the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 It is changed into Quick connecting pipe fitting scheme from slow connection scheme, then the drive signal 3366 of transistor 3310 is connected in generation in Quick connecting pipe fitting scheme Afterwards, the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 is become again as its acquiescence side from Quick connecting pipe fitting scheme The slow connection scheme of case.In another embodiment, if one or more predetermined conditions shown in Figure 15 are satisfied, it is used for The connection scheme of secondary side synchronous rectifier device (SR) controller 3308 is changed into Quick connecting pipe fitting scheme from slow connection scheme, is then connecing soon Generation is connected after the drive signal 3366 of transistor 3310 in logical scheme, for secondary side synchronous rectifier device (SR) controller 3308 connection scheme becomes the slow connection scheme as its default scheme again from Quick connecting pipe fitting scheme.In another embodiment, if When one or more predetermined conditions as shown in Figure 16 are satisfied, for secondary side synchronous rectifier device (SR) controller 3308 Connection scheme is changed into Quick connecting pipe fitting scheme from slow connection scheme, and then the driving of transistor 3310 is connected in generation in Quick connecting pipe fitting scheme After signal 3366, the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 becomes conduct again from Quick connecting pipe fitting scheme The slow connection scheme of its default scheme.
Figure 14 is according to one embodiment of present invention, to show secondary side synchronous rectifier device (SR) control as shown in Figure 13 The connection scheme of device 3308 processed is changed into the simplification figure of one or more predetermined conditions of Quick connecting pipe fitting scheme from slow connection scheme.The figure Only example, it should not excessively limit the scope of claim.It will be appreciated by those of ordinary skill in the art that many variations, Alternatives and modifications.Drive signal 3332 is expressed as the function of time by waveform 3432, when the voltage signal 3362 of waveform 3462 is expressed as Between function, drive signal 3366 is expressed as the function of time by waveform 3466.
In one embodiment, secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 at the moment Reference voltage 3490 (for example, Vref1) is gone above at t101, reference voltage 3490 is remained above before moment t102, and And reference voltage 3490 (for example, Vref1) is become less than at moment t102.If for example, from moment t101 to moment t102 Duration (for example, TA) be equal to or more than threshold duration Tth1, then for secondary side synchronous rectifier device (SR) control The connection scheme of device 3308 processed is changed into Quick connecting pipe fitting scheme from slow connection scheme.In another example, threshold duration Tth1 tables Show that the forward position of primary side control system disappears the time of trembling (for example, 300ns).
In another embodiment, in Quick connecting pipe fitting scheme, secondary side synchronous rectifier device (SR) controller 3308 detects electricity Pressure signal 3362 becomes less than threshold voltage 3480 (for example, Vth), secondary side synchronous rectifier device (SR) control at moment t102 Drive signal 3366 is changed into logic high by device 3308 at moment t102 from logic low.For example, threshold voltage 3480 (for example, Vth) is less than reference voltage 3490 (for example, Vref1).In another example, in drive signal 3366 in Quick connecting pipe fitting side It is changed into case at moment t102 from logic low after logic high, for secondary side synchronous rectifier device (SR) controller 3308 connection scheme becomes the slow connection scheme as its default scheme again from Quick connecting pipe fitting scheme.
In another embodiment, secondary side synchronous rectifier device (SR) controller 3308 at moment t102 by drive signal 3366 are changed into after logic high from logic low, and secondary side synchronous rectifier device (SR) controller 3308 is by drive signal 3366 are maintained at logic high, then become drive signal 3366 again logic low from logic high.For example, continuous Under conduction mode (CCM), secondary side synchronous rectifier device (SR) controller 3308 is predicted drive signal 3366 from logic high Become the time of logic low again.In another example, under interrupted conduction mode (DCM), secondary side synchronous rectifier device (SR) The size of electric current of the controller 3308 between the drain electrode end of the source terminal of transistor 3310 and transistor 3310 is flowed through reaches zero When from logic high become drive signal 3366 again logic low.
Figure 15 is secondary side synchronous rectifier device (SR) controller as shown in Figure 13 according to another embodiment of the present invention 3308 connection scheme is changed into the simplification figure of one or more predetermined conditions of Quick connecting pipe fitting scheme from slow connection scheme.The figure is only It is example, it should not excessively limit the scope of claim.It will be appreciated by those of ordinary skill in the art that many variations, replacement And modification.Drive signal 3332 is expressed as the function of time by waveform 3532, and voltage signal 3362 is expressed as the time by waveform 3562 Drive signal 3366 is expressed as the function of time by function, waveform 3566.
In one embodiment, secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 at the moment T111 goes above reference voltage 3590 (for example, Vref2), be remained above before moment t112 reference voltage 3590 (for example, Vref2 reference voltage 3590 (for example, Vref2)), and at moment t112 is become less than.For example, (the example of reference voltage 3590 Such as, Vref2) it is less than reference voltage 3490 (for example, Vref1).In another example, if from moment t111 to moment t112's Duration (for example, TJ) is equal to or more than threshold duration Tth2, then for secondary side synchronous rectifier device (SR) controller 3308 connection scheme is changed into Quick connecting pipe fitting scheme from slow connection scheme.In another example, threshold duration Tth2 compares threshold value Duration T th1 is longer.
In another embodiment, in Quick connecting pipe fitting scheme, secondary side synchronous rectifier device (SR) controller 3308 detects electricity Pressure signal 3362 becomes less than threshold voltage 3480 (for example, Vth), secondary side synchronous rectifier device (SR) control at moment t112 Drive signal 3366 is changed into logic high by device 3308 at moment t112 from logic low.For example, threshold voltage 3480 (for example, Vth) is less than reference voltage 3490 (for example, Vref1) and reference voltage 3590 (for example, Vref2).In another example In, it is changed into drive signal 3366 in Quick connecting pipe fitting scheme from logic low after logic high at moment t112, uses Become again in the connection scheme of secondary side synchronous rectifier device (SR) controller 3308 from Quick connecting pipe fitting scheme as the slow of its default scheme Connection scheme.
In another embodiment, secondary side synchronous rectifier device (SR) controller 3308 at moment t112 by drive signal 3366 from logic low than who logic high after, secondary side synchronous rectifier device (SR) controller 3308 is by drive signal 3366 are maintained at logic high, then become drive signal 3366 again logic low from logic high.For example, continuous Under conduction mode (CCM), secondary side synchronous rectifier device (SR) controller 3308 is predicted drive signal 3366 from logic high Become the time of logic low again.In another example, under interrupted conduction mode (DCM), secondary side synchronous rectifier device (SR) The size of electric current of the controller 3308 between the drain electrode end of the source terminal of transistor 3310 and transistor 3310 is flowed through reaches zero When from logic high become drive signal 3366 again logic low.
According to one embodiment, secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 at the moment Reference voltage 3590 (for example, Vref2) is gone above at t113, (the example of reference voltage 3590 is remained above before moment t114 Such as, Vref2), and become less than at moment t114 reference voltage 3590 (for example, Vref2).If for example, from the moment T113 to moment t114 duration (for example, TK) is less than threshold duration Tth2, then for secondary side synchronous rectifier device (SR) the connection scheme of controller 3308 keeps slow and connects scheme.
According to another embodiment, in slow connection scheme, secondary side synchronous rectifier device (SR) controller 3308 detects electricity Pressure signal 3362 becomes less than threshold voltage 3480 (for example, Vth), secondary side synchronous rectifier device (SR) control at moment t115 Drive signal 3366 is not changed into logic high by device 3308 at the moment 115 from logic low.For example, connecting scheme slowly In, whether secondary side synchronous rectifier device (SR) controller 3308 determines voltage signal 3362 equal to or more than predetermined amount of time Threshold voltage 3480 (for example, Vth) is remained less than in the duration of (for example, Ts).In another example, predetermined amount of time (for example, Ts) is more than zero, and threshold duration Tth1 is more than zero, and threshold duration Tth2 is more than zero.In another example In, as shown in Figure 15, secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 at moment t116 Threshold voltage 3480 (for example, Vth) is gone above, and determines the Duration Ratio predetermined amount of time from moment t115 to t116 (for example, Ts) is short, and drive signal 3366 is maintained at logic low by secondary side synchronous rectifier device (SR) controller 3308.
Further emphasize as previously described and herein, Figure 15 is only example, it should not excessively limit right will The scope asked.It will be appreciated by those of ordinary skill in the art that many variations, replacement and modification.For example, secondary side synchronous rectifier device (SR) controller 3308 detects voltage signal 3362 and reference voltage 3490 (for example, Vref1) is become less than at moment t111 But be greater than reference voltage 3590 (for example, Vref2), remained less than before moment t112 reference voltage 3490 (for example, Vref1) but reference voltage 3590 (for example, Vref2) is greater than, and becomes less than at moment t112 reference voltage 3590 (for example, Vref2).In another example, if the duration (for example, TJ) from moment t111 to moment t112 is equal to or greatly In threshold duration Tth2, then the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 from slow connects scheme It is changed into Quick connecting pipe fitting scheme.
Figure 16 is, according to some embodiments of the present invention, to show secondary side synchronous rectifier device (SR) as shown in Figure 13 Controller 3308 determines the simplification figure of the method for connection scheme.The figure is only example, and it should not excessively limit right It is required that scope.It will be appreciated by those of ordinary skill in the art that many variations, replacement and modification.Method 3600 includes being used for really Surely it is the slow process 3610 for connecting scheme to connect scheme, for determining the process 3620 whether condition P meets, for determining condition The process 3622 whether Q meets, at least one process 3630, Yi Jiyong whether met determined in condition P or condition Q In it is determined that the scheme of connection is the process 3640 of Quick connecting pipe fitting scheme.
In process 3610, secondary side synchronous rectifier device (SR) controller 3308 determines that connection scheme is connection side by default The slow connection scheme of case.For example, when electricity on secondary side synchronous rectifier device (SR) controller 3308, connecting scheme in power up It is the slow connection scheme that connection scheme is given tacit consent to as it during beginning.
In process 3620, whether the condition P of determination meets.For example, condition P, which is voltage signal 3362, goes above reference voltage 3490 (for example, Vref1), and keep big within the duration (for example, TA) equal to or more than threshold duration Tth1 In reference voltage 3490 (for example, Vref1).In another example, if voltage signal 3362 goes above reference voltage 3490 (for example, Vref1) and reference is remained above within the duration (for example, TA) equal to or more than threshold duration Tth1 Voltage 3490 (for example, Vref1), it is determined that meet condition P.
In process 3622, whether the condition Q of determination meets.For example, condition Q, which is voltage signal 3362, goes above reference voltage 3590 (for example, Vref2), and keep big within the duration (for example, TJ) equal to or more than threshold duration Tth2 In reference voltage 3590 (for example, Vref2).In another example, if voltage signal 3362 goes above reference voltage 3590 (for example) and be remained above reference voltage within the duration (for example, TJ) equal to or more than threshold duration Tth2 3590 (for example, Vref2), it is determined that meet condition Q.In another example, reference voltage 3590 (for example, Vref2) is less than ginseng Voltage 3490 (for example, Vref1) is examined, and threshold duration Tth2 is longer than threshold duration Tth1.
In process 3630, at least one satisfaction in condition P or condition Q is determined.If for example, condition P satisfactions, condition At least one satisfaction in P or condition Q.In another example, if condition Q is met, at least one in condition P or condition Q It is individual to meet.In another example, if at least one satisfaction in condition P and condition Q satisfactions, condition P or condition Q.
According to one embodiment, if condition P and condition Q are unsatisfactory for, process 3610 is performed so that primary side is same The connection scheme for walking rectifier (SR) controller 3308 keeps connecting the slow connection scheme of scheme by default.Implemented according to another Example, if at least one satisfaction in condition P or condition Q, process 3640 is performed.
In process 3640, secondary side synchronous rectifier device (SR) controller 3308 determines that connection scheme is Quick connecting pipe fitting scheme.Example Such as, the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 from slow connection scheme is changed into Quick connecting pipe fitting scheme.
In one embodiment, under connection scheme, if secondary side synchronous rectifier device (SR) controller 3308 is detected Voltage signal 3362 becomes less than threshold voltage (for example, Vth), then secondary side synchronous rectifier device (SR) controller 3308 is further Detectable voltage signals 3362 whether at least disappear tremble the duration during (for example, 400ns) remain less than threshold voltage, if electric Pressure signal 3362 at least disappear tremble the duration during (for example, 400ns) remain less than threshold voltage, then secondary side synchronous rectifier The drive signal 3366 of transistor 3310 is connected in the generation of device (SR) controller 3308.If for example, voltage signal 3362 is without extremely It is few disappear tremble the duration (for example, 400ns) during remain less than threshold voltage (for example, Vth), then secondary side synchronous rectifier device (SR) controller 3308 does not generate the drive signal 3366 for connecting transistor 3310.In another example, regardless of in slow connection side Whether the drive signal 3366 of connecting transistor 3310 is generated under case, for secondary side synchronous rectifier device (SR) controller 3308 Connection scheme remains the slow connection scheme for connecting scheme by default, as shown in process 3610.
In another embodiment, under Quick connecting pipe fitting scheme, if secondary side synchronous rectifier device (SR) controller 3308 is detected Become less than threshold voltage (for example, Vth) to voltage signal 3362, then secondary side synchronous rectifier device (SR) controller 3308 without when Generate the drive signal 3366 for connecting transistor 3310 with prolonging.In another example, crystal is connected in generation under Quick connecting pipe fitting scheme After the drive signal 3366 of pipe 3310, the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 is from Quick connecting pipe fitting Scheme becomes slow connection scheme again, as shown in process 3610.
Here emphasize as discussed above and further, Figure 16 is only example, it should not excessively limit right will The scope asked.It will be appreciated by those of ordinary skill in the art that many variations, alternatives and modifications.For example, condition P is voltage signal 3362 become equal to or more than reference voltage 3490 (for example, Vref1) and equal to or more than threshold duration Tth1's Reference voltage 3490 (for example, Vref1) is kept equal in duration (for example, TA), condition Q is voltage signal 3362 Become equal to or more than reference voltage 3590 (for example, Vref2) and in continuing equal to or more than threshold duration Tth2 Reference voltage 3590 (for example, Vref2) is kept equal in time (for example, TJ).In another example, condition P is ginseng Voltage 3362 is examined to become equal to or more than reference voltage 3490 (for example, Vref1), and more than threshold duration Tth1's Reference voltage 3490 (for example, Vref1) is kept equal in duration (for example, TA), condition Q is voltage signal 3362 Become equal to or more than reference voltage 3590 (for example, Vref2), and in the duration more than threshold duration Tth2 Reference voltage 3590 (for example, Vref2) is kept equal in (for example, TJ).In another example, condition P is with reference to electricity Pressure 3362 goes above reference voltage 3490 (for example, Vref1), and in the duration more than threshold duration Tth1 Reference voltage 3490 (for example, Vref1) is remained above in (for example, TA), condition Q is that voltage signal 3362 is gone above with reference to electricity 3590 (for example, Vref2) are pressed, and are remained above within duration (for example, TJ) more than threshold duration Tth2 ginseng Examine voltage 3590 (for example, Vref2).
Figure 17 is, according to certain embodiments of the present invention, to show secondary side synchronous rectifier device (SR) as shown in Figure 13 Controller 3308 determines the simplification figure of the method for connection scheme.The figure is only example, and it should not excessively limit right It is required that scope.It will be appreciated by those of ordinary skill in the art that many variations, replacement and modification.Method 3600 includes being used for really Surely it is the slow process 3710 for connecting scheme to connect scheme, for determining whether voltage signal 3362 goes above reference voltage 3490 The process 3720 of (for example, Vref1), for determining voltage signal 3362 whether equal to or more than threshold duration Tth1's The process 3721 of reference voltage 3490 (for example, Vref1) is remained above in duration, for whether determining voltage signal 3362 The process 3722 more than reference voltage 3590 (for example, Vref2) become, for determining whether voltage signal 3362 is being equal to or greatly In the process 3723 that reference voltage 3590 (for example, Vref2) is remained above in threshold duration Tth2 duration, and For determining process 3740 of the connection scheme for Quick connecting pipe fitting scheme.
In process 3710, secondary side synchronous rectifier device (SR) controller 3308 determines that connection scheme is connection side by default The slow connection scheme of case.For example, when electricity on secondary side synchronous rectifier device (SR) controller 3308, connecting scheme in power up It is the slow connection scheme that connection scheme is given tacit consent to as it during beginning.
In process 3720, determine whether voltage signal 3362 goes above reference voltage 3490 (for example, Vref1).For example, If determining that voltage signal 3362 does not go above reference voltage 3490 (for example, Vref1), process 3722 in process 3720 It is performed.In another example, if process 3720 determine voltage signal 3362 go above reference voltage 3490 (for example, Vref1), then process 3721 is performed.
In process 3721, determine voltage signal 3362 whether in the duration equal to or more than threshold duration Tth1 Inside it is remained above reference voltage 3490 (for example, Vref1).If for example, determining that voltage signal 3362 does not exist in process 3721 Reference voltage 3490 (for example, Vref1) is remained above in duration equal to or more than threshold duration Tth1, then process 3722 are performed.In another example, if determining voltage signal 3362 when equal to or more than threshold duration in process 3721 Between Tth1 duration in be remained above reference voltage 3490 (for example, Vref1), then process 3740 is performed.
In process 3722, determine whether voltage signal 3362 goes above reference voltage 3590 (for example, Vref2).For example, Reference voltage 3590 (for example, Vref2) is less than reference voltage 3490 (for example, Vref1) in another example, if in process 3722 determination voltage signals 3362 do not go above reference voltage 3590 (for example, Vref2), then process 3710 is performed. In another example, if determining that voltage signal 3362 goes above reference voltage 3590 (for example, Vref2) in process 3722, Process 3723 is performed.
In process 3723, determine voltage signal 3362 whether in the duration equal to or more than threshold duration Tth2 Inside it is remained above reference voltage 3590 (for example, Vref2).If for example, determining that voltage signal 3362 does not exist in process 3723 Reference voltage 3590 (for example, Vref2) is remained above in duration equal to or more than threshold duration Tth2, then process 3710 are performed.In another example, if determining voltage signal 3362 when equal to or more than threshold duration in process 3723 Between Tth2 duration in be remained above reference voltage 3590 (for example, Vref2), then process 3740 is performed.
In process 3740, secondary side synchronous rectifier device (SR) controller 3308 determines that connection scheme is Quick connecting pipe fitting scheme.Example Such as, the connection scheme for secondary side synchronous rectifier device (SR) controller 3308 from slow connection scheme is changed into Quick connecting pipe fitting scheme.
In one embodiment, under slow connection scheme, if secondary side synchronous rectifier device (SR) controller 3308 is detected Threshold voltage (for example, Vth) is become less than to voltage signal 3362, then secondary side synchronous rectifier device (SR) controller 3308 enters one Whether step detectable voltage signals 3362 at least remain less than threshold voltage during (for example, 400ns) disappearing to tremble the duration, if Voltage signal 3362 at least remains less than threshold voltage during (for example, 400ns) disappearing to tremble the duration, then secondary side synchronous is whole Flow the drive signal 3366 that transistor 3310 is connected in the generation of device (SR) controller 3308.In addition, if voltage signal 3362 does not have Threshold voltage (for example, Vth) at least is remained less than during (for example, 400ns) disappearing to tremble the duration, then secondary side synchronous rectifier Device (SR) controller 3308 does not generate the drive signal 3366 for connecting transistor 3310.In another example, in spite of slow The drive signal 3366 for connecting transistor 3310 is generated under connection scheme, for secondary side synchronous rectifier device (SR) controller 3308 connection scheme remains the slow connection scheme for connecting scheme by default, as shown in process 3610.
In another embodiment, under Quick connecting pipe fitting scheme, if secondary side synchronous rectifier device (SR) controller 3308 is detected Threshold voltage (for example, Vth) is become less than to voltage signal 3362, then secondary side synchronous rectifier device (SR) controller 3308 is without prolonging When generate the drive signal 3366 for connecting transistor 3310, whether at least tremble the duration disappearing but regardless of voltage signal 3362 Threshold voltage (for example, Vth) is remained less than during (for example, 400ns).In another example, generate and connect under Quick connecting pipe fitting scheme After the drive signal 3366 of logical transistor 3310, for secondary side synchronous rectifier device (SR) controller 3308 connection scheme from Quick connecting pipe fitting scheme becomes slow connection scheme again, as shown in process 3610.
Here emphasize as discussed above and further, Figure 17 is only example, it should not excessively limit right will The scope asked.It will be appreciated by those of ordinary skill in the art that many variations, alternatives and modifications.For example, in process 3722, it is determined that electric Whether pressure signal 3362 becomes less than reference voltage 3490 (for example, Vref1) but more than reference voltage 3590 (for example, Vref2), If determining that voltage signal 3362 becomes less than reference voltage 3490 (for example, Vref1) but more than reference voltage in process 3722 3590 (for example, Vref2), then process 3723 be performed.In another example, in process 3723, determine that voltage signal 3362 is Remained less than in the no duration equal to or more than threshold duration Tth2 reference voltage 3490 (for example, Vref1) but More than reference voltage 3590 (for example, Vref2), if determining that voltage signal 3362 is held equal to or more than threshold value in process 3723 Reference voltage 3490 (for example, Vref1) is remained less than in the duration of continuous time Tth2 but more than the (example of reference voltage 3590 Such as, Vref2), then process 3740 is performed.
Figure 18 is time for showing power converting system 3300 as shown in Figure 13 according to one embodiment of present invention The simplification figure of some components of level side synchronous rectifier (SR) controller 3308.The figure is only example, and it should not excessively be limited The scope of claim processed.It will be appreciated by those of ordinary skill in the art that many variations, alternatives and modifications.Secondary side synchronous rectifier Device (SR) controller 3308 includes terminal 3390,3392,3394 and 3396.In addition, secondary side synchronous rectifier device (SR) controller 3308 include comparator 3810 and 3816, disappear and tremble component 3820 and 3826, connect scheme controller 3830, connect signal controller 3836, cut-off signals controller 3840, driver 3850, clamper 3860, reference voltage generator 3870, and threshold duration Time generator 3876.
In one embodiment, the receiving voltage signal 3316 of reference voltage generator 3870, and being based at least partially on The generation reference voltage 3490 of voltage signal 3316 (for example, Vref1) and reference voltage 3590 (for example, Vref2).For example, respectively Reference voltage 3490 (for example, Vref1) and reference voltage 3590 (for example, Vref2) are determined according to below equation:
Vref1=Vref_ini+α×Vin(equation 2)
Vref2=Vref_ini+β×Vin(equation 3)
Wherein, Vref1 represents reference voltage 3490, and Vref2 represents reference voltage 3590.In addition, Vin represents voltage signal 3316.Vref_ini represents predetermined voltage size.In addition, α represents predetermined constant, β represents another predetermined constant.
In another example, reference voltage 3490 (for example, Vref1) is bigger than reference voltage 3590 (for example, Vref2). In another example, the predetermined constant α in equation 2 is more than the predetermined constant β in zero, equation 3 more than pre- in zero, and equation 2 Constant α is determined more than the predetermined constant β in equation 3.In another example, reference voltage 3490 (for example, Vref1) is believed with voltage Number 3316 (for example, Vin) linearly increase, and reference voltage 3590 (for example, Vref2) with voltage signal 3316 (for example, Vin) linear increase.
In another embodiment, the receiving voltage signal 3316 of threshold duration generator 3876, and at least in part The signal 3874 for representing threshold time period Tth1 and the signal for representing threshold time period Tth2 are generated based on voltage signal 3316 3878.For example, respectively according to below equation threshold value duration T th1 and threshold duration Tth2:
Tth1=Tth_ini+γ×Vin(equation 4)
Tth2=Tth_ini+δ×Vin(equation 5)
Wherein, Tth1 represents that threshold duration Tth1, Tth2 represent threshold duration Tth2.In addition, Vin represents electricity Press signal 3316.Th_ini represents predetermined voltage size.In addition, γ represents predetermined constant, δ represents another predetermined constant.Another In one example, threshold duration Tth2 is longer than threshold duration Tth1.In another example, reference voltage 3590 (for example, Vref2) it is less than reference voltage 3490 (for example, Vref1), and threshold duration Tth2 is longer than threshold duration Tth1.
In another example, the predetermined constant δ that predetermined constant γ in equation 4 is more than in zero, equation 5 is more than zero, and Predetermined constant γ in equation 4 is less than the predetermined constant δ in equation 5.In another example, threshold duration Tth1 is with electricity Signal 3316 (for example, Vin) is pressed linearly to increase, and threshold duration Tth2 is with voltage signal 3316 (for example, Vin) line Property increase.
According to one embodiment, the receiving voltage signal 3362 of comparator 3810 and reference voltage 3590 (for example, Vref2), And generate comparison signal 3812.For example, if voltage signal 3362 goes above reference voltage 3590 (for example, Vref2), Comparison signal 3812 is changed into logic high from logic low.In another example, comparison signal 3812 trembles component by disappearing 3820 receive.According to another embodiment, disappear and tremble the letter that component 3820 receives comparison signal 3812 and expression threshold time period Tth2 Numbers 3878.Determine voltage signal 3362 whether in holding equal or longer than threshold duration Tth2 for example, disappearing and trembling component 3820 Reference voltage 3590 (for example, Vth2) is remained above in the continuous time (for example, whether comparison signal 3812 keeps being in logically high electricity It is flat).In another example, disappear and tremble the generation signal 3822 of component 3820, the signal designation voltage signal 3362 whether being equal to or Reference voltage 3590 (for example, Vref2) is remained above in the duration for being longer than threshold duration Tth2 (for example, comparing letter Whether numbers 3812 keep being in logic high).
According to another embodiment, the receiving voltage signal 3362 of comparator 3816 and reference voltage 3490 (for example, Vref1), And generate comparison signal 3818.For example, if voltage signal 3362 goes above reference voltage 3490 (for example, Vref1), Comparison signal 3818 is changed into logic high from logic low.In another example, comparison signal 3818 trembles component by disappearing 3826 receive.According to another embodiment, disappear and tremble the letter that component 3826 receives comparison signal 3818 and expression threshold time period Tth1 Numbers 3874.Determine voltage signal 3362 whether in holding equal or longer than threshold duration Tth1 for example, disappearing and trembling component 3826 Reference voltage 3490 (for example, Vref1) is remained above in the continuous time (for example, whether comparison signal 3818 is kept in logically high Level).In another example, disappear tremble component 3826 generation signal 3828, the signal designation voltage signal 3362 whether equal to Or be longer than in threshold duration Tth1 duration be remained above reference voltage 3490 (for example, Vref1) (for example, than Whether keep being in logic high compared with signal 3818).
In another embodiment, connect scheme controller 3830 and receive signal 3822 and 3828, and be used as response, generation It is Quick connecting pipe fitting scheme or the slow signal 3832 for connecting scheme to indicate connection scheme.If for example, the instructed voltage of signal 3822 is believed Numbers 3362 be remained above within the duration for being equal to or being longer than threshold duration Tth2 reference voltage 3590 (for example, ), and/or the instructed voltage signal 3362 of signal 3828 is being equal to or be longer than threshold duration Tth1 duration Vref2 Reference voltage 3490 (for example, Vref1) is inside remained above, then connects scheme controller 3830 and determines that connection scheme is Quick connecting pipe fitting side Case and generate the signal 3832 for indicating that connection scheme is Quick connecting pipe fitting scheme.In another example, if signal 3822 is not indicated Voltage signal 3362 is remained above the (example of reference voltage 3590 within the duration for being equal to or being longer than threshold duration Tth2 Such as, Vref2), and instructed voltage signal 3362 be not equal to or is being longer than continuing for threshold duration Tth1 to signal 3828 Reference voltage 3490 (for example, Vref1) is remained above in time, then connects scheme controller 3830 and determines connection scheme to connect slowly Lead to scheme and generate and indicate that connection scheme is the slow signal 3832 for connecting scheme.
In another example, as shown in Figure 16, if at least one condition in condition P or condition Q is satisfied, connect Logical scheme controller 3830 determines that connection scheme is Quick connecting pipe fitting scheme, and generates the letter for indicating that connection scheme is Quick connecting pipe fitting scheme Numbers 3832.In another example, as shown in Figure 16, if condition P and condition Q are not met, scheme controller is connected 3830 determine that connection scheme connects scheme to be slow, and it is the slow signal 3832 for connecting scheme to generate instruction connection scheme.
According to some embodiments, connect signal controller and receive signal 3832 and voltage signal 3362, and generate signal 3838.In one embodiment, if signal 3832 indicates that connection scheme is Quick connecting pipe fitting scheme, examined when connecting signal controller When measuring voltage signal 3362 and becoming less than threshold voltage (for example, Vth), signal controller no-delay ground output signal is connected 3838, signal 3838 indicated if being received by driver 3850 driver 3850 generate connection transistor 3310 (for example, MOSFET drive signal 3366).For example, driver 3850 receives signal 3838, and as response, transistor is connected in generation 3310 (for example, MOSFET) drive signal 3366.Collect in another embodiment, signal 3838 is switched on scheme controller 3830 Receive.For example, signal 3838 by driver 3850 in the case where being received, indicate that transistor 3310 is connected in the generation of driver 3850 The drive signal 3366 of (for example, MOSFET), and as response, connect scheme controller 3830 and will turn on scheme from Quick connecting pipe fitting Scheme is changed into slow connection scheme, and generates the signal 3832 for indicating connection scheme for slow connection scheme.
In another embodiment, if signal 3832 indicates that connection scheme is Quick connecting pipe fitting scheme, controlled when connecting signal When device does not detect voltage signal 3362 and becomes less than threshold voltage (for example, Vth), signal controller not output signal is connected 3838, if signal 3838 received by driver 3850 will indicate driver 3850 generate connection camera lens sense 3310 (for example, MOSFET drive signal 3366).For example, driver 3850 receives signal 3838, and as response, connection crystal is not generated The drive signal 3366 of pipe 3310 (for example, MOSFET).In another embodiment, signal 3838 is switched on scheme controller 3830 Receive.For example, signal 3838 by driver 3850 in the case where being received, do not indicate that transistor is connected in the generation of driver 3850 3310 (for example, MOSFET) drive signal 3366, and as response, connection scheme controller 3830 remains up scheme and is Quick connecting pipe fitting scheme, and generate the signal 3832 for indicating that connection scheme is Quick connecting pipe fitting scheme.
In another embodiment, if signal 3832 indicates that connection scheme connects scheme to be slow, when connection signal control Device, which detects voltage signal 3362 and becomes less than threshold voltage (for example, Vth) and detect voltage signal 3362, at least to disappear Threshold voltage is remained less than during trembling the duration (for example, 400ns), then connects signal controller output signal 3838, signal 3838 indicate that driver 3850 is generated in the case where being received by driver 3850 connects transistor 3310 (for example, MOSFET) Drive signal 3366.For example, driver 3850 receives signal 3838, and as response, (the example of transistor 3310 is connected in generation Such as, MOSFET) drive signal 3366.In another embodiment, signal 3838 is switched on scheme controller 3830 and received, and As response, the scheme of remaining up is slow connection scheme and generates the signal 3832 for indicating that connection scheme is slow connection scheme.
In another embodiment, if signal 3832 indicates that connection scheme connects scheme to be slow, when connection signal control Device does not detect voltage signal 3362 and becomes less than threshold voltage (for example, Vth) or do not detect voltage signal 3362 Threshold voltage at least is remained less than during (for example, 400ns) disappearing to tremble the duration, then connects signal controller not output signal 3838, signal 3838 indicated in the case where being received by driver 3850 driver 3850 generate connection transistor 3310 (for example, MOSFET drive signal 3366).For example, driver 3850 receives signal 3838, and as response, connection crystal is not generated The drive signal 3366 of pipe 3310 (for example, MOSFET).In another example, signal 3838 is switched on scheme controller 3830 and connect Receive, as response, connection scheme controller 3830 remains up scheme and is slow connection scheme and generates connection scheme to be to connect slowly The signal 3832 of logical scheme.
In another embodiment, the receiving voltage signal 3362 of clamper 3860.For example, voltage signal 3362 include one or Multiple high voltage burrs.In another example, clamper is used to clamp voltage signal 3362, to protect secondary side synchronous rectifier One or more internal circuits of device (SR) controller 3308.
Certain embodiments of the present invention provides such secondary side synchronous rectifier device (SR) controller, and it selects Quick connecting pipe fitting Scheme or slow connection scheme are traded off to provide the expectation between efficiency and reliability.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.System controller is configured as in the first controller terminal reception input signal, and is based at least partially on Input signal generates drive signal to turn on and off transistor at second controller terminal, so as to influence and supply convertor The associated electric current of secondary windings.In addition, system controller be configured to determine input signal whether being equal to or Person, which was longer than in the first period of the first predetermined lasting time, is remained above first threshold, and is not determined in response to input signal To be more than first threshold within the first period for be equal to or be longer than the first predetermined lasting time, grasped using first scheme Make.In addition, being operated using first scheme, system controller is configured to determine that input signal is being equal to or grown It is being equal to or long in remaining less than Second Threshold in the second period of the second predetermined lasting time, and in response to input signal In remaining less than Second Threshold in the second period of the second predetermined lasting time, by the drive signal at second controller terminal from First logic level is changed into the second logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero.Example Such as, the system controller is realized according at least to Figure 13 and/or Figure 14.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.System controller is configured as in the first controller terminal reception input signal, and is based at least partially on Input signal generates drive signal to turn on and off transistor at second controller terminal, so as to influence and supply convertor The associated electric current of secondary windings.In addition, system controller be configured to determine input signal whether being equal to or Person, which was longer than in the first period of the first predetermined lasting time, to be remained less than or equal to first threshold and more than Second Threshold, second Threshold value is less than first threshold, and is not determined in response to input signal to be equal to or be longer than the first predetermined lasting time It is held equal to or less than first threshold and more than Second Threshold, is operated using first scheme in first period.In addition, sharp Operated with first scheme, system controller is configured to determine whether input signal is being equal to or is being longer than second The 3rd threshold value is remained less than in second period of predetermined lasting time, and be determined to be in response to input signal be equal to or It is longer than in the second period of the second predetermined lasting time and remains less than the 3rd threshold value, by the drive signal at second controller terminal It is changed into the second logic level from the first logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero. For example, system controller is realized according at least to Figure 13 and/or Figure 15.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.System controller is configured as in the first controller terminal reception input signal, and is based at least partially on Input signal generates drive signal to turn on and off transistor at second controller terminal, so as to influence and supply convertor The associated electric current of secondary windings.In addition, system controller be configured to determine input signal whether being equal to or Person, which was longer than in the first period of the first predetermined lasting time, is remained above first threshold, and determine input signal whether equal to Or be longer than in the second period of the second predetermined lasting time and be remained above Second Threshold.Second Threshold is smaller than first threshold, the Two predetermined lasting times are longer than the first predetermined lasting time.In addition, system controller is configured to, believe in response to input Number it is not determined to be remained above first threshold and defeated within the first period for being equal to or being longer than the first predetermined lasting time Enter signal to be not determined to be remained above Second Threshold within the second period for being equal to or being longer than the second predetermined lasting time, profit Operated with first scheme.In addition, being operated using first scheme, system controller is configured to determine input Whether signal remains less than the 3rd threshold value within the 3rd period for being equal to or being longer than the 3rd predetermined lasting time, and in response to Input signal, which is determined to be in be equal to or be longer than in the 3rd period of the 3rd predetermined lasting time, remains less than the 3rd threshold value, will Drive signal at second controller terminal is changed into the second logic level from the first logic level.First predetermined lasting time is more than Zero, the second predetermined lasting time is more than zero, and the 3rd predetermined lasting time is more than zero.For example, system controller according at least to Figure 13, Figure 16, Figure 17, and/or Figure 18 are realized.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.System controller is configured as in the first controller terminal reception input signal, and is based at least partially on Input signal generates drive signal to turn on and off transistor at second controller terminal, so as to influence and supply convertor The associated electric current of secondary windings.In addition, system controller be configured to determine input signal whether being equal to or Person, which was longer than in the first period of the first predetermined lasting time, is remained above first threshold, and determine input signal whether equal to Or be longer than in the second period of the second predetermined lasting time and be remained above Second Threshold.In addition, system controller further by It is configured to, is not determined to keep within the first period for be equal to or be longer than the first predetermined lasting time in response to input signal It is not determined to more than first threshold and input signal within the second period for being equal to or being longer than the second predetermined lasting time Second Threshold is remained above, is operated using first scheme.Second Threshold is less than first threshold, and second predetermined when continuing Between be longer than the first predetermined lasting time.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero.First Threshold value changes with input signal in size, and Second Threshold changes with input signal in size, for example, system controller Realized according at least to Figure 13, Figure 16, Figure 17, and/or Figure 18.
According to another embodiment, the system controller for regulation power supply converter includes the first controller terminal and second Controller terminal.System controller is configured as in the first controller terminal reception input signal, and is based at least partially on Input signal generates drive signal to turn on and off transistor at second controller terminal, so as to influence and supply convertor The associated electric current of secondary windings.In addition, system controller be configured to determine input signal whether being equal to or Person, which was longer than in the first period of the first predetermined lasting time, is remained above first threshold, and determine input signal whether equal to Or be longer than in the second period of the second duration and be remained above Second Threshold.In addition, system controller is further configured To be not determined to be remained above within the first period for being equal to or being longer than the first predetermined lasting time in response to input signal First threshold and input signal are not determined to keep within the second period for be equal to or be longer than the second predetermined lasting time More than Second Threshold, operated using first scheme.Second Threshold is less than first threshold, and the second predetermined lasting time is long In the first predetermined lasting time.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero, and first is predetermined lasting Time changes with input signal in size, and the second predetermined lasting time is in size as input signal changes.Example Such as, system controller is realized according at least to Figure 13, Figure 16, Figure 17, and/or Figure 18.
According to another embodiment, the method for regulation power supply converter includes:Input signal is received, in inputting letter Number associated information, and be based at least partially on input signal generation drive signal to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period for being equal to or being longer than the first predetermined lasting time;In response to input Signal is not determined to be remained above first threshold within the first period for being equal to or being longer than the first predetermined lasting time, utilizes First scheme is operated.Input signal generation drive signal is based at least partially on to turn on and off transistor to influence The electric current associated with the secondary windings of supply convertor includes:In response to being operated using first scheme, it is determined that input letter Number whether remain less than Second Threshold within the second period for being equal to or being longer than the second predetermined lasting time;And in response to defeated Enter signal and be determined to be in the second period for be equal to or be longer than the second predetermined lasting time to remain less than Second Threshold, will drive Dynamic signal is changed into the second logic level from the first logic level.It is predetermined lasting that first predetermined lasting time is more than zero, and second Time is more than zero.For example, this method is realized according at least to Figure 13 and/or Figure 14.
According to another embodiment, the method for regulation power supply converter includes:Input signal is received, in inputting letter Number associated information, and be based at least partially on input signal generation drive signal to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Signal whether remained less than within the first period for being equal to or being longer than the first predetermined lasting time or equal to first threshold and More than Second Threshold, Second Threshold is less than first threshold;And it is not determined to be equal to or be longer than in response to input signal Remained less than in first period of the first predetermined lasting time or equal to first threshold and more than Second Threshold, utilize first party Case is operated.Input signal generation drive signal is based at least partially on to turn on and off transistor to influence and power supply The associated electric current of the secondary windings of converter includes:In response to being operated using first scheme, whether input signal is determined The 3rd threshold value is remained less than within the second period for being equal to or being longer than the second predetermined lasting time;And in response to input signal It is determined to be in the second period for be equal to or be longer than the second predetermined lasting time and remains less than the 3rd threshold value, by drive signal It is changed into the second logic level from the first logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time is big In zero.For example, this method is realized according at least to Figure 13 and/or Figure 15.
According to another embodiment, the method for regulation power supply converter includes:Input signal is received, in inputting letter Number associated information, and be based at least partially on input signal generation drive signal to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period for being equal to or being longer than the first predetermined lasting time;It is determined that input letter Second Threshold number is remained above within the second period for being equal to or being longer than the second predetermined lasting time, Second Threshold is less than first Threshold value, the second predetermined lasting time is longer than the first predetermined lasting time;And in response to input signal be not determined to equal to Or be longer than and be remained above first threshold in the first period of the first predetermined lasting time and input signal is not determined to It is equal to or is longer than in the second period of the second predetermined lasting time and be remained above Second Threshold, is grasped using first scheme Make.Input signal generation drive signal is based at least partially on to turn on and off transistor to influence and supply convertor The associated electric current of secondary windings includes:In response to being operated using first scheme, determine input signal whether being equal to or Person, which was longer than in the 3rd period of the 3rd predetermined lasting time, remains less than the 3rd threshold value;And it is confirmed as in response to input signal The 3rd threshold value is remained less than within the 3rd period for being equal to or being longer than the 3rd predetermined lasting time, drive signal is patrolled from first Collect level and be changed into the second logic level.First predetermined lasting time is more than zero, and the second predetermined lasting time is more than the zero, and the 3rd Predetermined lasting time is more than zero.For example, this method is realized according at least to Figure 13, Figure 16, Figure 17, and/or Figure 18.
According to another embodiment, the method for regulation power supply converter includes:Input signal is received, in inputting letter Number associated information, and be based at least partially on input signal generation drive signal to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period for being equal to or being longer than the first predetermined lasting time;It is determined that input letter Number it is remained above Second Threshold within the second period for being equal to or being longer than the second predetermined lasting time;In response to input signal not It is determined to be in the first period for be equal to or be longer than the first predetermined lasting time and is remained above first threshold and inputs letter Number it is not determined to be remained above Second Threshold within the second period for being equal to or being longer than the second predetermined lasting time, utilizes One scheme is operated.Second Threshold is less than first threshold, and the second predetermined lasting time is longer than the first predetermined lasting time. First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero.First threshold is in size as input signal changes Become, and Second Threshold is in size as input signal changes.For example, this method according at least to Figure 13, Figure 16, Figure 17 and/ Or Figure 18 is realized.
According to another embodiment, the method for regulation power supply converter includes:Input signal is received, in inputting letter Number associated information, and be based at least partially on input signal generation drive signal to turn on and off transistor so as to shadow Ring the electric current associated with the secondary windings of supply convertor.The processing information associated with input signal includes:It is determined that input Whether signal is remained above first threshold within the first period for being equal to or being longer than the first predetermined lasting time;It is determined that input letter Number it is remained above Second Threshold within the second period for being equal to or being longer than the second predetermined lasting time;In response to input signal not It is determined to be in the first period for be equal to or be longer than the first predetermined lasting time and is remained above first threshold and inputs letter Number it is not determined to be remained above Second Threshold within the second period for being equal to or being longer than the second predetermined lasting time, utilizes One scheme is operated.Second Threshold is less than first threshold, and the second predetermined lasting time is longer than the first predetermined lasting time. First predetermined lasting time is more than zero, and the second predetermined lasting time is more than zero.First predetermined lasting time is in size with defeated Enter signal change, and the second predetermined lasting time is in size as input signal changes.For example, this method is according at least to figure 13rd, Figure 16, Figure 17, and/or Figure 18 are realized.
For example, each of some or all components of various embodiments of the present invention are by using one or more software groups One or more combinations of part, one or more nextport hardware component NextPorts and/or software and hardware component, individually and/or with it is at least another Realized in combination with one component.In another example, each of some or all components of various embodiments of the present invention are independent Ground and/or realized in combination with least another component in one or more circuits, one or more circuits are, for example, one Individual or multiple analog circuits and/or one or more digital circuits.In another example, the various realities of the present invention can be combined Apply example and/or example.
Although specific embodiments of the present invention have been described, but it should be appreciated by those skilled in the art, In the presence of the other embodiments being equal with described embodiment.It is understood, therefore, that the reality of the present invention not by being specifically illustrating Apply example to limit, but only limited by scope of the following claims.

Claims (79)

1. a kind of system controller for regulation power supply converter, the system controller includes:
First controller terminal;And
Second controller terminal;
Wherein, the system controller is configured as:
Input signal is received at the first controller terminal;And
The input signal is at least partially based on, drive signal is generated at the second controller terminal, to turn on and off Transistor is so as to influence the electric current associated with the secondary windings of the supply convertor;
Wherein, the system controller is additionally configured to:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;And
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when The first threshold is remained above in section, is operated using first scheme;
Wherein, operated using the first scheme, the system controller is additionally configured to:
Determine whether the input signal remains less than second within the second period equal or longer than the second predetermined lasting time Threshold value;
Second period equal or longer than second predetermined lasting time is determined to be in response to the input signal The Second Threshold is inside remained less than, the drive signal at the second controller terminal is changed into from the first logic level Second logic level;
Wherein:
First predetermined lasting time is more than zero;And
Second predetermined lasting time is more than zero.
2. the system as claimed in claim 1 controller, wherein:
The system controller is additionally configured to:It is determined to be in response to the input signal pre- equal or longer than described first Determine to be remained above the first threshold in first period of duration, operated using alternative plan;And
Operated using the alternative plan, the system controller is additionally configured to:
Determine whether the input signal becomes less than the Second Threshold;And
It is confirmed as becoming less than the Second Threshold in response to the input signal, by the institute at the second controller terminal State drive signal and be changed into second logic level from first logic level, be equal to or growing but regardless of the input signal In whether remaining less than the Second Threshold in second period of second predetermined lasting time.
3. system controller as claimed in claim 2, wherein, the system controller is additionally configured to:In response to described Input signal is confirmed as becoming less than the Second Threshold, and the drive signal is changed into described from first logic level Second logic level, but regardless of the input signal in second period equal or longer than second predetermined lasting time Inside whether remain less than after the Second Threshold, operated using the first scheme.
4. system controller as claimed in claim 2, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
5. the system as claimed in claim 1 controller, wherein:
First logic level is logic low;And
Second logic level is logic high.
6. the system as claimed in claim 1 controller, wherein, the system controller is additionally configured to:In response to by described in Drive signal is changed into second logic level from first logic level, connects the transistor.
7. the system as claimed in claim 1 controller, wherein, the Second Threshold is less than the first threshold.
8. a kind of system controller for regulation power supply converter, the system controller includes:
First controller terminal;And
Second controller terminal;
Wherein, the system controller is configured as:
Input signal is received at the first controller terminal;And
The input signal is at least partially based on, drive signal is generated at the second controller terminal, to turn on and off Transistor is so as to influence the electric current associated with the secondary windings of the supply convertor;
Wherein, the system controller is additionally configured to:
Determine whether the input signal remained less than or wait within the first period equal or longer than the first predetermined lasting time In first threshold and more than Second Threshold, the Second Threshold is less than the first threshold;And
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when Remain less than or equal to the first threshold and more than the Second Threshold, operated using first scheme in section;
Wherein, operated using the first scheme, the system controller is additionally configured to:
Determine whether the input signal remains less than the 3rd within the second period equal or longer than the second predetermined lasting time Threshold value;
Second period equal or longer than second predetermined lasting time is determined to be in response to the input signal The 3rd threshold value is inside remained less than, the drive signal at the second controller terminal is changed into from the first logic level Second logic level;
Wherein:
First predetermined lasting time is more than zero;And
Second predetermined lasting time is more than zero.
9. system controller as claimed in claim 8, wherein:
The system controller is additionally configured to:It is determined to be in response to the input signal pre- equal or longer than described first Determine to remain less than in first period of duration or equal to the first threshold and more than the Second Threshold, utilize the Two schemes are operated;And
Operated using the alternative plan, the system controller is additionally configured to:
Determine whether the input signal becomes less than the 3rd threshold value;And
It is confirmed as becoming less than the 3rd threshold value in response to the input signal, by the institute at the second controller terminal State drive signal and be changed into second logic level from first logic level, be equal to or growing but regardless of the input signal In whether remaining less than the 3rd threshold value in second period of second predetermined lasting time.
10. system controller as claimed in claim 9, wherein, the system controller is additionally configured to:In response to described Input signal is confirmed as becoming less than the 3rd threshold value, and the drive signal is changed into described from first logic level Second logic level, but regardless of the input signal in second period equal or longer than second predetermined lasting time Inside whether remain less than after the 3rd threshold value, operated using the first scheme.
11. system controller as claimed in claim 9, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
12. system controller as claimed in claim 8, wherein:
First logic level is logic low;And
Second logic level is logic high.
13. system controller as claimed in claim 8, wherein, the system controller is additionally configured to:In response to by described in Drive signal is changed into second logic level from first logic level, connects the transistor.
14. system controller as claimed in claim 8, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
15. a kind of system controller for regulation power supply converter, the system controller includes:
First controller terminal;And
Second controller terminal;
Wherein, the system controller is configured as:
Input signal is received at the first controller terminal;And
The input signal is at least partially based on, drive signal is generated at the second controller terminal, to turn on and off Transistor is so as to influence the electric current associated with the secondary windings of the supply convertor;
Wherein, the system controller is additionally configured to:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;And
Determine whether the input signal is remained above second within the second period equal or longer than the second predetermined lasting time Threshold value, the Second Threshold is less than the first threshold, and it is predetermined when continuing that second predetermined lasting time is longer than described first Between;
Wherein, the system controller is additionally configured to:
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when The first threshold is remained above in section, and the input signal is not determined to making a reservation for hold equal or longer than described second The Second Threshold is remained above in second period of continuous time, is operated using first scheme;
Wherein, operated using the first scheme, the system controller is additionally configured to:
Determine whether the input signal remains less than the 3rd in the 3rd period equal or longer than the 3rd predetermined lasting time Threshold value;And
It is determined to be in the 3rd period equal or longer than the 3rd duration and protects in response to the input signal Hold less than the 3rd threshold value, the drive signal at the second controller terminal is changed into second from the first logic level Logic level;
Wherein:
First predetermined lasting time is more than zero;
Second predetermined lasting time is more than zero;And
3rd predetermined lasting time is more than zero.
16. system controller as claimed in claim 15, wherein:
The system controller is additionally configured to:It is determined to be in response to the input signal pre- equal or longer than described first Determine to be remained above the first threshold in first period of duration, or the input signal is determined to be in and is equal to Or be longer than in second period of second predetermined lasting time and be remained above the Second Threshold, entered using alternative plan Row operation;And
Operated using the alternative plan, the system controller is additionally configured to:
Determine whether the input signal becomes less than the 3rd threshold value;And
It is confirmed as becoming less than the 3rd threshold value in response to the input signal, by the institute at the second controller terminal State drive signal and be changed into second logic level from first logic level, be equal to or growing but regardless of the input signal In whether remaining less than the 3rd threshold value in the 3rd period of the 3rd predetermined lasting time.
17. system controller as claimed in claim 16, wherein, the system controller is additionally configured to:In response to described Input signal be determined to be in first period equal or longer than first predetermined lasting time be remained above it is described First threshold, and the input signal is when being determined to be in described second equal or longer than second predetermined lasting time The Second Threshold is remained above in section, is operated using the alternative plan.
18. system controller as claimed in claim 16, wherein, the system controller is additionally configured to:In response to institute State input signal to be confirmed as becoming less than the 3rd threshold value, the drive signal is changed into institute from first logic level State the second logic level, but regardless of the input signal equal or longer than the 3rd predetermined lasting time the described 3rd when Whether remain less than after the 3rd threshold value, operated using the first scheme in section.
19. system controller as claimed in claim 16, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
20. system controller as claimed in claim 15, wherein:
First logic level is logic low;And
Second logic level is logic high.
21. system controller as claimed in claim 15, wherein, the system controller is additionally configured to:In response to by institute State drive signal and be changed into second logic level from first logic level, connect the transistor.
22. system controller as claimed in claim 15, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
23. a kind of system controller for regulation power supply converter, the system controller includes:
First controller terminal;And
Second controller terminal;
Wherein, the system controller is configured as:
Input signal is received at the first controller terminal;And
The input signal is at least partially based on, drive signal is generated at the second controller terminal, to turn on and off Transistor is so as to influence the electric current associated with the secondary windings of the supply convertor;
Wherein, the system controller is additionally configured to:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;And
Determine whether the input signal is remained above second within the second period equal or longer than the second predetermined lasting time Threshold value;
Wherein, the system controller is additionally configured to:
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when The first threshold is remained above in section, and the input signal is not determined to making a reservation for hold equal or longer than described second The Second Threshold is remained above in second period of continuous time, is operated using first scheme;
Wherein:
The Second Threshold is less than the first threshold;And
Second predetermined lasting time is longer than first predetermined lasting time;
Wherein:
First predetermined lasting time is more than zero;And
Second predetermined lasting time is more than zero;
Wherein:
The first threshold is in amplitude as the input signal changes;
The Second Threshold is in amplitude as the input signal changes.
24. system controller as claimed in claim 23, wherein:
The first threshold is in amplitude as the input signal increases;And
The Second Threshold is in amplitude as the input signal increases.
25. system controller as claimed in claim 24, wherein:
The first threshold is in amplitude as the input signal linearly increases;And
The Second Threshold is in amplitude as the input signal linearly increases.
26. system controller as claimed in claim 23, wherein:
The system controller is additionally configured to:It is determined to be in response to the input signal pre- equal or longer than described first Determine to be remained above the first threshold in first period of duration, or the input signal is determined to be in and is equal to Or be longer than in second period of second predetermined lasting time and be remained above the Second Threshold, entered using alternative plan Row operation;And
The alternative plan is different from the first scheme.
27. system controller as claimed in claim 26, wherein, the system controller is additionally configured to:In response to described Input signal be determined to be in first period equal or longer than first predetermined lasting time be remained above it is described First threshold, and the input signal is when being determined to be in described second equal or longer than second predetermined lasting time The Second Threshold is remained above in section, is operated using the alternative plan.
28. system controller as claimed in claim 26, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
29. system controller as claimed in claim 23, wherein:
Operated using the first scheme, the system controller is additionally configured to:
Determine whether the input signal remains less than the 3rd in the 3rd period equal or longer than the 3rd predetermined lasting time Threshold value, the 3rd predetermined lasting time is more than zero;And
It is determined to be in the 3rd period equal or longer than the 3rd duration and protects in response to the input signal Hold less than the 3rd threshold value, the drive signal at the second controller terminal is changed into second from the first logic level Logic level.
30. system controller as claimed in claim 29, wherein:
First logic level is logic low;And
Second logic level is logic high.
31. system controller as claimed in claim 29, wherein, the system controller is additionally configured to:In response to by institute State drive signal and be changed into second logic level from first logic level, connect the transistor.
32. system controller as claimed in claim 23, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
33. a kind of system controller for regulation power supply converter, the system controller includes:
First controller terminal;And
Second controller terminal;
Wherein, the system controller is configured as:
Input signal is received at the first controller terminal;And
The input signal is at least partially based on, drive signal is generated at the second controller terminal, to turn on and off Transistor is so as to influence the electric current associated with the secondary windings of the supply convertor;
Wherein, the system controller is additionally configured to:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;And
Determine whether the input signal is remained above second within the second period equal or longer than the second predetermined lasting time Threshold value;
Wherein, the system controller is additionally configured to:It is not determined in response to the input signal equal or longer than institute State and the first threshold is remained above in first period of the first predetermined lasting time, and the input signal is not true It is set to and is remained above the Second Threshold within second period equal or longer than second predetermined lasting time, utilizes First scheme is operated;
Wherein:
The Second Threshold is less than the first threshold;And
Second predetermined lasting time is longer than first predetermined lasting time;
Wherein:
First predetermined lasting time is more than zero;
Second predetermined lasting time is more than zero;
First predetermined lasting time is in amplitude as the input signal changes;And
Second predetermined lasting time is in amplitude as the input signal changes.
34. system controller as claimed in claim 33, wherein:
First predetermined lasting time is in amplitude as the input signal increases;And
Second predetermined lasting time is in amplitude as the input signal increases.
35. system controller as claimed in claim 34, wherein:
First predetermined lasting time is in amplitude as the input signal linearly increases;And
Second predetermined lasting time is in amplitude as the input signal linearly increases.
36. system controller as claimed in claim 33, wherein:
The system controller is additionally configured to:It is determined to be in response to the input signal pre- equal or longer than described first Determine to be remained above the first threshold in first period of duration, or the input signal is determined to be in and is equal to Or be longer than in second period of second predetermined lasting time and be remained above the Second Threshold, entered using alternative plan Row operation;And
The alternative plan is different from the first scheme.
37. system controller as claimed in claim 36, wherein, the system controller is additionally configured to:In response to described Input signal be determined to be in first period equal or longer than first predetermined lasting time be remained above it is described First threshold, and the input signal is when being determined to be in described second equal or longer than second predetermined lasting time The Second Threshold is remained above in section, is operated using the alternative plan.
38. system controller as claimed in claim 36, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
39. system controller as claimed in claim 33, wherein:
Operated using the first scheme, the system controller is additionally configured to:
Determine whether the input signal remains less than the 3rd in the 3rd period equal or longer than the 3rd predetermined lasting time Threshold value, the 3rd predetermined lasting time is more than zero;And
It is determined to be in the 3rd period equal or longer than the 3rd duration and protects in response to the input signal Hold less than the 3rd threshold value, the drive signal at the second controller terminal is changed into second from the first logic level Logic level.
40. system controller as claimed in claim 39, wherein:
First logic level is logic low;And
Second logic level is logic high.
41. system controller as claimed in claim 39, wherein, the system controller is additionally configured to:In response to by institute State drive signal and be changed into second logic level from first logic level, connect the transistor.
42. system controller as claimed in claim 33, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
43. a kind of method for regulation power supply converter, methods described includes:
Receive input signal;
The processing information associated with the input signal;And
The input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and the power supply The associated electric current of the secondary windings of converter;
Wherein, handling the information associated with the input signal includes:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;And
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when The first threshold is remained above in section, is operated using first scheme;
Wherein, the input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and institute The electric current that stating the secondary windings of supply convertor is associated includes:In response to being operated using the first scheme,
Determine whether the input signal remains less than second within the second period equal or longer than the second predetermined lasting time Threshold value;And
Second period equal or longer than second predetermined lasting time is determined to be in response to the input signal The Second Threshold is inside remained less than, the drive signal is changed into the second logic level from the first logic level;
Wherein:
First predetermined lasting time is more than zero;And
Second predetermined lasting time is more than zero.
44. method as claimed in claim 43, wherein:
The processing information associated with the input signal also includes:
First period equal to or more than first predetermined lasting time is determined to be in response to the input signal The first threshold is inside remained above, is operated using alternative plan;
The input signal generation drive signal is based at least partially on, to turn on and off transistor so as to influence and the electricity The associated electric current of the secondary windings of source converter also includes:In response to being operated using the alternative plan,
Determine whether the input signal becomes less than the Second Threshold;And
It is confirmed as becoming less than the Second Threshold in response to the input signal, the drive signal is patrolled from described first Collect level and be changed into second logic level, but regardless of the input signal equal or longer than second predetermined lasting time Second period in whether remain less than the Second Threshold.
45. method as claimed in claim 44, wherein, handling the information associated with the input signal also includes:In sound Input signal described in Ying Yu is confirmed as becoming less than the Second Threshold, by the drive signal from first logic level It is changed into second logic level, but regardless of the input signal equal or longer than described in second predetermined lasting time Whether remain less than after the Second Threshold, operated using the first scheme in second period.
46. method as claimed in claim 44, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
47. method as claimed in claim 43, in addition to:
In response to the drive signal is changed into second logic level from first logic level, the crystal is connected Pipe.
48. method as claimed in claim 43, wherein, the Second Threshold is less than the first threshold.
49. a kind of method for regulation power supply converter, methods described includes:
Receive input signal;
The processing information associated with the input signal;And
The input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and the power supply The associated electric current of the secondary windings of converter;
Wherein, handling the information associated with the input signal includes:
Determine whether the input signal remained less than or wait within the first period equal or longer than the first predetermined lasting time In first threshold and more than Second Threshold, the Second Threshold is less than the first threshold;And
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when Remain less than or equal to the first threshold and more than the Second Threshold, operated using first scheme in section;
Wherein, the input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and institute The electric current that stating the secondary windings of supply convertor is associated includes:In response to being operated using the first scheme,
Determine whether the input signal remains less than the 3rd within the second period equal or longer than the second predetermined lasting time Threshold value;And
Second period equal or longer than second predetermined lasting time is determined to be in response to the input signal The 3rd threshold value is inside remained less than, the drive signal is changed into the second logic level from the first logic level;
Wherein:
First predetermined lasting time is more than zero;And
Second predetermined lasting time is more than zero.
50. method as claimed in claim 49, wherein:
The processing information associated with the input signal also includes:
First period equal or longer than first predetermined lasting time is determined to be in response to the input signal Inside remain less than or equal to the first threshold and more than the Second Threshold, operated using alternative plan;
Wherein, be based at least partially on input signal generation drive signal, to turn on and off transistor so as to influence with The associated electric current of the secondary windings of the supply convertor also includes:In response to being operated using the alternative plan,
Determine whether the input signal becomes less than the 3rd threshold value;And
It is confirmed as becoming less than the 3rd threshold value in response to the input signal, the drive signal is patrolled from described first Collect level and be changed into second logic level, but regardless of the input signal equal or longer than second predetermined lasting time Second period in whether remain less than the 3rd threshold value.
51. method as claimed in claim 50, wherein, handling the information associated with the input signal also includes:In sound Input signal described in Ying Yu is confirmed as becoming less than the 3rd threshold value, by the drive signal from first logic level It is changed into second logic level, but regardless of the input signal equal or longer than described in second predetermined lasting time Whether remain less than after the 3rd threshold value, operated using the first scheme in second period.
52. method as claimed in claim 50, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
53. method as claimed in claim 49, in addition to:
In response to the drive signal is changed into second logic level from first logic level, the crystal is connected Pipe.
54. method as claimed in claim 49, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
55. a kind of method for regulation power supply converter, methods described includes:
Receive input signal;
The processing information associated with the input signal;And
The input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and the power supply The associated electric current of the secondary windings of converter;
Wherein, handling the information associated with the input signal includes:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;
Determine whether the input signal is remained above second within the second period equal or longer than the second predetermined lasting time Threshold value, the Second Threshold is less than the first threshold, and it is predetermined when continuing that second predetermined lasting time is longer than described first Between;And
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when The first threshold is remained above in section, and the input signal is not determined to predetermined lasting equal or longer than described second The Second Threshold is remained above in second period of time, is operated using first scheme;
Wherein, the input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and institute The electric current that stating the secondary windings of supply convertor is associated includes:In response to being operated using the first scheme,
Determine whether the input signal remains less than the 3rd in the 3rd period equal or longer than the 3rd predetermined lasting time Threshold value;And
The 3rd period equal or longer than the 3rd predetermined lasting time is determined to be in response to the input signal The 3rd threshold value is inside remained less than, the drive signal is changed into the second logic level from the first logic level;
Wherein:
First predetermined lasting time is more than zero;
Second predetermined lasting time is more than zero;And
3rd predetermined lasting time is more than zero.
56. method as claimed in claim 55, wherein:
The processing information associated with the input signal also includes:
First period equal to or more than first predetermined lasting time is determined to be in response to the input signal The first threshold is inside remained above, or the input signal is determined to be in when making a reservation for continue equal or longer than described second Between second period in be remained above the Second Threshold, operated using alternative plan;
The input signal generation drive signal is based at least partially on, to turn on and off transistor so as to influence and the electricity The associated electric current of the secondary windings of source converter also includes:In response to being operated using the alternative plan,
Determine whether the input signal becomes less than the 3rd threshold value;And
It is confirmed as becoming less than the 3rd threshold value in response to the input signal, the drive signal is patrolled from described first Collect level and be changed into second logic level, but regardless of the input signal equal or longer than the 3rd predetermined lasting time The 3rd period in whether remain less than the 3rd threshold value.
57. method as claimed in claim 56, wherein, it is determined to be in response to the input signal equal to or more than described The first threshold is remained above in first period of first predetermined lasting time, or the input signal is confirmed as The Second Threshold is remained above within second period equal or longer than second predetermined lasting time, second is utilized Scheme, which carries out operation, to be included:
First period equal or longer than first predetermined lasting time is determined to be in response to the input signal The first threshold is inside remained above, and the input signal is determined to be in equal or longer than second predetermined lasting time Second period in be remained above the Second Threshold, operated using alternative plan.
58. method as claimed in claim 56, wherein, handling the information associated with the input signal also includes:
It is being confirmed as becoming less than the 3rd threshold value in response to the input signal, by the drive signal from described first Logic level is changed into second logic level, but regardless of the input signal when making a reservation for continue equal or longer than the described 3rd Between the 3rd period in whether remain less than the 3rd threshold value after, operated using the first scheme.
59. method as claimed in claim 56, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
60. method as claimed in claim 55, in addition to:
In response to the drive signal is changed into second logic level from first logic level, the crystal is connected Pipe.
61. method as claimed in claim 55, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
62. a kind of method for regulation power supply converter, methods described includes:
Receive input signal;
The processing information associated with the input signal;And
The input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and the power supply The associated electric current of the secondary windings of converter;
Wherein, handling the information associated with the input signal includes:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;
Determine whether the input signal is remained above second within the second period equal or longer than the second predetermined lasting time Threshold value;And
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when The first threshold is remained above in section, and the input signal is not determined to predetermined lasting equal or longer than described second The Second Threshold is remained above in second period of time, is operated using first scheme;
Wherein:
The Second Threshold is less than the first threshold;And
Second predetermined lasting time is longer than first predetermined lasting time;
Wherein:
First predetermined lasting time is more than zero;And
Second predetermined lasting time is more than zero;
Wherein:
The first threshold is in amplitude as the input signal changes;And
The Second Threshold is in amplitude as the input signal changes.
63. method as claimed in claim 62, wherein:
The first threshold is in amplitude as the input signal increases;And
The Second Threshold is in amplitude as the input signal increases.
64. the method as described in claim 63, wherein:
The first threshold is in amplitude as the input signal linearly increases;And
The Second Threshold is in amplitude as the input signal linearly increases.
65. method as claimed in claim 62, wherein:
The processing information associated with the input signal also includes:
First period equal or longer than first predetermined lasting time is determined to be in response to the input signal The first threshold is inside remained above, or the input signal is determined to be in when making a reservation for continue equal or longer than described second Between second period in be remained above the Second Threshold, operated using alternative plan;And
The alternative plan is different from the first scheme.
66. the method as described in claim 65, wherein, it is determined to be in response to the input signal equal or longer than described The first threshold is remained above in first period of first predetermined lasting time, or the input signal is confirmed as The Second Threshold is remained above within second period equal or longer than second predetermined lasting time, second is utilized Scheme, which carries out operation, to be included:
First period equal or longer than first predetermined lasting time is determined to be in response to the input signal The first threshold is inside remained above, and the input signal is determined to be in when making a reservation for continue equal or longer than described second Between second period in be remained above the Second Threshold, operated using the alternative plan.
67. the method as described in claim 65, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
68. method as claimed in claim 62, wherein, the input signal generation drive signal is at least partially based on, to connect Logical or shut-off transistor is so as to influence the electric current associated with the secondary windings of the supply convertor to include:In response to utilizing First scheme is stated to be operated,
Determine whether the input signal remains less than the 3rd in the 3rd period equal or longer than the 3rd predetermined lasting time Threshold value, the 3rd predetermined lasting time is more than zero;And
It is determined to be in the 3rd period equal or longer than the 3rd duration and protects in response to the input signal Hold less than the 3rd threshold value, the drive signal is changed into the second logic level from the first logic level.
69. method as recited in claim 68, in addition to:
In response to the drive signal is changed into second logic level from first logic level, the crystal is connected Pipe.
70. method as recited in claim 68, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
71. a kind of method for regulation power supply converter, methods described includes:
Receive input signal;
The processing information associated with the input signal;And
The input signal generation drive signal is at least partially based on, to turn on and off transistor so as to influence and the power supply The associated electric current of the secondary windings of converter;
Wherein, handling the information associated with the input signal includes:
Determine whether the input signal is remained above first within the first period equal or longer than the first predetermined lasting time Threshold value;
Determine whether the input signal is remained above second within the second period equal or longer than the second predetermined lasting time Threshold value;And
In response to the input signal be not determined to equal or longer than first predetermined lasting time described first when The first threshold is remained above in section, and the input signal is not determined to predetermined lasting equal or longer than described second The Second Threshold is remained above in second period of time, is operated using first scheme;
Wherein:
The Second Threshold is less than the first threshold;And
Second predetermined lasting time is longer than first predetermined lasting time;
Wherein:
First predetermined lasting time is more than zero;
Second predetermined lasting time is more than zero;
First predetermined lasting time is in amplitude as the input signal changes;And
Second predetermined lasting time is in amplitude as the input signal changes.
72. the method as described in claim 71, wherein:
First predetermined lasting time is in amplitude as the input signal increases;And
Second predetermined lasting time is in amplitude as the input signal increases.
73. the method as described in claim 72, wherein:
First predetermined lasting time is in amplitude as the input signal linearly increases;And
Second predetermined lasting time is in amplitude as the input signal linearly increases.
74. the method as described in claim 71, wherein:
The processing information associated with the input signal also includes:
First period equal or longer than first predetermined lasting time is determined to be in response to the input signal The first threshold is inside remained above, or the input signal is determined to be in when making a reservation for continue equal or longer than described second Between second period in be remained above the Second Threshold, operated using alternative plan;And
The alternative plan is different from the first scheme.
75. the method as described in claim 74, wherein, it is determined to be in response to the input signal equal or longer than described The first threshold is remained above in first period of first predetermined lasting time, or the input signal is confirmed as The Second Threshold is remained above within second period equal or longer than second predetermined lasting time, second is utilized Scheme, which carries out operation, to be included:
First period equal or longer than first predetermined lasting time is determined to be in response to the input signal The first threshold is inside remained above, and the input signal is determined to be in when making a reservation for continue equal or longer than described second Between second period in be remained above the Second Threshold, operated using the alternative plan.
76. the method as described in claim 74, wherein:
The first scheme is slow connection scheme;And
The alternative plan is Quick connecting pipe fitting scheme.
77. the method as described in claim 71, wherein, the input signal generation drive signal is at least partially based on, to connect Logical or shut-off transistor is so as to influence the electric current associated with the secondary windings of the supply convertor to include:In response to utilizing First scheme is stated to be operated,
Determine whether the input signal remains less than the 3rd in the 3rd period equal or longer than the 3rd predetermined lasting time Threshold value, the 3rd predetermined lasting time is more than zero;And
It is determined to be in the 3rd period equal or longer than the 3rd duration and protects in response to the input signal Hold less than the 3rd threshold value, the drive signal is changed into the second logic level from the first logic level.
78. the method as described in claim 77, in addition to:
In response to the drive signal is changed into second logic level from first logic level, the crystal is connected Pipe.
79. the method as described in claim 77, wherein:
3rd threshold value is less than the first threshold;And
3rd threshold value is less than the Second Threshold.
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US16/786,372 US11764684B2 (en) 2012-04-12 2020-02-10 Systems and methods for regulating power conversion systems with output detection and synchronized rectifying mechanisms
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