CN107274930A - Efuse device and its method of testing and application method - Google Patents
Efuse device and its method of testing and application method Download PDFInfo
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- CN107274930A CN107274930A CN201610210760.4A CN201610210760A CN107274930A CN 107274930 A CN107274930 A CN 107274930A CN 201610210760 A CN201610210760 A CN 201610210760A CN 107274930 A CN107274930 A CN 107274930A
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- electric current
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/027—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in fuses
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
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Abstract
The present invention provides a kind of efuse device and its method of testing and application method, wherein, the method for testing includes：Efuse device is provided；Storage circuit is turned on, and first current control circuit is exported the first electric current, first electric current inputs the first fuse input；Reference circuit is turned on, and the reference resistance is inputted the second electric current and the 3rd electric current, second electric current and the 3rd electric current sum are more than the first electric current；The voltage of the second resistance connection end is set to be equal to the voltage of the second fuse connection end；The voltage of the second fuse connection end and second resistance connection end is compared by comparison circuit, and outputed test result.The method of testing easily makes the equivalent resistance of reference resistance be more than the resistance value of fuse, and then the result of test can be made to represent that the electric fuse unit is in unprogrammed state.Therefore, it is possible to reject the abnormal efuse device of programming, it is to avoid cause bigger loss.
Description
Technical field
The present invention relates to IC design field, more particularly to a kind of efuse device and its method of testing
And application method.
Background technology
With the development of electric fuse (E-fuse) technology, E-fuse application is also more and more extensive, not
It is only limitted to be used to repair memory cell, programmable array can also be used as.
E-fuse cellular construction is mainly makes fuse by the sufficiently large electric current of several NMOS offers arranged side by side
Fusing, and whether be blown by fuse come storage information.Fuse resistance very little before fusing, is continuing
High current effect it is lower fuse after resistance be multiplied, and the state of fuse failure will be kept forever.Cause
This, an electric fuse can be corresponded to " 0 " and " 1 " in binary system.However, fuse can burn completely
Disconnected current range is smaller, and the change of technique or test environment can cause the change of program current, so that
Cause fuse burning or burn continuous, and then cause resistance value after programming to be in critical condition, this state is being entered
Row PC is easily tested as normal program state when testing.And by operations such as follow-up encapsulation, FT tests
Influence after, E-fuse cell arrangements is obtained unprogrammed result in FT is tested or is applied, and lead
Cause to produce larger loss.
As can be seen here, E-fuse devices easily in the application or FT test in occur PC test in test less than
Mistake, and cause larger production loss.
The content of the invention
The problem of present invention is solved is to provide a kind of efuse device and its method of testing and application method, energy
Enough reduce the production loss of E-fuse cell arrangements
To solve the above problems, the present invention provides a kind of efuse device, including：Storage circuit, reference
Circuit and comparison circuit；
The storage circuit includes：First current control circuit, for exporting the first electric current, and controls institute
State the size of the first electric current；Fuse, for storing digital information, the fuse is connected with the first fuse
End, the first fuse connection end is used to input first electric current；
The reference circuit includes：Second current control circuit, for exporting the second electric current, and controls institute
State the size of the second electric current；Reference resistance, for the object of reference as fuse, the reference resistance has
First resistor connection end, the first resistor connection end is used to input the second electric current；Adjunct circuit, is used for
Export the 3rd electric current, the 3rd electric current input first resistor connection end；
The comparison circuit is used for the magnitude of voltage for comparing the first fuse connection end and first resistor connection end
And export comparative result.
Optionally, the adjunct circuit includes third transistor.
Optionally, first current control circuit includes the first transistor；The second current control electricity
Road includes second transistor；The adjunct circuit includes third transistor；The source electrode of the first transistor,
The source electrode of the second transistor and the source electrode of the third transistor are connected；The first transistor
Drain electrode is connected with the first fuse connection end；The drain electrode of the second transistor connects with the first resistor
End is connect to be connected；The drain electrode of the third transistor is connected with the first resistor connection end.
Optionally, the first transistor, second transistor and third transistor are PMOS transistor.
Optionally, the comparison circuit is comparison amplifier, including：First input end, the second input
And output end；The first input end is connected with the first fuse connection end；Second input with
The first resistor connection end connection.
Optionally, the fuse is polysilicon fuse.
Optionally, the fuse also includes the second fuse end；The reference resistance also includes second resistance and connected
Connect end.
Optionally, the storage circuit also includes：First choice circuit, for controlling opening for storage circuit
Open and turn off；The reference circuit also includes：The second selection circuit corresponding with the first choice circuit,
Voltage for making second resistance connection end is equal to the voltage of the second fuse connection end.
Accordingly, the present invention also provides a kind of method of testing of electric fuse cell arrangement, including：In offer
The efuse device stated, the fuse also includes the second fuse connection end, and the reference resistance also includes
Second resistance connection end；Storage circuit is turned on, and makes the electricity of the first current control circuit output first
Stream, first electric current inputs the first fuse input；Reference circuit is turned on, and makes the ginseng
Examine resistance and input the second electric current and the 3rd electric current, second electric current and the 3rd electric current sum are more than the first electricity
Stream；The voltage of the second resistance connection end is set to be equal to the voltage of the second fuse connection end；By than
The voltage of the second fuse connection end and second resistance connection end is compared compared with circuit, and exports survey
Test result.
Optionally, the step of turning on the reference circuit includes：Turn on the adjunct circuit, output
3rd electric current, the 3rd electric current inputs the first resistor connection end；Make the second current control electricity
Road is turned on, and exports the second electric current, the second electric current input first resistor connection end.
Optionally, second electric current is equal to first electric current.
Optionally, the adjunct circuit is third transistor；The drain electrode of the third transistor and described the
One resistance connection end is connected；The step of turning on the adjunct circuit includes：Connect third transistor source electrode
Power supply；Apply voltage in third transistor grid, open third transistor raceway groove.
Optionally, the resistance of the reference resistance is in the range of 1Kohm~10Kohm；3rd electricity
The ratio of stream and the second electric current is more than 0 and is less than 2.
Optionally, first current control circuit is the first transistor, second current control circuit
For second transistor；The first transistor drain electrode is connected with the first fuse connection end；Described second
Transistor drain is connected with the first resistor connection end；The third transistor drain electrode and the described first electricity
Hinder connection end connection；The step of turning on the storage circuit includes：The first transistor source electrode is set to connect power supply；
Apply voltage in first crystal tube grid, turn on the first current control circuit；Lead the reference circuit
Logical step includes：Second transistor source electrode is set to connect power supply；Apply voltage in second transistor grid, make
Second current control circuit is turned on.
Optionally, first current control circuit is the first transistor transistor, the second electric current control
Circuit processed is second transistor；The adjunct circuit is third transistor；Make the storage circuit and reference
In the step of circuit turn-on, make the first transistor source electrode, second transistor source electrode and third transistor
The voltage of source electrode is identical.
Optionally, the first transistor, second transistor and third transistor are PMOS transistor.
Optionally, first electric current is equal with the second electric current.
Optionally, the fuse is polysilicon fuse.
The present invention also provides a kind of application method of efuse device, it is characterised in that including：
Above-mentioned efuse device is provided, the fuse also includes the second fuse connection end, described with reference to electricity
Resistance also includes second resistance connection end；Disconnect adjunct circuit；Storage circuit is turned on, and makes described first
Current control circuit exports the first electric current, and first electric current inputs the first fuse input；Make ginseng
Circuit turn-on is examined, and second current control circuit is exported the second electric current, the second electric current input
The first resistor input, second electric current is equal to the first electric current；Make the electricity of second resistance connection end
Voltage of the pressure equal to the second fuse connection end；Pass through comparison circuit the first fuse input and
The voltage of one resistance input, exports comparative result.
Optionally, the adjunct circuit is third transistor；The drain electrode of the third transistor and described the
One resistance connection end is connected；The step of disconnecting the adjunct circuit includes：Connect the source electrode of third transistor
Power supply；Apply voltage in third transistor grid, open adjunct circuit raceway groove.
Compared with prior art, technical scheme has advantages below：
In the efuse device of the present invention, the reference circuit includes adjunct circuit, and the adjunct circuit is defeated
The electric current gone out inputs the reference resistance, can make to increase by the electric current of the reference resistance, so as to
Enough raise the voltage of the first resistor connection end, the equivalent resistance of reference resistance is more than fuse
Resistance value, and then comparison circuit is exported the result that the fuse is not in programming state.Therefore,
If fuse resistor value is in critical condition, when being tested, the resistance value of the fuse after programming
Easily it is less than equivalent reference resistance resistance, so that the result of test is in unprogrammed shape for the fuse
State, therefore, it is possible to reject the abnormal efuse device of programming, it is to avoid cause bigger loss.
In the application method of the efuse device of the present invention, if the resistance value of fuse to be programmed is in critical
State, i.e., the resistance value of described fuse is close with the resistance value of the reference resistance, in the mistake tested
Cheng Zhong, the second electric current and the 3rd electric current sum for inputting the reference resistance is more than the first electric current, can make
The voltage rise of the first resistor connection end, melts so as to be more than easily the equivalent resistance of reference resistance
The resistance value of silk, and then the result of test can be made to represent that the fuse is in unprogrammed state.Therefore energy
Enough reject the abnormal efuse device of programming, it is to avoid cause bigger loss.
In the application method of efuse device, make fuse resistor and reference resistance by disconnecting adjunct circuit
Resistance, which is compared, obtains a result.Fuse resistance by programming is not easy the resistance less than the reference resistance
Value, therefore, it is possible to export correct data storage.
Brief description of the drawings
Fig. 1 is a kind of structural representation of the method for testing of efuse device；
Fig. 2 is the structural representation of the embodiment of efuse device one of the present invention.
Embodiment
There are problems in the method for testing of existing efuse device, for example：Easily make E-fuse devices
Occur the mistake that can't detect in PC tests in the application or in FT tests, and cause larger loss.
In conjunction with the method for testing of existing E-fuse devices, the E-fuse devices are analyzed easily in application
The reason for there is mistake in stage：
Fig. 1 is a kind of structural representation of the application method of efuse device.The user of efuse device
Method includes：
Fig. 1 be refer to there is provided efuse device, the efuse device includes multiple electric fuse units, institute
Stating electric fuse unit includes：
Fuse R1, for storing digital information, the fuse R1 includes the first connection end 1；
First current control circuit 11, for exporting the first electric current I1, the first electric current I1 inputs are described
Fuse；
Reference resistance R2, reference resistance R2 are used as fuse R1 reference resistance, the reference resistance R2
Including the second connection end 2；
Second current control unit 12, for exporting the second electric current I2, the second electric current I2 inputs are described
Reference resistance R2；
Comparison circuit 10, the comparison circuit 10 includes two inputs and an output end 3, described two
Individual input is connected with the connection end 2 of the first connection end 1 and second respectively；
First current control circuit 11 is adjusted, made by first current control circuit 11
Electric current be the first electric current I1, and second current control circuit 12 is adjusted, made by described
The electric current of second current control circuit 12 is that the second electric current I2, the first electric current I1 is equal to the second electric current I2.
In the method for testing of existing efuse device, when testing the efuse device, due to
First electric current I1 is equal to the second electric current I2, and the voltage of the first connection end 1 and the voltage of the second connection end 2 are big
Small relation is determined by fuse R1 resistance value and the reference resistance R2 magnitude relationship of resistance value.To electric smelting
Before silk unit programming, fuse R1 resistance value is smaller, and fuse R1 resistance value is less than reference resistance R2
Resistance value, comparison circuit output low level " 0 "；After being programmed to electric fuse unit, fuse R1 fusing,
Resistance value is sharply increased, and fuse R1 resistance value is more than reference resistance R2 resistance value, and comparison circuit is defeated
Go out high level " 1 ".
However, when fuse R1 after programming resistance value be in critical condition when, fuse R1 resistance value with
Reference resistance R2 resistance value is close, in PC test process, comparison circuit output high level " 1 ".
When carrying out FT tests, due to the influence of the operations such as encapsulation, FT tests, the resistance value of the fuse R1
Easily it is less than reference resistance R1 resistance value, and causes to export low level " 0 " when FT is tested, so that
It is easily caused bigger loss.
To solve the technical problem, the invention provides a kind of efuse device, including：Storage circuit,
Reference circuit and comparison circuit；The storage circuit includes：First current control circuit, for exporting the
One electric current, and control the size of first electric current；Fuse, for storing digital information, the fuse
With the first fuse connection end, the first fuse connection end is used to input first electric current；The ginseng
Examining circuit includes：Second current control circuit, for exporting the second electric current, and controls second electric current
Size；Reference resistance, for the object of reference as fuse, the reference resistance has first resistor company
End is connect, the first resistor connection end is used to input the second electric current；Adjunct circuit, for exporting the 3rd electricity
Stream, the 3rd electric current input first resistor connection end；The comparison circuit melts for comparing described first
The magnitude of voltage of silk connection end and first resistor connection end simultaneously exports comparative result.
Wherein, the reference circuit includes adjunct circuit, and the electric current input of the adjunct circuit output is described
Reference resistance, can make to increase by the electric current of the reference resistance, so as to make the first resistor
The voltage rise of connection end, makes the equivalent resistance of reference resistance be more than the resistance value of fuse, and then easily
Comparison circuit is set to export the result that the fuse is not in programming state.Therefore, if fuse is electric after programming
Resistance is in critical condition, then when being tested, and the resistance value of the fuse is easily less than equivalent ginseng
Resistance is examined, so that the result of test is in unprogrammed state for the fuse, therefore, it is possible to reject
The abnormal efuse device of programming, it is to avoid cause bigger loss.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings
The specific embodiment of the present invention is described in detail.
Fig. 2 is the structural representation of the embodiment of efuse device one of the present invention.The efuse device bag
Include：
Storage circuit, reference circuit and comparison circuit；
The storage circuit includes：
First current control circuit, for exporting the first electric current, and controls the size of first electric current；
Fuse R1, for storing digital information, the fuse R1 has the first fuse connection end 211, and described the
One fuse connection end 211 is used to input first electric current；
The reference circuit includes：
Second current control circuit, for exporting the second electric current, and controls the size of second electric current；
Reference resistance R2, for the object of reference as fuse R1, the reference resistance R2 has the first electricity
Connection end 221 is hindered, the first resistor connection end 221 is used to input second electric current；
Adjunct circuit, for exporting the 3rd electric current, the 3rd electric current inputs the first resistor connection end
221；
The comparison circuit is used to compare the first fuse connection end 211 and first resistor connection end 221
Magnitude of voltage and output result.
It should be noted that the fuse R1 is polysilicon fuse, resistance of the polysilicon fuse before blowing
Very little, resistance exponentially increases after lasting high current fusing, and the state of fuse R1 fractures will forever
Kubo is held, therefore, it is possible to accurate programming.However, the current range that can blow completely of polysilicon fuse compared with
Small, the change of technique or test environment can cause the change of program current, thus cause fuse R1 burning or
It is to burn continuous, so as to cause resistance after programming to be in critical condition.Therefore, the present embodiment is with polysilicon electricity
Illustrated exemplified by fuse.
In the present embodiment, first current control circuit is used for the electric current of fuse R1 described in control input,
The electric current of the first current control circuit output inputs the fuse R1.
In the present embodiment, first current control circuit includes the first transistor, and the first transistor can
Realize the control to drain-source current.Specifically, the first transistor is PMOS transistor, this implementation
In example, first current control circuit is the first PMOS M1.In other embodiments, described
One current control circuit can also be nmos pass transistor.
In the present embodiment, first current control circuit is connected with the fuse R1, specifically, described
First PMOS M1 drain electrode is connected 211 with the first fuse connection end of the fuse R1；Described
One PMOS M1 source electrode connects high voltage；The drain electrode g1 of the first PMOS M1 is used to pass through
Connect the electric current in the different magnitudes of voltage control storage circuits.
In the present embodiment, resistance values of the fuse R1 before blowing is in 90ohm~110ohm；It is described
Resistance value after fuse R1 fusing completely is in the range of 3Kohm~2Mohm.
In the present embodiment, the fuse R1 includes：First fuse connection end 211 and it is connected with the first fuse
Hold 211 the second relative fuse connection ends 212.
In the present embodiment, second current control circuit is used for the electricity of reference resistance R2 described in control input
Stream, the electric current of the first current control circuit output inputs the reference resistance R2.
In the present embodiment, second current control circuit is second transistor, and second transistor can be real
Now to the control of drain-source current.Specifically, second current control circuit is PMOS transistor, this
In embodiment, second current control circuit is the second PMOS M2.In other embodiments, institute
It can also be nmos pass transistor to state the second current control circuit.
In order to simplify the control difficulty of the first PMOS M1 and the second PMOS M2 to electric current.This
In embodiment, the second PMOS M2 and the first PMOS M1 are identical.
In the present embodiment, second current control circuit is connected with the reference resistance R2, specifically,
The drain electrode of the second PMOS M2 is connected with the first resistor connection end 221 of the reference resistance R2；
The source electrode of the second PMOS M2 connects high voltage；The drain electrode g2 of the second PMOS M2 is used
In the size of current for controlling the second PMOS M2 to export by connecing different magnitudes of voltage.
Easily programming is set mistake occur if the resistance value of the reference resistance R2 is too high or too low.Specifically
, in the present embodiment, the reference resistance R2 is resistance wire, and the resistance of the reference resistance R2 exists
In the range of 1Kohm~10Kohm.
In the present embodiment, the adjunct circuit is used to produce electric current, and the electric current that the adjunct circuit is produced is defeated
Enter the reference resistance R2, therefore, the adjunct circuit, which can be adjusted, flows through the reference resistance R2's
Electric current, so as to adjust the voltage of the first connection ends of R2 221.
In the present embodiment, the adjunct circuit is third transistor, and the third transistor can be realized pair
The control of drain-source current.Specifically, the adjunct circuit is PMOS transistor, and in the present embodiment, institute
Adjunct circuit is stated for the 3rd PMOS M3.In other embodiments, the adjunct circuit can also be
Nmos pass transistor.
In the present embodiment, the drain electrode of the 3rd PMOS M3 and the first electricity of the reference resistance R2
Resistance connection end 221 is connected；The source electrode of the 3rd PMOS M3 connects high voltage；3rd PMOS
Pipe M3 grid g3 is used for the electricity for controlling the 3rd PMOS M3 to export by connecing different magnitudes of voltage
Stream, so as to be controlled to the voltage of the first resistor connection end 221.
The substrate of the 3rd PMOS M3 connects high level.Specifically, in the present embodiment, described
Three PMOS M3 substrate is connected with three PMOS M3 source electrode, connects identical voltage.
In the present embodiment, the first PMOS M1, the second PMOS M2 and the 3rd PMOS
Pipe M3 source electrode is connected, and for connecting identical high voltage, can simplify the operating process of efuse device.
In other embodiments, the source electrode of first PMOS, the second PMOS and the 3rd PMOS
It can not also be connected with each other, and different voltages can be connect.
In the present embodiment, the amplifying circuit that compares is comparison amplifier 20, for the signal of input to be entered
Row amplification, and be compared, comparative result is exported.
In the present embodiment, the comparison amplifier 20 includes：First input end input1, the second input
Input2 and output end output.The first input end input1 is connected with the first fuse connection end 211,
Voltage for inputting the first fuse connection end 211；The second input input2 connects with first resistor
Connect end 221 to connect, the voltage for inputting first resistor connection end 221.
In the present embodiment, the comparison amplifier 20 is electric by the voltage of the first fuse connection end 211 and first
The voltage of resistance connection end 221 is compared.When the voltage of the first fuse connection end 211 is more than first resistor
During the voltage of connection end 221, the output high level of comparison amplifier 20 " 1 "；When the connection of the first fuse
When the voltage at end 211 is less than the voltage of first resistor connection end 221, the comparison amplifier 20 exports low
Level " 0 ".
In the present embodiment, the storage circuit also includes first choice circuit, and the first choice circuit is used
In opening and shutting off for control storage circuit, so as to select the electric fuse unit for needing to be programmed.
In the present embodiment, the first choice circuit is transistor, specifically, the first choice circuit
For the first PMOS M4.
In the present embodiment, the drain electrode of the first PMOS M4 is connected with the second fuse connection end 212；
The source ground of the first PMOS M4；The grid g4 of the first PMOS M4 is used to lead to
Cross and connect conducting and shut-off that different voltages control the first PMOS transistor M4, so as to needing
The electric fuse unit being programmed is selected.
Specifically, when the first PMOS transistor M4 grid g4 connects high level, the first PMOS
Transistor M4 raceway groove is opened, the first PMOS transistor M4 conductings, can be to the electric fuse list
Member is programmed or tested；When the first PMOS transistor M4 grid g4 connects low level, first
PMOS transistor M4 is turned off.
In the present embodiment, the reference circuit also includes the second selection electricity corresponding with first choice circuit
Road, second selection circuit is used to realize the symmetrical of reference circuit and storage circuit, connects second resistance
The voltage for connecing the fuse connection end 222 of end 212 and second is equal, so that the comparison amplifier 20 is defeated
Go out result and the electric current by the fuse R1 and reference resistance R2 and the fuse R1 and reference
Resistance R2 resistance value is relevant, so as to simplify the operation difficulty of efuse device.In other embodiments,
The first choice circuit can also be differed with the second selection circuit.Specifically, in the present embodiment, institute
The second selection circuit is stated for the second PMOS M5.
To sum up, in efuse device of the invention, the reference circuit includes adjunct circuit, described additional
The electric current of circuit output inputs the reference resistance, can make to increase by the electric current of the reference resistance,
So as to raise the voltage of the first resistor connection end, it is more than the equivalent resistance of reference resistance
The resistance value of fuse, and then comparison circuit is exported the result that the fuse is not in programming state.
Therefore, if fuse resistor value is in critical condition, when being tested, the fuse after programming
Resistance value is easily less than equivalent reference resistance resistance, so that the result of test is in not for the fuse
Programming state, therefore, it is possible to reject the abnormal efuse device of programming, it is to avoid cause bigger loss.
Accordingly, the present invention also provides a kind of method of testing of efuse device.As shown in Fig. 2 described
Method of testing includes：
The efuse device described in above example is provided, the fuse also includes the second fuse connection end
212, the reference resistance also includes second resistance connection end 222；
The storage circuit is turned on, and first current control circuit is exported the first electric current, it is described
First electric current inputs the first fuse input 212；
The reference circuit is turned on, and the reference resistance R2 is inputted the second electric current and the 3rd electric current,
Second electric current and the 3rd electric current sum are more than first electric current；
Outputed test result by comparison circuit.
As shown in Fig. 2 in this implementation, the efuse device is filled with the electric fuse described in a upper embodiment
Put identical, concrete structure is not repeated herein.
It should be noted that in the present embodiment, the efuse device includes multiple fuse R1.Carry out institute
State before programmed process, the method for testing also includes：By first choice circuit to needing to test
Fuse R1 selected.
Specifically, in the present embodiment, the first choice circuit is the first NMOS tube M4.To needing
The step of fuse R1 tested is selected includes：Make the source electrode of the first NMOS tube M4
Ground connection；The grid g4 of the first NMOS tube M4 is set to connect high level, then the first NMOS tube M4
Conducting, can be tested fuse R1.
The storage circuit is turned on, and first current control circuit is exported the first electric current.
In the present embodiment, the adjunct circuit, the first current control circuit and the second current control circuit are equal
For transistor, and the source electrode of the adjunct circuit, the first current control circuit and the second current control circuit
It is connected, therefore, the source electrode of the adjunct circuit, the first current control circuit and the second current control circuit
Connect identical high level.In other embodiments, the adjunct circuit, the first current control circuit and
Two current control circuits can also connect different high voltages.Specifically, the first current control circuit bag
Include the first transistor；Second current control circuit includes second transistor；The adjunct circuit includes
Third transistor.
The drain electrode of the first transistor is connected with the first fuse connection end 211；Second crystal
The drain electrode of pipe is connected with the first resistor connection end 221；The drain electrode of the third transistor and described the
One resistance connection end 221 is connected.
In the present embodiment, the first transistor is the first PMOS M1, turns on the storage circuit,
And the step of the first electric current of output includes：The grid g1 of the first PMOS M1 is set to connect low-voltage,
The first PMOS M1 conductings, and by adjusting the grid g1 electricity of the first PMOS M1
Pressure makes the first PMOS M1 drain-source current be the first electric current.
It should be noted that first electric current inputs the first fuse input 211, for blowing
State fuse R1.However, because the scope that the fuse R1 is required blow current is smaller, therefore, institute
State fuse R1 and be likely to be at resistance close to reference resistance R2 critical condition.
The reference circuit is turned on, and the reference resistance R2 is inputted the second electric current and the 3rd electric current,
Second electric current and the 3rd electric current sum are more than first electric current；
It should be noted that in the present embodiment, it is common by second current control circuit and adjunct circuit
With the size for adjusting second electric current and the 3rd electric current sum.Make the step of reference circuit R2 is turned on
Including：
The adjunct circuit is turned on, the 3rd electric current is exported, the 3rd electric current inputs the first resistor
Connection end 221；
The second control circuit is turned on, the second electric current, the second electric current input described first is exported
Resistance connection end 222.
Specifically, in the present embodiment, the third transistor is the 3rd PMOS M3, make described additional
The step of circuit turn-on, includes：The grid g3 of the 3rd PMOS M3 is connect low level, then the 3rd
PMOS M3 raceway grooves are opened, the 3rd PMOS M3 conductings, and by adjusting the 3rd PMOS
The size of 3rd electric current described in M3 grid g3 voltage-regulations.
In the present embodiment, second current control circuit is the second PMOS M2, is made described with reference to electricity
Road is turned on, and the step of the second electric current of output includes：Meet the grid g2 of the second PMOS M2
Low-voltage, the second PMOS M2 conductings, and by adjusting the second PMOS M2's
Grid g2 voltages make the second PMOS M2 drain-source current be the second electric current.
It should be noted that for simplicity, in the present embodiment, second electric current and the first electric current
It is equal.In other embodiments, first electric current and the second electric current can also be unequal.
Again because in the present embodiment, the first choice circuit and the second selection circuit are used to adjust second
Fuse connection end 212 and the voltage of second resistance connection end 222, make the second fuse connection end 212 and
The voltage of two resistance connection ends 222 is identical.Therefore, the output result of the comparison amplifier 20 only with institute
State fuse R1 and reference resistance R2 resistance and first electric current and the second electric current and the 3rd electric current it
With size it is relevant.
In the present embodiment, by comparison circuit to the first fuse connection end 211 and first resistor connection end 221
Voltage, which is compared, to output test result.
It should be noted that to make the first fuse connection end 211 and the voltage of first resistor connection end 221
Comparative result becomes apparent from, in the case where ensureing that 221 voltages of first resistor connection end are constant, to the ginseng
The resistance for examining resistance R2 does equivalence replacement for equivalent resistance Rref '.The equivalent resistance Rref ' refers to working as
Equivalent resistance during by the electric current of the reference resistance R2 for the first electric current.
Rref '=RrefIAlways/I1
Rref '=Rref (I2+I3)/I1
Wherein, Rref is reference resistance R2 resistance, and I2 is the size of the second electric current, and I3 is the 3rd electric current
Size, IAlwaysFor the first electric current and the size of the second electric current sum.
Then, the voltage of the first resistor connection end 221 and the voltage of the first fuse connection end 211 difference
For：
U221=U222+Rref’·I1
U211=U212+R·I1
Wherein, U221、U211、U222And U212Respectively first resistor connection end 221, the first fuse connect
Connect end 211, the magnitude of voltage of the fuse connection end 212 of second resistance connection end 222 and second.
Found out by above formula, the present invention by increasing the second electric current and the 3rd electric current sum, make the second electric current and
3rd electric current is more than the first current equivalence in the resistance for adding reference resistance.
Specifically, when fuse R1 resistance is more than the equivalent resistance Rref ' of reference resistance, the first fuse
The voltage of connection end 211 is more than the voltage of first resistor connection end 221, and comparison amplifier 20 exports high electricity
Flat " 1 "；When fuse R1 resistance is less than the equivalent resistance Rref ' of reference resistance, the connection of the first fuse
The voltage at end 211 is less than the voltage of first resistor connection end 221, the output low level of comparison amplifier 20 " 0 ".
Therefore, when the fuse R1 programmings are incomplete, the resistance of fuse R1 resistance close to reference resistance R2
Value Rref, the equivalent resistance Rref ' less than reference resistance R2, the output result of equivalent amplifier 20 is " 0 ",
So as to reject the incomplete fuse R1 of programming, it is to avoid follow-up to produce bigger loss.
In the present embodiment, second electric current is equal to the first electric current, then has：Rref '=Rref (I1+I3)/I1.
If the ratio of the 3rd electric current and the first electric current is too small, resistance of the equivalent resistance than reference resistance R2 is extremely
Difference is smaller, it is difficult to make to make in test process reference resistance R2 equivalent resistance to be more than melting in critical condition
Silk R1 resistance, therefore be difficult to reject the incomplete efuse device of programming；If the 3rd electric current with
The ratio of first electric current is excessive, easily makes reference resistance R2 fuse R1 of the equivalent resistance more than fusing
Resistance, so that mistake occurs in test.Therefore, in the present embodiment, the 3rd electric current and the second electric current
Ratio be more than 0 be less than 2.
It should be noted that in other embodiments, the step of turning on the reference circuit is：Disconnect
The adjunct circuit, then the 3rd electric current is 0；Second current control unit is turned on, and is exported
Second electric current, second electric current is more than the first electric current.3rd electric current is equal to the second electric current sum
Second electric current.
To sum up, in the application method of efuse device of the invention, if at the resistance value of fuse to be programmed
In critical condition, i.e., the resistance value of described fuse is close with the resistance value of the reference resistance, is being surveyed
During examination, the second electric current and the 3rd electric current sum for inputting the reference resistance are more than the first electric current,
It can raise the voltage of the first resistor connection end, so as to easily make the equivalent resistance of reference resistance
More than the resistance value of fuse, and then the result of test can be made to represent that the fuse is in unprogrammed state.
Therefore, it is possible to reject the abnormal efuse device of programming, it is to avoid cause bigger loss.
As shown in Fig. 2 the present invention also provides a kind of application method of efuse device, including：
The efuse device as described in the embodiment of efuse device one is provided, the fuse R1 also includes second
Fuse connection end 211, the reference resistance R2 also includes second resistance connection end 221；
The adjunct circuit is disconnected, the adjunct circuit is disconnected, fuse R1 resistance and the ginseng can be made
The resistance for examining resistance R2 is compared, and exports comparative result；
The storage circuit is turned on, and first current control circuit is exported the first electric current, it is described
First electric current inputs the first fuse input 211；
The reference circuit is turned on, and second current control circuit is exported the second electric current, it is described
Second electric current inputs the first resistor input 221, and second electric current is equal to the first electric current；
The voltage of the second resistance connection end 222 is set to be equal to the voltage of the second fuse connection end 212；
Pass through comparison circuit the first fuse input 211 and the electricity of first resistor input 221
Pressure, exports comparative result.
Specifically, in the present embodiment, the first choice circuit is the first NMOS tube M4.To needing
The step of fuse R1 being read out is selected includes：Make the source electrode of the first NMOS tube M4
Ground connection；The grid g4 of the first NMOS tube M4 is set to connect high level, then the first NMOS tube M4
Conducting, can be read out to fuse R1.
In the present embodiment, the adjunct circuit, the first current control circuit and the second current control circuit are equal
For PMOS transistor, and the adjunct circuit, the first current control circuit and the second current control circuit
Source electrode be connected, therefore, the adjunct circuit, the first current control circuit and the second current control circuit
Source electrode connect identical high level.In other embodiments, the adjunct circuit, the first current control electricity
Road and the second current control circuit can also connect different high voltages.
Specifically, in the present embodiment, the step of disconnecting the adjunct circuit includes：By in adjunct circuit
Grid applies certain voltage, makes adjunct circuit raceway groove pinch off.
In the present embodiment, the adjunct circuit is the 3rd PMOS M3, disconnects the step of the adjunct circuit
Suddenly include：The grid g3 of the 3rd PMOS M3 is set to connect high level, then the 3rd PMOS M3
Raceway groove pinch off, the 3rd PMOS M3 shut-offs.
In the present embodiment, first current control circuit is the first PMOS M1, makes the storage electricity
Road is turned on, and the step of the first electric current of output includes：Meet the grid g1 of the first PMOS M1
Low-voltage, the first PMOS M1 conductings, and by adjusting the first PMOS M1's
Grid g1 voltages make the first PMOS M1 drain-source current be the first electric current.
In the present embodiment, second current control circuit is the second PMOS M2, is made described with reference to electricity
Road is turned on, and the step of the second electric current of output includes：Meet the grid g2 of the second PMOS M2
Low-voltage, the second PMOS M2 conductings, by the grid for adjusting the second PMOS M2
Pole g2 voltages make the second PMOS M2 drain-source current be the second electric current, and make described second electric current etc.
In the first electric current.
In the present embodiment, by the grid g4 voltages and the 2nd NMOS that adjust the first NMOS tube M4
Pipe M5 grid g5 voltages make the voltage phase of the second fuse connection end 212 and second resistance connection end 222
Together.
In the present embodiment, second electric current is equal to the first electric current, therefore, the first fuse connection end
211 and the voltage swing relation of first resistor connection end 221 depend on fuse R1 and reference resistance R2
Resistance.The output result of i.e. described comparison amplifier depends on fuse R1 and reference resistance R2 resistance.
It should be noted that the fuse equipment of the present embodiment have passed through the test of fuse equipment before the use
Test described in the embodiment of method one.That is, the resistance value of the fuse R1 is much larger than reference resistance
R2 resistance, therefore, in use, the resistance of the fuse R1 by programming is difficult due to environment
Etc. the influence of factor, resistance is set to be less than reference resistance R2.Therefore, the reading result of the fuse R1 is not
Easily there is mistake.
To sum up, in the application method of efuse device, fuse resistor and reference are made by disconnecting adjunct circuit
The resistance of resistance, which is compared, obtains a result.Fuse resistance by programming is not easy less than described with reference to electricity
The resistance of resistance, therefore, it is possible to export correct data storage.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art,
Without departing from the spirit and scope of the present invention, it can make various changes or modifications, therefore the guarantor of the present invention
Shield scope should be defined by claim limited range.
Claims (20)
1. a kind of efuse device, it is characterised in that including：
Storage circuit, reference circuit and comparison circuit；
The storage circuit includes：
First current control circuit, for exporting the first electric current, and controls the size of first electric current；
Fuse, for storing digital information, the fuse has the first fuse connection end, and described first melts
Silk connection end is used to input first electric current；
The reference circuit includes：
Second current control circuit, for exporting the second electric current, and controls the size of second electric current；
Reference resistance, for the object of reference as fuse, the reference resistance has first resistor connection end,
The first resistor connection end is used to input the second electric current；
Adjunct circuit, for exporting the 3rd electric current, the 3rd electric current inputs the first resistor connection end；
The comparison circuit is used for the voltage for comparing the first fuse connection end and first resistor connection end
Value, and export comparative result.
2. efuse device as claimed in claim 1, it is characterised in that the adjunct circuit is the 3rd crystal
Pipe.
3. efuse device as claimed in claim 1, it is characterised in that the first current control circuit bag
Include the first transistor；Second current control circuit includes second transistor；The adjunct circuit bag
Include third transistor；
The source of the source electrode of the first transistor, the source electrode of the second transistor and the third transistor
Extremely it is connected；
The drain electrode of the first transistor is connected with the first fuse connection end；
The drain electrode of the second transistor is connected with the first resistor connection end；
The drain electrode of the third transistor is connected with the first resistor connection end.
4. efuse device as claimed in claim 3, it is characterised in that the first transistor, the second crystalline substance
Body pipe and third transistor are PMOS transistor.
5. efuse device as claimed in claim 1, it is characterised in that the comparison circuit is to compare amplification
Device, including：First input end, the second input and output end；
The first input end is connected with the first fuse connection end；
Second input is connected with the first resistor connection end.
6. efuse device as claimed in claim 1, it is characterised in that the fuse is polysilicon fuse.
7. efuse device as claimed in claim 1, it is characterised in that the fuse also includes the second fuse
End；The reference resistance also includes second resistance connection end.
8. efuse device as claimed in claim 7, it is characterised in that the storage circuit also includes：The
One selection circuit, for controlling opening and shutting off for storage circuit；
The reference circuit also includes：The second selection circuit corresponding with the first choice circuit, for making
The voltage of second resistance connection end is equal to the voltage of the second fuse connection end.
9. a kind of method of testing of electric fuse cell arrangement, it is characterised in that including：
The efuse device as described in any claim of claim 1~8 is provided, the fuse is also
Including the second fuse connection end, the reference resistance also includes second resistance connection end；
Storage circuit is turned on, and first current control circuit is exported the first electric current, described first
Electric current inputs the first fuse input；
Reference circuit is turned on, and the reference resistance is inputted the second electric current and the 3rd electric current, described the
Two electric currents and the 3rd electric current sum are more than the first electric current；
The voltage of the second resistance connection end is set to be equal to the voltage of the second fuse connection end；
The voltage of the second fuse connection end and second resistance connection end is compared by comparison circuit
Compared with, and output test result.
10. efuse device method of testing as claimed in claim 9, it is characterised in that make the reference circuit
The step of conducting, includes：
The adjunct circuit is turned on, the 3rd electric current is exported, the 3rd electric current inputs the first resistor and connected
Connect end；
Second current control circuit is turned on, the second electric current, the electricity of the second electric current input first is exported
Hinder connection end.
11. efuse device method of testing as claimed in claim 9, it is characterised in that described second electric current etc.
In first electric current.
12. efuse device method of testing as claimed in claim 9, it is characterised in that the adjunct circuit is
Third transistor；The drain electrode of the third transistor is connected with the first resistor connection end；
The step of turning on the adjunct circuit includes：
Third transistor source electrode is set to connect power supply；
Apply voltage in third transistor grid, open third transistor raceway groove.
13. efuse device method of testing as claimed in claim 9, it is characterised in that the reference resistance
Resistance is in the range of 1Kohm~10Kohm；
The ratio of 3rd electric current and the second electric current is more than 0 and is less than 2.
14. efuse device method of testing as claimed in claim 9, it is characterised in that the first electric current control
Circuit processed is the first transistor, and second current control circuit is second transistor；
The first transistor drain electrode is connected with the first fuse connection end；Second transistor drain electrode with
The first resistor connection end is connected；The third transistor drain electrode connects with the first resistor connection end
Connect；
The step of turning on the storage circuit includes：
The first transistor source electrode is set to connect power supply；
Apply voltage in first crystal tube grid, turn on the first current control circuit；
The step of turning on the reference circuit includes：
Second transistor source electrode is set to connect power supply；
Apply voltage in second transistor grid, turn on the second current control circuit.
15. efuse device method of testing as claimed in claim 9, it is characterised in that the first electric current control
Circuit processed includes the first transistor transistor, and second current control circuit includes second transistor；
The adjunct circuit is third transistor；
Make in the step of storage circuit and reference circuit are turned on, make the first transistor source electrode, second
Transistor source is identical with the voltage of third transistor source electrode.
16. efuse device method of testing as claimed in claim 15, it is characterised in that the first transistor,
Second transistor and third transistor are PMOS transistor.
17. efuse device method of testing as claimed in claim 9, it is characterised in that first electric current with
Second electric current is equal.
18. efuse device method of testing as claimed in claim 9, it is characterised in that the fuse is polycrystalline
Silicon fuse.
19. a kind of application method of efuse device, it is characterised in that including：
The efuse device as described in any claim of claim 1~8 is provided, the fuse is also
Including the second fuse connection end, the reference resistance also includes second resistance connection end；
Disconnect adjunct circuit；
Storage circuit is turned on, and first current control circuit is exported the first electric current, described first
Electric current inputs the first fuse input；
Reference circuit is turned on, and second current control circuit is exported the second electric current, described second
Electric current inputs the first resistor input, and second electric current is equal to the first electric current；
The voltage of second resistance connection end is set to be equal to the voltage of the second fuse connection end；
Pass through comparison circuit the first fuse input and the voltage of first resistor input, output
Comparative result.
20. the application method of efuse device as claimed in claim 19, it is characterised in that the adjunct circuit
For third transistor；The drain electrode of the third transistor is connected with the first resistor connection end；
The step of disconnecting the adjunct circuit includes：
The source electrode of third transistor is set to connect power supply；
Apply voltage in the grid of third transistor, open adjunct circuit raceway groove.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610210760.4A CN107274930A (en) | 2016-04-06 | 2016-04-06 | Efuse device and its method of testing and application method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610210760.4A CN107274930A (en) | 2016-04-06 | 2016-04-06 | Efuse device and its method of testing and application method |
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| Publication Number | Publication Date |
|---|---|
| CN107274930A true CN107274930A (en) | 2017-10-20 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610210760.4A Pending CN107274930A (en) | 2016-04-06 | 2016-04-06 | Efuse device and its method of testing and application method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108089630A (en) * | 2017-12-14 | 2018-05-29 | 上海艾为电子技术股份有限公司 | A kind of electrical fuse state detection circuit |
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| US20130170276A1 (en) * | 2011-12-30 | 2013-07-04 | Tyler Daigle | One-time programmable fuse read |
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| US20070053236A1 (en) * | 2005-08-23 | 2007-03-08 | Thomas Vogelsang | Fuse resistance read-out circuit |
| CN101800083A (en) * | 2009-02-10 | 2010-08-11 | 台湾积体电路制造股份有限公司 | Method of operating finfet fuse and integrated circuit structure |
| CN101937717A (en) * | 2009-06-30 | 2011-01-05 | 台湾积体电路制造股份有限公司 | Method and circuit for measuring electrical resistance |
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| CN108089630A (en) * | 2017-12-14 | 2018-05-29 | 上海艾为电子技术股份有限公司 | A kind of electrical fuse state detection circuit |
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