CN107241886B - Novel Rack node middle plate and design method thereof - Google Patents
Novel Rack node middle plate and design method thereof Download PDFInfo
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- CN107241886B CN107241886B CN201710417510.2A CN201710417510A CN107241886B CN 107241886 B CN107241886 B CN 107241886B CN 201710417510 A CN201710417510 A CN 201710417510A CN 107241886 B CN107241886 B CN 107241886B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/14—Mounting supporting structure in casing or on frame or rack
- H05K7/1485—Servers; Data center rooms, e.g. 19-inch computer racks
- H05K7/1488—Cabinets therefor, e.g. chassis or racks or mechanical interfaces between blades and support structures
- H05K7/1494—Cabinets therefor, e.g. chassis or racks or mechanical interfaces between blades and support structures having hardware for monitoring blades, e.g. keyboards, displays
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
- H05K7/20009—Modifications to facilitate cooling, ventilating, or heating using a gaseous coolant in electronic enclosures
- H05K7/20136—Forced ventilation, e.g. by fans
- H05K7/2019—Fan safe systems, e.g. mechanical devices for non stop cooling
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
- H05K7/20709—Modifications to facilitate cooling, ventilating, or heating for server racks or cabinets; for data centers, e.g. 19-inch computer racks
- H05K7/20718—Forced ventilation of a gaseous coolant
- H05K7/20736—Forced ventilation of a gaseous coolant within cabinets for removing heat from server blades
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Abstract
A novel Rack node middle board and a design method thereof are provided, the device comprises an AST1250 chip, a node module, a fan module and a node mainboard management controller which are connected with the AST1250 chip, and the method comprises the following steps: step S1, designing a functional block diagram of a novel Rack node middle board management system; step S2, designing a novel Rack node middle plate system interconnection topology; and step S3, designing a novel logic block diagram of the middle board of the Rack node. The processing capacity and efficiency of the Rack secondary management chip are improved by adopting the AST 1250; the node middle plate and the node BMC adopt 1 to 1I 2C channels to realize rapid acquisition and report of node information; the WDT design is added, so that the product reliability is improved; the RTC function is added, so that the time correctness of a system log is guaranteed, and the fault reporting accuracy is improved; the node middle plate is communicated with the management main board through the NIC, and therefore communication efficiency of Rack primary management and secondary management is improved.
Description
Technical Field
The invention relates to a novel Rack node middle plate and a design method thereof, and belongs to the technical field of Rack server design.
Background
With the continuous development of the IT industry, the cloud computing and big data era comes. The range of internet applications is expanding and the demand of user services is increasing, and a high-density server rack system is becoming a trend. The Rack server cabinet is just in compliance with the development requirements of cloud computing and big data. The Rack server cabinet has a height of 46U, each U of the height space can be freely arranged with a computing node or a storage node, and 1U of the space can be arranged with a maximum of 3 computing nodes.
With the improvement of data processing capacity, the increase of storage density and the diversification of node types of the Rack server cabinet system, higher requirements are put forward on the management function of the whole cabinet. The novel Rack management system requires that heat dissipation, node and power management information collection and control in the whole cabinet are quicker, fault information reporting is quicker, the number of compatible machine types is more, and the product stability is higher.
The prior Rack adopts a two-stage management architecture, RMC is the first-stage management, and the monitoring, management and alarm of the system are realized through the two-stage management; the node middle plate is in second-level management, and out-of-band monitoring, alarm reporting and fan monitoring of all nodes in the 4U space are achieved. The design that current node medium plate adopted 1 simple MCU to go on can't satisfy the demand that novel Rack was collected fast and control system information, compatible more models, trouble rapid processing.
In order to solve the technical problems, a novel Rack node middle plate is urgently needed.
Disclosure of Invention
Aiming at the technical defects, the invention provides a novel Rack node middle plate and a design method thereof, which can meet the requirements of quick collection and control of system information, compatibility with more machine types and quick fault processing of a novel Rack cabinet.
The technical scheme adopted for solving the technical problems is as follows:
the invention provides a novel Rack node middle plate which is characterized by comprising an AST1250 chip, wherein the AST1250 chip is respectively connected with a node module, a fan module and a node mainboard management controller.
Furthermore, the novel Rack node middle plate also comprises a GPIO interface, a WDT, a node RESET circuit, a node on-position detection circuit, a fan state indicator lamp control circuit, a fan control panel on-position detection circuit, an I2C bus, a UART interface chip, a network chip, an SDRAM, an SPI FLASH and a power supply circuit, wherein the AST1250 chip is respectively connected with the WDT, the node RESET circuit, the node on-position detection circuit, the fan state indicator lamp control circuit and the fan control panel on-position detection circuit through the GPIO interface, the AST1250 chip is respectively connected with a node mainboard IPMB, a fan control panel power consumption monitoring module, an asset management system, an RTC chip and a temperature detection circuit through an I2C bus, the AST chip is connected with the fan control panel through a PWM/TACH channel, the AST1250 chip is connected with the UART interface chip, the AST1250 chip is respectively connected with an RJ45 chip and, the SDRAM, the SPI FLASH and the power circuit are respectively connected with the AST1250 chip.
Further, the power supply circuit comprises a secondary power supply board, a hot plug circuit and a power supply conversion circuit, wherein the input end of the secondary power supply board is connected with the wiring copper bar, the input end of the hot plug circuit is connected with the output end of the secondary power supply board through a node backboard, and the output end of the hot plug circuit is connected with the AST1250 chip through the power supply conversion circuit.
The invention also provides a design method of the novel Rack node middle plate, which is characterized in that the design of the novel Rack node middle plate is realized by designing a management system function block diagram, a system interconnection topology and a logic block diagram of the novel Rack node middle plate.
Further, the design method comprises the following specific steps:
step S1, designing a function block diagram of a novel Rack node middle plate management system, wherein the functions of the novel Rack node middle plate management system comprise a secondary management system function, a node management function and a fan management function;
step S2, designing a novel Rack node middle plate system interconnection topology, wherein the novel Rack node middle plate system interconnection topology comprises a topology in which a novel Rack node middle plate, a node back plate, a secondary power supply plate and a main board in a Rack system are sequentially interconnected, an interconnection topology of the novel node middle plate, a fan control plate and a fan, and an interconnection topology of the novel node middle plate and a primary management main board;
and step S3, designing a novel logic block diagram of the middle board of the Rack node.
Further, the step S1 includes the following specific steps:
step S11, interconnecting the node module in the 4U space through the middle board of the node, to realize the node information monitoring and management function;
step S12, fan modules in the 4U space are interconnected through the middle board of the node, so as to realize the functions of fan information monitoring and management;
and step S13, the management mainboard is interconnected through the node middle board to report the management information of the nodes and fans in the 4U space, and the management control strategy of the management system to the nodes and fans in the 4U space is executed.
Further, the step S2 includes the following specific steps:
step S21, designing a node management interconnection topology: (1) the node middle plate is topologically interconnected with the node back plate, the secondary power panel and the node BMC to realize monitoring management of 4U space node information; (2) the node middle plate is communicated with a mainboard BMC (baseboard management controller) of 12 nodes in the 4U space through an IPMB (intelligent platform management bus) to realize out-of-band monitoring management of the 12 nodes based on IPMB (intelligent platform management bus) specifications; (3) the node mainboard BMC is connected with monitored chips and components in each node through a multi-channel I2C bus and is used for being responsible for node asset management, real-time monitoring and fault diagnosis;
step S22, designing a fan management interconnection topology: (1) the node middle plate is in topological interconnection with the fan control plate and the fan and is used for realizing 4U space heat dissipation monitoring management; (2) the node middle plate is communicated with the fans through PWM, TACH and PRESENT signals and is used for realizing the function management of 3 fan rotating speed regulation, air volume compensation regulation and the like; (3) the node middle plate is communicated with a power consumption monitoring chip on a fan control plate through I2C to realize the power consumption monitoring of the fan in a 4U space;
step S23, designing and managing the system interconnection topology: (1) the node middle board is interconnected with the management mainboard through a Network Interface Controller (NIC) and used for realizing communication from the node middle board to the management mainboard; (2) the node mainboard is interconnected with the management mainboard through a network switch (100M management network) to realize node information reporting, heat dissipation information reporting, fault information reporting and primary management command receiving of the node middle board and the management mainboard.
Further, the step S3 includes the following specific steps:
step S31, main chip type selection: the novel Rack node middle plate adopts AST1250 as a main chip to carry out secondary management design;
step S32, node and fan state monitoring design, wherein the node middle board carries out 12-node in-place detection, node BMC Reset, fan control board in-place detection, fan in-place detection and fan state indicator lamp control through GPIO, so as to realize the rapid detection of the state of the node and the fan in the 4U space;
step S33, node management design: the node middle board carries out IPMB communication, fan control panel power consumption monitoring, asset management, RTC and temperature detection of 12 nodes through 14 groups of I2C;
step S34, node midplane WDT functional design: the node middle plate passes through a WDT (watchdog timer) externally arranged at a GPIO (general purpose input/output) level, when an AST1250 chip of the node middle plate performs a dog feeding operation every 1-2 seconds, if the node middle plate fails, the dog feeding operation cannot occur, the WDT chip triggers the node middle plate to restart, and the fan control board detects the information and restores the preset rotating speed control meeting the heat dissipation requirement;
step S35, node midplane WDT functional design: the node middle plate is connected with the RTC through an I2C channel, the node middle plate reads time through the RTC chip, when the node middle plate is powered off, the RTC chip is switched to be powered on by a battery, the system time can continue to operate, and the AST1250 chip can directly read the time in the RTC chip after being powered on again;
step S36, node midplane management communication system communication design: the node middle plate is interconnected with the management mainboard through the network interface controller, and is used for realizing the quick communication of primary management and secondary management.
The invention has the beneficial effects that:
1) AST1250 is adopted as a novel Rack node middle plate main chip, so that the processing capacity and efficiency of a Rack secondary management chip are improved;
2) the node middle plate and the node BMC adopt 1 to 1I 2C channels to carry out node management communication, and rapid acquisition and report of node information are realized;
3) a WDT design is added, when the node middle plate fails, the node middle plate is triggered to restart through the WDT, and the reliability of a product is improved;
4) the RTC function is added, so that the time correctness of a system log is guaranteed, and the fault reporting accuracy is improved;
5) the node middle board is communicated with the management mainboard through a 100M management Network (NIC), and the communication efficiency of the Rack primary management and the second-level management is improved.
Drawings
The invention is described below with reference to the accompanying drawings.
FIG. 1 is a schematic diagram of a novel Rack node middle plate of the present invention;
FIG. 2 is a schematic diagram of management functions of a middle board of a novel Rack node in the invention;
FIG. 3 is a system interconnection topology diagram of the middle plate of the novel Rack node of the invention;
FIG. 4 is a flow chart of the method of the present invention.
Detailed Description
In order to clearly explain the technical features of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and procedures are omitted so as to not unnecessarily limit the invention.
Example 1
As shown in fig. 1 to fig. 3, the novel Rack node midplane of the present invention includes an AST1250 chip, and the AST1250 chip is connected to the node module, the fan module, and the node motherboard management controller, respectively.
As shown in FIG. 1, the novel Rack NODE midplane further comprises GPIO interfaces, WDTs, a NODE RESET circuit (NODERESET), a NODE presence detection circuit (NODE PRESENT), a FAN presence detection circuit (FAN PRESENT), a FAN state indicator lamp control circuit (FAN Fail), a FAN control board presence detection circuit (FCB PRESENT), an I2C bus, a UART interface chip (ST3243), a network chip (RTL8211E), SDRAM, SPI FLASH and a power supply circuit, wherein the AST1250 chip is respectively connected with the WDTs, the NODE RESET circuit, the NODE presence detection circuit, the FAN state indicator lamp control circuit and the FAN control board presence detection circuit through the GPIO interfaces, the AST chip 1250 chip is respectively connected with the IPMB of the NODE main board, the power consumption monitoring module of the FAN control board, the asset management system, the RTC chip and the temperature detection circuit through the I2C bus, the AST chip is connected with the FAN control board through a PWM/TACH channel, the AST1250 chip is connected with the UART chip through the UART interface chip, the AST1250 chip is respectively connected with the RJ45 chip and the RMC chip through the network chip, and the SDRAM, the SPI FLASH and the power circuit are respectively connected with the AST1250 chip.
As shown in fig. 1, the power circuit includes a secondary power board, a hot plug circuit and a power conversion circuit, the input end of the secondary power board is connected with the wiring copper bar, the input end of the hot plug circuit is connected with the output end of the secondary power board through a node backboard, and the output end of the hot plug circuit is connected with the AST1250 chip through the power conversion circuit.
Example 2
As shown in fig. 1 to 4, the design method of the novel Rack node middle plate of the present invention realizes the design of the novel Rack node middle plate by designing a management system function block diagram, a system interconnection topology and a logic block diagram of the novel Rack node middle plate.
As shown in fig. 4, the novel Rack node midplane design method includes the following steps:
step S1, designing a function block diagram of a novel Rack node middle plate management system, wherein the functions of the novel Rack node middle plate management system comprise a secondary management system function, a node management function and a fan management function;
step S2, designing a novel Rack node middle plate system interconnection topology, wherein the novel Rack node middle plate system interconnection topology comprises a topology in which a novel Rack node middle plate, a node back plate, a secondary power supply plate and a main board in a Rack system are sequentially interconnected, an interconnection topology of the novel node middle plate, a fan control plate and a fan, and an interconnection topology of the novel node middle plate and a primary management main board;
and step S3, designing a novel logic block diagram of the middle board of the Rack node. The logic block diagram for realizing the concrete function of the node middle plate is used for guiding the detailed schematic diagram design of the node middle plate.
As shown in fig. 2, a functional block diagram of a novel Rack node midplane management system is designed, a two-stage management mode is adopted in the Rack management system, an RMC (Rack management motherboard) is used for first-stage management, and the node midplane is used for second-stage management. The step S1 includes the following specific steps:
step S11, interconnecting the node module in the 4U space through the middle board of the node, to realize the node information monitoring and management function;
step S12, fan modules in the 4U space are interconnected through the middle board of the node, so as to realize the functions of fan information monitoring and management;
and step S13, the management mainboard is interconnected through the node middle board to report the management information of the nodes and fans in the 4U space, and the management control strategy of the management system to the nodes and fans in the 4U space is executed.
As shown in fig. 3, a novel board system interconnection topology in Rack nodes is designed and designed, which includes three parts, namely node management, fan management and system management interconnection topology. The system interconnection topological graph is used for managing system interconnection, so that node monitoring, heat dissipation monitoring, fault alarming, management control and the like in the 4U space are realized. The step S2 includes the following specific steps:
step S21, designing a node management interconnection topology: (1) the node middle plate is topologically interconnected with the node back plate, the secondary power panel and the node BMC to realize monitoring management of 4U space node information; (2) the node middle plate is communicated with a mainboard BMC (baseboard management controller) of 12 nodes in the 4U space through an IPMB (intelligent platform management bus) to realize out-of-band monitoring management of the 12 nodes based on IPMB (intelligent platform management bus) specifications; (3) the node mainboard BMC is connected with monitored chips and components in each node through a multi-channel I2C bus and is used for being responsible for node asset management, real-time monitoring and fault diagnosis;
step S22, designing a fan management interconnection topology: (1) the node middle plate is in topological interconnection with the fan control plate and the fan and is used for realizing 4U space heat dissipation monitoring management; (2) the node middle plate is communicated with the fans through PWM, TACH and PRESENT signals and is used for realizing the function management of 3 fan rotating speed regulation, air volume compensation regulation and the like; (3) the node middle plate is communicated with a power consumption monitoring chip on a fan control plate through I2C to realize the power consumption monitoring of the fan in a 4U space;
step S23, designing and managing the system interconnection topology: (1) the node middle board is interconnected with the management mainboard through a Network Interface Controller (NIC) and used for realizing communication from the node middle board (secondary management) to the management mainboard RMC (primary management); (2) the node mainboard is interconnected with the management mainboard through a network switch (100M management network) to realize node information reporting, heat dissipation information reporting, fault information reporting and primary management command receiving of the node middle board and the management mainboard. As shown in FIG. 1, a novel Rack node midplane logic block diagram is designed. The step S3 includes the following specific steps:
step S31, main chip type selection: the novel Rack node middle plate adopts AST1250 as a main chip to carry out secondary management design; AST1250 is a management chip of an ARM9 kernel, and compared with the traditional single chip microcomputer control chip, the processing capacity and speed of a chip with secondary management are greatly improved;
step S32, node and fan state monitoring design, wherein the node middle board carries out 12-node in-place detection, node BMC Reset, fan control board in-place detection, fan in-place detection and fan state indicator lamp control through GPIO, so as to realize the rapid detection of the state of the node and the fan in the 4U space;
step S33, node management design: the node middle board carries out IPMB communication, fan control panel power consumption monitoring, asset management, RTC and temperature detection of 12 nodes through 14 groups of I2C; the communication of the IPMB of the nodes is realized by using 1-to-1I 2C channels, and the rapid collection of node information is realized; the power consumption of the fan control board is rapidly monitored through a single I2C channel.
Step S34, node midplane WDT functional design: the node middle plate passes through a WDT (watchdog timer) externally arranged at a GPIO (general purpose input/output) level, when an AST1250 chip of the node middle plate performs a dog feeding operation every 1-2 seconds, if the node middle plate fails, the dog feeding operation cannot occur, the WDT chip triggers the node middle plate to restart, and the fan control board detects the information and restores the preset rotating speed control meeting the heat dissipation requirement;
step S35, node midplane WDT functional design: the node middle plate is connected with the RTC through an I2C channel, the node middle plate reads time through the RTC chip, when the node middle plate is powered off, the RTC chip is switched to be powered on by a battery, the system time can continue to operate, and the AST1250 chip can directly read the time in the RTC chip after being powered on again, so that the time correctness of the system log is ensured;
step S36, node midplane management communication system communication design: the node middle board is interconnected with the management mainboard through the network interface controller to realize the quick communication of primary management and secondary management, and compared with the communication with the management mainboard based on I2C in the past, the reporting speed of node information, heat dissipation information and fault information is greatly improved.
In a Rack management system, node management and heat dissipation management in a 4U space are realized through a novel Rack node middle plate. The novel Rack node middle plate adopts AST1250 as a novel Rack node middle plate main chip. The node middle plate realizes functions of in-place detection of 12 nodes, node BMC Reset control, fan control plate in-place detection, fan state indicator lamp control and the like through GPIO.
The node middle board realizes functions of IPMB communication, fan control panel power consumption monitoring, asset management, RTC, temperature detection and the like of 12 nodes through 14 groups of I2C; the node middle plate and the node BMC adopt 1 to 1I 2C channels to realize node management communication, and realize rapid acquisition and report of node information.
A WDT design is introduced, when the node middle plate fails, the node middle plate is triggered to restart through the WDT, and the reliability of a product is improved; the RTC function is introduced, so that the time correctness of a system log is guaranteed, and the fault reporting accuracy is improved; the node middle board realizes management mainboard communication through a 100M management network, and communication efficiency of Rack primary management and secondary management is improved.
The foregoing is only a preferred embodiment of the present invention, and it will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the principle of the invention, and such modifications and improvements are also considered to be within the scope of the invention.
Claims (5)
1. A novel Rack node middle plate is characterized by comprising an AST1250 chip, wherein the AST1250 chip is respectively connected with a node module, a fan module and a node mainboard management controller; the system also comprises a GPIO interface, a WDT, a node RESET circuit, a node in-place detection circuit, a fan state indicator lamp control circuit, a fan control panel in-place detection circuit, an I2C bus, a UART interface chip, a network chip, an SDRAM, an SPIFLASH and a power supply circuit, wherein the AST1250 chip is respectively connected with the WDT, the node RESET circuit, the node in-place detection circuit, the fan state indicator lamp control circuit and the fan control panel in-place detection circuit through the GPIO interface, is respectively connected with the node mainboard IPMB, the fan control panel power consumption monitoring module, the asset management system, the RTC chip and the temperature detection circuit through the I2C bus, is connected with the fan control panel through a PWM/TACH channel, is connected with the UART chip through the AST1250 chip, and is respectively connected with the RJ45 chip and the RMC chip through the network chip, and is respectively connected, The SPIFLASH and power supply circuits are respectively connected with the AST1250 chip.
2. The novel Rack node middle plate as claimed in claim 1, wherein the power circuit comprises a secondary power plate, a hot swap circuit and a power conversion circuit, wherein an input terminal of the secondary power plate is connected to the wiring copper bar, an input terminal of the hot swap circuit is connected to an output terminal of the secondary power plate through the node back plate, and an output terminal of the hot swap circuit is connected to the AST1250 chip through the power conversion circuit.
3. A design method of a novel Rack node middle plate is characterized in that the design of the novel Rack node middle plate is realized by designing a management system function block diagram, a system interconnection topology and a logic block diagram of the novel Rack node middle plate;
the design method comprises the following steps:
step S1, designing a function block diagram of a novel Rack node middle plate management system, wherein the functions of the novel Rack node middle plate management system comprise a secondary management system function, a node management function and a fan management function;
step S2, designing a novel Rack node middle plate system interconnection topology, wherein the novel Rack node middle plate system interconnection topology comprises a topology in which a novel Rack node middle plate, a node back plate, a secondary power supply plate and a main board in a Rack system are sequentially interconnected, an interconnection topology of the novel node middle plate, a fan control plate and a fan, and an interconnection topology of the novel node middle plate and a primary management main board;
step S3, designing a logic block diagram of a middle plate of a novel Rack node;
the step S3 includes the following specific steps:
step S31, main chip type selection: the novel Rack node middle plate adopts AST1250 as a main chip to carry out secondary management design;
step S32, node and fan state monitoring design: the node middle plate performs in-place detection of 12 nodes, BMC Reset of the nodes, in-place detection of a fan control plate, in-place detection of a fan and control of a fan state indicator lamp through GPIO (general purpose input/output), so as to realize rapid detection of the states of the nodes and the fan in a 4U space;
step S33, node management design: the node middle board carries out IPMB communication, fan control panel power consumption monitoring, asset management, RTC communication and temperature detection of 12 nodes through 14 groups of I2C channels;
step S34, node midplane WDT functional design: the node middle plate is connected with an external WDT through a GPIO, when an AST1250 chip of the node middle plate performs a dog feeding operation every 1-2 seconds, if the node middle plate fails, the dog feeding operation cannot occur, the WDT chip triggers the node middle plate to restart, and a fan control board detects that the node middle plate restarts information and restores the preset rotating speed control meeting the heat dissipation requirement;
step S35, node midplane WDT functional design: the node middle plate is connected with the RTC through an I2C channel, the node middle plate reads time through the RTC chip, when the node middle plate is powered off, the RTC chip is switched to be powered on by a battery, the system time can continue to operate, and the AST1250 chip can directly read the time in the RTC chip after being powered on again;
step S36, the node midplane management system communication design: the node middle plate is interconnected with the management mainboard through the network interface controller, and is used for realizing the quick communication of primary management and secondary management.
4. The design method for the middle board of a novel Rack node as claimed in claim 3, wherein the step S1 comprises the following steps:
step S11, interconnecting the node module in the 4U space through the middle board of the node, to realize the node information monitoring and management function;
step S12, fan modules in the 4U space are interconnected through the middle board of the node, so as to realize the functions of fan information monitoring and management;
and step S13, the management mainboard is interconnected through the node middle board to report the management information of the nodes and fans in the 4U space, and the management control strategy of the management system to the nodes and fans in the 4U space is executed.
5. The design method for the middle board of a novel Rack node as claimed in claim 3, wherein the step S2 comprises the following steps:
step S21, designing a node management interconnection topology: (1) the node middle plate is topologically interconnected with the node back plate, the secondary power panel and the node BMC to realize monitoring management of 4U space node information; (2) the node middle plate is communicated with a mainboard BMC (baseboard management controller) of 12 nodes in the 4U space through an IPMB (intelligent platform management bus) to realize out-of-band monitoring management of the 12 nodes based on IPMB (intelligent platform management bus) specifications; (3) the node mainboard BMC is connected with monitored chips and components in each node through a multi-channel I2C bus and is used for being responsible for node asset management, real-time monitoring and fault diagnosis;
step S22, designing a fan management interconnection topology: (1) the node middle plate is in topological interconnection with the fan control plate and the fan and is used for realizing 4U space heat dissipation monitoring management; (2) the node middle plate is communicated with the fans through PWM, TACH and PRESENT signals to realize the management of the rotating speed regulation and the air quantity compensation regulation functions of the 3 fans; (3) the node middle plate is communicated with a power consumption monitoring chip on a fan control plate through I2C to realize the power consumption monitoring of the fan in a 4U space;
step S23, designing and managing the system interconnection topology: (1) the node middle plate is interconnected with the management mainboard through a network interface controller, so that communication from the node middle plate to the management mainboard is realized; (2) the node mainboard is interconnected with the management mainboard through the network switch and is used for realizing node information reporting, heat dissipation information reporting, fault information reporting and primary management command receiving of the node middle plate and the management mainboard.
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