CN107229580B

CN107229580B - Sequential flow detection method and device

Info

Publication number: CN107229580B
Application number: CN201610169011.1A
Authority: CN
Inventors: 曹定尊; 路向峰; 孙清涛
Original assignee: Beijing Memblaze Technology Co Ltd
Current assignee: Beijing Memblaze Technology Co Ltd
Priority date: 2016-03-23
Filing date: 2016-03-23
Publication date: 2020-08-11
Anticipated expiration: 2036-03-23
Also published as: CN107229580A; CN111625482A; CN111625482B

Abstract

Methods and apparatus for detecting sequential streams are provided. Sequential flow detection method, wherein a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the method comprises the following steps: in response to receiving a first IO command, if the first IO command hits one of the plurality of cached IO addresses, replacing the hit one of the plurality of IO addresses with a first address of the first IO command, incrementing a first hit count associated with the first address; if the first hit count satisfies the threshold, the first IO command is marked as belonging to a first sequential flow.

Description

Sequential flow detection method and device

Technical Field

The present invention relates to memory systems, and more particularly, to detecting IO commands accessing a contiguous address space.

Background

The storage system is used for processing IO commands. The IO commands may be sent to a storage device (e.g., a magnetic disk, a solid state disk, a usb disk, an optical disk, etc.), a storage server, or a storage system (such as cloud storage). The plurality of IO commands form one or more data streams. If addresses accessed by a plurality of IO commands are consecutive, a data stream formed by the IO commands is referred to as a sequential stream.

Each IO command carries or indicates an address (logical address or physical address) of data to be accessed. The length of the data to be accessed by each IO command may be a fixed length or may vary. When a host accesses a storage device, a data accessing party, such as an application, may split a large block of data access into multiple IO commands and send the IO commands to the storage device. There may also be multiple applications in the host accessing the storage device and/or multiple operating systems (such as virtual machines), which results in IO commands from multiple accessing parties being interleaved, thereby making access to otherwise contiguous addresses discontinuous.

Referring to FIG. 1, there are multiple applications in the host, and sequential stream A is generated by application A, including multiple IO commands A1, A2, A3, … An accessing consecutive addresses. As an example, the sequential stream a may come from a copy of a large size video file. The sequential stream B is generated by application B and includes a plurality of IO commands B1, B2, B3, … Bn accessing consecutive addresses. The application in the host also generates a plurality of IO commands (indicated by S, E, D, C) that access the non-contiguous address space. The plurality of IO commands are organized in a different order than originally on the operating system, drivers, device interfaces, and/or bus and received by the storage device.

In a storage device such as a solid state disk, an address translation layer is provided to translate logical addresses of IO commands to physical addresses and to access the storage medium according to the physical addresses. Referring to FIG. 2, the storage device receives IO commands in the order A1, B1, C, B2 and sequences the IO commands

The storage device writes data accessed by IO commands (taking write commands as an example) into the storage medium in the order in which the IO commands are received. A storage medium such as a flash memory writes data in units of pages. A predetermined size of data block may also be employed in the storage device as a unit of write data (e.g., a set consisting of a plurality of pages). The cells in which data is written are typically of a large size to accommodate the data written by multiple IO commands. In the example of fig. 2, data corresponding to IO commands a1, B1, C, B2 are written to the same data block, and the data in the data block is from multiple IO commands in succession. Data corresponding to a plurality of IO commands originally issued in the sequential stream (such as IO commands a1, a2, A3, … An, B1, B2, B3, … Bn) will be distributed over different data blocks.

Disclosure of Invention

However, in some cases, data belonging to the same sequential stream have the same or similar life cycle, i.e., the data may be updated or invalidated at the same time. Referring to fig. 2, if data stream a has been invalidated or updated while data stream B, C remains valid, the portion of the data block corresponding to a1 is invalid while the other portions of the data block are valid, then when the data block needs to be reclaimed for various reasons, data other than the data corresponding to a1 needs to be moved, which introduces write amplification. Write amplification results in increased read and write operations, increases system overhead, and also consumes storage medium life.

In the present invention, sequential checking is performed on data streams, and successive data streams (sequential streams) are extracted and written to successive physical spaces of a storage device.

According to a first aspect of the present invention, there is provided a first sequential flow detection method according to the first aspect of the present invention, wherein a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the method comprises the following steps: in response to receiving a first IO command, if a first address of the first IO command hits in one of the cached IO addresses, replacing the hit in one of the IO addresses with the first address, incrementing a first hit count associated with the first address; if the first hit count satisfies the threshold, the first IO command is marked as belonging to a first sequential flow.

According to a first sequential flow detection method of a first aspect of the present invention, there is provided a second sequential flow detection method of the first aspect of the present invention, wherein the plurality of IO addresses are addresses of a plurality of IO commands received most recently.

According to the first or second sequential flow detection method of the first aspect of the present invention, there is provided a third sequential flow detection method of the first aspect of the present invention, wherein the first address hits in one of a plurality of addresses of a cache, comprising: the first address is numerically immediately adjacent to one of the plurality of IO addresses; the first address may be incremented by one of the plurality of IO addresses; the first address is the same as one of the plurality of IO addresses; the first address overlaps with one of the plurality of IO addresses; or the first address is less than a threshold distance from one of the plurality of addresses.

According to one of the first to third sequential flow detection methods of the first aspect of the present invention, there is provided a fourth sequential flow detection method according to the first aspect of the present invention, the method further comprising: if the first IO miss misses any of the cached IO addresses, replacing one of the IO addresses with the first address and initializing a hit count value associated with the replaced IO address.

According to one of the first to fourth sequential flow detection methods of the first aspect of the present invention, there is provided a fifth sequential flow detection method according to the first aspect of the present invention, wherein a miss counter is provided; the method further comprises the following steps: if the first IO command misses any one of the plurality of cached IO addresses, incrementing the miss counter; decrementing a hit count associated with each of the plurality of addresses if the miss counter exceeds a threshold, and resetting the miss counter.

According to one of the first to fifth sequential flow detection methods of the first aspect of the present invention, there is provided a sixth sequential flow detection method according to the first aspect of the present invention, the method further comprising: marking the first IO command as belonging to a random stream if the first IO command misses any of the cached plurality of IO addresses.

According to one of the fourth sequential flow detection methods of the first aspect of the present invention, there is provided the seventh sequential flow detection method of the first aspect of the present invention, wherein if the first IO command misses any one of the plurality of IO addresses cached, an IO address having a lowest hit count among the plurality of IO addresses is replaced with the first address; or replacing the least recently used IO address in the plurality of IO addresses with the first address and initializing a hit count of the first address.

According to one of the first to seventh sequential flow detection methods of the first aspect of the present invention, there is provided the eighth sequential flow detection method of the first aspect of the present invention, wherein if the first hit count does not satisfy a threshold, the first IO command is marked as belonging to a random flow.

According to one of the first to eighth sequential flow detection methods of the first aspect of the present invention, there is provided a ninth sequential flow detection method according to the first aspect of the present invention, the method further comprising: in response to receiving a second IO command, if a second address of the second IO command hits in the first IO address of the cache and the first hit count satisfies a threshold, replacing one of the hit plurality of IO addresses with the second address and marking the second IO command as belonging to a first sequential stream.

According to one of the first to eighth sequential flow detection methods of the first aspect of the present invention, there is provided the tenth sequential flow detection method according to the first aspect of the present invention, the method further comprising: in response to receiving a second IO command, if a second address of the second IO command hits one of the plurality of cached IO addresses other than the first IO address, replacing the one of the plurality of hit IO addresses with the second address, incrementing a second hit count associated with the second address, replacing the one of the plurality of hit IO addresses with the second address, and if the second hit count satisfies a threshold, marking the second IO command as belonging to a first sequential stream.

According to one of the ninth to tenth sequential flow detection methods of the first aspect of the present invention, there is provided the eleventh sequential flow detection method according to the first aspect of the present invention, further comprising: in response to receiving a third IO command, if a third address of the third IO command hits in one of the plurality of cached IO addresses other than the first address or the second address, replacing the hit one of the plurality of IO addresses with the third address, incrementing a third hit count associated with the third address; if the third hit count satisfies the threshold, the third IO command is marked as belonging to the second sequential flow.

According to one of the first to eleventh sequential flow detection methods of the first aspect of the present invention, there is provided the twelfth sequential flow detection method according to the first aspect of the present invention, wherein if the first address of the first IO command hits one of the plurality of IO addresses cached, the first hit count is incremented corresponding to a data length of the first IO command.

According to one of the first to twelfth sequential stream detection methods of the first aspect of the present invention, there is provided the thirteenth sequential stream detection method of the first aspect of the present invention, further comprising, if the first IO command is a write command, writing the first sequential stream to a storage location adjacent to the physical address.

According to one of the first to thirteenth sequential stream detection methods of the first aspect of the present invention, there is provided the fourteenth sequential stream detection method of the first aspect of the present invention, further comprising generating a read-ahead command to read data from a location adjacent to the first address if the first IO command is a read command.

According to a second aspect of the present invention, there is provided the first sequential flow detection method according to the second aspect of the present invention, wherein a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the method comprises the following steps: responding to a received first IO command, and if the first command hits an IO address which is marked as belonging to a first sequence flow in a plurality of cached IO addresses, replacing the hit IO address with a first address of the first address; the first IO command is marked as belonging to a sequential flow.

According to the first sequential flow detection method of the second aspect of the present invention, there is provided the second sequential flow detection method of the second aspect of the present invention, further comprising: if the first IO command hits a second address which is not marked as belonging to a first sequential stream in the plurality of cached IO addresses, replacing the hit second address with the first address, and incrementing a second hit count associated with the first address; if the second hit count satisfies the threshold, the first IO command is marked as belonging to the sequential flow.

According to the first or second sequential flow detection method of the second aspect of the present invention, there is provided the third sequential flow detection method according to the second aspect of the present invention, further comprising: if the first IO command misses any one of the plurality of IO addresses of the cache, incrementing a miss counter; decrementing a hit count associated with each of the plurality of IO addresses if the miss counter exceeds a threshold; and replacing one of the plurality of IO addresses of the cache with the first address.

According to the first or second sequential flow detection method of the second aspect of the present invention, there is provided a fourth sequential flow detection method according to the second aspect of the present invention, further comprising: if the first IO command misses any one of the plurality of IO addresses of the cache, incrementing a miss counter; decrementing a hit count associated with each of the plurality of addresses if the miss counter exceeds a threshold; and replacing one of the cached IO addresses which is not marked as belonging to the sequential flow with the first address.

According to a third aspect of the present invention, there is provided the sequential flow detection system according to the third aspect of the present invention, wherein a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the system comprises: a hit detection module, configured to, in response to receiving a first IO command, if a first address of the first IO command hits one of the plurality of cached IO addresses, replace the hit one of the plurality of IO addresses with the first address, and increment a first hit count associated with the first address; and a sequential flow tagging module to tag the first IO command as belonging to a first sequential flow if the first hit count satisfies a threshold.

According to a fourth aspect of the present invention, there is provided the sequential flow detection system according to the fourth aspect of the present invention, wherein a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the system comprises: a hit detection module, configured to, in response to receiving a first IO command, replace a hit IO address with a first address of the first address if the first command hits an IO address, which is marked as belonging to a first sequential flow, in a plurality of IO addresses cached in the cache; and a sequential stream marking module for marking the first IO command as belonging to a sequential stream.

According to a fifth aspect of the present invention there is provided a computer program comprising computer program code to, when loaded into a computer system and executed thereon, cause said computer system to perform the sequential flow detection method provided in accordance with the first aspect of the present invention or the sequential flow detection method provided in accordance with the second aspect of the present invention.

According to a sixth aspect of the present invention, there is provided a program comprising program code which, when loaded into and executed on a storage device, causes the storage device to perform the sequential flow detection method provided in accordance with the first aspect of the present invention or the sequential flow detection method provided in accordance with the second aspect of the present invention.

Drawings

The invention, as well as a preferred mode of use and further objectives and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein:

FIG. 1A is a diagram illustrating an IO command flow between a host and a device in the prior art;

FIG. 1B is a diagram illustrating a prior art storage IO command stream on a storage medium;

FIG. 2 illustrates a block diagram of a storage device, according to an embodiment of the invention;

FIG. 3 shows a schematic diagram of sequential flow detection according to an embodiment of the invention;

FIG. 4 shows a schematic diagram of a buffer structure for sequential stream detection according to an embodiment of the invention;

FIG. 5 illustrates buffer changes during sequential flow detection according to an embodiment of the present invention;

FIG. 6 illustrates buffer changes during sequential flow detection according to yet another embodiment of the present invention;

FIG. 7 is a flow chart of a sequential flow detection method according to an embodiment of the present invention;

FIG. 8 is a flow chart of a sequential flow detection method according to yet another embodiment of the present invention; and

FIG. 9 is a block diagram of a sequential flow detection system according to an embodiment of the present invention.

Detailed Description

Referring to fig. 2, fig. 2 shows a block diagram of a Storage Device with a Solid-State Storage Device (SSD) as an example of the Storage Device. The storage device 201 may be coupled to a host for providing storage capabilities to the host. The host and the storage device 102 can be coupled by various means including, but not limited to, connecting the host and the storage device 102 by, for example, SATA, IDE, USB, PCIE, NVMe (NVM Express), SCSI, ethernet, fibre channel, wireless communication network, etc. The host may be an information processing device, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, etc., capable of communicating with the storage device in the manner described above. The Memory device 102 includes an interface 103, a control unit 104, one or more NVM (Non-Volatile Memory) Memory chips 105, and a firmware Memory 110. The interface 103 may be adapted to exchange data with a host by means such as SATA, IDE, USB, PCIE, NVMe, SCSI, ethernet, fibre channel, etc. The control unit 104 is used to control data transfer between the interface 103, the NVM memory chip 105 and the firmware memory 110, and also for memory management, host logical address to flash physical address mapping, erase balancing, bad block management, etc. The control component 104 can be implemented in a variety of ways including software, hardware, firmware, or a combination thereof. The control unit 104 may be in the form of an FPGA (Field-programmable gate array), an ASIC (Application Specific Integrated Circuit), or a combination thereof. The control component 104 may also include a processor or controller. Control unit 104 loads firmware from firmware memory 110 at runtime. Firmware memory 110 may be NOR flash, ROM, EEPROM, etc. The firmware is used to provide the electronic device's underlying functionality, such as BIOS, operating system loading, etc.

In an embodiment according to the present invention, the storage device 201 receives an IO command from a host, and performs sequential stream detection on the received IO command to detect and extract a sequential stream from a plurality of received IO commands. In one example, control component 204 performs sequential flow detection according to an embodiment of the present invention by loading firmware 210. In another example, sequential flow detection is performed in a host coupled to storage device 201 and a tag indicating whether the IO command belongs to a sequential flow is tagged in the IO command sent to the storage device.

FIG. 3 is a schematic diagram of sequential flow detection according to an embodiment of the present invention. By way of example, sequential stream detection is performed on received IO commands in a storage device such as a solid state disk. Out of a plurality of IO commands that access a storage device, a sequential stream a, a sequential stream B that access consecutive addresses, and a plurality of IO commands (indicated by C, D, E, … S) whose accessed addresses are not sequential (also referred to as random streams) are detected. The sequential stream a is written into the data block 1, the sequential stream B is written into the data block 2, and the random stream is written into the data block 3. When the data lifecycle corresponding to the sequential stream a is completed and updated or invalidated (for example, when the sequential stream a corresponds to a large-size video file, the video file is deleted), the data in the data block 1 becomes invalid, and when the data block 1 is recovered, the valid data in the data block does not need to be moved (because the valid data does not exist in the data block 1, or the valid data is less), thereby reducing the write amplification. Furthermore, data in the sequential stream may also be read continuously. For example, when the sequential stream a corresponds to a large-sized video file, the data corresponding to a1, a2, A3, and a4 in data block 1 are likely to be read continuously. Therefore, for the data block 1 storing the sequential stream, when the read operation is responded, the subsequent data can be read in advance before the subsequent IO command is received, so that the response time of the subsequent IO command reading is reduced.

To detect sequential flow, referring to fig. 4, a buffer structure for sequential flow detection according to an embodiment of the present invention is shown. Addresses to be accessed by a plurality of IO commands are cached in a memory. In the example of FIG. 4, the IO command carries a Logical Block Address (LBA). In other examples, the IO command may carry other forms of addresses (e.g., virtual addresses) as long as there is order between elements of the address space of the IO command.

Referring to fig. 4, a plurality of (6) entries are included in the buffer, each entry including a Logical Block Address (LBA) and a count value, the LBA being stored in correspondence with the count value. In the example of FIG. 4, the logical block address of the buffer entry is from the last of the one or more LBA addresses accessed by the IO command. In other examples, the address of the buffer entry may record the address range of the IO command, or the first address and length of the IO command. The count value of a buffer entry indicates the number of times the address of the buffer entry is hit.

Referring to fig. 4, sequential flow labels (SS1, SS2) are also provided. There may be a plurality of sequential flow markers, each indicating a sequential flow. In FIG. 4, sequential flow flag SS1 indicates that IO commands accessing LBA3 belong to a sequential flow, while sequential flow flag SS2 indicates that IO commands accessing LBA5 belong to another sequential flow.

Fig. 5 illustrates buffer changes during sequential flow detection according to an embodiment of the present invention. Input stream 550 includes a plurality of IO commands that access storage locations having logical block addresses of 1, 52, 2, 21, 100, 3, 70, and 4, respectively, in chronological order. Buffer A shows the contents of the buffer after receiving two IO commands with LBA's of 1 and 52. In response to receiving an IO command to access logical block address 1, logical block address 1 is filled in buffer entry 512, and this is the first fill of this buffer entry 512, and the corresponding count value is accordingly initialized to 0. Similarly, in response to the subsequent receipt of an IO command to access logical block address 52, buffer entry 514 is populated with logical block address 52 and the corresponding count value is initialized to 0.

Buffer B shows the contents of the buffer after receiving IO commands with logical block addresses 2 and 21. In response to receiving an IO command with logical block address 2, it is checked whether the IO command hits a buffer entry. Since the address field of buffer entry 512 is 1 and the logical block address "2" is the next address of the contents of the address field of buffer entry 512, the IO command hits in buffer entry 512. In response, buffer entry 512 is filled with the logical block address "2" of the IO command, and the count value of buffer entry 512 is incremented (resulting in 1). In response to receiving an IO command with a logical block address of 21, the IO command is filled into an empty entry 516 of the buffer since the IO command does not hit on any of the buffer entries.

Buffer C shows the contents of the buffer after receiving IO commands with LBA 100 and LBA 3. In response to receiving an IO command with logical block address 100, it is checked whether the IO command hits in a buffer entry. Since an IO command with a logical block address of 100 misses on any one buffer entry, a new entry is allocated in the buffer for the IO command. In the example of FIG. 5, there is an empty entry 518 in the buffer, and an IO command with a logical block address of 100 fills the empty entry 518 in the buffer. The IO command with logical block address 3 is received next. An IO command with logical block address 3 hits in buffer 512, fills the logical block address "3" of the IO command in the address field of entry 512, and increments the count value of entry 512. In the example of fig. 5, if the count value of entry 512 satisfies the specified condition of sequential flow detection (e.g., the count value is not less than 2), the IO command having logical block address 3 is identified as belonging to the sequential flow, and sequential flow flag SS1 is pointed to buffer entry 512.

Buffer D shows the contents of the buffer after receiving IO commands with LBA 70 and LBA 4. In response to receiving an IO command with a logical block address of 70, it is checked whether the IO command hits in a buffer entry. Since an IO command with a logical block address of 70 misses on any one buffer entry, a new entry is allocated in the buffer for the IO command. In the example of fig. 5, an empty entry 519 exists in the buffer, and an IO command with a logical block address of 70 is filled in the empty entry 51 of the buffer. Those skilled in the art will appreciate that the buffer entries may be populated with information for IO commands that miss buffer entries in other manners. For example, the entry with the lowest count value in the plurality of buffer entries (512, 514, 516, and 518) or the buffer entry with the last update time farthest from the current time is selected. In another example, since buffer entries 512 are identified as indicating sequential flow, when selecting an IO entry to be replaced for an IO command that misses any entry, an entry is selected according to a selection policy from among a plurality of buffer entries (514, 516, 518, 519, and 520) without regard to buffer 512 indicating sequential flow. For example, an entry with the smallest count value is selected from a plurality of buffer entries whose last update time is the longest from the current time; or an entry having the last update time that is the longest from the current time is selected from among a plurality of buffer entries having the smallest count value.

The IO command with logical block address 4 is received next. An IO command with logical block address 4 hits in buffer 512, fills the logical block address "3" of the IO command in the address field of entry 512, and increments the count value of entry 512. Sequential flow tag SS1 still points to entry 512 and tags the IO command with logical Block Address 4 as belonging to a sequential flow.

In the example of FIG. 5, the IO commands in input stream 550 are all write commands. And writes data to be written identified as a plurality of write commands belonging to the sequential stream to storage locations on the storage medium that are adjacent in physical address, e.g. to the same memory block, or to memory pages or memory blocks that are consecutive in physical address.

In another example, sequential stream detection is performed on read commands and write commands, respectively, in the input stream. Write commands that make up the sequential stream are written to adjacent storage locations, while for read commands that make up the sequential stream, pre-read commands are generated to read data from locations adjacent to the address accessed by the current read command. The data read by the pre-read command may be stored in a cache of the storage medium (e.g., a buffer register of the NAND flash memory), a cache of the storage device, or a memory of the host.

Fig. 6 illustrates a buffer change in a sequential flow detection process according to yet another embodiment of the present invention. The input stream 650 is a plurality of IO commands following the input stream 550, and the storage locations with logical block addresses 5, 47, 6 to 10, 53, 19, 67, 54, and 13 are accessed in chronological order, for example, the IO commands are write commands, and one of the IO commands writes data into the storage location with logical block addresses 6 to 10, so that the data written or read by the IO command has different lengths.

Buffer E shows the contents of the buffer after receiving two IO commands with logical block addresses 5 and 47. An IO command to access logical block address 5 hits in buffer entry 512 (logical block address 5 is after address field "3" of buffer entry 512 (see buffer D of fig. 5)), updates buffer entry 512 to logical block address 5, and increments the corresponding count value. In response to the subsequent receipt of an IO command to access the logical block address 47, the logical block address 47 is recorded in the free entry 520 of the buffer and the corresponding count value is initialized.

Buffer F shows the contents of the buffer after receiving IO commands with logical block addresses 6-10 and 53-54. In response to receiving an IO command with a logical block address of 6-10, which hits in buffer entry 512 (the first address "6" of logical block address 6-10 follows the address "5" of buffer entry 512), fill entry 512 with the last logical block address "10" of the IO command, and increment the count value of entry 512 by 5 since the IO command occupies 5 logical block addresses. In response to receiving an IO command having logical block addresses 53-54, because the IO command hits in buffer entry 514, logical block address "54" is filled into entry 514 and the count value of entry 514 is incremented to 2. The count value of entry 514 satisfies the specified condition for sequential flow detection (e.g., the count value is not less than 2), the IO command having logical block address 54 is identified as belonging to a sequential flow, and sequential flow flag SS2 is pointed to buffer entry 514.

In another example, only one sequential stream is marked at a time. Thus, even if the count value of entry 514 satisfies the condition for marking as a sequential flow (e.g., not less than 2), the IO command that hit entry 514 is not marked as a sequential flow since sequential flow SS1 already exists. If entry 514 is hit by a subsequent plurality of IO commands such that the count value of entry 514 exceeds the count value of entry 512 (e.g., becomes the largest count value entry in the plurality of entries), the IO command that hits entry 514 may be tagged as belonging to a sequential flow.

Buffer G shows the contents of the buffer after receiving IO commands with logical block addresses 19 and 67. In response to receiving an IO command with a logical block address of 19, the IO command misses any buffer entries. One of the buffer entries is selected for accommodating IO commands with logical block address 19. Because

entries

512 and 514 are indicated as belonging to a sequential flow,

entries

512 and 514 are used as little as possible to accommodate IO commands that miss any entries. In entries 516-520, one of the entries 516-520 with the smaller count value is preferably selected to accommodate the new IO command. For example, entry 516, which has an earlier update time, is selected to accommodate an IO command with a logical block address of 19 and the count value is initialized. In response to receiving an IO command with a logical block address of 67, the IO command misses any buffer entries. The smaller count value (0 in buffer G of FIG. 6) and earlier in time entry 518 is selected to accommodate the IO command with logical block address 67 and the count value is initialized.

Buffer H shows the contents of the buffer after receiving IO commands with LBA 54 and LBA 13. In response to receiving an IO command having a logical block address 54, the IO command hits entry 514 (the logical block address of the received IO command is the same as the address in the entry, also considered a hit), and the count value of entry 514 is incremented. As another example, a start address and an end address (or a start address and a length) are recorded in an entry, and if there is an overlap between a logical block address of a received IO command and an address recorded in the entry, the entry is also considered as a hit.

And in response to receiving an IO command with logical block address 13 that misses any of the entries, entry 519 is selected to accommodate the IO command with logical block address 13.

In a further example, the number of buffer entry misses is also counted. For example, after receiving an IO command with a logical block address of 13, if there are 9 misses in the buffer entry accumulation, and the threshold is reached, the count values of all the entries in the buffer are decremented. As shown in buffer H in FIG. 6, the count value of entry 512 is decremented to 8, the count value of entry 514 is decremented to 2, and the count values of the other entries are already at a minimum value and remain unchanged.

In a further example, IO commands that are not identified as belonging to a sequential flow are identified as a random flow, such that all IO commands identified as random flows may be handled in the same or different manners.

Fig. 7 is a flow chart of a sequential flow detection method according to an embodiment of the present invention. According to an embodiment of the invention, sequential stream detection is implemented in a storage device. The storage device receives an IO command from a host or other storage device (710). The IO command includes a logical block address indicating a storage location of data to be accessed. The IO command may be a read command, a write command, or other type of command. The data to be accessed by the IO command may have different lengths, and accordingly, the logical address of the IO command may be a range. The following describes a method of sequential stream detection by taking a write command as an example.

Referring to fig. 4, a plurality of entries, each including a logical block address and a corresponding count value, are cached in a buffer, such as a memory. In response to receiving the IO command, it is checked whether the logical block address of the IO command hits in the buffered entry (720). By way of example, referring to FIG. 5, the contents of the current buffer are shown by buffer B. An IO command with a logical block address of 3 is received. In buffer B, if an IO command with entry 512 having address "2" and logical block address 3 hits entry 512, then logical block address "3" of the IO command replaces the address field of the hit entry 512, and the corresponding count value is incremented (730). Next, it is determined whether the count value satisfies a threshold (740). By way of example, a threshold value for the count value is defined as "3" and the current count value of entry 512 satisfies (e.g., is not less than) the threshold value, then the IO command having a logical block address of 3 is marked as belonging to the sequential flow (750).

In a further example, an IO command is received to access a logical block address of 70 (710). An IO command with logical block address 70 does not hit a cached address in any of the entries, then one of the entries is selected for accommodating the IO command. Referring to the buffer D of fig. 5, the selected entry 519 accommodates the IO command having the logical block address of 70, and the count value of the entry 519 is initialized.

In one example, at most one sequential stream exists at any one time. Even if the count value of a plurality of entries satisfies the threshold, only one entry is marked as belonging to the sequential flow, for example, the IO command corresponding to the entry with the largest count value is marked as belonging to the sequential flow. In yet another example, there may be m sequential flows (m >1) at the same time, and IO commands corresponding to m entries whose count values satisfy the threshold are marked as belonging to a sequential flow. The label is provided for sequential flow to distinguish sequential flow, such as sequential flow SS1 from sequential flow SS 2. The sequential flow has a life cycle, and in the life cycle, the same sequential flow tag is generally allocated to the IO command hitting the same entry.

The relationship between the various addresses may be considered a hit, e.g., the address of the IO command is numerically immediately adjacent to the address in the entry, the address of the IO command may be incremented by the address in the entry, the address of the IO command is the same as the address in the entry or the distance of the address of the IO command from the address in the entry is below a threshold. Further, an address range is indicated in the IO command, and the start address of the address range of the IO command is numerically immediately adjacent to the address in the entry, may be incremented from the address in the entry, or may include the address in the entry. In yet another example, the address range is recorded in the entry, and the address range of the IO command immediately borders the lower bound of the address range in the entry, or the address range of the IO command overlaps the address range in the entry.

In another embodiment according to the present invention, the storage device includes a tag in an IO command received from a host. By way of example, the tag indicates the host, virtual machine, application that issued the IO command or otherwise indicates that the IO command belongs to sequential flow SS 1. The sequential stream is thus identified in the storage device according to the tag in the IO command. In response to receiving the IO command, if a tag indicating sequential flow SS1 is present in the IO command, the IO command is accommodated with entry 512 associated with sequential flow SS1 (see buffer C of FIG. 5), including replacing the address in entry 512 with the address of the IO command and incrementing the count value of entry 512. If tag T3 is present in the IO command (it is not explicitly indicated that the IO command belongs to the sequential flow) and there is no entry in the buffer associated with tag T3 (see buffer D of FIG. 5), an entry (e.g., entry 520 in entries 514 and 520) is selected to accommodate the IO command and tag T3 is recorded in association with entry 520. And, when an IO command carrying a tag T3 is received again, even if the IO command misses entry 520, the IO command is accommodated with entry 520, thereby being distinguished from IO commands carrying other tags. In yet another example, if no tag is present in the IO command received by the storage device, no sequential flow detection is performed on the IO command. In yet another example, the host and the storage device use the same sequential flow label, or the host and the storage device may learn the sequential flow labels used by each other.

Fig. 8 is a flowchart of a sequential flow detection method according to yet another embodiment of the present invention. The storage device receives an IO command from a host or other storage device (810). Referring back to fig. 6, the contents of the current buffer are shown by buffer E. IO commands with logical block addresses of 6-10 are received. In buffer E, the address recorded in entry 512 is "5", the address of the IO command hits in the address recorded in entry 512, and entry 512 has been marked as belonging to the sequential stream (820), thus the IO command with logical block address 6-10 is marked as belonging to the sequential stream (830). Alternatively, the address recorded in the update entry 512 is "10" (buffer F of fig. 6), and the count value of the update entry 512. In another example, an IO command (810) is received with logical block addresses 53-54 (buffer E of FIG. 6). The IO command miss is marked as entry 512(820) belonging to the sequential flow, and the address recorded in entry 514 is "52", which is hit (840). The address of the hit entry 514 is replaced with the address of the IO command having a logical block address of 53-54 and the count value of the entry 514 is incremented (850). Next, it is determined whether the updated entry 514 satisfies a preset condition. For example, the count value of the entry 514 is 2, the preset condition is satisfied, and the IO command with the logical block address of 53-54 is marked as belonging to the sequential flow (870). In one example, where there is already a sequential flow identified by SS1 (corresponding to the IO command hitting entry 512), a new sequential flow identification SS2 is assigned, marking the IO command with logical block addresses 53-54 as belonging to sequential flow SS 2.

In yet another example, an IO command with a logical block address of 19 is received (810) (buffer F of FIG. 6). The IO command miss is marked as an

entry

512, 514, (820) belonging to the sequential flow, and also misses other entries in the buffer (840), incrementing a miss count value (880). The miss count value is used to monitor the life cycle of the sequential flow so that sequential flows that have not been presented with new IO commands for a long time can be replaced with new sequential flows. A determination is made as to whether the miss count value exceeds a threshold (890). By way of example, the current miss count value is 7, not greater than the threshold (890), such that the miss count value remains unchanged, and one of the cached entries is replaced with the logical block address 19 of the IO command (897), illustratively accommodated by the least recently used entry 519.

If the uncommanded count value exceeds the threshold (890), the count values of all entries in the buffer are decremented (895) (see buffer H of FIG. 6), for example, and the miss count value is reset. Thus, when the life cycle of the sequential flow is over and the received IO command no longer belongs to any sequential flow, the buffer will frequently miss and decrement the count value of each entry to a value that does not satisfy the condition and cause the

entries

512, 514 to no longer be marked as belonging to the sequential flow.

The above describes a sequential stream detection method according to an embodiment of the present invention, taking a write command as an example. A similar approach may be used to detect the presence of a sequential stream in a received read command. In response to the read commands appearing in sequence, data at subsequent addresses may be pre-read based on the address of the current read command. The pre-read data may be buffered and responded to with low latency to subsequent read commands.

Further, the type of the received IO command (read command or write command) is distinguished, and sequential stream detection is performed for the IO commands of different types. And providing resources such as a special buffer, a sequence flow identifier, a miss counter and the like for different types of commands respectively.

FIG. 9 is a block diagram of a sequential flow detection system according to an embodiment of the present invention. To implement sequential flow detection, the addresses of recently received IO commands are cached in a plurality of entries, and a hit count is also recorded in each entry in association with the address of the IO command. The sequential flow detection system according to the embodiment of the present invention includes a hit detection module 910 and a sequential flow marking module 920. The hit detection module 910 is configured to, in response to receiving the IO command, replace an address of the IO command with a cached hit address if the address of the IO command hits an IO address, which is marked as belonging to a sequential flow, of the plurality of cached IO addresses. Sequential stream marking module 920 is used to mark IO commands as belonging to a sequential stream.

Embodiments of the present invention also provide a program comprising program code which, when loaded into and executed on a CPU, causes the CPU to perform one of the methods according to embodiments of the present invention provided above.

Embodiments of the present invention also provide a program comprising program code, which, when loaded into and executed on a storage device, causes the processor of the storage device to perform one of the methods according to embodiments of the present invention provided above.

It will be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, respectively, can be implemented by various means including computer program instructions. These computer program instructions may be loaded onto a general purpose computer, special purpose computer, or other programmable data control apparatus to produce a machine, such that the instructions which execute on the computer or other programmable data control apparatus create means for implementing the functions specified in the flowchart block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data control apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including computer-readable instructions for implementing the function specified in the flowchart block or blocks. The computer program instructions may also be loaded onto a computer or other programmable data control apparatus to cause a series of operational operations to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide operations for implementing the functions specified in the flowchart block or blocks.

Accordingly, blocks of the block diagrams and flowchart illustrations support combinations of means for performing the specified functions, combinations of operations for performing the specified functions and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, can be implemented by special purpose hardware-based computer systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Although the present invention has been described with reference to examples, which are intended to be illustrative only and not to be limiting of the invention, changes, additions and/or deletions may be made to the embodiments without departing from the scope of the invention.

Many modifications and other embodiments of the inventions set forth herein will come to mind to one skilled in the art to which these embodiments pertain having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the inventions are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

Claims

1. Sequential flow detection method, wherein a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the method comprises the following steps:

in response to receiving a first IO command, if the first IO command hits one of the plurality of cached IO addresses, replacing the hit one of the plurality of IO addresses with a first address of the first IO command, incrementing a first hit count associated with the first address;

if the first hit count satisfies a threshold, marking the first IO command as belonging to a first sequential flow;

if the first IO miss misses any of the cached IO addresses, replacing one of the IO addresses with the first address and initializing a hit count value associated with the replaced IO address.

2. The sequential flow detection method of claim 1, wherein

The first address hits one of a plurality of addresses of the cache, including:

the first address is numerically immediately adjacent to one of the plurality of IO addresses;

the first address may be incremented by one of the plurality of IO addresses;

the first address is the same as one of the plurality of IO addresses;

the first address overlaps with one of the plurality of IO addresses; or

The first address is less than a threshold distance from one of the plurality of addresses.

3. A method of sequential flow detection according to claim 1 or 2, wherein a miss counter is provided; the method further comprises the following steps:

if the first IO command misses any one of the plurality of cached IO addresses, incrementing the miss counter;

if the miss counter exceeds a threshold, a hit count associated with each of the plurality of addresses is decremented.

4. The sequential flow detection method of claim 1 or 2, the method further comprising:

in response to receiving a second IO command, if the second IO command hits the cached first IO address and the first hit count satisfies a threshold, replacing one of the hit plurality of IO addresses with a second address of the second IO command and marking the second IO command as belonging to a first sequential stream.

5. The sequential flow detection method of claim 1 or 2, the method further comprising:

in response to receiving a second IO command, if a second address of the second IO command hits one of the plurality of cached IO addresses other than the first IO address, replacing the one of the plurality of hit IO addresses with the second address, incrementing a second hit count associated with the second address, replacing the one of the plurality of hit IO addresses with the second address, and if the second hit count satisfies a threshold, marking the second IO command as belonging to a first sequential stream.

6. The sequential flow detection method according to claim 1 or 2, wherein

If a first address of a first IO command hits in one of the plurality of cached IO addresses, incrementing the first hit count corresponding to a data length of the first IO command.

7. Sequential flow detection method, wherein a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the method comprises the following steps:

responding to a received first IO command, and if the first IO command hits an IO address which is marked as belonging to a first sequential flow in a plurality of cached IO addresses;

the first IO command is marked as belonging to a sequential flow.

8. The sequential flow detection method of claim 7, further comprising:

if the first IO command hits a second address which is not marked as belonging to a first sequential stream in the plurality of cached IO addresses, replacing the hit second address with the first address, and incrementing a second hit count associated with the first address;

if the second hit count satisfies the threshold, the first IO command is marked as belonging to the sequential flow.

9. The sequential flow detection method of claim 7 or 8, further comprising:

if the first IO command misses any one of the plurality of IO addresses of the cache, incrementing a miss counter;

decrementing a hit count associated with each of the plurality of addresses if the miss counter exceeds a threshold; and

and replacing one of the IO addresses which are not marked as belonging to the sequential flow in the plurality of cached IO addresses by the first address.

10. A sequential flow detection system in which a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the system comprises:

a hit detection module, configured to, in response to receiving a first IO command, if a first address of the first IO command hits one of the cached IO addresses, replace the hit one of the IO addresses with the first address, increment a first hit count associated with the first address, if the first IO misses any one of the cached IO addresses, replace the one of the IO addresses with the first address, and initialize a hit count value associated with the replaced IO address; and

and a sequential flow tagging module configured to tag the first IO command as belonging to a first sequential flow if the first hit count satisfies a threshold.

11. A sequential flow detection system in which a plurality of IO addresses are cached; recording a hit count in association with each of the cached plurality of IO addresses; the system comprises:

a hit detection module, configured to, in response to receiving a first IO command, replace a hit IO address with a first address of the first address if the first command hits an IO address, which is marked as belonging to a first sequential flow, in a plurality of IO addresses cached in the cache; and

and the sequential flow marking module is used for marking the first IO command as belonging to the sequential flow.