CN107195586A - A kind of GaN horizontal nanowires electronic device preparation method - Google Patents

A kind of GaN horizontal nanowires electronic device preparation method Download PDF

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CN107195586A
CN107195586A CN201710287542.5A CN201710287542A CN107195586A CN 107195586 A CN107195586 A CN 107195586A CN 201710287542 A CN201710287542 A CN 201710287542A CN 107195586 A CN107195586 A CN 107195586A
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gan
substrate
horizontal
electronic device
nano wire
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CN107195586B (en
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何苗
王志成
丛海云
郑树文
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South China Normal University
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South China Normal University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669Nanowires or nanotubes
    • H01L29/0673Nanowires or nanotubes oriented parallel to a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035209Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions comprising a quantum structures
    • H01L31/035227Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions comprising a quantum structures the quantum structure being quantum wires, or nanorods

Abstract

The invention discloses a kind of GaN horizontal nanowires electronic device preparation method, directly in the horizontal GaN nano wire of Grown, and by photoetching process prepare square-shaped electrode array, use PECVD device deposit thickness for 2250 SiO2;There is a SiO2 nano wire deposited atop metal platinum in deposition by FIB techniques, and draw metal platinum and be connected to another square-shaped electrode.The present invention passes through the horizontal GaN nano wire of direct growth on substrate, it is strong with substrate caking property, nanowire-junction structure UV detector and nanometer wire field effect tube are integrated simultaneously, nano wire need not be shifted, not only strengthen device stability, fault in material is reduced simultaneously, device size is reduced, and improves application.The present invention can be widely applied to microelectronic as a kind of GaN horizontal nanowires electronic device preparation method.

Description

A kind of GaN horizontal nanowires electronic device preparation method
Technical field
The present invention relates to microelectronic, especially a kind of GaN horizontal nanowires electronic device preparation method.
Background technology
Field-effect transistor is the basic device of microelectronic, and metal oxide semiconductor field effect tube is that one kind can be with It is widely used in analog circuit and the field-effect transistor of digital circuit.The work of chip is improved by reducing the size of transistor Speed and integrated level, the chip power-consumption density that reduces are always that microelectronics industry develops pursued target.In the past few decades, Microelectronics industry development follows Moore's Law always.Currently, the physical gate length of field-effect transistor is close to more than ten nanometers, and grid are situated between Matter also only have several oxygen atom thickness, improved by reducing the size of conventional field effect transistor performance faced some be stranded Difficulty, this, which is primarily due to short-channel effect and grid leakage current under small size, changes the switch performance of transistor.
Ultraviolet detection technology is widely used in terms of military and civilian.Militarily, missile warning, guidance, ultraviolet logical There is the demand of ultraviolet detection in terms of news, biochemical analysis.On civilian, such as naked light detection, biological medicine analysis, ozone prison Survey, offshore oil prison, solar illumination monitoring, public security investigation etc..All the time, used highly sensitive ultraviolet detection to ultraviolet sensitivity more Photomultiplier and similar vacuum device.Ultraviolet enhancement silicon photoelectric diode is the representative of solid probe.With respect to solid For detector, there is the shortcomings of volume is big, operating voltage is high in vacuum device;And silicon device the characteristics of have visible light-responded Shortcoming can be become in some ultra violet applications.
The content of the invention
In order to solve the above-mentioned technical problem, the purpose of the present invention is:A kind of low cost, high-performance GaN horizontal nanos are provided Line electronic device preparation method.
The technical solution adopted in the present invention is:A kind of GaN horizontal nanowires electronic device preparation method, includes following Step:
Put substrate into 4:Deionized water rinsing is used after soaking 4min, taking-up in 1 sulfuric acid, hydrogen peroxide;Place the substrate into acetone 80 DEG C of 10 min of ultrasonic cleaning in solution, then place into ethanol solution 80 DEG C of 10 min of ultrasonic cleaning, spent after taking-up from Sub- water is rinsed;
Using with vacuum coating equipment metallic film is plated in substrate surface;
In HVPE growth apparatus, there is the Grown horizontal nanowire of catalyst in evaporation by VLS methods;
The substrate that growth has horizontal GaN nano wire is put into chloroazotic acid and soaks 30s;
There is photoetching 100* on the substrate of horizontal GaN nano wire in growth by spin coating, front baking, rear baking, exposure, developing procedure 100mm square-shaped electrode array;
Using vacuum coating equipment on the good substrate of photoetching metal film;
Use PECVD device deposit thickness for 2250 SiO2
There is SiO in deposition by FIB techniques2A nano wire deposited atop metal platinum, and draw metal platinum be connected to it is square Electrode.
Further, the substrate is Sapphire Substrate.
Further, using with vacuum coating equipment, when substrate surface plates metallic film, the metallic film is thickness 2nm/2nm Ni/Au.
Further, in HVPE growth apparatus, there is the Grown horizontal nano of catalyst in evaporation by VLS methods Line, growth conditions is:Temperature is 850 DEG C, and GaCl flows are 10sccm, NH3Flow is 100sccm, and the time is 4 min.
Further, using vacuum coating equipment on the good substrate of photoetching during metal film, the metallic film is thickness Spend 50nm/300nm Ni/Au.
Further, use PECVD device deposit thickness for 2250 SiO2Condition be:Temperature is 300 DEG C, and pressure is 600mTorr, N2O flows are 1000sccm, SiH4Flow is 500sccm, and He flows are 25sccm, N2Flow is 475sccm.
The beneficial effects of the invention are as follows:By the horizontal GaN nano wire of direct growth on substrate, itself and substrate caking property By force, while nanowire-junction structure UV detector and nanometer wire field effect tube are integrated, without shifting nano wire, it is to avoid receive Rice noodles in transfer process breakage or fracture, not only strengthen device stability, while reduce fault in material, reduce device Size, improves application.
Brief description of the drawings
Fig. 1 is the inventive method flow chart of steps;
Fig. 2 prepares first stage schematic diagram for the present invention;
Fig. 3 prepares second stage schematic diagram for the present invention;
Fig. 4 prepares phase III schematic diagram for the present invention;
Fig. 5 prepares fourth stage schematic diagram for the present invention.
Embodiment
The embodiment to the present invention is described further below in conjunction with the accompanying drawings:
A kind of reference picture 1, GaN horizontal nanowires electronic device preparation method, includes following steps:
Put substrate into 4:Deionized water rinsing is used after soaking 4min, taking-up in 1 sulfuric acid, hydrogen peroxide;Place the substrate into acetone 80 DEG C of 10 min of ultrasonic cleaning in solution, then place into ethanol solution 80 DEG C of 10 min of ultrasonic cleaning, spent after taking-up from Sub- water is rinsed;
Using with vacuum coating equipment metallic film is plated in substrate surface;
In HVPE growth apparatus, there is the Grown horizontal nanowire of catalyst in evaporation by VLS methods;
The substrate that growth has horizontal GaN nano wire is put into chloroazotic acid and soaks 30s;
There is photoetching 100* on the substrate of horizontal GaN nano wire in growth by spin coating, front baking, rear baking, exposure, developing procedure 100mm square-shaped electrode array;
Using vacuum coating equipment on the good substrate of photoetching metal film;
Use PECVD device deposit thickness for 2250 SiO2
There is SiO in deposition by FIB techniques2A nano wire deposited atop metal platinum, and draw metal platinum be connected to it is square Electrode.
It is further used as preferred embodiment, the substrate is Sapphire Substrate.
Be further used as preferred embodiment, using with vacuum coating equipment when substrate surface plates metallic film, institute State the Ni/Au that metallic film is thickness 2nm/2nm.
It is further used as preferred embodiment, in HVPE growth apparatus, has catalyst in evaporation by VLS methods Grown horizontal nanowire, growth conditions is:Temperature is 850 DEG C, and GaCl flows are 10sccm, NH3Flow is 100sccm, the time is 4 min.
Be further used as preferred embodiment, using vacuum coating equipment on the good substrate of photoetching metal film When, the metallic film is thickness 50nm/300nm Ni/Au.
Be further used as preferred embodiment, use PECVD device deposit thickness for 2250 SiO2Condition be: Temperature is 300 DEG C, and pressure is 600mTorr, N2O flows are 1000sccm, SiH4Flow is 500sccm, and He flows are 25sccm, N2Flow is 475sccm.
The specific embodiment of the present invention can refer to Fig. 2-4:
Put substrate into 4:Deionized water rinsing is used after soaking 4min, taking-up in 1 sulfuric acid, hydrogen peroxide;Place the substrate into acetone 80 DEG C of 10 min of ultrasonic cleaning in solution, then place into ethanol solution 80 DEG C of 10 min of ultrasonic cleaning, spent after taking-up from Sub- water is rinsed;
Using vacuum coating equipment metallic film is plated in substrate surface;
In hydride gas-phase epitaxy(HVPE, Hydride Vapor Phase Epitaxy)In growth apparatus, pass through VLS (vapor liquid solid)Method has the Grown horizontal nanowire of Au/Ni catalyst in evaporation;
The substrate 1 that growth has horizontal GaN nano wire 2 is put into chloroazotic acid and soaks 30s, remaining metal, its structure such as Fig. 2 is removed It is shown;
There is photoetching 100* on the substrate of horizontal GaN nano wire in growth by spin coating, front baking, rear baking, exposure, developing procedure 100mm square-shaped electrode array.In specific embodiment as shown in Figure 2, include two nano wires 21,22, square-shaped electrode battle array Two square-shaped electrodes in row set the two ends for being connected to two nano wires respectively, as shown in figure 3, horizontal GaN nano wire two ends Respectively there is a square-shaped electrode 3,4.
Using vacuum coating equipment on the good substrate of photoetching metal film;
Use PECVD device deposit thickness for 2250 SiO2, SiO2Layer 6 is as shown in Figure 4;
As shown in figure 5, passing through focused ion beam(FIB, Focused Ion Beam)Technique has SiO in deposition2A nanometer Nano wire 22 in line, reference picture 2, its deposited atop metal platinum 7, and draw metal platinum 7 and be connected to another square-shaped electrode, that is, scheme Square-shaped electrode 5 shown in 3, as the grid of nanometer wire field effect tube, the square-shaped electrode of the two ends connection of the nano wire is made respectively For the drain-source electrodes of nanometer wire field effect tube;And nano wire 21, its conduct in another nano wire as shown in Figure 5, reference picture 2 The part of nano wire ultraviolet detector.In specific preparation process, different structures can be used for different devices, specifically Depending on into square-shaped electrode array, the connected mode of each square-shaped electrode can be according to actual conditions.
The characteristics of one-dimensional nanostructured prepared by the inventive method has big specific surface area, mono-crystalline structures, thus it is one-dimensional Nanostructured turns into the construction unit of construction novel nano photoelectric device.The One-Dimensional GaN nano wire of high-crystal quality has high carry Flow transport factor, hyperpyrexia and chemical stability.Relative to membrane structure, one-dimensional nano structure has less defect, material matter Amount is more preferable, and has antireflection effect to light, therefore the ultraviolet detector and FET that One-Dimensional GaN nano material is made Performance is more superior;Simultaneously as in preparation process, GaN is grown by VLS methods using hydride gas phase epitaxial growth equipment Nanometer line rate reaches 1um/min, and growth rate is far above expensive devices such as MOCVD, MBE, so as to reduce cost.
Above is the preferable implementation to the present invention is illustrated, but the invention is not limited to the implementation Example, those skilled in the art can also make a variety of equivalents or replace on the premise of without prejudice to spirit of the invention Change, these equivalent deformations or replacement are all contained in the application claim limited range.

Claims (6)

1. a kind of GaN horizontal nanowires electronic device preparation method, it is characterised in that include following steps:
Put substrate into 4:Deionized water rinsing is used after soaking 4min, taking-up in 1 sulfuric acid, hydrogen peroxide;Place the substrate into acetone 80 DEG C of 10 min of ultrasonic cleaning in solution, then place into ethanol solution 80 DEG C of 10 min of ultrasonic cleaning, spent after taking-up from Sub- water is rinsed;
Using with vacuum coating equipment metallic film is plated in substrate surface;
In HVPE growth apparatus, there is the Grown horizontal nanowire of catalyst in evaporation by VLS methods;
The substrate that growth has horizontal GaN nano wire is put into chloroazotic acid and soaks 30s;
There is photoetching 100* on the substrate of horizontal GaN nano wire in growth by spin coating, front baking, rear baking, exposure, developing procedure 100mm square-shaped electrode array;
Using vacuum coating equipment on the good substrate of photoetching metal film;
Use PECVD device deposit thickness for 2250 SiO2
There is SiO in deposition by FIB techniques2A nano wire deposited atop metal platinum, and draw metal platinum and be connected to square electric Pole.
2. a kind of GaN horizontal nanowires electronic device preparation method according to claim 1, it is characterised in that:The lining Bottom is Sapphire Substrate.
3. a kind of GaN horizontal nanowires electronic device preparation method according to claim 1, it is characterised in that:Use use Vacuum coating equipment is when substrate surface plates metallic film, and the metallic film is thickness 2nm/2nm Ni/Au.
4. a kind of GaN horizontal nanowires electronic device preparation method according to claim 1, it is characterised in that:In HVPE In growth apparatus, there is the Grown horizontal nanowire of catalyst in evaporation by VLS methods, growth conditions is:Temperature is 850 DEG C, GaCl flows are 10sccm, NH3Flow is 100sccm, and the time is 4 min.
5. a kind of GaN horizontal nanowires electronic device preparation method according to claim 1, it is characterised in that:Using true Empty coating machine is on the good substrate of photoetching during metal film, and the metallic film is thickness 50nm/300nm Ni/Au.
6. a kind of GaN horizontal nanowires electronic device preparation method according to claim 1, it is characterised in that:Using PECVD device deposit thickness is 2250 SiO2Condition be:Temperature is 300 DEG C, and pressure is 600mTorr, N2O flows are 1000sccm, SiH4Flow is 500sccm, and He flows are 25sccm, N2Flow is 475sccm.
CN201710287542.5A 2017-04-27 2017-04-27 A kind of GaN horizontal nanowire electronic device preparation method Active CN107195586B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104124272A (en) * 2014-07-14 2014-10-29 华南师范大学 Integrated nonpolar GaN nanowire transistor high in electron mobility and preparation method thereof
CN105762078A (en) * 2016-05-06 2016-07-13 西安电子科技大学 GaN-based nanometer channel transistor with high electron mobility and manufacture method
CN106571405A (en) * 2016-11-01 2017-04-19 华南师范大学 Ultraviolet detector with GaN nanowire array and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104124272A (en) * 2014-07-14 2014-10-29 华南师范大学 Integrated nonpolar GaN nanowire transistor high in electron mobility and preparation method thereof
CN105762078A (en) * 2016-05-06 2016-07-13 西安电子科技大学 GaN-based nanometer channel transistor with high electron mobility and manufacture method
CN106571405A (en) * 2016-11-01 2017-04-19 华南师范大学 Ultraviolet detector with GaN nanowire array and manufacturing method thereof

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