CN107169476B - Frequency identification system based on neural network - Google Patents
Frequency identification system based on neural network Download PDFInfo
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Abstract
The invention belongs to the field of integrated circuits, and particularly relates to a frequency identification system based on a neural network. The invention utilizes the neural network module to process the sample containing the frequency information, after the training of the sample is finished, the neural network module stores the current state, and when the input frequency is identified subsequently, the initial rough range target code Cbit is directly output without repeating the searching process, thereby completing the rapid identification of the frequency. The invention can be used in a phase-locked loop circuit, and can obtain accurate output frequency after correction.
Description
Technical Field
The invention belongs to the field of integrated circuits, and particularly relates to a frequency identification system based on a neural network.
Background
The frequency identification is to roughly divide a single frequency in a frequency band and identify the rough range to which the single frequency belongs, so that the circuit can quickly identify the single frequency. When identifying the frequency, the roughly divided frequency in the frequency band is coded, the whole process is to find the corresponding target code from a sequential sequence, the most efficient search mode is the dichotomy, and of course, other modes such as sequential search can also complete the task.
When the dichotomy search is used, an initial value is provided and compared with the input frequency, and then the dichotomy search is carried out for multiple times to obtain the frequency range of the dichotomy search.
For sequential series search, since all frequency ranges are traversed, the speed is slower than that of binary search, which is equivalent to increasing the time for preliminary identification of the frequency.
The binary search of the sequential sequence is the most efficient way, but when the initial frequency is relatively large, the binary search needs to be repeatedly executed for many times, which limits the possibility of further shortening the recognition time.
With conventional search methods, when we identify multiple times, the search process needs to be repeated for each identification, which increases the total time to identify the frequency.
Disclosure of Invention
In order to complete the preliminary identification and rapid classification of the frequency in a frequency band, the invention provides a frequency identification system based on a neural network, which utilizes the neural network to process data related to the previous state, trains samples containing frequency information, realizes the classification of the frequency and finally obtains a target code of the frequency in the rough range.
The frequency identification system based on the neural network, as shown in fig. 1, includes a neural network module, a sampling module, a multiplexer and a supervised learning information acquisition module.
The sampling module has two input signals: sampling clock fclk and sampled signal fin, converting the collected fin into a series of Serial data composed of 0 and 1 by a sampling module, namely, a signal which can be processed by a neural network module and outputting the signal; the output of the neural network module is connected with the input of the neural network module.
The supervised learning information acquisition module has two input signals which are the same as those of the sampling module: a sampling clock fclk and a sampled signal fin; the output signal is the target code Cbit of the primary rough range where fin is located, and is connected with the input of the neural network module; and determining the Cbit corresponding to the fin by adopting a binary search mode, providing a training target for the neural network module, and comparing and supervising the training and output of the neural network module in real time through the controller.
The neural network module has two input signals: the Serial data output by the sampling module and the Cbit output by the supervised learning information acquisition module; the two enabling terminals EN _ TRAIN and EN _ OUT are used for switching the working state of the neural network module; the output signal is the target output Train after the neural network module finishes training; the controller is in data communication with the neural network, and the training process and the accuracy are displayed; the output of the neural network module is connected to the input of the multiplexer S2.
The multiplexer has two input signals: s1 and S2, wherein the input signal of S1 is provided by the outside and is denoted as DataIn, and the input signal of S2 is Train; an enable terminal EN and a signal selection terminal Con are provided, S1 is selected when Con is 1 to realize external writing of target codes, S2 is selected when Con is 0 to be written by the neural network module for selection; the output signal of which is the final output Cbit.
Further, when EN-TRAIN is enabled, the neural network module inputs the serial data and the Cbit obtained by the sampling module into the neural network module at the same time, wherein the serial data mainly comprises the following information: the Cbit data is used for finally checking whether the network trains an effective result or not; and when the requirement of the accuracy after the supervised learning is met, enabling the EN-OUT to output the final target output.
Further, the neural network is a circulating neural network, and the adopted model is a long-time memory model LSTM.
The working process comprises the following steps:
the first stage is as follows: generating training samples and obtaining training targets
Inputting a sampled frequency finAnd clock frequency fclkSampling module to input frequency finSampling to obtain serial binary code serial data containing frequency and phase information, wherein the input frequency f of each timeinThe Cbit is provided by a supervised learning information acquisition module and corresponds to an expected target code Cbit representing the initial rough range of the target code;
for the ith input frequency fiCorresponding to the object code CiThe input frequency is the frequency range (f)min，fmax) Completing traversal to obtain a training sample X ═ fi，Ci]；
And a second stage: training of neural network modules
Enabling an EN _ TRAIN signal, and enabling a neural network to enter a training state;
a. initializing a neural network and a training sample;
initializing a neural network model and a network initial weight, initializing the number of input neurons to be n, wherein n is more than or equal to 1, and initializing a training sample to be X ═ fi，Ci]Wherein f isiAs sample input to the neural network, fiThe code is a row of serial binary codes and consists of 0 and 1, and the sequence of 0 and 1 comprises frequency and phase information; the Cbit is used as a training target of the neural network and is represented by a binary system;
b. training
Using a neural network training algorithm, firstly generating network output according to a sample, monitoring the accuracy of a training result through a controller, adjusting the number of hidden layers and a network weight when the accuracy requirement is not met, storing neural network parameters including a neural network model, the number of input neurons and the network weight until the accuracy requirement is met, and finishing training;
and a third stage: work by
a. Reading the input frequency fin
Read input finSampling and processing the serial binary code into serial binary code serial data;
b. the neural network outputs the rough range target code Cbit corresponding to the input frequency
And the neural network module responds to the input serial data according to the neural network parameters stored in the step, generates a Cbit corresponding to the input frequency, closes the training state of the neural network when EN _ OUT is enabled, and outputs the Cbit to realize frequency identification by the neural network.
Furthermore, the frequency identification system based on the neural network is used in a phase-locked loop circuit, and accurate output frequency can be obtained after correction.
The invention realizes the training of the sample containing the frequency information by utilizing the neural network module to process the data related to the previous state: firstly, inputting a training sample into a neural network module, wherein the neural network module can generate network output, monitoring the accuracy of a training result through a controller, adjusting the number of hidden layers and a network weight when the accuracy requirement is not met, and finishing training until the accuracy requirement is met.
In summary, the present invention utilizes the neural network module to process the sample containing the frequency information, after the training of the sample is finished, the neural network module stores the current state, and when the input frequency is identified subsequently, the initial rough range target code Cbit is directly output without repeating the search process, thereby completing the rapid identification of the frequency.
Drawings
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a sample schematic diagram of an embodiment employing a frequency sampling approach;
FIG. 3a is a schematic diagram of sample phase advance of an embodiment using a phase sampling method, and FIG. 3b is a schematic diagram of sample phase lag of an embodiment using a phase sampling method;
FIG. 4 is a schematic block diagram of the application of the present invention to a phase locked loop circuit;
FIG. 5 is a schematic diagram of a phase locked loop circuit employing frequency sampling according to an embodiment;
FIG. 6 is a schematic diagram of a phase locked loop circuit employing phase sampling according to an embodiment;
FIG. 7 is a topology of an RNN neural network;
FIG. 8 is a timing development diagram of the RNN neural network;
FIG. 9 is a flow chart of an LSTM-based RNN neural network.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
With reference to fig. 5 and 6, a cyclic Neural network structure rnn (current Neural networks), lstm (long Short Term memory) algorithm, a frequency sampling mode and a phase sampling mode are adopted, and a specific implementation example of the invention applied to fast locking of a phase-locked loop is given.
The Recurrent Neural Network (RNN) topology is shown in fig. 7 and includes an input layer, a hidden layer and an output layer, where the input set is labeled { x0, x1, …, xt, xt +1, … }, the output stage is labeled { y0, y1, …, yt, yt +1, … }, and the output set of hidden units is labeled { s0, s1, …, st, st +1, … }, and these hidden units complete the most important task.
Fig. 7 is a fragmentary structural view of the recurrent neural network. Since the ring of the hidden layer of the recurrent neural network includes self-loops and cross-loops, the RNN is often drawn as a timing development diagram as shown in fig. 8.
As can be easily seen from the timing development diagram, the input of the hidden layer also includes the state of the previous hidden layer, and as the timing increases, the network depth increases.
ot＝g(Vst) (1)
st＝f(Uxt+Wst-1) (2)
The example is implemented by a neural network frequency identification module and a phase-locked loop module, and the system is used for quick locking of a phase-locked loop circuit, and the topological structure is shown in figure 5.
The neural network frequency identification module comprises a neural network module, a sampling module, a multiplexer and a supervised learning information acquisition module, wherein the supervised learning information acquisition module is used for training the neural network to generate correct tuning curve codes, namely target codes Cbit of the primary rough range of the frequency;
the controller is connected with the neural network module and is used for realizing data communication with the cyclic neural network and displaying a training process, accuracy and the like;
the phase-locked loop module comprises a Phase Frequency Detector (PFD), a Charge Pump (CP), a loop filter (LPF), a voltage controlled oscillator (PFD) and a frequency Divider (Divider), and is used for realizing the PLL loop locking function;
the output of a supervised learning information acquisition module in the neural network module is connected with the input of the neural network module, the input of the supervised learning information acquisition module is connected with the reference frequency Fref and the frequency division frequency Fdiv, and the supervised learning information acquisition module is used for acquiring a correct tuning curve control word under the current frequency division ratio and providing a training target for the following RNN supervised learning. And fixing the frequency dividing ratio by adopting a binary searching mode, and then performing binary searching for multiple times to obtain the optimal tuning curve control word.
The input of the sampling module is connected with a reference frequency Fref and a frequency division frequency Fdiv, the output of the sampling module is connected with the input of the neural network module, and the sampling module is used for sampling the frequency division frequency Fdiv by using the reference frequency Fref, converting frequency information into a serial sequence of 0 and 1 and sending the serial sequence into the neural network module as a sample;
when a frequency sampling mode is adopted, the core module is an a/D converter, the sampled signal Fin is sampled by using a sampling clock Fclk, and Fin is sampled at the rising edge of each Fclk, so as to obtain a series of 0 and 1 serial sequences (as shown in fig. 2, the higher the square wave frequency is, the larger the difference between the sampled frequency and the sampling clock is, the lower the square wave frequency is, and the smaller the difference between the sampled frequency and the sampling clock is). When the data sampled by the frequency is processed, the single data corresponds to a determined frequency, wherein the sampling clock Fclk corresponds to a clock signal Fref, the sampled signal Fin is a frequency division frequency Fdiv, the sampled data fi represents the frequency of the current sampled signal, each frequency division ratio is sampled for multiple times, and a training sample and a test sample of a neural network module are constructed to provide input for a subsequent neural network module.
Furthermore, the input of the Phase Frequency Detector (PFD) is a reference frequency Fref and a frequency division frequency Fdiv, the output of the Phase Frequency Detector (PFD) is connected with the input of the Charge Pump (CP), the subsequent capacitor is charged and discharged, the CP output is adjusted through a loop filter (LPF), the output of the loop filter (LPF) is the control voltage Vcont of the Voltage Controlled Oscillator (VCO), the outputs vo1 and vo2 of the VCO are connected with the following frequency divider, the signal is divided by the frequency divider (Fdiv) and then connected with the PFD to form an input of the PFD, and the input of the PFD is compared with the reference frequency Fref to form a phase-locked loop.
However, the loop does not have the function of automatic locking, and the frequency division ratio needs to be manually adjusted to find the locking state. The reference frequency Fref and the frequency Fdiv obtained by frequency division are used as the input of a frequency identification module based on a neural network module, and the frequency identification module is used for helping the phase-locked loop to lock quickly.
Further, when the phase sampling is adopted, the core module is a TDC module, and functions to read the phase difference between the sampling clock Fclk and the sampled signal Fin by using the TDC module, where Fin enters a delay chain, and the rising edge of Fclk samples the level of the delay chain, and converts the phase information into a serial sequence of 0 and 1 (as shown in fig. 3a, a schematic diagram of the sampled frequency passing through the delay chain when the phase is advanced, and a schematic diagram of the sampled frequency passing through the delay chain when the phase is delayed is shown in fig. 3 b). When processing data sampled by phase, wherein the sampling clock Fclk corresponds to the clock signal Fref, the signal needing to enter the delay chain is the frequency division frequency Fdiv, and the sampled data fiWherein a single datum does not correspond to a certain frequency, but the difference between adjacent series corresponds to the phase difference between the sampled frequency Fdiv and the clock signal Fref, wherein the series a (a0, a1, a 2.) is a TDC sequence taken by sampling Fref rising edges a plurality of times by an Fdiv, denoted as fi。
One input of the A-bit multiplexer is connected with the output of the RNN module, one input of the A-bit multiplexer can be controlled by external write, and the A-bit multiplexer is provided with an enabling end and a signal selecting end, wherein the output of the A-bit multiplexer is connected to the VCO and can realize the selection of the external write of a tuning curve or the RNN write;
wherein the neural network module may process data related to previous states, such that training of samples containing frequency information may be achieved: firstly, a training sample is input into a neural network module, the neural network module can generate network output, the accuracy of a training result can be monitored through a controller, when the requirement of preset accuracy is not met, the number of hidden layers and a network weight are adjusted until the requirement of accuracy is met, and training is finished.
The frequency identification system based on the neural network is used for realizing the quick locking function of a phase-locked loop circuit by the following steps:
1. training samples are generated. The training sample is obtained by a sampling module, the sampling mode is a frequency sampling mode, and the data is obtained by A/D sampling. Because sampling is time-sequentially related, the front-back relation of 0 and 1 contains frequency information, and Serial data Serial-data is recorded as fi。
2. A training target is generated. The training target is obtained by a supervised learning information acquisition module, and the training target of the recurrent neural network is searched by a binary search method, a sequential search method and the like and is recorded as CiThus, a training sample X ═ f is obtainedi，Ci]Wherein f isiAs input to the recurrent neural network, CiThe training target of the recurrent neural network is represented by binary.
3. Repeating the above process for all the division ratios to obtain the frequency range (f) of the samplemin，fmax) And constructing a training sample and a testing sample with large enough data quantity.
4. When RNN enters training mode, different tuning curve control word CbitInput sequentially, and is marked as CiAnd different control words correspond to different tuning frequencies to obtain binary serial codes.
5. And training the recurrent neural network. Firstly, initializing a cyclic neural network and training samples, initializing a cyclic neural network model and a network initial weight, initializing the number of input neurons to be 1, and initializing the training samples to be X ═ fi，Ci]；
6. And training the weight matrix and the bias matrix in the neural network module. EN-TRAIN Enable, as shown in FIG. 7, samples data fiAnd corresponding CiInput into an input module, wherein CiSending the data to a prediction expectation module to detect whether a correct answer is obtained, and sampling data fiSending the data to a pre-processing preprocessing module for preprocessing, wherein the processing is x0，x1，...，xn](where n is the dimension of data, corresponds to the number of neurons in the first _ layer, and can be defined by itself according to the training result), then the processed data is sent to the first layer network of the first _ layer, and is calculated by combining the weights matrix and the biases matrix, and h is outputw，b(x) F (wx, b). The LSTM network and the output of the first _ layer are sent to the LSTM _ layer for calculation, the result is taken every 5000 times (the number of the viewed results can be defined by self), the result is sent to an output _ layer output module, the difference quotient of the result of the output _ layer and the data initially Input into the Input is calculated, and a gradient descent method is adopted for training (train). And updating the weight matrix weights and the bias matrix biases once each iteration is performed. And placing the test sample into the network for testing, and outputting the final correct probability by a prediction module. When EN-TRAIN is enabled, when a frequency sampling frequency mode is adopted, f obtained by the A/D module is usediData and CiData are simultaneously input into an input module, where fiThe data mainly comprises the following information: position of rising edge, position of falling edge and position of current frequency, CiThe data is used for finally checking whether the network trains out a valid result; when the phase sampling mode is adopted, f obtained by the TDC module is usediData and CiData are simultaneously input into an input module, where fiThe data mainly comprises the following information: position of rising edge, position of falling edge and position of current frequency, CiThe data is used for finally checking whether the network trains out a valid result;
7. and finally outputting by the neural network module. The accuracy of the training result can be monitored through the controller, when the preset accuracy requirement is not met, the number of the hidden layers and the network weight are adjusted until the accuracy requirement is met, the parameters of the cyclic neural network, including the cyclic neural network model, the number of input neurons and the network weight, are stored, the training is finished, and when the accuracy requirement is met, EN-OUT is enabled, and a sequence of a final corresponding tuning curve is output.
8. And outputting the control word to the PLL loop to complete the quick locking of the PLL loop. When the control word is output in an enabling mode, the control word is input into a capacitor array of the VCO, and a loop of the phase-locked loop circuit works to achieve quick locking.
In summary, it can be seen that the present invention can be used for frequency identification, and since the neural network can process a sequence with frequency information, the sampling mode for providing samples for the sequence can be obtained by different sampling modes, which are not limited to frequency sampling and phase sampling modes.
Claims (5)
1. A neural network-based frequency identification system, characterized by: the device comprises a neural network module, a sampling module, a multiplexer and a supervised learning information acquisition module;
the sampling module has two input signals: sampling clock fclk and sampled signal fin, converting the collected fin into a series of Serial data composed of 0 and 1 by a sampling module, namely, a signal which can be processed by a neural network module and outputting the signal; the output of the neural network module is connected with the input of the neural network module;
the supervised learning information acquisition module has two input signals which are the same as those of the sampling module: a sampling clock fclk and a sampled signal fin; the output signal is the target code Cbit of the primary rough range where fin is located, and is connected with the input of the neural network module; determining the Cbit corresponding to fin by adopting a binary search mode, providing a training target for the neural network module, and comparing and supervising the training and output of the neural network module in real time through a controller;
the neural network module has two input signals: the Serial data output by the sampling module and the Cbit output by the supervised learning information acquisition module; the two enabling terminals EN _ TRAIN and EN _ OUT are used for switching the working state of the neural network module; the output signal is the target output Train after the neural network module finishes training; the controller is in data communication with the neural network, and the training process and the accuracy are displayed; the output of the neural network module is connected with the input S2 of the multiplexer;
the multiplexer has two input signals: s1 and S2, wherein the input signal of S1 is provided by the outside and is denoted as DataIn, and the input signal of S2 is Train; an enable terminal EN and a signal selection terminal Con are provided, S1 is selected when Con is 1 to realize external writing of target codes, S2 is selected when Con is 0 to be written by the neural network module for selection; the output signal of which is the final output Cbit.
2. The neural network-based frequency identification system of claim 1, wherein:
when the EN-TRAIN is enabled, the neural network module simultaneously inputs the serial data and the Cbit obtained by the sampling module into the neural network module, wherein the serial data mainly comprises the following information: the Cbit data is used for finally checking whether the network trains an effective result or not; and when the requirement of the accuracy after the supervised learning is met, enabling the EN-OUT to output the final target output.
3. The neural network-based frequency identification system of claim 1, wherein: the neural network is a circulating neural network, and the adopted model is a long-time memory model LSTM.
4. The neural network-based frequency identification system of claim 1, wherein the workflow is as follows:
the first stage is as follows: generating training samples and obtaining training targets
Inputting a sampled frequency finAnd clock frequency fclkSampling module to input frequency finSampling to obtain serial binary code serial data containing frequency and phase information, wherein the input frequency f of each timeinThe Cbit is provided by a supervised learning information acquisition module and corresponds to an expected target code Cbit representing the initial rough range of the target code;
for the ith input frequency fiCorresponding to the object code CiThe input frequency is the frequency range (f)min，fmax) Completing traversal to obtain a training sample X ═ fi，Ci]；
And a second stage: training of neural network modules
Enabling an EN _ TRAIN signal, and enabling a neural network to enter a training state;
a. initializing a neural network and a training sample;
initializing a neural network model and a network initial weight, initializing the number of input neurons to be n, wherein n is more than or equal to 1, and initializing a training sample to be X ═ fi，Ci]Wherein f isiAs sample input to the neural network, fiThe code is a row of serial binary codes and consists of 0 and 1, and the sequence of 0 and 1 comprises frequency and phase information; the Cbit is used as a training target of the neural network and is represented by a binary system;
b. training
Using a neural network training algorithm, firstly generating network output according to a sample, monitoring the accuracy of a training result through a controller, adjusting the number of hidden layers and a network weight when the accuracy requirement is not met, storing neural network parameters including a neural network model, the number of input neurons and the network weight until the accuracy requirement is met, and finishing training;
and a third stage: work by
a. Reading the input frequency fin
Read input finSampling and processing the serial binary code into serial binary code serial data;
b. the neural network outputs the rough range target code Cbit corresponding to the input frequency
And the neural network module responds to the input serial data according to the neural network parameters stored in the step, generates a Cbit corresponding to the input frequency, closes the training state of the neural network when EN _ OUT is enabled, and outputs the Cbit to realize frequency identification by the neural network.
5. The neural network based frequency identification system of claim 1, used in a phase locked loop circuit, corrected to obtain an accurate output frequency.
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