CN107124615A - A kind of method and device of WebP lossy compression methods - Google Patents
A kind of method and device of WebP lossy compression methods Download PDFInfo
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- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
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Abstract
The invention discloses a kind of method and device of WebP lossy compression methods, performed based on multi-threaded parallel, raw image data is stored to the buffer nodes at FPGA ends；The buffer nodes of first queue are read, compression instruction is sent to FPGA ends, so that FPGA ends perform FPGA algorithm logics, raw image data is compressed, compressing image data is drawn, compressing image data is stored to the 2nd buffer；The buffer nodes of second queue are read, the compressing image data in the 2nd buffer is stored to the 3rd buffer；The 3rd buffer of the 3rd queue is read, coding is carried out and draws lossy compression method data.The application utilizes the basis that multi-threaded parallel is performed, and is flowing water execution by the process optimization of WebP lossy compression method serial process, and realizes using queue the synchronization between each step, and then improves the execution efficiency of WebP lossy compression methods.
Description
Technical field
The present invention relates to image processing field, more particularly to a kind of method and device of WebP lossy compression methods.
Background technology
Development and the lifting of picture pixels scale with image capture devices such as mobile phone, flat board and digital cameras so that
View data scale exponentially increases.
The growth of view data scale, serious challenge is brought to view data storage and the network bandwidth.In order to reduce figure
As data scale, view data can be compressed to storage and sent.And due to the figure such as current main-stream JPEG, PNG and GIF
The algorithm optimization of piece form is almost up to ultimate attainment, and a kind of new image compression format WebP arises at the historic moment, and it can not influence
The size of picture file is reduced in the case of Consumer's Experience, and has lossy compression method and Lossless Compression both of which concurrently.
In the prior art, the WebP lossy compression methods of the FPGA programmings based on OpenCL are, it is necessary to number inside first to file FPGA
According to memory space buffer, and by pending data transfer to buffer, then the data in buffer are handled,
The data that last reading process is finished, discharge buffer.Because whole handling process is serially performed, therefore its execution efficiency is not
It is high.
The content of the invention
It is an object of the invention to provide a kind of method and device of WebP lossy compression methods, it is therefore intended that solves prior art string
The problem of execution efficiency is relatively low caused by row execution WebP lossy compression method handling processes.
In order to solve the above technical problems, the present invention provides a kind of method of WebP lossy compression methods, this method includes：
Performed based on multi-threaded parallel, raw image data is stored to the buffer nodes at the FPGA ends of preliminery application, and
The buffer nodes are added to first queue, the buffer nodes include being used to store the of the raw image data
One buffer and the 2nd buffer for storing compressed data；
The buffer nodes of the first queue are read, compression instruction are sent to the FPGA ends, so that described
FPGA end groups perform FPGA algorithm logics, the raw image data are compressed, pressure is drawn in WebP Lossy Compression Algorithms
Compressed image data, the compressing image data is stored to the 2nd buffer, and by the buffer nodes added to the
Two queues；
The buffer nodes of the second queue are read, by the compressing image data in the 2nd buffer
Store to the 3rd buffer of preliminery application, the 3rd buffer is added to the 3rd queue；
The 3rd buffer of the 3rd queue is read, based on the WebP Lossy Compression Algorithms, to the compression
View data is encoded, and draws lossy compression method data.
Alternatively, the buffer nodes for reading the second queue, described in the 2nd buffer
Compressing image data is stored to the 3rd buffer of preliminery application, and the 3rd buffer is included added to the 3rd queue：
The buffer nodes of the second queue are read, the compressing image data is stored into being located to preliminery application
The 3rd buffer of host side, the 3rd queue is added to by the 3rd buffer.
Alternatively, performed described based on multi-threaded parallel, raw image data is stored to the FPGA ends of preliminery application
Buffer nodes, and by the buffer nodes be added to first queue before also include：
Buffer application instructions are sent to the FPGA ends, the buffer quantity control variable at the FPGA ends is read；
Variable is controlled to be compared size with predetermined threshold value the buffer quantity；
When buffer quantity control variable is less than the predetermined threshold value, then buffer applies successfully, will be described
Buffer quantity control variable adds one；
When buffer quantity control variable is more than or equal to the predetermined threshold value, then buffer applications failure.
Alternatively, also include in described 3rd buffer is added to after the 3rd queue：
The buffer nodes are discharged, and buffer quantity control variable is subtracted one.
Alternatively, the FPGA algorithm logics are based on OpenCL programming languages.
In addition, present invention also offers a kind of device of WebP lossy compression methods, the device includes：
Data memory module, for being performed based on multi-threaded parallel, raw image data is stored to the FPGA of preliminery application
The buffer nodes at end, and the buffer nodes are added to first queue, the buffer nodes include being used to store institute
State the first buffer of raw image data and the 2nd buffer for storing compressed data；
Compression module, the buffer nodes for reading the first queue send compression to the FPGA ends and referred to
Order, so that the FPGA end groups are in WebP Lossy Compression Algorithms, performs FPGA algorithm logics, the raw image data is carried out
Compression, draws compressing image data, the compressing image data is stored to the 2nd buffer, and the buffer is saved
Point is added to second queue；
Data read module, the buffer nodes for reading the second queue, by the 2nd buffer
The compressing image data store to the 3rd buffer of preliminery application, by the 3rd buffer be added to the 3rd queue；
Coding module, the 3rd buffer for reading the 3rd queue is calculated based on the WebP lossy compression methods
Method, is encoded to the compressing image data, draws lossy compression method data.
Alternatively, the data read module includes：
Host side reading unit, the buffer nodes for reading the second queue, by the number of compressed images
According to storing to the 3rd buffer positioned at host side of preliminery application, the 3rd buffer is added to the 3rd team
Row.
Alternatively, in addition to：
Variable read module is controlled, is instructed for sending buffer applications to the FPGA ends, reads the FPGA ends
Buffer quantity controls variable；
Comparison module, for controlling variable to be compared size with predetermined threshold value the buffer quantity；
First judge module, for when buffer quantity control variable is less than the predetermined threshold value, then buffer
Apply successfully, adding one by buffer quantity control variable；
Second judge module, for when the buffer quantity control variable be more than or equal to the predetermined threshold value when, then
Buffer application failures.
Alternatively, in addition to：
Module that release subtracts one, subtracts one for discharging the buffer nodes, and by buffer quantity control variable.
Alternatively, the FPGA algorithm logics are based on OpenCL programming languages.
A kind of method and device of WebP lossy compression methods provided by the present invention, is performed based on multi-threaded parallel, will be original
View data is stored to the buffer nodes at the FPGA ends of preliminery application, and buffer nodes are added into first queue, buffer
Node includes the first buffer for storing raw image data and the 2nd buffer for storing compressed data；Read
The buffer nodes of first queue, compression instruction is sent to FPGA ends, so that FPGA end groups are in WebP Lossy Compression Algorithms, is performed
FPGA algorithm logics, are compressed to raw image data, draw compressing image data, and compressing image data is stored to second
Buffer, and buffer nodes are added to second queue；The buffer nodes of second queue are read, by the 2nd buffer
Compressing image data is stored to the 3rd buffer of preliminery application, and the 3rd buffer is added into the 3rd queue；Read the 3rd queue
The 3rd buffer, based on WebP Lossy Compression Algorithms, compressing image data is encoded, lossy compression method data are drawn.This
The basis that application is performed using multi-threaded parallel, the process optimization of WebP lossy compression method serial process is performed for flowing water, and is utilized
The synchronization between each step is realized in queue, and then improves the execution efficiency of WebP lossy compression methods.
Brief description of the drawings
, below will be to embodiment or existing for the clearer explanation embodiment of the present invention or the technical scheme of prior art
The accompanying drawing used required in technology description is briefly described, it should be apparent that, drawings in the following description are only this hair
Some bright embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, can be with root
Other accompanying drawings are obtained according to these accompanying drawings.
A kind of flow signal of the embodiment for the WebP compression methods that Fig. 1 is provided by the embodiment of the present invention
Figure；
The structured flowchart for the WebP lossy compression method devices that Fig. 2 is provided by the embodiment of the present invention.
Embodiment
In order that those skilled in the art more fully understand the present invention program, with reference to the accompanying drawings and detailed description
The present invention is described in further detail.Obviously, described embodiment is only a part of embodiment of the invention, rather than
Whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not making creative work premise
Lower obtained every other embodiment, belongs to the scope of protection of the invention.
Refer to Fig. 1, a kind of embodiment for the WebP compression methods that Fig. 1 is provided by the embodiment of the present invention
Schematic flow sheet, this method comprises the following steps：
Step 101：Performed based on multi-threaded parallel, raw image data is stored to the buffer at the FPGA ends of preliminery application
Node, and the buffer nodes are added to first queue, the buffer nodes include being used to store the original image
First buffer of data and the 2nd buffer for storing compressed data.
It should be noted that above-mentioned first buffer can be the buffer for storing original image yuv data, specifically
Can be data_buffer；2nd buffer is specifically as follows result_buffer, for storing compression result data.And can
So that buffer nodes to be added to the head of first queue.
It should be evident that raw image data is being stored to before the data_buffer in buffer nodes, can be right
Original image yuv data is divided and pre-processed.
Step 102：The buffer nodes of the first queue are read, compression instruction is sent to the FPGA ends, with
Make the FPGA end groups in WebP Lossy Compression Algorithms, perform FPGA algorithm logics, the raw image data is compressed,
Compressing image data is drawn, the compressing image data is stored to the 2nd buffer, and the buffer nodes are added
Add to second queue.
Specifically, CPU can read the buffer nodes on first queue head, be waited if being sky in first team；Such as
Fruit is read successfully, then sends compression control instruction to FPGA ends.FPGA ends are instructed according to the compression control of reception, based on existing
WebP Lossy Compression Algorithms, perform FPGA algorithm logics, the raw image data in data_buffer are compressed.Compression
After finishing, compressing image data can be stored to the result_buffer of buffer nodes, and buffer nodes are added
To the head of second queue.
It is understood that FPGA algorithm logics can be the algorithm logic write based on OpenCL language or
The algorithm logic write based on other Languages, is not limited thereto.
Step 103：The buffer nodes of the second queue are read, by the compression in the 2nd buffer
View data is stored to the 3rd buffer of preliminery application, and the 3rd buffer is added into the 3rd queue.
Specifically, CPU can read the buffer nodes on the head of second queue, if second queue is sky, continue
Wait；If read successfully, compressing image data in result_buffer can be stored to the 3rd of pre- first to file
Buffer, is then added to the head of the 3rd queue through the 3rd buffer.
It should be noted that the 3rd buffer can be located at host side；It can also be FPGA ends, be not limited thereto.
Step 104：The 3rd buffer of the 3rd queue is read, it is right based on the WebP Lossy Compression Algorithms
The compressing image data is encoded, and draws lossy compression method data.
Specifically, CPU can read the 3rd buffer, if the 3rd queue is sky, continue waiting for；If read into
Work(, then can be based on existing Lossy Compression Algorithm, and compressing image data is carried out can be by view data after entropy code, coding
According to WebP stored in file format, required lossy compression method data are obtained.
It is understood that step 101,102,103 and 104 are realized that flowing water is held by the multi-thread concurrent based on CPU
OK.And the data syn-chronization between each step is realized using queue.
The WebP compression methods that the embodiment of the present invention is provided, are performed based on multi-threaded parallel, by original image number
First queue, buffer node bags are added to according to storing to the buffer nodes at the FPGA ends of preliminery application, and by buffer nodes
Include the first buffer for storing raw image data and the 2nd buffer for storing compressed data；Read first team
The buffer nodes of row, compression instruction is sent to FPGA ends, so that FPGA end groups are in WebP Lossy Compression Algorithms, performed FPGA and is calculated
Method logic, is compressed to raw image data, draws compressing image data, and compressing image data is stored to second
Buffer, and buffer nodes are added to second queue；The buffer nodes of second queue are read, by the 2nd buffer
Compressing image data is stored to the 3rd buffer of preliminery application, and the 3rd buffer is added into the 3rd queue；Read the 3rd queue
The 3rd buffer, based on WebP Lossy Compression Algorithms, compressing image data is encoded, lossy compression method data are drawn.Should
Method utilizes the basis that multi-threaded parallel is performed, and the process optimization of WebP lossy compression method serial process is performed for flowing water, and utilizes
The synchronization between each step is realized in queue, and then improves the execution efficiency of WebP lossy compression methods.
On the basis of above-described embodiment, the buffer nodes of the above-mentioned reading second queue, by described second
The compressing image data in buffer is stored to the 3rd buffer of preliminery application, and the 3rd buffer is added into the 3rd
The process of queue can be specially：The buffer nodes of the second queue are read, the compressing image data is stored
To the 3rd buffer positioned at host side of preliminery application, the 3rd buffer is added to the 3rd queue.
Include compressing and two processes of coding it is understood that WebP damages process, if the two steps put
Realized at FPGA ends, can make it that the resource at FPGA ends is not enough.Based on this, it may be preferable that compression process can be placed on to FPGA ends
Realize, cataloged procedure is placed on host side realization, to alleviate the computing pressure at FPGA ends.
Above-mentioned 3rd buffer can, in advance to the buffer of host side application, can specifically be shown as from CPU
result_host。
As can be seen that WebP compression methods provided in an embodiment of the present invention, are placed on FPGA ends by compression process and realize,
Cataloged procedure is placed on host side realization, solves and existing compression and coding is placed on into FPGA ends resource caused by FPGA ends are realized
Not enough the problem of, effectively alleviate the computing pressure at FPGA ends.
On the basis of any of the above-described embodiment, performed above-mentioned based on multi-threaded parallel, raw image data is stored
To the buffer nodes at the FPGA ends of preliminery application, and by the buffer nodes be added to first queue before can also include：
Buffer application instructions are sent to the FPGA ends, the buffer quantity control variable at the FPGA ends is read；Will be described
Buffer quantity control variable is compared size with predetermined threshold value；When buffer quantity control variable is less than the predetermined threshold value
When, then buffer applies successfully, adding one by buffer quantity control variable；When buffer quantity control variable is more than
Or during equal to the predetermined threshold value, then buffer applications failure.
If it should be noted that buffer application speed is more than rate of release, also FPGA memory on board can be caused to exhaust,
In order to avoid the generation of above mentioned problem, it is possible to use control variable to realize.
CPU can apply for buffer to FPGA ends, now, and CPU can read the buffer quantity control variable at FPGA ends
Buffer_num, by controlling variable and buffer maximum quantities MAX_BUFFER_NUM to compare size buffer quantity, if
Buffer quantity control variable is less than buffer maximum quantity MAX_BUFFER_NUM, then applies successfully, and buffer quantity controls
Variable buffer_num processed adds one；If buffer quantity control variable is more than or equal to buffer maximum quantities MAX_BUFFER_
NUM, application failure, is continued waiting for.
Above-mentioned predetermined threshold value is that buffer maximum quantities MAX_BUFFER_NUM can be by the FPGA ends memory size of itself
Determine.
It is understood that applying successfully, buffer quantity control variable then adds one, and has utilized after buffer nodes,
Buffer nodes can be discharged.
As a kind of embodiment, it can also be wrapped in above-mentioned 3rd buffer is added to after the 3rd queue
Include：The buffer nodes are discharged, and buffer quantity control variable is subtracted one.
As can be seen that the WebP compression methods that the embodiment of the present invention is provided, increase buffer quantity control variables,
The buffer at FPGA ends can be avoided to apply for that speed is more than rate of release, it is to avoid the hair of the tcam-exhaustion of FPGA ends memory on board
It is raw.
WebP lossy compression methods device provided in an embodiment of the present invention is introduced below, WebP described below damages pressure
Compression apparatus can be mutually to should refer to above-described WebP compression methods.
The structured flowchart for the WebP lossy compression method devices that Fig. 2 is provided by the embodiment of the present invention, reference picture 2WebP damages pressure
Compression apparatus can include：
Data memory module 21, for being performed based on multi-threaded parallel, raw image data is stored to preliminery application
The buffer nodes at FPGA ends, and buffer nodes are added to first queue, buffer nodes include being used to store original graph
The 2nd buffer as the first buffer of data and for storing compressed data；
Compression module 22, the buffer nodes for reading first queue send compression instruction to FPGA ends, so that
FPGA end groups perform FPGA algorithm logics, raw image data are compressed, compression figure is drawn in WebP Lossy Compression Algorithms
As data, compressing image data is stored to the 2nd buffer, and buffer nodes are added to second queue；
Data read module 23, the buffer nodes for reading second queue, by the compression in the 2nd buffer
View data is stored to the 3rd buffer of preliminery application, and the 3rd buffer is added into the 3rd queue；
Coding module 24, the 3rd buffer for reading the 3rd queue, based on WebP Lossy Compression Algorithms, to pressure
Compressed image data is encoded, and draws lossy compression method data.
Alternatively, above-mentioned data read module includes：
Host side reading unit, the buffer nodes for reading second queue, by compressing image data store to
The 3rd buffer positioned at host side of preliminery application, the 3rd queue is added to by the 3rd buffer.
Alternatively, in addition to：
Variable read module is controlled, is instructed for sending buffer applications to FPGA ends, reads the buffer numbers at FPGA ends
Amount control variable；
Comparison module, for controlling variable to be compared size with predetermined threshold value buffer quantity；
First judge module, for when buffer quantity control variable be less than predetermined threshold value when, then buffer applies successfully,
Buffer quantity control variable is added one；
Second judge module, for when buffer quantity control variable is more than or equal to predetermined threshold value, then buffer Shens
It please fail.
Alternatively, in addition to：
Module that release subtracts one, subtracts one for discharging buffer nodes, and by buffer quantity control variable.
Alternatively, above-mentioned FPGA algorithm logics are based on OpenCL programming languages.
The WebP lossy compression method devices that the embodiment of the present invention is provided, the basis performed using multi-threaded parallel, by WebP
The process optimization of lossy compression method serial process is that flowing water is performed, and realizes using queue the synchronization between each step, and then is improved
The execution efficiencys of WebP lossy compression methods.
The embodiment of each in this specification is described by the way of progressive, what each embodiment was stressed be with it is other
Between the difference of embodiment, each embodiment same or similar part mutually referring to.For being filled disclosed in embodiment
For putting, because it is corresponded to the method disclosed in Example, so description is fairly simple, related part is referring to method part
Explanation.
Professional further appreciates that, with reference to the unit of each example of the embodiments described herein description
And algorithm steps, can be realized with electronic hardware, computer software or the combination of the two, in order to clearly demonstrate hardware and
The interchangeability of software, generally describes the composition and step of each example according to function in the above description.These
Function is performed with hardware or software mode actually, depending on the application-specific and design constraint of technical scheme.Specialty
Technical staff can realize described function to each specific application using distinct methods, but this realization should not
Think beyond the scope of this invention.
Directly it can be held with reference to the step of the method or algorithm that the embodiments described herein is described with hardware, processor
Capable software module, or the two combination are implemented.Software module can be placed in random access memory (RAM), internal memory, read-only deposit
Reservoir (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technology
In any other form of storage medium well known in field.
WebP compression methods provided by the present invention and device are described in detail above.It is used herein
Specific case is set forth to the principle and embodiment of the present invention, and the explanation of above example is only intended to help and understands this
The method and its core concept of invention.It should be pointed out that for those skilled in the art, not departing from this hair
On the premise of bright principle, some improvement and modification can also be carried out to the present invention, these are improved and modification also falls into power of the present invention
In the protection domain that profit is required.
Claims (10)
1. a kind of method of WebP lossy compression methods, it is characterised in that including：
Performed based on multi-threaded parallel, raw image data is stored to the buffer nodes at the FPGA ends of preliminery application, and by institute
Buffer nodes are stated added to first queue, the buffer nodes include being used to store the first of the raw image data
Buffer and the 2nd buffer for storing compressed data；
The buffer nodes of the first queue are read, compression instruction are sent to the FPGA ends, so that the FPGA ends
Based on WebP Lossy Compression Algorithms, FPGA algorithm logics are performed, the raw image data is compressed, compression image is drawn
Data, the compressing image data is stored to the 2nd buffer, and the buffer nodes are added into second queue；
The buffer nodes of the second queue are read, the compressing image data in the 2nd buffer is stored
To the 3rd buffer of preliminery application, the 3rd buffer is added to the 3rd queue；
The 3rd buffer of the 3rd queue is read, based on the WebP Lossy Compression Algorithms, to the compression image
Data are encoded, and draw lossy compression method data.
2. the method as described in claim 1, it is characterised in that the buffer nodes of the reading second queue,
The compressing image data in 2nd buffer is stored to the 3rd buffer of preliminery application, by the 3rd buffer
Include added to the 3rd queue：
The buffer nodes of the second queue are read, the compressing image data is stored to preliminery application and is located at main frame
3rd buffer at end, the 3rd queue is added to by the 3rd buffer.
3. method as claimed in claim 1 or 2, it is characterised in that performed described based on multi-threaded parallel, by original image
Data storage to the FPGA ends of preliminery application buffer nodes, and by the buffer nodes be added to first queue before also wrap
Include：
Buffer application instructions are sent to the FPGA ends, the buffer quantity control variable at the FPGA ends is read；
Variable is controlled to be compared size with predetermined threshold value the buffer quantity；
When buffer quantity control variable is less than the predetermined threshold value, then buffer applies successfully, by the buffer
Quantity control variable adds one；
When buffer quantity control variable is more than or equal to the predetermined threshold value, then buffer applications failure.
4. method as claimed in claim 3, it is characterised in that it is described by the 3rd buffer added to the 3rd queue it
Also include afterwards：
The buffer nodes are discharged, and buffer quantity control variable is subtracted one.
5. method as claimed in claim 3, it is characterised in that the FPGA algorithm logics are based on OpenCL programming languages.
6. a kind of device of WebP lossy compression methods, it is characterised in that including：
Data memory module, for being performed based on multi-threaded parallel, raw image data is stored to the FPGA ends of preliminery application
Buffer nodes, and the buffer nodes are added to first queue, the buffer nodes include being used to store the original
First buffer of beginning view data and the 2nd buffer for storing compressed data；
Compression module, the buffer nodes for reading the first queue send compression instruction to the FPGA ends, with
Make the FPGA end groups in WebP Lossy Compression Algorithms, perform FPGA algorithm logics, the raw image data is compressed,
Compressing image data is drawn, the compressing image data is stored to the 2nd buffer, and the buffer nodes are added
Add to second queue；
Data read module, the buffer nodes for reading the second queue, by the institute in the 2nd buffer
State compressing image data to store to the 3rd buffer of preliminery application, the 3rd buffer is added to the 3rd queue；
Coding module, the 3rd buffer for reading the 3rd queue is right based on the WebP Lossy Compression Algorithms
The compressing image data is encoded, and draws lossy compression method data.
7. device as claimed in claim 6, it is characterised in that the data read module includes：
Host side reading unit, the buffer nodes for reading the second queue, the compressing image data is deposited
Store up to the 3rd buffer positioned at host side of preliminery application, the 3rd buffer is added to the 3rd queue.
8. device as claimed in claims 6 or 7, it is characterised in that also include：
Variable read module is controlled, is instructed for sending buffer applications to the FPGA ends, reads the FPGA ends
Buffer quantity controls variable；
Comparison module, for controlling variable to be compared size with predetermined threshold value the buffer quantity；
First judge module, for when buffer quantity control variable is less than the predetermined threshold value, then buffer to apply
Success, adds one by buffer quantity control variable；
Second judge module, for when the buffer quantity control variable be more than or equal to the predetermined threshold value when, then
Buffer application failures.
9. device as claimed in claim 8, it is characterised in that also include：
Module that release subtracts one, subtracts one for discharging the buffer nodes, and by buffer quantity control variable.
10. device as claimed in claim 8, it is characterised in that the FPGA algorithm logics are based on OpenCL programming languages.
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| CN108769694A (en) * | 2018-05-31 | 2018-11-06 | 郑州云海信息技术有限公司 | A kind of method and device of the Alpha channel codings based on FPGA |
| CN112437308A (en) * | 2020-11-12 | 2021-03-02 | 北京深维科技有限公司 | WebP coding method and device |
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