CN107124326B - Automatic testing method and system - Google Patents

Automatic testing method and system Download PDF

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CN107124326B
CN107124326B CN201710217735.3A CN201710217735A CN107124326B CN 107124326 B CN107124326 B CN 107124326B CN 201710217735 A CN201710217735 A CN 201710217735A CN 107124326 B CN107124326 B CN 107124326B
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test
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matching
module
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CN107124326A (en
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丁立创
王超
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Wuhan Changjiang Computing Technology Co ltd
Fiberhome Telecommunication Technologies Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/50Testing arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08Configuration management of networks or network elements
    • H04L41/0876Aspects of the degree of configuration automation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/14Arrangements for monitoring or testing data switching networks using software, i.e. software packages

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Automation & Control Theory (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention discloses an automatic testing method and system, and relates to the technical field of software testing. The test method comprises the following steps: analyzing the test bed file and the test topology files of all test cases; comparing the analyzed test topology files, merging the same test topology files and sequencing; according to the rearranged sequence, mapping and matching all logic devices in a test topology file with physical devices in a test bed file and occupying the logic devices; and if all the physical devices in the test bed file are mapped in a matching manner, executing all the related test cases in the test topology file which is mapped and matched in the previous step. The invention can solve the problem of dependence of the test script on the test environment, not only can improve the transportability of the test script and reduce the labor cost for building the test network and modifying the script, but also has high test efficiency.

Description

Automatic testing method and system
Technical Field
The invention relates to the technical field of software testing, in particular to an automatic testing method and system.
Background
The main workload of the automatic test is embodied in the compiling of the test script and the building and maintenance of the test environment. The compiling of the test script lies in the human input and the perfection of the bottom layer interface of the test script. Since the test script is too strongly dependent on the test environment, when the script needs to be transplanted to a new environment, large-scale script modification or test networking change occurs, which may take a lot of labor and time.
At present, in order to reduce the dependence of the test script on the test environment, the commonly used method in the industry is mainly as follows: defining an initialization file of a real environment, wherein the file contains basic configurations such as an IP (Internet Protocol, Protocol for interconnection between networks) address, a port type, a connection condition and the like of actual equipment; when the device is called in the test script, the device is directly operated by calling the login of the IP address telnet (remote terminal protocol), SSH (Secure Shell ) and the like of the device in the file.
This solution can achieve a certain portability, but still has significant limitations: this approach does not address the dependence of the script on the test physical environment. Specifically, because the device and the link used in the test script are fixed on a certain device and link in the real environment, when the test script needs to be transplanted, the initialization file still needs to be modified or the test networking needs to be changed, so that the efficiency of the automatic test, especially the efficiency of the test set running, is obviously reduced.
Disclosure of Invention
The invention aims to overcome the defects of the background technology, provides an automatic testing method and system, can solve the problem of dependence of a testing script on a testing environment, can improve the transportability of the testing script, reduce the labor cost for building a testing network and modifying the script, and has high testing efficiency.
In order to achieve the above object, the present invention provides an automated testing method, which comprises the following steps: A. analyzing the test bed file and the test topology files of all test cases; B. comparing the analyzed test topology files, merging the same test topology files and sequencing; C. according to the rearranged sequence, mapping and matching all logic devices in a test topology file with physical devices in a test bed file and occupying the logic devices; D. and C, if all the physical devices in the test bed file are mapped in a matching manner, executing all the related test cases in the test topology file which is mapped and matched in the step C.
On the basis of the technical scheme, the test bed file comprises physical equipment description information, equipment connection description information and equipment matching priority information; the test topology file includes forced matching information and logical device description information.
On the basis of the technical scheme, the specific process of the step C is as follows:
c1: according to the rearranged sequence, checking whether a certain logic device defined in the current test topology file has forced mapping with a physical device in the test bed file, if so, switching to the step C2, otherwise, switching to the step C3;
c2: directly executing forced mapping, and turning to step C7;
c3: performing multi-element mapping, and turning to step C4;
c4: and after the multi-tuple mapping is successfully carried out, judging whether a plurality of physical devices in the test bed file accord with the description of the logical device in the test topology file, if so, turning to a step C5, otherwise, turning to a step C6.
C5: performing priority mapping, matching the physical equipment with high mark priority in the test bed file to the logic equipment in the current test topology file, and turning to step C7;
c6: and mapping the first matched physical device in the test bed file to the logical device in the current test topology file, and proceeding to step C7.
C7: and detecting whether all the logic devices in the current test topology file are matched and mapped, if so, switching to the step S5, otherwise, repeating the steps C1-C7 to complete the matching and mapping of other logic devices in the current test topology file.
On the basis of the technical scheme, in the step D, if physical equipment needs to be mapped in the test bed file in a matching manner, after the physical equipment which is occupied by the physical equipment is removed from the test bed file in the matching manner, mapping and matching are carried out on the remaining equipment and the next test topology file according to the sequence, and if the physical equipment can be matched, all related test cases in the front test topology file and the rear test topology file are executed in parallel.
The invention also provides an automatic test system based on the method, which comprises an analysis module, a test topology file merging module, a mapping matching module and an execution module. The parsing module is configured to: analyzing the test bed file and the test topology files of all test cases, and sending a merging signal to a test topology file merging module; the test topology file merging module is used for: after receiving the merging signals, comparing the analyzed test topology files, merging and sequencing the same test topology files, and sending mapping matching signals to a mapping matching module; the mapping matching module is configured to: after receiving the mapping matching signals, mapping and matching all logic devices in a test topology file with physical devices in a test bed file according to the rearranged sequence, and transmitting execution signals to an execution module; the execution module is configured to: after receiving the execution signal, if all the physical devices in the test bed file are mapped in a matching manner, the execution mapping matching module is used for completing all relevant test cases in the mapped and matched test topology file.
On the basis of the technical scheme, the test bed file comprises: physical device description information, device connection description information, and device matching priority information; the test topology file includes: forced matching information and logical device description information.
On the basis of the technical scheme, the mapping matching module comprises a forced mapping matching sub-module, a multi-group mapping matching sub-module, a priority mapping matching sub-module and a mapping matching detection sub-module:
the forced mapping matching sub-module is configured to: after receiving the mapping matching signals, checking whether a certain logic device defined in the current test topology file has forced mapping with a physical device in the test bed file according to the rearranged sequence, if so, executing the forced mapping and sending a detection signal to the mapping matching detection submodule, otherwise, sending a multi-tuple mapping signal to the multi-tuple mapping matching submodule;
the tuple mapping matching submodule is configured to: after receiving the multi-tuple mapping signal, carrying out multi-tuple mapping, and after successfully carrying out multi-tuple mapping, sending a priority mapping signal to a priority mapping matching submodule;
the priority mapping matching sub-module is configured to: after receiving the priority mapping signal, judging whether a plurality of physical devices in the test bed file conform to the description of the logical device in the test topology file, if so, mapping the priority, matching the physical devices with high priorities marked in the test bed file to the logical device in the current test topology file, and sending a detection signal to a mapping matching detection submodule; otherwise, mapping the first matched physical device in the test bed file to the logic device in the current test topology file, and sending a detection signal to the mapping matching detection submodule;
the map match detection sub-module is to: and after receiving the detection signal, detecting whether all logic devices in the current test topology file are matched and mapped, if so, sending an execution signal to the execution module, and otherwise, sending a mapping matching signal to the forced mapping matching submodule.
On the basis of the above technical solution, the execution module further includes a remaining resource mapping execution sub-module, and the remaining resource mapping execution sub-module is configured to: if the physical equipment in the test bed file needs to be mapped in a matching way, after the physical equipment which is occupied by the matching is removed from the test bed file, mapping and matching the residual equipment and the next test topology file which is ordered, and if the physical equipment which is occupied by the matching is available, executing all related test cases in the front test topology file and the rear test topology file in parallel.
On the basis of the technical scheme, the analysis module comprises a test bed file analysis submodule and a test topology file analysis submodule; the test bed file analysis submodule is used for: analyzing the test bed file and sending a merging signal to a test topology file merging module; the test topology file analysis submodule is used for: and analyzing the test topology files of all the test cases, and sending a merging signal to a test topology file merging module.
The invention has the beneficial effects that:
(1) according to the invention, the physical equipment in the test bed file and the logic equipment in the test topology file in the test script are mapped and matched (namely, the tested equipment is described by the topology networking logic), so that the aim of isolating the test script from the physical equipment is fulfilled, the test case has the feasibility of smooth transplantation, the maintainability and the transportability of an automatic test set are greatly improved, and the labor cost for test networking construction and script modification is reduced. In addition, the same test topology files in the test script are combined, so that all related test cases can be run out only by matching the same test topology files with the test bed files once, the problem of repeatedly running the test cases is avoided, the time spent on matching mapping is saved, and the test efficiency is high.
(2) The invention also adopts a test thought of residual resource re-matching, when the last test topology file is matched with the equipment from the test bed file and occupies the equipment, if the residual resources (residual equipment) in the test bed file are not mapped and matched, the subsequent test topology file can be selected to be matched in the residual resources of the test bed file, if the residual resources (residual equipment) are matched, all related test cases in the front test topology file and the rear test topology file are executed in parallel, and the parallel execution mode of residual resource re-matching reduces the execution time of the test script and further improves the execution efficiency of the test.
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FIG. 1 is a flow chart of an automated testing method in an embodiment of the invention;
FIG. 2 is a diagram illustrating a matching mapping relationship between a TBD file, a TOPO file, and a test script according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating the relationship between a TBD file, a TOPO file, and a test script in an embodiment of the present invention;
FIG. 4 is a block diagram of an automated testing system according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the figures and the embodiments.
Referring to fig. 1, an embodiment of the present invention provides an automated testing method, including the following steps:
step S1: the test bed file is parsed, and the process proceeds to step S2.
It is understood that a test bed file, abbreviated as TBD (testbed) file, is used to describe all physical devices and their related attributes in an actual test environment, and different test environments may be described by different TBD files. The TBD file can be described by various formats, in the embodiment of the invention, txt suffix file is used for description, and the TBD file is added with equipment matching priority information besides the attributes including general physical equipment description and equipment connection description, when two equipment can be matched, the specific matching can be determined by looking at the priority parameter. Specifically, the physical device description information, the device connection description information, and the device matching priority information included in the TBD file include the following specific contents:
(1) device description information
Device type (type): the specific model of the device;
device name (name): the device name is referred by the device connection and the forced mapping in the topology;
device interface (interface): a port of a device;
device access channel (access): logging in an interface used by the equipment;
(2) device connection description information
Link connection (link): the link between devices is in the following format:
link name, device name 1 device interface/IP, mask-device name 2 device interface/IP, mask;
(3) device matching priority information
Priority (priority): 0-7, the 7 highest priority, default is 0.
Step S2: and analyzing the test topology files of all the test cases, and turning to the step S3.
It is understood that a test topology file (abbreviated as TOPO file) is included in a test script (used for completing command issue and result check operations on a device under test), and the TOPO file has a logical description of the device under test required for the test script to run. In the embodiment of the invention, the TOPO file comprises the necessary logical device description information such as device type, connection and the like, and also comprises the description information of forced mapping, and the devices need to be matched and occupied in the TBD file. Specifically, the TOPO file includes the following two parts:
(1) forcing matching information parts
Force mapping (force): defaulting to not enforce mapping for the name of the equipment in the TBD file;
(2) logical device description information section
Logical device name: the name of the logic device is directly called in the script;
logical device type: the type of the equipment is used for matching with the equipment in the TBD file;
the logic device is connected: describing logical device connection, and matching with the link connection in the TBD file;
and (3) logical interface: interface name, interface type, directly applied by the script.
TOPO files are described strictly in a format that maintains a good resolvability. After the logical device in the TOPO matches the device in the TBD file, all the attributes of the device in the TBD file will be inherited. The matching mapping relationship of the TBD file, the TOPO file and the test script is shown in FIG. 2. And the test script needs to call equipment names, equipment interfaces and the like which are defined in all application TOPO files, so that the script and the physical equipment are completely isolated, and the portability and maintainability of the script are greatly enhanced. The relation among the TBD file, the TOPO file and the test script is shown in FIG. 3.
Step S3: the parsed TOPO files are compared, the same TOPO files are merged and sorted (i.e. all test cases with the same topology share one TOPO file, only mapping is needed once), and the process proceeds to step S4.
It can be understood that the merging of the same TOPO files means that after the TOPO files in the test set are found to be the same by the system inspection, the same TOPO files are merged together by internal sorting, so that all related test cases can be run out only by matching one TOPO file with the TBD once, thereby not only avoiding the operation of repeated tests, but also saving the time spent on matching and mapping.
Step S4: and according to the reordered sequence, mapping, matching and occupying all the logical devices in one TOPO file with the physical devices in the TBD file, and transferring to the step S5.
Referring to fig. 1, in actual operation, step S4 specifically includes the following steps:
step S401: according to the re-ordered sequence, checking whether a certain logic device defined in the current TOPO file has a forced mapping with a physical device in the TBD, if so, turning to the step S402; otherwise, the process proceeds to step S403.
Step S402: the forced mapping is directly executed, and the process proceeds to step S407.
Step S403: the tuple mapping is performed, and the process proceeds to step S404.
Step S404: after the multi-tuple mapping is successfully performed, whether a plurality of devices in the TBD conform to the description of the logical device in the TOPO file (i.e., whether priority mapping is required or not) is determined, and if yes, the process goes to step S405; otherwise, the process proceeds to step S406.
Step S405: and performing priority mapping, matching the device with the highest mark priority in the TBD to the logical device in the current TOPO file, and turning to step S407.
Step S406: the first matched device in the TBD is mapped to the logical device in the current TOPO file, and the process proceeds to step S407.
Step S407: and detecting whether all the devices in the current TOPO file are matched and mapped, if so, turning to the step S5, otherwise, repeating the steps S301-S307 to complete the matching and mapping of other devices in the current TOPO file.
Step S5: and judging whether all the physical devices in the TBD are matched and mapped, if so, turning to the step S6, otherwise, indicating that residual resources (residual devices) in the TBD need to be matched, and turning to the step S7.
Step S6: and executing all relevant test cases in the current test set (the current test set is the merged TOPO file with the mapping matching completed in the step S4), and ending.
Step S7: after the devices which are occupied by the TOPO file matching in the step S4 are removed from the TBD, mapping and matching the remaining devices in the TBD with the next TOPO file according to the sorting, if there is any devices which can be matched, executing all related test cases in the two TOPO files before and after the matching (i.e. all related test cases of the TOPO file whose mapping and matching are completed before and the TOPO file whose mapping and matching are completed this time) in parallel, and ending.
It can be seen from steps S5 to S7 that, in the embodiment of the present invention, a testing concept of remaining resource re-matching is adopted, after a previous TOPO file is matched with a device from a TBD file and occupied, if remaining resources (remaining devices) in the TBD are not mapped and matched, a subsequent TOPO file may be selected to be matched in the remaining resources of the TBD, if there is a match, all related test cases in the previous TOPO file and the next TOPO file are executed in parallel, and this parallel execution manner of remaining resource re-matching further improves the execution efficiency of the test.
Referring to fig. 4, an embodiment of the present invention further provides an automated testing system based on the foregoing method, where the testing system includes an analysis module, a test topology file merging module, a mapping matching module, and an execution module. Wherein:
the analysis module is used for: and analyzing the test bed file and the test topology files of all test cases, and sending a merging signal to a test topology file merging module. Specifically, the parsing module includes a test bed file parsing submodule and a test topology file parsing submodule. And the test bed file analysis submodule is used for analyzing the test bed file and sending a combined signal to the test topology file combination module. And the test topology file analysis submodule is used for analyzing the test topology files of all the test cases and sending a merging signal to the test topology file merging module.
The test topology file merging module is used for: after receiving the merging signals, comparing the analyzed test topology files, merging and sequencing the same test topology files, and sending mapping matching signals to a mapping matching module.
The mapping matching module is used for: after receiving the mapping matching signals, according to the rearranged sequence, mapping and matching all the logic devices in a test topology file with the physical devices in the test bed file, and occupying the logic devices, and sending execution signals to the execution module.
Further, referring to fig. 4, the mapping matching module includes a forced mapping matching sub-module, a multi-element mapping matching sub-module, a priority mapping matching sub-module, and a mapping matching detection sub-module. The forced mapping matching sub-module is configured to: and after receiving the mapping matching signals, checking whether a certain logic device defined in the current test topology file has forced mapping with a physical device in the test bed file according to the rearranged sequence, if so, executing the forced mapping and sending a detection signal to the mapping matching detection submodule, otherwise, sending a multi-tuple mapping signal to the multi-tuple mapping matching submodule. The tuple mapping matching submodule is configured to: and after receiving the multi-tuple mapping signal, carrying out multi-tuple mapping, and after successfully carrying out multi-tuple mapping, sending a priority mapping signal to the priority mapping matching submodule. The priority mapping matching sub-module is configured to: after receiving the priority mapping signal, judging whether a plurality of physical devices in the test bed file conform to the description of the logical device in the test topology file, if so, mapping the priority, matching the physical devices with high priorities marked in the test bed file to the logical device in the current test topology file, and sending a detection signal to a mapping matching detection submodule; otherwise, mapping the first matched physical device in the test bed file to the logic device in the current test topology file, and sending a detection signal to the mapping matching detection submodule. The map match detection sub-module is to: and after receiving the detection signal, detecting whether all logic devices in the current test topology file are matched and mapped, if so, sending an execution signal to the execution module, and otherwise, sending a mapping matching signal to the forced mapping matching submodule.
The execution module is used for: after receiving the execution signal, if all the physical devices in the test bed file are mapped in a matching manner, the execution mapping matching module is used for completing all relevant test cases in the mapped and matched test topology file.
Further, referring to fig. 4, the execution module further includes a remaining resource mapping execution sub-module, where the remaining resource mapping execution sub-module is configured to: if the physical equipment in the test bed file needs to be mapped in a matching way, after the physical equipment which is occupied by the matching is removed from the test bed file, mapping and matching the residual equipment and the next test topology file which is ordered, and if the physical equipment which is occupied by the matching is available, executing all related test cases in the front test topology file and the rear test topology file in parallel.
It should be noted that: in the system provided by the above embodiment, when performing an automatic test, only the division of the functional modules is exemplified, and in practical applications, the function distribution may be completed by different functional modules as needed, that is, the internal structure of the system is divided into different functional modules to complete all or part of the functions described above.
The present invention is not limited to the above-described embodiments, and it will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the principle of the present invention, and such modifications and improvements are also considered to be within the scope of the present invention.
Those not described in detail in this specification are within the skill of the art.

Claims (4)

1. An automated testing method, comprising the steps of:
A. analyzing the test bed file and the test topology files of all test cases; the test bed file comprises physical equipment description information, equipment connection description information and equipment matching priority information; the test topology file comprises forced matching information and logic equipment description information;
B. comparing the analyzed test topology files, merging the same test topology files and sequencing;
C. according to the rearranged sequence, mapping and matching all logic devices in a test topology file with physical devices in a test bed file and occupying the logic devices;
D. if all the physical devices in the test bed file are mapped in a matching manner, executing all relevant test cases in the test topology file which is mapped and matched in the step C;
the specific process of the step C is as follows:
c1: according to the rearranged sequence, checking whether a certain logic device defined in the current test topology file has a forced mapping with a physical device in the test bed file, if so, turning to the step C2, otherwise, turning to the step C3;
c2: directly executing forced mapping, and turning to step C7;
c3: performing multi-element mapping, and turning to step C4;
c4: after the multi-tuple mapping is successfully carried out, whether a plurality of physical devices in the test bed file accord with the description of the logical device in the test topology file or not is judged, if yes, the step C5 is carried out, and if not, the step C6 is carried out;
c5: performing priority mapping, matching the physical equipment with high mark priority in the test bed file to the logic equipment in the current test topology file, and turning to step C7;
c6: mapping the first matched physical device in the test bed file to the logic device in the current test topology file, and turning to step C7;
c7: detecting whether all logic devices in the current test topology file are matched and mapped, if so, turning to the step S5, otherwise, repeating the steps C1-C7 to complete the matching and mapping of other logic devices in the current test topology file;
in the step D, if the physical equipment in the test bed file needs to be mapped in a matching way, after the physical equipment which is occupied by the matching is removed from the test bed file, mapping and matching the rest equipment with the next test topology file according to the sequence, and if the physical equipment which is occupied by the matching is available, executing all related test cases in the front test topology file and the rear test topology file in parallel.
2. An automated testing system based on the method of claim 1, wherein: the system comprises an analysis module, a test topology file merging module, a mapping matching module and an execution module;
the parsing module is configured to: analyzing the test bed file and the test topology files of all test cases, and sending a merging signal to a test topology file merging module; the test bed file includes: physical device description information, device connection description information, and device matching priority information; the test topology file includes: forced matching information and logical device description information;
the test topology file merging module is used for: after receiving the merging signals, comparing the analyzed test topology files, merging and sequencing the same test topology files, and sending mapping matching signals to a mapping matching module;
the mapping matching module is configured to: after receiving the mapping matching signals, mapping and matching all logic devices in a test topology file with physical devices in a test bed file according to the rearranged sequence, and transmitting execution signals to an execution module;
the execution module is configured to: after receiving the execution signal, if all the physical devices in the test bed file are mapped in a matching manner, the execution mapping matching module is used for completing all relevant test cases in the mapped and matched test topology file;
the mapping matching module comprises a forced mapping matching submodule, a multi-element mapping matching submodule, a priority mapping matching submodule and a mapping matching detection submodule:
the forced mapping matching sub-module is configured to: after receiving the mapping matching signals, checking whether a certain logic device defined in the current test topology file has forced mapping with a physical device in the test bed file according to the rearranged sequence, if so, executing the forced mapping and sending a detection signal to the mapping matching detection submodule, otherwise, sending a multi-tuple mapping signal to the multi-tuple mapping matching submodule;
the tuple mapping matching submodule is configured to: after receiving the multi-tuple mapping signal, carrying out multi-tuple mapping, and after successfully carrying out multi-tuple mapping, sending a priority mapping signal to a priority mapping matching submodule;
the priority mapping matching sub-module is configured to: after receiving the priority mapping signal, judging whether a plurality of physical devices in the test bed file conform to the description of the logical device in the test topology file, if so, mapping the priority, matching the physical devices with high priorities marked in the test bed file to the logical device in the current test topology file, and sending a detection signal to a mapping matching detection submodule; otherwise, mapping the first matched physical device in the test bed file to the logic device in the current test topology file, and sending a detection signal to the mapping matching detection submodule;
the map match detection sub-module is to: and after receiving the detection signal, detecting whether all logic devices in the current test topology file are matched and mapped, if so, sending an execution signal to the execution module, and otherwise, sending a mapping matching signal to the forced mapping matching submodule.
3. The automated test system of claim 2, wherein: the execution module further comprises a residual resource mapping execution submodule, configured to: if the physical equipment in the test bed file needs to be mapped in a matching way, after the physical equipment which is occupied by the matching is removed from the test bed file, mapping and matching the residual equipment and the next test topology file which is ordered, and if the physical equipment which is occupied by the matching is available, executing all related test cases in the front test topology file and the rear test topology file in parallel.
4. The automated test system of any of claims 2 to 3, wherein: the analysis module comprises a test bed file analysis submodule and a test topology file analysis submodule; the test bed file analysis submodule is used for: analyzing the test bed file and sending a merging signal to a test topology file merging module; the test topology file analysis submodule is used for: and analyzing the test topology files of all the test cases, and sending a merging signal to a test topology file merging module.
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