CN107111559A - 处理器芯片、布局方法及访问数据的方法 - Google Patents
处理器芯片、布局方法及访问数据的方法 Download PDFInfo
- Publication number
- CN107111559A CN107111559A CN201580001148.XA CN201580001148A CN107111559A CN 107111559 A CN107111559 A CN 107111559A CN 201580001148 A CN201580001148 A CN 201580001148A CN 107111559 A CN107111559 A CN 107111559A
- Authority
- CN
- China
- Prior art keywords
- data
- processor core
- data storage
- module
- visited
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
Abstract
本发明公开了一种处理器芯片、布局方法及访问数据的方法,处理器芯片包括路由器模块(230)构成的网络、处理器核(200)集合以及最后一级缓存LLC模块,LLC模块包括标签存储单元(210)与数据存储单元(220),其中:标签存储单元位于处理器芯片的第一位置,处理器核集合位于处理器芯片的第二位置,第一位置位于第二位置的中心;数据存储单元位于处理器芯片的第三位置,第三位置位于第二位置的四周;处理器核集合中的第一处理器核根据数据访问请求访问标签存储单元,获取数据访问请求对应的标签,并根据标签访问数据存储单元,得到待访问的数据。采用本发明,有利于缓解处理器核集合访问LLC模块时造成的拥塞,提高访问请求的执行效率。
Description
PCT国内申请,说明书已公开。
Claims (9)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2015/085779 WO2017020193A1 (zh) | 2015-07-31 | 2015-07-31 | 处理器芯片、布局方法及访问数据的方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107111559A true CN107111559A (zh) | 2017-08-29 |
CN107111559B CN107111559B (zh) | 2020-02-14 |
Family
ID=57942226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201580001148.XA Active CN107111559B (zh) | 2015-07-31 | 2015-07-31 | 处理器芯片、布局方法及访问数据的方法 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN107111559B (zh) |
WO (1) | WO2017020193A1 (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110055479A1 (en) * | 2009-08-28 | 2011-03-03 | Vmware, Inc. | Thread Compensation For Microarchitectural Contention |
US20150067259A1 (en) * | 2013-08-29 | 2015-03-05 | Ren Wang | Managing shared cache by multi-core processor |
US20150143051A1 (en) * | 2011-12-13 | 2015-05-21 | Intel Corporation | Providing Common Caching Agent For Core And Integrated Input/Output (IO) Module |
CN104781753A (zh) * | 2012-12-14 | 2015-07-15 | 英特尔公司 | 功率选通高速缓存存储器的一部分 |
-
2015
- 2015-07-31 CN CN201580001148.XA patent/CN107111559B/zh active Active
- 2015-07-31 WO PCT/CN2015/085779 patent/WO2017020193A1/zh active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110055479A1 (en) * | 2009-08-28 | 2011-03-03 | Vmware, Inc. | Thread Compensation For Microarchitectural Contention |
US20150143051A1 (en) * | 2011-12-13 | 2015-05-21 | Intel Corporation | Providing Common Caching Agent For Core And Integrated Input/Output (IO) Module |
CN104781753A (zh) * | 2012-12-14 | 2015-07-15 | 英特尔公司 | 功率选通高速缓存存储器的一部分 |
US20150067259A1 (en) * | 2013-08-29 | 2015-03-05 | Ren Wang | Managing shared cache by multi-core processor |
Also Published As
Publication number | Publication date |
---|---|
WO2017020193A1 (zh) | 2017-02-09 |
CN107111559B (zh) | 2020-02-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2637111B1 (en) | Data management system and method using database middleware | |
KR102219845B1 (ko) | 어드레스를 압축하기 위한 방법 및 장치 | |
CN109726206B (zh) | 区块链节点的数据处理方法、装置、设备和存储介质 | |
US20190213171A1 (en) | Directory Deletion Method and Apparatus, and Storage Server | |
CN108363641B (zh) | 一种主备机数据传递方法、控制节点以及数据库系统 | |
US9489328B2 (en) | System on chip and method for accessing device on bus | |
US7801883B2 (en) | Method and apparatus for improving data processing speed through storage of record information of identity module | |
US8209440B2 (en) | Device-configuration-information optimum arrangement method and device-configuration-information optimum arrangement system | |
CN109684335B (zh) | 基于键值对的数据结构实现方法、装置、设备和存储介质 | |
KR20170134348A (ko) | M2m 데이터 처리 방법, 디바이스, 및 시스템 | |
CN111258978B (zh) | 一种数据存储的方法 | |
US20150379067A1 (en) | Maintaining a data structure with data set names and pointers to a plurality of catalogs | |
CN105939355A (zh) | 一种数据访问方法、系统及客户端和服务器 | |
CN101673272A (zh) | 搜索信息的方法、系统、装置及垂直搜索引擎注册的方法 | |
CN114625762A (zh) | 一种元数据获取方法、网络设备及系统 | |
JP6088853B2 (ja) | 通信装置、通信方法および通信プログラム | |
US9836491B1 (en) | Method and apparatus for hardware-implemented AVL tree updates | |
JPWO2014010038A1 (ja) | 情報処理システム | |
US20170039140A1 (en) | Network storage device for use in flash memory and processing method therefor | |
US8539135B2 (en) | Route lookup method for reducing overall connection latencies in SAS expanders | |
KR101744317B1 (ko) | 서버 장치 및 위치 변화를 관리하는 방법 | |
JP2015114913A (ja) | ストレージ装置、ストレージシステム及びデータ管理プログラム | |
WO2016201998A1 (zh) | 一种缓存分配、数据访问、数据发送方法、处理器及系统 | |
CN109254930A (zh) | 数据访问方法及装置 | |
CN107111559A (zh) | 处理器芯片、布局方法及访问数据的方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |